--- /dev/null
+;------------------------------------------------------------------------------\r
+; @file\r
+; First code exectuted by processor after resetting.\r
+;\r
+; Copyright (c) 2008 - 2009, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution. The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+BITS 16\r
+\r
+ALIGN 16\r
+\r
+applicationProcessorEntryPoint:\r
+;\r
+; Application Processors entry point\r
+;\r
+; GenFv generates code aligned on a 4k boundary which will jump to this\r
+; location. (0xffffffe0) This allows the Local APIC Startup IPI to be\r
+; used to wake up the application processors.\r
+;\r
+ jmp short EarlyApInitReal16\r
+\r
+ALIGN 8\r
+\r
+ DD 0\r
+\r
+;\r
+; The VTF signature\r
+;\r
+; VTF-0 means that the VTF (Volume Top File) code does not require\r
+; any fixups.\r
+;\r
+vtfSignature:\r
+ DB 'V', 'T', 'F', 0\r
+\r
+ALIGN 16\r
+\r
+resetVector:\r
+;\r
+; Reset Vector\r
+;\r
+; This is where the processor will begin execution\r
+;\r
+ wbinvd\r
+ jmp short EarlyBspInitReal16\r
+\r
+ALIGN 16\r
+\r
+fourGigabytes:\r
+\r