UefiCpuPkg VTF0 X64: Build page tables in NASM code

[mirror_edk2.git] / UefiCpuPkg / ResetVector / Vtf0 / Ia16 / ResetVectorVtf0.asm

diff --git a/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm b/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm
index 610b956eb3a1ca01fa1fa705741f279ff67a6159..142d9f3212633ba1b7224478d4ee6c2fce301af3 100644 (file)
--- a/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm
+++ b/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm
@@ -2,7 +2,7 @@
 ; @file\r
 ; First code executed by processor after resetting.\r
 ;\r
-; Copyright (c) 2008 - 2011, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>\r
 ; This program and the accompanying materials\r
 ; are licensed and made available under the terms and conditions of the BSD License\r
 ; which accompanies this distribution.  The full text of the license may be found at\r
@@ -17,6 +17,19 @@ BITS    16
 \r
 ALIGN   16\r
 \r
+;\r
+; Pad the image size to 4k when page tables are in VTF0\r
+;\r
+; If the VTF0 image has page tables built in, then we need to make\r
+; sure the end of VTF0 is 4k above where the page tables end.\r
+;\r
+; This is required so the page tables will be 4k aligned when VTF0 is\r
+; located just below 0x100000000 (4GB) in the firmware device.\r
+;\r
+%ifdef ALIGN_TOP_TO_4K_FOR_PAGING\r
+    TIMES (0x1000 - ($ - EndOfPageTables) - 0x20) DB 0\r
+%endif\r
+\r
 applicationProcessorEntryPoint:\r
 ;\r
 ; Application Processors entry point\r
@@ -25,7 +38,7 @@ applicationProcessorEntryPoint:
 ; location.  (0xffffffe0)  This allows the Local APIC Startup IPI to be\r
 ; used to wake up the application processors.\r
 ;\r
-    jmp     short EarlyApInitReal16\r
+    jmp     EarlyApInitReal16\r
 \r
 ALIGN   8\r
 \r
@@ -50,7 +63,7 @@ resetVector:
 ;\r
     nop\r
     nop\r
-    jmp     short EarlyBspInitReal16\r
+    jmp     EarlyBspInitReal16\r
 \r
 ALIGN   16\r
 \r