UefiCpuPkg/CpuDxe: Enable protection for newly added page table

[mirror_edk2.git] / UefiCpuPkg / SecCore / SecMain.c

diff --git a/UefiCpuPkg/SecCore/SecMain.c b/UefiCpuPkg/SecCore/SecMain.c
index e9e243ca0585594d480527f5bdfda0dad681d724..c241d3704af72b9702b15fbcc277358aa195d678 100644 (file)
--- a/UefiCpuPkg/SecCore/SecMain.c
+++ b/UefiCpuPkg/SecCore/SecMain.c
@@ -189,7 +189,7 @@ SecStartup (
   //\r
   SecCoreData.DataSize               = (UINT16) sizeof (EFI_SEC_PEI_HAND_OFF);\r
   SecCoreData.BootFirmwareVolumeBase = BootFirmwareVolume;\r
-  SecCoreData.BootFirmwareVolumeSize = (UINTN)(0x100000000ULL - (UINTN) BootFirmwareVolume);\r
+  SecCoreData.BootFirmwareVolumeSize = (UINTN)((EFI_FIRMWARE_VOLUME_HEADER *) BootFirmwareVolume)->FvLength;\r
   SecCoreData.TemporaryRamBase       = (VOID*)(UINTN) TempRamBase;\r
   SecCoreData.TemporaryRamSize       = SizeOfRam;\r
   SecCoreData.PeiTemporaryRamBase    = SecCoreData.TemporaryRamBase;\r
@@ -281,7 +281,7 @@ SecStartupPhase2(
     // will be built based on them in PEI phase.\r
     //\r
     SecCoreData->PeiTemporaryRamBase = (VOID *)(((UINTN)SecCoreData->PeiTemporaryRamBase + 7) & ~0x07);\r
-    SecCoreData->PeiTemporaryRamSize &= ~0x07;\r
+    SecCoreData->PeiTemporaryRamSize &= ~(UINTN)0x07;\r
   } else {\r
     //\r
     // No addition PPI, PpiList directly point to the common PPI list.\r