CorebootPayloadPkg: Use extra braces to prevent gcc compile fail

[mirror_edk2.git] / UefiCpuPkg / UefiCpuPkg.dec

diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index 60bf5f09c454f8973f0d6b8c6db847b33d5edbd6..14a0bf2e4259285661b9e3dd617567b26eb93a1f 100644 (file)
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -1,10 +1,8 @@
-##  @file  UefiCpuPkg.dec\r
-#\r
+## @file  UefiCpuPkg.dec\r
 # This Package provides UEFI compatible CPU modules and libraries.\r
 #\r
-# Copyright (c) 2007 - 2009, Intel Corporation.\r
+# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>\r
 #\r
-# All rights reserved.\r
 # This program and the accompanying materials are licensed and made available under\r
 # the terms and conditions of the BSD License which accompanies this distribution.\r
 # The full text of the license may be found at\r
@@ -18,7 +16,51 @@
 [Defines]\r
   DEC_SPECIFICATION              = 0x00010005\r
   PACKAGE_NAME                   = UefiCpuPkg\r
+  PACKAGE_UNI_FILE               = UefiCpuPkg.uni\r
   PACKAGE_GUID                   = 2171df9b-0d39-45aa-ac37-2de190010d23\r
-  PACKAGE_VERSION                = 0.1\r
+  PACKAGE_VERSION                = 0.3\r
+\r
+[Includes]\r
+  Include\r
+\r
+[LibraryClasses]\r
+  ##  @libraryclass  Defines some routines that are generic for IA32 family CPU\r
+  ##                 to be UEFI specification compliant.\r
+  ##\r
+  UefiCpuLib|Include/Library/UefiCpuLib.h\r
+\r
+[LibraryClasses.IA32, LibraryClasses.X64]\r
+  ##  @libraryclass  Provides functions to manage MTRR settings on IA32 and X64 CPUs.\r
+  ##\r
+  MtrrLib|Include/Library/MtrrLib.h\r
+\r
+  ##  @libraryclass  Provides functions to manage the Local APIC on IA32 and X64 CPUs.\r
+  ##\r
+  LocalApicLib|Include/Library/LocalApicLib.h\r
+  \r
+[Guids]\r
+  gUefiCpuPkgTokenSpaceGuid      = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}\r
+\r
+#\r
+# [Error.gUefiCpuPkgTokenSpaceGuid]\r
+#   0x80000001 | Invalid value provided.\r
+#\r
+\r
+[PcdsFixedAtBuild, PcdsPatchableInModule]\r
+  ## This value is the CPU Local Apic base address, which aligns the address on a 4-KByte boundary.\r
+  # @Prompt Configure base address of CPU Local Apic\r
+  # @Expression  0x80000001 | (gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress & 0xfff) == 0\r
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress|0xfee00000|UINT32|0x00000001\r
+  ## Specifies delay value in microseconds after sending out an INIT IPI.\r
+  # @Prompt Configure delay value after send an INIT IPI\r
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds|10000|UINT32|0x30000002\r
+  ## Specifies max supported number of Logical Processors.\r
+  # @Prompt Configure max supported number of Logical Processorss\r
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64|UINT32|0x00000002\r
+  ## This value specifies the Application Processor (AP) stack size, used for Mp Service, which must\r
+  ## aligns the address on a 4-KByte boundary.\r
+  # @Prompt Configure stack size for Application Processor (AP)\r
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize|0x8000|UINT32|0x00000003\r
 \r
-
+[UserExtensions.TianoCore."ExtraFiles"]\r
+  UefiCpuPkgExtra.uni\r