+ ## Specifies the base address of the first microcode Patch in the microcode Region.\r
+ # @Prompt Microcode Region base address.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT64|0x00000005\r
+ ## Specifies the size of the microcode Region.\r
+ # @Prompt Microcode Region size.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UINT64|0x00000006\r
+ ## Specifies the AP wait loop state during POST phase.\r
+ # The value is defined as below.<BR><BR>\r
+ # 1: Place AP in the Hlt-Loop state.<BR>\r
+ # 2: Place AP in the Mwait-Loop state.<BR>\r
+ # 3: Place AP in the Run-Loop state.<BR>\r
+ # @Prompt The AP wait loop state.\r
+ # @ValidRange 0x80000001 | 1 - 3\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode|1|UINT8|0x60008006\r
+ ## Specifies the AP target C-state for Mwait during POST phase.\r
+ # The default value 0 means C1 state.\r
+ # The value is defined as below.<BR><BR>\r
+ # @Prompt The specified AP target C-state for Mwait.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate|0|UINT8|0x00000007\r
+\r
+ ## Indicates if SMM uses static page table.\r
+ # If enabled, SMM will not use on-demand paging. SMM will build static page table for all memory.<BR><BR>\r
+ # This flag only impacts X64 build, because SMM alway builds static page table for IA32.\r
+ # TRUE - SMM uses static page table for all memory.<BR>\r
+ # FALSE - SMM uses static page table for below 4G memory and use on-demand paging for above 4G memory.<BR>\r
+ # @Prompt Use static page table for all memory in SMM.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStaticPageTable|TRUE|BOOLEAN|0x3213210D\r
+\r
+ ## Specifies timeout value in microseconds for the BSP in SMM to wait for all APs to come into SMM.\r
+ # @Prompt AP synchronization timeout value in SMM.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|1000000|UINT64|0x32132104\r
+\r
+ ## Indicates the CPU synchronization method used when processing an SMI.\r
+ # 0x00 - Traditional CPU synchronization method.<BR>\r
+ # 0x01 - Relaxed CPU synchronization method.<BR>\r
+ # @Prompt SMM CPU Synchronization Method.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode|0x00|UINT8|0x60000014\r
+\r
+ ## Specifies user's desired settings for enabling/disabling processor features.\r
+ # @Prompt User settings for enabling/disabling processor features.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesUserConfiguration|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00000017\r
+\r
+[PcdsDynamic, PcdsDynamicEx]\r
+ ## Contains the pointer to a CPU S3 data buffer of structure ACPI_CPU_DATA.\r
+ # @Prompt The pointer to a CPU S3 data buffer.\r
+ # @ValidList 0x80000001 | 0\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuS3DataAddress|0x0|UINT64|0x60000010\r
+\r
+ ## Contains the pointer to a CPU Hot Plug Data structure if CPU hot-plug is supported.\r
+ # @Prompt The pointer to CPU Hot Plug Data.\r
+ # @ValidList 0x80000001 | 0\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugDataAddress|0x0|UINT64|0x60000011\r
+\r
+ ## Indicates processor feature capabilities, each bit corresponding to a specific feature.\r
+ # @Prompt Processor feature capabilities.\r
+ # @ValidList 0x80000001 | 0\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesCapability|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00000018\r
+\r
+ ## Specifies actual settings for processor features, each bit corresponding to a specific feature.\r
+ # @Prompt Actual processor feature settings.\r
+ # @ValidList 0x80000001 | 0\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesSetting|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00000019\r