gVlvRefCodePkgTokenSpaceGuid.PcdCeAtaSupport|FALSE|BOOLEAN|0x12\r
gVlvRefCodePkgTokenSpaceGuid.PcdMmcSdMultiBlockSupport|TRUE|BOOLEAN|0x13\r
\r
+[PcdsPatchableInModule]\r
+\r
+ ## Memory Down or DIMM slot.<BR><BR>\r
+ # 0 - DIMM<BR>\r
+ # 1 - Memory Down<BR>\r
+ # @Prompt Enable Memory Down\r
+ # @ValidList 0x80000001 | 0, 1\r
+ gVlvRefCodePkgTokenSpaceGuid.PcdEnableMemoryDown|1|UINT8|0x20000000\r
+ \r
+ ## Memory Parameter Patchable.<BR><BR>\r
+ # 0 - Fixed Parameter for MinnowBoard Max<BR>\r
+ # 1 - Patchable Parameter for Customization<BR>\r
+ # @Prompt Memory Parameter Patchable.\r
+ # @ValidList 0x80000001 | 0, 1 \r
+ gVlvRefCodePkgTokenSpaceGuid.PcdMemoryParameterPatchable|FALSE|BOOLEAN|0x20000010\r
+ \r
+ ## The speed of DRAM.<BR><BR>\r
+ # 0 - 800 MHz<BR>\r
+ # 1 - 1066 MHz<BR>\r
+ # 2 - 1333 MHz<BR>\r
+ # 3 - 1600 MHz<BR>\r
+ # @Prompt DRAM Speed\r
+ # @ValidList 0x80000001 | 0, 1, 2, 3\r
+ gVlvRefCodePkgTokenSpaceGuid.PcdDramSpeed|1|UINT8|0x20000001\r
+\r
+ ## DRAM Type.<BR><BR>\r
+ # 0 - DDR3<BR>\r
+ # 1 - DDR3L<BR>\r
+ # 2 - DDR3U<BR>\r
+ # 3 - DDR3All<BR>\r
+ # 4 - LPDDR2<BR>\r
+ # 5 - LPDDR3<BR>\r
+ # 6 - DDR4<BR>\r
+ # @Prompt DRAM Type\r
+ # @ValidList 0x80000001 | 0, 1, 2, 3, 4, 5, 6\r
+ gVlvRefCodePkgTokenSpaceGuid.PcdDramType|1|UINT8|0x20000002\r
+ \r
+ ## Please populate DIMM slot 0 if only one DIMM is supported.<BR><BR>\r
+ # 0 - Disable<BR>\r
+ # 1 - Enable<BR>\r
+ # @Prompt DIMM 0 Enable \r
+ # @ValidList 0x80000001 | 0, 1\r
+ gVlvRefCodePkgTokenSpaceGuid.PcdEnableDimm0|1|UINT8|0x20000003\r
+\r
+ ## DIMM 1 has to be identical to DIMM 0.<BR><BR>\r
+ # 0 - Disable<BR>\r
+ # 1 - Enable<BR>\r
+ # @Prompt DIMM 1 Enable Type\r
+ # @ValidList 0x80000001 | 0, 1\r
+ gVlvRefCodePkgTokenSpaceGuid.PcdEnableDimm1|0|UINT8|0x20000004\r
+ \r
+ ## DRAM device data width.<BR><BR>\r
+ # 0 - x8<BR>\r
+ # 1 - x16<BR>\r
+ # 2 - x32<BR>\r
+ # @Prompt DIMM_DWIDTH\r
+ # @ValidList 0x80000001 | 0, 1, 2\r
+ gVlvRefCodePkgTokenSpaceGuid.PcdDimmDataWidth|1|UINT8|0x20000005\r
+\r
+ ## DRAM device data density.<BR><BR>\r
+ # 0 - 1 Gbit<BR>\r
+ # 1 - 2 Gbit<BR>\r
+ # 2 - 4 Gbit<BR>\r
+ # 3 - 8 Gbit<BR>\r
+ # @Prompt DIMM_Density\r
+ # @ValidList 0x80000001 | 0, 1, 2, 3\r
+ gVlvRefCodePkgTokenSpaceGuid.PcdDimmDensity|2|UINT8|0x20000006\r
+ \r
+ ## DRAM device data bus width.<BR><BR>\r
+ # 0 - 8 bits<BR>\r
+ # 1 - 16 bits<BR>\r
+ # 2 - 32 bits<BR>\r
+ # 3 - 64 bits<BR>\r
+ # @Prompt DIMM_BusWidth\r
+ # @ValidList 0x80000001 | 0, 1, 2, 3\r
+ gVlvRefCodePkgTokenSpaceGuid.PcdDimmBusWidth|3|UINT8|0x20000007\r
+\r
+ ## Ranks Per DIMM or Sides Per DIMM.<BR><BR>\r
+ # 0 - 1 Rank<BR>\r
+ # 1 - 2 Ranks<BR>\r
+ # @Prompt DIMM_Sides\r
+ # @ValidList 0x80000001 | 0, 1\r
+ gVlvRefCodePkgTokenSpaceGuid.PcdRankPerDimm|0|UINT8|0x20000008\r
+\r
+ ## tCL.<BR><BR>\r
+ # @Prompt tCL\r
+ gVlvRefCodePkgTokenSpaceGuid.PcdTcl|11|UINT8|0x20000009\r
+\r
+ ## tRP and tRCD in DRAM clk - 5:12.5ns, 6:15ns, etc.<BR><BR> \r
+ # @Prompt tRP_tRCD \r
+ gVlvRefCodePkgTokenSpaceGuid.PcdTrpTrcd|11|UINT8|0x2000000A\r
+\r
+ ## tWR in DRAM clk.<BR><BR> \r
+ # @Prompt tWR \r
+ gVlvRefCodePkgTokenSpaceGuid.PcdTwr|12|UINT8|0x2000000B\r
+ \r
+ ## tWTR in DRAM clk.<BR><BR> \r
+ # @Prompt tWTR \r
+ gVlvRefCodePkgTokenSpaceGuid.PcdTwtr|6|UINT8|0x2000000C\r
+ \r
+ ## tRRD in DRAM clk.<BR><BR> \r
+ # @Prompt tRRD \r
+ gVlvRefCodePkgTokenSpaceGuid.PcdTrrd|6|UINT8|0x2000000D\r
+ \r
+ ## tRTP in DRAM clk.<BR><BR> \r
+ # @Prompt tRTP \r
+ gVlvRefCodePkgTokenSpaceGuid.PcdTrtp|6|UINT8|0x2000000E\r
+\r
+ ## tFAW in DRAM clk.<BR><BR> \r
+ # @Prompt tFAW \r
+ gVlvRefCodePkgTokenSpaceGuid.PcdTfaw|32|UINT8|0x2000000F\r