MdePkg/IndustryStandard: Fix CXL 1.1 structure layout issues

MdePkg/IndustryStandard: Fix CXL 1.1 structure layout issues

https://bugzilla.tianocore.org/show_bug.cgi?id=3074

* Fix offset of LinkLayerControlAndStatus in the
  CXL_1_1_LINK_CAPABILITY_STRUCTURE structure
* Fix offset of LinkLayerAckTimerControl in the
  CXL_1_1_LINK_CAPABILITY_STRUCTURE structure
* Fix offset of LinkLayerDefeature in
  the CXL_1_1_LINK_CAPABILITY_STRUCTURE structure
* Add CXL_11_SIZE_ASSERT() macro to verify the size of
  a register layout structure at compile time and use
  it to verify the sizes of the CXL 1.1 register structures.
* Add CXL_11_OFFSET_ASSERT() macro to verify the offset of
  fields in a register layout structure at compiler time and
  use it to verify the offset of fields in CXL 1.1
  register structures.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Ashraf Javeed <ashraf.javeed@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Ashraf Javeed <ashraf.javeed@intel.com>