]> git.proxmox.com Git - mirror_edk2.git/commit
MdeModulePkg/PciSioSerialDxe: Flush Tx before config change
authorMichael D Kinney <michael.d.kinney@intel.com>
Tue, 8 Dec 2020 06:51:14 +0000 (22:51 -0800)
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Sat, 19 Dec 2020 01:29:44 +0000 (01:29 +0000)
commit6932f4bfe552c1704c5715430de6045c78a5b62f
tree0b11f809b4c0fc656a5b89b364ee4ac8d10511d6
parent1159fc3230aee02acc60aa245ce047217fd8b87e
MdeModulePkg/PciSioSerialDxe: Flush Tx before config change

https://bugzilla.tianocore.org/show_bug.cgi?id=3114

Add logic to flush all UART transmit buffers if there is a
config change from Reset(), SetAttributes() or SetControl().
Use a timeout in the flush operation, so the system can
continue to boot if the transmit buffers can not be
flushed for any reason.

This change prevents lost characters on serial debug logs
and serial consoles when a config change is made.  It also
prevents a UART from getting into a bad state or reporting
error status due to characters being transmitted at the same
time registers are updated with new communications settings.

Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
MdeModulePkg/Bus/Pci/PciSioSerialDxe/SerialIo.c