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MdeModulePkg/XhciDxe:1ms delay before access MMIO reg during reset
authorFeng Tian <feng.tian@intel.com>
Wed, 14 Sep 2016 01:36:11 +0000 (09:36 +0800)
committerFeng Tian <feng.tian@intel.com>
Wed, 21 Sep 2016 04:42:05 +0000 (12:42 +0800)
commitdbe10619bc443215477c5c0c4c949410bf68b1ec
tree16daf03be2f75e5e30622fb81862ed9d9af75b70tree
parent7419aedd93132f2dfc91e7bf3634fba7e0842c7bcommit | diff
MdeModulePkg/XhciDxe:1ms delay before access MMIO reg during reset

Some XHCI host controllers require to have extra 1ms delay before
accessing any MMIO register during HC reset.

As this delay is not defined by XHCI spec, we use this workaround
to fix the issue.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c diff | blob | blame | history
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