[mirror_qemu.git] / disas.c

/* General "disassemble this chunk" code.  Used for debugging. */
#include "qemu/osdep.h"
#include "qemu-common.h"
#include "disas/bfd.h"
#include "elf.h"

#include "cpu.h"
#include "disas/disas.h"

typedef struct CPUDebug {
    struct disassemble_info info;
    CPUState *cpu;
} CPUDebug;

/* Filled in by elfload.c.  Simplistic, but will do for now. */
struct syminfo *syminfos = NULL;

/* Get LENGTH bytes from info's buffer, at target address memaddr.
   Transfer them to myaddr.  */
int
buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
                   struct disassemble_info *info)
{
    if (memaddr < info->buffer_vma
        || memaddr + length > info->buffer_vma + info->buffer_length)
        /* Out of bounds.  Use EIO because GDB uses it.  */
        return EIO;
    memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
    return 0;
}

/* Get LENGTH bytes from info's buffer, at target address memaddr.
   Transfer them to myaddr.  */
static int
target_read_memory (bfd_vma memaddr,
                    bfd_byte *myaddr,
                    int length,
                    struct disassemble_info *info)
{
    CPUDebug *s = container_of(info, CPUDebug, info);

    cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
    return 0;
}

/* Print an error message.  We can assume that this is in response to
   an error return from buffer_read_memory.  */
void
perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
{
  if (status != EIO)
    /* Can't happen.  */
    (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
  else
    /* Actually, address between memaddr and memaddr + len was
       out of bounds.  */
    (*info->fprintf_func) (info->stream,
			   "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
}

/* This could be in a separate file, to save minuscule amounts of space
   in statically linked executables.  */

/* Just print the address is hex.  This is included for completeness even
   though both GDB and objdump provide their own (to print symbolic
   addresses).  */

void
generic_print_address (bfd_vma addr, struct disassemble_info *info)
{
    (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
}

/* Print address in hex, truncated to the width of a host virtual address. */
static void
generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
{
    uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8));
    generic_print_address(addr & mask, info);
}

/* Just return the given address.  */

int
generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
{
  return 1;
}

bfd_vma bfd_getl64 (const bfd_byte *addr)
{
  unsigned long long v;

  v = (unsigned long long) addr[0];
  v |= (unsigned long long) addr[1] << 8;
  v |= (unsigned long long) addr[2] << 16;
  v |= (unsigned long long) addr[3] << 24;
  v |= (unsigned long long) addr[4] << 32;
  v |= (unsigned long long) addr[5] << 40;
  v |= (unsigned long long) addr[6] << 48;
  v |= (unsigned long long) addr[7] << 56;
  return (bfd_vma) v;
}

bfd_vma bfd_getl32 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0];
  v |= (unsigned long) addr[1] << 8;
  v |= (unsigned long) addr[2] << 16;
  v |= (unsigned long) addr[3] << 24;
  return (bfd_vma) v;
}

bfd_vma bfd_getb32 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0] << 24;
  v |= (unsigned long) addr[1] << 16;
  v |= (unsigned long) addr[2] << 8;
  v |= (unsigned long) addr[3];
  return (bfd_vma) v;
}

bfd_vma bfd_getl16 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0];
  v |= (unsigned long) addr[1] << 8;
  return (bfd_vma) v;
}

bfd_vma bfd_getb16 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0] << 24;
  v |= (unsigned long) addr[1] << 16;
  return (bfd_vma) v;
}

static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
                              const char *prefix)
{
    int i, n = info->buffer_length;
    uint8_t *buf = g_malloc(n);

    info->read_memory_func(pc, buf, n, info);

    for (i = 0; i < n; ++i) {
        if (i % 32 == 0) {
            info->fprintf_func(info->stream, "\n%s: ", prefix);
        }
        info->fprintf_func(info->stream, "%02x", buf[i]);
    }

    g_free(buf);
    return n;
}

static int print_insn_od_host(bfd_vma pc, disassemble_info *info)
{
    return print_insn_objdump(pc, info, "OBJD-H");
}

static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
{
    return print_insn_objdump(pc, info, "OBJD-T");
}

/* Disassemble this for me please... (debugging). 'flags' has the following
   values:
    i386 - 1 means 16 bit code, 2 means 64 bit code
    ppc  - bits 0:15 specify (optionally) the machine instruction set;
           bit 16 indicates little endian.
    other targets - unused
 */
void target_disas(FILE *out, CPUState *cpu, target_ulong code,
                  target_ulong size, int flags)
{
    CPUClass *cc = CPU_GET_CLASS(cpu);
    target_ulong pc;
    int count;
    CPUDebug s;

    INIT_DISASSEMBLE_INFO(s.info, out, fprintf);

    s.cpu = cpu;
    s.info.read_memory_func = target_read_memory;
    s.info.buffer_vma = code;
    s.info.buffer_length = size;
    s.info.print_address_func = generic_print_address;

#ifdef TARGET_WORDS_BIGENDIAN
    s.info.endian = BFD_ENDIAN_BIG;
#else
    s.info.endian = BFD_ENDIAN_LITTLE;
#endif

    if (cc->disas_set_info) {
        cc->disas_set_info(cpu, &s.info);
    }

#if defined(TARGET_I386)
    if (flags == 2) {
        s.info.mach = bfd_mach_x86_64;
    } else if (flags == 1) {
        s.info.mach = bfd_mach_i386_i8086;
    } else {
        s.info.mach = bfd_mach_i386_i386;
    }
    s.info.print_insn = print_insn_i386;
#elif defined(TARGET_PPC)
    if ((flags >> 16) & 1) {
        s.info.endian = BFD_ENDIAN_LITTLE;
    }
    if (flags & 0xFFFF) {
        /* If we have a precise definition of the instruction set, use it. */
        s.info.mach = flags & 0xFFFF;
    } else {
#ifdef TARGET_PPC64
        s.info.mach = bfd_mach_ppc64;
#else
        s.info.mach = bfd_mach_ppc;
#endif
    }
    s.info.disassembler_options = (char *)"any";
    s.info.print_insn = print_insn_ppc;
#endif
    if (s.info.print_insn == NULL) {
        s.info.print_insn = print_insn_od_target;
    }

    for (pc = code; size > 0; pc += count, size -= count) {
	fprintf(out, "0x" TARGET_FMT_lx ":  ", pc);
	count = s.info.print_insn(pc, &s.info);
#if 0
        {
            int i;
            uint8_t b;
            fprintf(out, " {");
            for(i = 0; i < count; i++) {
                target_read_memory(pc + i, &b, 1, &s.info);
                fprintf(out, " %02x", b);
            }
            fprintf(out, " }");
        }
#endif
	fprintf(out, "\n");
	if (count < 0)
	    break;
        if (size < count) {
            fprintf(out,
                    "Disassembler disagrees with translator over instruction "
                    "decoding\n"
                    "Please report this to qemu-devel@nongnu.org\n");
            break;
        }
    }
}

/* Disassemble this for me please... (debugging). */
void disas(FILE *out, void *code, unsigned long size)
{
    uintptr_t pc;
    int count;
    CPUDebug s;
    int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL;

    INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
    s.info.print_address_func = generic_print_host_address;

    s.info.buffer = code;
    s.info.buffer_vma = (uintptr_t)code;
    s.info.buffer_length = size;

#ifdef HOST_WORDS_BIGENDIAN
    s.info.endian = BFD_ENDIAN_BIG;
#else
    s.info.endian = BFD_ENDIAN_LITTLE;
#endif
#if defined(CONFIG_TCG_INTERPRETER)
    print_insn = print_insn_tci;
#elif defined(__i386__)
    s.info.mach = bfd_mach_i386_i386;
    print_insn = print_insn_i386;
#elif defined(__x86_64__)
    s.info.mach = bfd_mach_x86_64;
    print_insn = print_insn_i386;
#elif defined(_ARCH_PPC)
    s.info.disassembler_options = (char *)"any";
    print_insn = print_insn_ppc;
#elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS)
    print_insn = print_insn_arm_a64;
#elif defined(__alpha__)
    print_insn = print_insn_alpha;
#elif defined(__sparc__)
    print_insn = print_insn_sparc;
    s.info.mach = bfd_mach_sparc_v9b;
#elif defined(__arm__)
    print_insn = print_insn_arm;
#elif defined(__MIPSEB__)
    print_insn = print_insn_big_mips;
#elif defined(__MIPSEL__)
    print_insn = print_insn_little_mips;
#elif defined(__m68k__)
    print_insn = print_insn_m68k;
#elif defined(__s390__)
    print_insn = print_insn_s390;
#elif defined(__hppa__)
    print_insn = print_insn_hppa;
#elif defined(__ia64__)
    print_insn = print_insn_ia64;
#endif
    if (print_insn == NULL) {
        print_insn = print_insn_od_host;
    }
    for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
        fprintf(out, "0x%08" PRIxPTR ":  ", pc);
        count = print_insn(pc, &s.info);
	fprintf(out, "\n");
	if (count < 0)
	    break;
    }
}

/* Look up symbol for debugging purpose.  Returns "" if unknown. */
const char *lookup_symbol(target_ulong orig_addr)
{
    const char *symbol = "";
    struct syminfo *s;

    for (s = syminfos; s; s = s->next) {
        symbol = s->lookup_symbol(s, orig_addr);
        if (symbol[0] != '\0') {
            break;
        }
    }

    return symbol;
}

#if !defined(CONFIG_USER_ONLY)

#include "monitor/monitor.h"

static int monitor_disas_is_physical;

static int
monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
                     struct disassemble_info *info)
{
    CPUDebug *s = container_of(info, CPUDebug, info);

    if (monitor_disas_is_physical) {
        cpu_physical_memory_read(memaddr, myaddr, length);
    } else {
        cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
    }
    return 0;
}

/* Disassembler for the monitor.
   See target_disas for a description of flags. */
void monitor_disas(Monitor *mon, CPUState *cpu,
                   target_ulong pc, int nb_insn, int is_physical, int flags)
{
    CPUClass *cc = CPU_GET_CLASS(cpu);
    int count, i;
    CPUDebug s;

    INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);

    s.cpu = cpu;
    monitor_disas_is_physical = is_physical;
    s.info.read_memory_func = monitor_read_memory;
    s.info.print_address_func = generic_print_address;

    s.info.buffer_vma = pc;

#ifdef TARGET_WORDS_BIGENDIAN
    s.info.endian = BFD_ENDIAN_BIG;
#else
    s.info.endian = BFD_ENDIAN_LITTLE;
#endif

    if (cc->disas_set_info) {
        cc->disas_set_info(cpu, &s.info);
    }

#if defined(TARGET_I386)
    if (flags == 2) {
        s.info.mach = bfd_mach_x86_64;
    } else if (flags == 1) {
        s.info.mach = bfd_mach_i386_i8086;
    } else {
        s.info.mach = bfd_mach_i386_i386;
    }
    s.info.print_insn = print_insn_i386;
#elif defined(TARGET_PPC)
    if (flags & 0xFFFF) {
        /* If we have a precise definition of the instruction set, use it. */
        s.info.mach = flags & 0xFFFF;
    } else {
#ifdef TARGET_PPC64
        s.info.mach = bfd_mach_ppc64;
#else
        s.info.mach = bfd_mach_ppc;
#endif
    }
    if ((flags >> 16) & 1) {
        s.info.endian = BFD_ENDIAN_LITTLE;
    }
    s.info.print_insn = print_insn_ppc;
#endif
    if (!s.info.print_insn) {
        monitor_printf(mon, "0x" TARGET_FMT_lx
                       ": Asm output not supported on this arch\n", pc);
        return;
    }

    for(i = 0; i < nb_insn; i++) {
	monitor_printf(mon, "0x" TARGET_FMT_lx ":  ", pc);
        count = s.info.print_insn(pc, &s.info);
	monitor_printf(mon, "\n");
	if (count < 0)
	    break;
        pc += count;
    }
}
#endif
Commit	Line	Data
b9adb4a6	1	/* General "disassemble this chunk" code. Used for debugging. */
d38ea87a	2	#include "qemu/osdep.h"
37b9de46	3	#include "qemu-common.h"
76cad711	4	#include "disas/bfd.h"
b9adb4a6 FB	5	#include "elf.h"
b9adb4a6 FB	6
c6105c0a	7	#include "cpu.h"
76cad711	8	#include "disas/disas.h"
c6105c0a	9
f4359b9f BS	10	typedef struct CPUDebug {
f4359b9f BS	11	struct disassemble_info info;
d49190c4	12	CPUState *cpu;
f4359b9f BS	13	} CPUDebug;
f4359b9f BS	14
b9adb4a6	15	/* Filled in by elfload.c. Simplistic, but will do for now. */
e80cfcfc	16	struct syminfo *syminfos = NULL;
b9adb4a6	17
aa0aa4fa FB	18	/* Get LENGTH bytes from info's buffer, at target address memaddr.
	19	Transfer them to myaddr. */
	20	int
3a742b76 PB	21	buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
3a742b76 PB	22	struct disassemble_info *info)
aa0aa4fa	23	{
c6105c0a FB	24	if (memaddr < info->buffer_vma
	25	\|\| memaddr + length > info->buffer_vma + info->buffer_length)
	26	/* Out of bounds. Use EIO because GDB uses it. */
	27	return EIO;
	28	memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
	29	return 0;
aa0aa4fa FB	30	}
aa0aa4fa FB	31
c6105c0a FB	32	/* Get LENGTH bytes from info's buffer, at target address memaddr.
	33	Transfer them to myaddr. */
	34	static int
c27004ec FB	35	target_read_memory (bfd_vma memaddr,
	36	bfd_byte *myaddr,
	37	int length,
	38	struct disassemble_info *info)
c6105c0a	39	{
f4359b9f BS	40	CPUDebug *s = container_of(info, CPUDebug, info);
f4359b9f BS	41
d49190c4	42	cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
c6105c0a FB	43	return 0;
c6105c0a FB	44	}
c6105c0a	45
aa0aa4fa FB	46	/* Print an error message. We can assume that this is in response to
	47	an error return from buffer_read_memory. */
	48	void
3a742b76	49	perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
aa0aa4fa FB	50	{
	51	if (status != EIO)
	52	/* Can't happen. */
	53	(*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
	54	else
	55	/* Actually, address between memaddr and memaddr + len was
	56	out of bounds. */
	57	(*info->fprintf_func) (info->stream,
26a76461	58	"Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
aa0aa4fa FB	59	}
aa0aa4fa FB	60
a31f0531	61	/* This could be in a separate file, to save minuscule amounts of space
aa0aa4fa FB	62	in statically linked executables. */
	63
	64	/* Just print the address is hex. This is included for completeness even
	65	though both GDB and objdump provide their own (to print symbolic
	66	addresses). */
	67
	68	void
3a742b76	69	generic_print_address (bfd_vma addr, struct disassemble_info *info)
aa0aa4fa	70	{
26a76461	71	(*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
aa0aa4fa FB	72	}
aa0aa4fa FB	73
636bd289 PM	74	/* Print address in hex, truncated to the width of a host virtual address. */
	75	static void
	76	generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
	77	{
	78	uint64_t mask = ~0ULL >> (64 - (sizeof(void ) 8));
	79	generic_print_address(addr & mask, info);
	80	}
	81
aa0aa4fa FB	82	/* Just return the given address. */
	83
	84	int
3a742b76	85	generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
aa0aa4fa FB	86	{
	87	return 1;
	88	}
	89
903ec55c AJ	90	bfd_vma bfd_getl64 (const bfd_byte *addr)
	91	{
	92	unsigned long long v;
	93
	94	v = (unsigned long long) addr[0];
	95	v \|= (unsigned long long) addr[1] << 8;
	96	v \|= (unsigned long long) addr[2] << 16;
	97	v \|= (unsigned long long) addr[3] << 24;
	98	v \|= (unsigned long long) addr[4] << 32;
	99	v \|= (unsigned long long) addr[5] << 40;
	100	v \|= (unsigned long long) addr[6] << 48;
	101	v \|= (unsigned long long) addr[7] << 56;
	102	return (bfd_vma) v;
	103	}
	104
aa0aa4fa FB	105	bfd_vma bfd_getl32 (const bfd_byte *addr)
	106	{
	107	unsigned long v;
	108
	109	v = (unsigned long) addr[0];
	110	v \|= (unsigned long) addr[1] << 8;
	111	v \|= (unsigned long) addr[2] << 16;
	112	v \|= (unsigned long) addr[3] << 24;
	113	return (bfd_vma) v;
	114	}
	115
	116	bfd_vma bfd_getb32 (const bfd_byte *addr)
	117	{
	118	unsigned long v;
	119
	120	v = (unsigned long) addr[0] << 24;
	121	v \|= (unsigned long) addr[1] << 16;
	122	v \|= (unsigned long) addr[2] << 8;
	123	v \|= (unsigned long) addr[3];
	124	return (bfd_vma) v;
	125	}
	126
6af0bf9c FB	127	bfd_vma bfd_getl16 (const bfd_byte *addr)
	128	{
	129	unsigned long v;
	130
	131	v = (unsigned long) addr[0];
	132	v \|= (unsigned long) addr[1] << 8;
	133	return (bfd_vma) v;
	134	}
	135
	136	bfd_vma bfd_getb16 (const bfd_byte *addr)
	137	{
	138	unsigned long v;
	139
	140	v = (unsigned long) addr[0] << 24;
	141	v \|= (unsigned long) addr[1] << 16;
	142	return (bfd_vma) v;
	143	}
	144
c46ffd57 RH	145	static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
	146	const char *prefix)
	147	{
	148	int i, n = info->buffer_length;
	149	uint8_t *buf = g_malloc(n);
	150
	151	info->read_memory_func(pc, buf, n, info);
	152
	153	for (i = 0; i < n; ++i) {
	154	if (i % 32 == 0) {
	155	info->fprintf_func(info->stream, "\n%s: ", prefix);
	156	}
	157	info->fprintf_func(info->stream, "%02x", buf[i]);
	158	}
	159
	160	g_free(buf);
	161	return n;
	162	}
	163
	164	static int print_insn_od_host(bfd_vma pc, disassemble_info *info)
	165	{
	166	return print_insn_objdump(pc, info, "OBJD-H");
	167	}
	168
	169	static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
	170	{
	171	return print_insn_objdump(pc, info, "OBJD-T");
	172	}
	173
e91c8a77	174	/* Disassemble this for me please... (debugging). 'flags' has the following
c2d551ff	175	values:
e99722f6	176	i386 - 1 means 16 bit code, 2 means 64 bit code
e13951f8 TM	177	ppc - bits 0:15 specify (optionally) the machine instruction set;
e13951f8 TM	178	bit 16 indicates little endian.
c2d551ff FB	179	other targets - unused
c2d551ff FB	180	*/
d49190c4	181	void target_disas(FILE out, CPUState cpu, target_ulong code,
f4359b9f	182	target_ulong size, int flags)
b9adb4a6	183	{
37b9de46	184	CPUClass *cc = CPU_GET_CLASS(cpu);
c27004ec	185	target_ulong pc;
b9adb4a6	186	int count;
f4359b9f	187	CPUDebug s;
b9adb4a6	188
f4359b9f	189	INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
b9adb4a6	190
d49190c4	191	s.cpu = cpu;
f4359b9f BS	192	s.info.read_memory_func = target_read_memory;
	193	s.info.buffer_vma = code;
	194	s.info.buffer_length = size;
9504c544	195	s.info.print_address_func = generic_print_address;
c27004ec FB	196
c27004ec FB	197	#ifdef TARGET_WORDS_BIGENDIAN
f4359b9f	198	s.info.endian = BFD_ENDIAN_BIG;
c27004ec	199	#else
f4359b9f	200	s.info.endian = BFD_ENDIAN_LITTLE;
c27004ec	201	#endif
37b9de46 PC	202
	203	if (cc->disas_set_info) {
	204	cc->disas_set_info(cpu, &s.info);
	205	}
	206
c27004ec	207	#if defined(TARGET_I386)
f4359b9f BS	208	if (flags == 2) {
	209	s.info.mach = bfd_mach_x86_64;
	210	} else if (flags == 1) {
	211	s.info.mach = bfd_mach_i386_i8086;
	212	} else {
	213	s.info.mach = bfd_mach_i386_i386;
	214	}
2de295c5	215	s.info.print_insn = print_insn_i386;
c27004ec	216	#elif defined(TARGET_PPC)
e13951f8	217	if ((flags >> 16) & 1) {
f4359b9f BS	218	s.info.endian = BFD_ENDIAN_LITTLE;
f4359b9f BS	219	}
237c0af0	220	if (flags & 0xFFFF) {
e13951f8	221	/* If we have a precise definition of the instruction set, use it. */
f4359b9f	222	s.info.mach = flags & 0xFFFF;
237c0af0	223	} else {
a2458627	224	#ifdef TARGET_PPC64
f4359b9f	225	s.info.mach = bfd_mach_ppc64;
a2458627	226	#else
f4359b9f	227	s.info.mach = bfd_mach_ppc;
a2458627	228	#endif
237c0af0	229	}
88770fec	230	s.info.disassembler_options = (char *)"any";
2de295c5	231	s.info.print_insn = print_insn_ppc;
c6105c0a	232	#endif
2de295c5 PC	233	if (s.info.print_insn == NULL) {
2de295c5 PC	234	s.info.print_insn = print_insn_od_target;
c46ffd57	235	}
c6105c0a	236
7e000c2e	237	for (pc = code; size > 0; pc += count, size -= count) {
fa15e030	238	fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
2de295c5	239	count = s.info.print_insn(pc, &s.info);
c27004ec FB	240	#if 0
	241	{
	242	int i;
	243	uint8_t b;
	244	fprintf(out, " {");
	245	for(i = 0; i < count; i++) {
f4359b9f	246	target_read_memory(pc + i, &b, 1, &s.info);
c27004ec FB	247	fprintf(out, " %02x", b);
	248	}
	249	fprintf(out, " }");
	250	}
	251	#endif
	252	fprintf(out, "\n");
	253	if (count < 0)
	254	break;
754d00ae	255	if (size < count) {
	256	fprintf(out,
	257	"Disassembler disagrees with translator over instruction "
	258	"decoding\n"
	259	"Please report this to qemu-devel@nongnu.org\n");
	260	break;
	261	}
c27004ec FB	262	}
	263	}
	264
	265	/* Disassemble this for me please... (debugging). */
	266	void disas(FILE out, void code, unsigned long size)
	267	{
b0b0f1c9	268	uintptr_t pc;
c27004ec	269	int count;
f4359b9f	270	CPUDebug s;
c46ffd57	271	int (print_insn)(bfd_vma pc, disassemble_info info) = NULL;
c27004ec	272
f4359b9f BS	273	INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
f4359b9f BS	274	s.info.print_address_func = generic_print_host_address;
c27004ec	275
f4359b9f BS	276	s.info.buffer = code;
	277	s.info.buffer_vma = (uintptr_t)code;
	278	s.info.buffer_length = size;
b9adb4a6	279
e2542fe2	280	#ifdef HOST_WORDS_BIGENDIAN
f4359b9f	281	s.info.endian = BFD_ENDIAN_BIG;
b9adb4a6	282	#else
f4359b9f	283	s.info.endian = BFD_ENDIAN_LITTLE;
b9adb4a6	284	#endif
5826e519 SW	285	#if defined(CONFIG_TCG_INTERPRETER)
	286	print_insn = print_insn_tci;
	287	#elif defined(__i386__)
f4359b9f	288	s.info.mach = bfd_mach_i386_i386;
c27004ec	289	print_insn = print_insn_i386;
bc51c5c9	290	#elif defined(__x86_64__)
f4359b9f	291	s.info.mach = bfd_mach_x86_64;
c27004ec	292	print_insn = print_insn_i386;
e58ffeb3	293	#elif defined(_ARCH_PPC)
66d4f6a3	294	s.info.disassembler_options = (char *)"any";
c27004ec	295	print_insn = print_insn_ppc;
999b53ec CF	296	#elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS)
999b53ec CF	297	print_insn = print_insn_arm_a64;
a993ba85	298	#elif defined(__alpha__)
c27004ec	299	print_insn = print_insn_alpha;
aa0aa4fa	300	#elif defined(__sparc__)
c27004ec	301	print_insn = print_insn_sparc;
f4359b9f	302	s.info.mach = bfd_mach_sparc_v9b;
5fafdf24	303	#elif defined(__arm__)
c27004ec	304	print_insn = print_insn_arm;
6af0bf9c FB	305	#elif defined(__MIPSEB__)
	306	print_insn = print_insn_big_mips;
	307	#elif defined(__MIPSEL__)
	308	print_insn = print_insn_little_mips;
48024e4a FB	309	#elif defined(__m68k__)
48024e4a FB	310	print_insn = print_insn_m68k;
8f860bb8 TS	311	#elif defined(__s390__)
8f860bb8 TS	312	print_insn = print_insn_s390;
f54b3f92 AJ	313	#elif defined(__hppa__)
f54b3f92 AJ	314	print_insn = print_insn_hppa;
903ec55c AJ	315	#elif defined(__ia64__)
903ec55c AJ	316	print_insn = print_insn_ia64;
b9adb4a6	317	#endif
c46ffd57 RH	318	if (print_insn == NULL) {
	319	print_insn = print_insn_od_host;
	320	}
b0b0f1c9 SW	321	for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
b0b0f1c9 SW	322	fprintf(out, "0x%08" PRIxPTR ": ", pc);
f4359b9f	323	count = print_insn(pc, &s.info);
b9adb4a6 FB	324	fprintf(out, "\n");
	325	if (count < 0)
	326	break;
	327	}
	328	}
	329
	330	/* Look up symbol for debugging purpose. Returns "" if unknown. */
c27004ec	331	const char *lookup_symbol(target_ulong orig_addr)
b9adb4a6	332	{
49918a75	333	const char *symbol = "";
e80cfcfc	334	struct syminfo *s;
3b46e624	335
e80cfcfc	336	for (s = syminfos; s; s = s->next) {
49918a75 PB	337	symbol = s->lookup_symbol(s, orig_addr);
	338	if (symbol[0] != '\0') {
	339	break;
	340	}
b9adb4a6	341	}
49918a75 PB	342
49918a75 PB	343	return symbol;
b9adb4a6	344	}
9307c4c1 FB	345
	346	#if !defined(CONFIG_USER_ONLY)
	347
83c9089e	348	#include "monitor/monitor.h"
3d2cfdf1	349
9307c4c1 FB	350	static int monitor_disas_is_physical;
	351
	352	static int
a5f1b965 BS	353	monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
a5f1b965 BS	354	struct disassemble_info *info)
9307c4c1	355	{
f4359b9f BS	356	CPUDebug *s = container_of(info, CPUDebug, info);
f4359b9f BS	357
9307c4c1	358	if (monitor_disas_is_physical) {
54f7b4a3	359	cpu_physical_memory_read(memaddr, myaddr, length);
9307c4c1	360	} else {
d49190c4	361	cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
9307c4c1 FB	362	}
	363	return 0;
	364	}
	365
1c38f843 TM	366	/* Disassembler for the monitor.
1c38f843 TM	367	See target_disas for a description of flags. */
d49190c4	368	void monitor_disas(Monitor mon, CPUState cpu,
6a00d601	369	target_ulong pc, int nb_insn, int is_physical, int flags)
9307c4c1	370	{
37b9de46	371	CPUClass *cc = CPU_GET_CLASS(cpu);
9307c4c1	372	int count, i;
f4359b9f	373	CPUDebug s;
9307c4c1	374
f4359b9f	375	INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);
9307c4c1	376
d49190c4	377	s.cpu = cpu;
9307c4c1	378	monitor_disas_is_physical = is_physical;
f4359b9f	379	s.info.read_memory_func = monitor_read_memory;
9504c544	380	s.info.print_address_func = generic_print_address;
9307c4c1	381
f4359b9f	382	s.info.buffer_vma = pc;
9307c4c1 FB	383
9307c4c1 FB	384	#ifdef TARGET_WORDS_BIGENDIAN
f4359b9f	385	s.info.endian = BFD_ENDIAN_BIG;
9307c4c1	386	#else
f4359b9f	387	s.info.endian = BFD_ENDIAN_LITTLE;
9307c4c1	388	#endif
37b9de46 PC	389
	390	if (cc->disas_set_info) {
	391	cc->disas_set_info(cpu, &s.info);
	392	}
	393
9307c4c1	394	#if defined(TARGET_I386)
f4359b9f BS	395	if (flags == 2) {
	396	s.info.mach = bfd_mach_x86_64;
	397	} else if (flags == 1) {
	398	s.info.mach = bfd_mach_i386_i8086;
	399	} else {
	400	s.info.mach = bfd_mach_i386_i386;
	401	}
2de295c5	402	s.info.print_insn = print_insn_i386;
9307c4c1	403	#elif defined(TARGET_PPC)
1c38f843 TM	404	if (flags & 0xFFFF) {
	405	/* If we have a precise definition of the instruction set, use it. */
	406	s.info.mach = flags & 0xFFFF;
	407	} else {
a2458627	408	#ifdef TARGET_PPC64
1c38f843	409	s.info.mach = bfd_mach_ppc64;
a2458627	410	#else
1c38f843	411	s.info.mach = bfd_mach_ppc;
a2458627	412	#endif
1c38f843 TM	413	}
	414	if ((flags >> 16) & 1) {
	415	s.info.endian = BFD_ENDIAN_LITTLE;
	416	}
2de295c5	417	s.info.print_insn = print_insn_ppc;
9307c4c1	418	#endif
37b9de46 PC	419	if (!s.info.print_insn) {
	420	monitor_printf(mon, "0x" TARGET_FMT_lx
	421	": Asm output not supported on this arch\n", pc);
	422	return;
	423	}
9307c4c1 FB	424
9307c4c1 FB	425	for(i = 0; i < nb_insn; i++) {
376253ec	426	monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);
2de295c5	427	count = s.info.print_insn(pc, &s.info);
376253ec	428	monitor_printf(mon, "\n");
9307c4c1 FB	429	if (count < 0)
	430	break;
	431	pc += count;
	432	}
	433	}
	434	#endif