[mirror_qemu.git] / hw / arm / aspeed.c

/*
 * OpenPOWER Palmetto BMC
 *
 * Andrew Jeffery <andrew@aj.id.au>
 *
 * Copyright 2016 IBM Corp.
 *
 * This code is licensed under the GPL version 2 or later.  See
 * the COPYING file in the top-level directory.
 */

#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
#include "exec/address-spaces.h"
#include "hw/arm/arm.h"
#include "hw/arm/aspeed_soc.h"
#include "hw/boards.h"
#include "qemu/log.h"
#include "sysemu/block-backend.h"
#include "hw/loader.h"
#include "qemu/error-report.h"

static struct arm_boot_info aspeed_board_binfo = {
    .board_id = -1, /* device-tree-only board */
    .nb_cpus = 1,
};

typedef struct AspeedBoardState {
    AspeedSoCState soc;
    MemoryRegion ram;
} AspeedBoardState;

typedef struct AspeedBoardConfig {
    const char *soc_name;
    uint32_t hw_strap1;
    const char *fmc_model;
    const char *spi_model;
    uint32_t num_cs;
    void (*i2c_init)(AspeedBoardState *bmc);
} AspeedBoardConfig;

enum {
    PALMETTO_BMC,
    AST2500_EVB,
    ROMULUS_BMC,
};

/* Palmetto hardware value: 0x120CE416 */
#define PALMETTO_BMC_HW_STRAP1 (                                        \
        SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) |               \
        SCU_AST2400_HW_STRAP_DRAM_CONFIG(2 /* DDR3 with CL=6, CWL=5 */) | \
        SCU_AST2400_HW_STRAP_ACPI_DIS |                                 \
        SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) |       \
        SCU_HW_STRAP_VGA_CLASS_CODE |                                   \
        SCU_HW_STRAP_LPC_RESET_PIN |                                    \
        SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) |                \
        SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \
        SCU_HW_STRAP_SPI_WIDTH |                                        \
        SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) |                       \
        SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))

/* AST2500 evb hardware value: 0xF100C2E6 */
#define AST2500_EVB_HW_STRAP1 ((                                        \
        AST2500_HW_STRAP1_DEFAULTS |                                    \
        SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE |                     \
        SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE |                        \
        SCU_AST2500_HW_STRAP_UART_DEBUG |                               \
        SCU_AST2500_HW_STRAP_DDR4_ENABLE |                              \
        SCU_HW_STRAP_MAC1_RGMII |                                       \
        SCU_HW_STRAP_MAC0_RGMII) &                                      \
        ~SCU_HW_STRAP_2ND_BOOT_WDT)

/* Romulus hardware value: 0xF10AD206 */
#define ROMULUS_BMC_HW_STRAP1 (                                         \
        AST2500_HW_STRAP1_DEFAULTS |                                    \
        SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE |                     \
        SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE |                        \
        SCU_AST2500_HW_STRAP_UART_DEBUG |                               \
        SCU_AST2500_HW_STRAP_DDR4_ENABLE |                              \
        SCU_AST2500_HW_STRAP_ACPI_ENABLE |                              \
        SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER))

static void palmetto_bmc_i2c_init(AspeedBoardState *bmc);
static void ast2500_evb_i2c_init(AspeedBoardState *bmc);

static const AspeedBoardConfig aspeed_boards[] = {
    [PALMETTO_BMC] = {
        .soc_name  = "ast2400-a1",
        .hw_strap1 = PALMETTO_BMC_HW_STRAP1,
        .fmc_model = "n25q256a",
        .spi_model = "mx25l25635e",
        .num_cs    = 1,
        .i2c_init  = palmetto_bmc_i2c_init,
    },
    [AST2500_EVB]  = {
        .soc_name  = "ast2500-a1",
        .hw_strap1 = AST2500_EVB_HW_STRAP1,
        .fmc_model = "n25q256a",
        .spi_model = "mx25l25635e",
        .num_cs    = 1,
        .i2c_init  = ast2500_evb_i2c_init,
    },
    [ROMULUS_BMC]  = {
        .soc_name  = "ast2500-a1",
        .hw_strap1 = ROMULUS_BMC_HW_STRAP1,
        .fmc_model = "n25q256a",
        .spi_model = "mx66l1g45g",
        .num_cs    = 2,
    },
};

#define FIRMWARE_ADDR 0x0

static void write_boot_rom(DriveInfo *dinfo, hwaddr addr, size_t rom_size,
                           Error **errp)
{
    BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
    uint8_t *storage;
    int64_t size;

    /* The block backend size should have already been 'validated' by
     * the creation of the m25p80 object.
     */
    size = blk_getlength(blk);
    if (size <= 0) {
        error_setg(errp, "failed to get flash size");
        return;
    }

    if (rom_size > size) {
        rom_size = size;
    }

    storage = g_new0(uint8_t, rom_size);
    if (blk_pread(blk, 0, storage, rom_size) < 0) {
        error_setg(errp, "failed to read the initial flash content");
        return;
    }

    rom_add_blob_fixed("aspeed.boot_rom", storage, rom_size, addr);
    g_free(storage);
}

static void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype,
                                      Error **errp)
{
    int i ;

    for (i = 0; i < s->num_cs; ++i) {
        AspeedSMCFlash *fl = &s->flashes[i];
        DriveInfo *dinfo = drive_get_next(IF_MTD);
        qemu_irq cs_line;

        fl->flash = ssi_create_slave_no_init(s->spi, flashtype);
        if (dinfo) {
            qdev_prop_set_drive(fl->flash, "drive", blk_by_legacy_dinfo(dinfo),
                                errp);
        }
        qdev_init_nofail(fl->flash);

        cs_line = qdev_get_gpio_in_named(fl->flash, SSI_GPIO_CS, 0);
        sysbus_connect_irq(SYS_BUS_DEVICE(s), i + 1, cs_line);
    }
}

static void aspeed_board_init(MachineState *machine,
                              const AspeedBoardConfig *cfg)
{
    AspeedBoardState *bmc;
    AspeedSoCClass *sc;
    DriveInfo *drive0 = drive_get(IF_MTD, 0, 0);

    bmc = g_new0(AspeedBoardState, 1);
    object_initialize(&bmc->soc, (sizeof(bmc->soc)), cfg->soc_name);
    object_property_add_child(OBJECT(machine), "soc", OBJECT(&bmc->soc),
                              &error_abort);

    sc = ASPEED_SOC_GET_CLASS(&bmc->soc);

    object_property_set_uint(OBJECT(&bmc->soc), ram_size, "ram-size",
                             &error_abort);
    object_property_set_int(OBJECT(&bmc->soc), cfg->hw_strap1, "hw-strap1",
                            &error_abort);
    object_property_set_int(OBJECT(&bmc->soc), cfg->num_cs, "num-cs",
                            &error_abort);
    if (machine->kernel_filename) {
        /*
         * When booting with a -kernel command line there is no u-boot
         * that runs to unlock the SCU. In this case set the default to
         * be unlocked as the kernel expects
         */
        object_property_set_int(OBJECT(&bmc->soc), ASPEED_SCU_PROT_KEY,
                                "hw-prot-key", &error_abort);
    }
    object_property_set_bool(OBJECT(&bmc->soc), true, "realized",
                             &error_abort);

    /*
     * Allocate RAM after the memory controller has checked the size
     * was valid. If not, a default value is used.
     */
    ram_size = object_property_get_uint(OBJECT(&bmc->soc), "ram-size",
                                        &error_abort);

    memory_region_allocate_system_memory(&bmc->ram, NULL, "ram", ram_size);
    memory_region_add_subregion(get_system_memory(), sc->info->sdram_base,
                                &bmc->ram);
    object_property_add_const_link(OBJECT(&bmc->soc), "ram", OBJECT(&bmc->ram),
                                   &error_abort);

    aspeed_board_init_flashes(&bmc->soc.fmc, cfg->fmc_model, &error_abort);
    aspeed_board_init_flashes(&bmc->soc.spi[0], cfg->spi_model, &error_abort);

    /* Install first FMC flash content as a boot rom. */
    if (drive0) {
        AspeedSMCFlash *fl = &bmc->soc.fmc.flashes[0];
        MemoryRegion *boot_rom = g_new(MemoryRegion, 1);

        /*
         * create a ROM region using the default mapping window size of
         * the flash module. The window size is 64MB for the AST2400
         * SoC and 128MB for the AST2500 SoC, which is twice as big as
         * needed by the flash modules of the Aspeed machines.
         */
        memory_region_init_rom(boot_rom, OBJECT(bmc), "aspeed.boot_rom",
                               fl->size, &error_abort);
        memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR,
                                    boot_rom);
        write_boot_rom(drive0, FIRMWARE_ADDR, fl->size, &error_abort);
    }

    aspeed_board_binfo.kernel_filename = machine->kernel_filename;
    aspeed_board_binfo.initrd_filename = machine->initrd_filename;
    aspeed_board_binfo.kernel_cmdline = machine->kernel_cmdline;
    aspeed_board_binfo.ram_size = ram_size;
    aspeed_board_binfo.loader_start = sc->info->sdram_base;

    if (cfg->i2c_init) {
        cfg->i2c_init(bmc);
    }

    arm_load_kernel(ARM_CPU(first_cpu), &aspeed_board_binfo);
}

static void palmetto_bmc_i2c_init(AspeedBoardState *bmc)
{
    AspeedSoCState *soc = &bmc->soc;
    DeviceState *dev;

    /* The palmetto platform expects a ds3231 RTC but a ds1338 is
     * enough to provide basic RTC features. Alarms will be missing */
    i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 0), "ds1338", 0x68);

    /* add a TMP423 temperature sensor */
    dev = i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 2),
                           "tmp423", 0x4c);
    object_property_set_int(OBJECT(dev), 31000, "temperature0", &error_abort);
    object_property_set_int(OBJECT(dev), 28000, "temperature1", &error_abort);
    object_property_set_int(OBJECT(dev), 20000, "temperature2", &error_abort);
    object_property_set_int(OBJECT(dev), 110000, "temperature3", &error_abort);
}

static void palmetto_bmc_init(MachineState *machine)
{
    aspeed_board_init(machine, &aspeed_boards[PALMETTO_BMC]);
}

static void palmetto_bmc_class_init(ObjectClass *oc, void *data)
{
    MachineClass *mc = MACHINE_CLASS(oc);

    mc->desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)";
    mc->init = palmetto_bmc_init;
    mc->max_cpus = 1;
    mc->no_sdcard = 1;
    mc->no_floppy = 1;
    mc->no_cdrom = 1;
    mc->no_parallel = 1;
}

static const TypeInfo palmetto_bmc_type = {
    .name = MACHINE_TYPE_NAME("palmetto-bmc"),
    .parent = TYPE_MACHINE,
    .class_init = palmetto_bmc_class_init,
};

static void ast2500_evb_i2c_init(AspeedBoardState *bmc)
{
    AspeedSoCState *soc = &bmc->soc;

    /* The AST2500 EVB expects a LM75 but a TMP105 is compatible */
    i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7), "tmp105", 0x4d);
}

static void ast2500_evb_init(MachineState *machine)
{
    aspeed_board_init(machine, &aspeed_boards[AST2500_EVB]);
}

static void ast2500_evb_class_init(ObjectClass *oc, void *data)
{
    MachineClass *mc = MACHINE_CLASS(oc);

    mc->desc = "Aspeed AST2500 EVB (ARM1176)";
    mc->init = ast2500_evb_init;
    mc->max_cpus = 1;
    mc->no_sdcard = 1;
    mc->no_floppy = 1;
    mc->no_cdrom = 1;
    mc->no_parallel = 1;
}

static const TypeInfo ast2500_evb_type = {
    .name = MACHINE_TYPE_NAME("ast2500-evb"),
    .parent = TYPE_MACHINE,
    .class_init = ast2500_evb_class_init,
};

static void romulus_bmc_init(MachineState *machine)
{
    aspeed_board_init(machine, &aspeed_boards[ROMULUS_BMC]);
}

static void romulus_bmc_class_init(ObjectClass *oc, void *data)
{
    MachineClass *mc = MACHINE_CLASS(oc);

    mc->desc = "OpenPOWER Romulus BMC (ARM1176)";
    mc->init = romulus_bmc_init;
    mc->max_cpus = 1;
    mc->no_sdcard = 1;
    mc->no_floppy = 1;
    mc->no_cdrom = 1;
    mc->no_parallel = 1;
}

static const TypeInfo romulus_bmc_type = {
    .name = MACHINE_TYPE_NAME("romulus-bmc"),
    .parent = TYPE_MACHINE,
    .class_init = romulus_bmc_class_init,
};

static void aspeed_machine_init(void)
{
    type_register_static(&palmetto_bmc_type);
    type_register_static(&ast2500_evb_type);
    type_register_static(&romulus_bmc_type);
}

type_init(aspeed_machine_init)
Commit	Line	Data
327d8e4e AJ	1	/*
	2	* OpenPOWER Palmetto BMC
	3	*
	4	* Andrew Jeffery <andrew@aj.id.au>
	5	*
	6	* Copyright 2016 IBM Corp.
	7	*
	8	* This code is licensed under the GPL version 2 or later. See
	9	* the COPYING file in the top-level directory.
	10	*/
	11
	12	#include "qemu/osdep.h"
da34e65c	13	#include "qapi/error.h"
4771d756 PB	14	#include "qemu-common.h"
4771d756 PB	15	#include "cpu.h"
327d8e4e AJ	16	#include "exec/address-spaces.h"
327d8e4e AJ	17	#include "hw/arm/arm.h"
00442402	18	#include "hw/arm/aspeed_soc.h"
327d8e4e	19	#include "hw/boards.h"
03dd024f	20	#include "qemu/log.h"
e1ad9bc4	21	#include "sysemu/block-backend.h"
d769a1da CLG	22	#include "hw/loader.h"
d769a1da CLG	23	#include "qemu/error-report.h"
327d8e4e	24
74fb1f38	25	static struct arm_boot_info aspeed_board_binfo = {
b033271f	26	.board_id = -1, /* device-tree-only board */
327d8e4e AJ	27	.nb_cpus = 1,
	28	};
	29
74fb1f38	30	typedef struct AspeedBoardState {
ff90606f	31	AspeedSoCState soc;
327d8e4e	32	MemoryRegion ram;
74fb1f38	33	} AspeedBoardState;
327d8e4e	34
c3ba99f7 CLG	35	typedef struct AspeedBoardConfig {
	36	const char *soc_name;
	37	uint32_t hw_strap1;
6a0e947b CLG	38	const char *fmc_model;
6a0e947b CLG	39	const char *spi_model;
26d5df95	40	uint32_t num_cs;
2cf6cb50	41	void (i2c_init)(AspeedBoardState bmc);
c3ba99f7 CLG	42	} AspeedBoardConfig;
	43
	44	enum {
	45	PALMETTO_BMC,
9a7c1750	46	AST2500_EVB,
ef17f836	47	ROMULUS_BMC,
c3ba99f7 CLG	48	};
c3ba99f7 CLG	49
ef17f836	50	/* Palmetto hardware value: 0x120CE416 */
8da33ef7 CLG	51	#define PALMETTO_BMC_HW_STRAP1 ( \
	52	SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) \| \
	53	SCU_AST2400_HW_STRAP_DRAM_CONFIG(2 /* DDR3 with CL=6, CWL=5 */) \| \
	54	SCU_AST2400_HW_STRAP_ACPI_DIS \| \
	55	SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) \| \
	56	SCU_HW_STRAP_VGA_CLASS_CODE \| \
	57	SCU_HW_STRAP_LPC_RESET_PIN \| \
	58	SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) \| \
	59	SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) \| \
	60	SCU_HW_STRAP_SPI_WIDTH \| \
	61	SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) \| \
	62	SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
	63
ef17f836	64	/* AST2500 evb hardware value: 0xF100C2E6 */
9a7c1750 CLG	65	#define AST2500_EVB_HW_STRAP1 (( \
	66	AST2500_HW_STRAP1_DEFAULTS \| \
	67	SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE \| \
	68	SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE \| \
	69	SCU_AST2500_HW_STRAP_UART_DEBUG \| \
	70	SCU_AST2500_HW_STRAP_DDR4_ENABLE \| \
	71	SCU_HW_STRAP_MAC1_RGMII \| \
	72	SCU_HW_STRAP_MAC0_RGMII) & \
	73	~SCU_HW_STRAP_2ND_BOOT_WDT)
	74
ef17f836 CLG	75	/* Romulus hardware value: 0xF10AD206 */
	76	#define ROMULUS_BMC_HW_STRAP1 ( \
	77	AST2500_HW_STRAP1_DEFAULTS \| \
	78	SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE \| \
	79	SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE \| \
	80	SCU_AST2500_HW_STRAP_UART_DEBUG \| \
	81	SCU_AST2500_HW_STRAP_DDR4_ENABLE \| \
	82	SCU_AST2500_HW_STRAP_ACPI_ENABLE \| \
	83	SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER))
	84
2cf6cb50 CLG	85	static void palmetto_bmc_i2c_init(AspeedBoardState *bmc);
	86	static void ast2500_evb_i2c_init(AspeedBoardState *bmc);
	87
c3ba99f7	88	static const AspeedBoardConfig aspeed_boards[] = {
6a0e947b	89	[PALMETTO_BMC] = {
bd407a21	90	.soc_name = "ast2400-a1",
6a0e947b CLG	91	.hw_strap1 = PALMETTO_BMC_HW_STRAP1,
	92	.fmc_model = "n25q256a",
	93	.spi_model = "mx25l25635e",
26d5df95	94	.num_cs = 1,
2cf6cb50	95	.i2c_init = palmetto_bmc_i2c_init,
6a0e947b CLG	96	},
	97	[AST2500_EVB] = {
	98	.soc_name = "ast2500-a1",
	99	.hw_strap1 = AST2500_EVB_HW_STRAP1,
	100	.fmc_model = "n25q256a",
	101	.spi_model = "mx25l25635e",
26d5df95	102	.num_cs = 1,
2cf6cb50	103	.i2c_init = ast2500_evb_i2c_init,
6a0e947b	104	},
ef17f836 CLG	105	[ROMULUS_BMC] = {
	106	.soc_name = "ast2500-a1",
	107	.hw_strap1 = ROMULUS_BMC_HW_STRAP1,
	108	.fmc_model = "n25q256a",
	109	.spi_model = "mx66l1g45g",
26d5df95	110	.num_cs = 2,
ef17f836	111	},
c3ba99f7 CLG	112	};
c3ba99f7 CLG	113
d769a1da CLG	114	#define FIRMWARE_ADDR 0x0
	115
	116	static void write_boot_rom(DriveInfo *dinfo, hwaddr addr, size_t rom_size,
	117	Error **errp)
	118	{
	119	BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
	120	uint8_t *storage;
0c7209be CLG	121	int64_t size;
	122
	123	/* The block backend size should have already been 'validated' by
	124	* the creation of the m25p80 object.
	125	*/
	126	size = blk_getlength(blk);
	127	if (size <= 0) {
	128	error_setg(errp, "failed to get flash size");
	129	return;
	130	}
d769a1da	131
0c7209be CLG	132	if (rom_size > size) {
0c7209be CLG	133	rom_size = size;
d769a1da CLG	134	}
	135
	136	storage = g_new0(uint8_t, rom_size);
	137	if (blk_pread(blk, 0, storage, rom_size) < 0) {
	138	error_setg(errp, "failed to read the initial flash content");
	139	return;
	140	}
	141
	142	rom_add_blob_fixed("aspeed.boot_rom", storage, rom_size, addr);
	143	g_free(storage);
	144	}
	145
74fb1f38	146	static void aspeed_board_init_flashes(AspeedSMCState s, const char flashtype,
e1ad9bc4 CLG	147	Error **errp)
	148	{
	149	int i ;
	150
	151	for (i = 0; i < s->num_cs; ++i) {
	152	AspeedSMCFlash *fl = &s->flashes[i];
	153	DriveInfo *dinfo = drive_get_next(IF_MTD);
	154	qemu_irq cs_line;
	155
e1ad9bc4 CLG	156	fl->flash = ssi_create_slave_no_init(s->spi, flashtype);
	157	if (dinfo) {
	158	qdev_prop_set_drive(fl->flash, "drive", blk_by_legacy_dinfo(dinfo),
	159	errp);
	160	}
	161	qdev_init_nofail(fl->flash);
	162
	163	cs_line = qdev_get_gpio_in_named(fl->flash, SSI_GPIO_CS, 0);
	164	sysbus_connect_irq(SYS_BUS_DEVICE(s), i + 1, cs_line);
	165	}
	166	}
	167
c3ba99f7 CLG	168	static void aspeed_board_init(MachineState *machine,
c3ba99f7 CLG	169	const AspeedBoardConfig *cfg)
327d8e4e	170	{
74fb1f38	171	AspeedBoardState *bmc;
b033271f	172	AspeedSoCClass *sc;
d769a1da	173	DriveInfo *drive0 = drive_get(IF_MTD, 0, 0);
327d8e4e	174
74fb1f38	175	bmc = g_new0(AspeedBoardState, 1);
c3ba99f7	176	object_initialize(&bmc->soc, (sizeof(bmc->soc)), cfg->soc_name);
327d8e4e AJ	177	object_property_add_child(OBJECT(machine), "soc", OBJECT(&bmc->soc),
	178	&error_abort);
	179
b033271f CLG	180	sc = ASPEED_SOC_GET_CLASS(&bmc->soc);
b033271f CLG	181
19e9cdf0 MAL	182	object_property_set_uint(OBJECT(&bmc->soc), ram_size, "ram-size",
19e9cdf0 MAL	183	&error_abort);
c3ba99f7	184	object_property_set_int(OBJECT(&bmc->soc), cfg->hw_strap1, "hw-strap1",
87e79af0	185	&error_abort);
26d5df95 CLG	186	object_property_set_int(OBJECT(&bmc->soc), cfg->num_cs, "num-cs",
26d5df95 CLG	187	&error_abort);
b6e70d1d JS	188	if (machine->kernel_filename) {
	189	/*
	190	* When booting with a -kernel command line there is no u-boot
	191	* that runs to unlock the SCU. In this case set the default to
	192	* be unlocked as the kernel expects
	193	*/
	194	object_property_set_int(OBJECT(&bmc->soc), ASPEED_SCU_PROT_KEY,
	195	"hw-prot-key", &error_abort);
	196	}
327d8e4e AJ	197	object_property_set_bool(OBJECT(&bmc->soc), true, "realized",
	198	&error_abort);
	199
de46f5f4 CLG	200	/*
	201	* Allocate RAM after the memory controller has checked the size
	202	* was valid. If not, a default value is used.
	203	*/
19e9cdf0 MAL	204	ram_size = object_property_get_uint(OBJECT(&bmc->soc), "ram-size",
19e9cdf0 MAL	205	&error_abort);
de46f5f4 CLG	206
	207	memory_region_allocate_system_memory(&bmc->ram, NULL, "ram", ram_size);
	208	memory_region_add_subregion(get_system_memory(), sc->info->sdram_base,
	209	&bmc->ram);
	210	object_property_add_const_link(OBJECT(&bmc->soc), "ram", OBJECT(&bmc->ram),
	211	&error_abort);
	212
6a0e947b CLG	213	aspeed_board_init_flashes(&bmc->soc.fmc, cfg->fmc_model, &error_abort);
6a0e947b CLG	214	aspeed_board_init_flashes(&bmc->soc.spi[0], cfg->spi_model, &error_abort);
74fb1f38	215
d769a1da CLG	216	/* Install first FMC flash content as a boot rom. */
	217	if (drive0) {
	218	AspeedSMCFlash *fl = &bmc->soc.fmc.flashes[0];
	219	MemoryRegion *boot_rom = g_new(MemoryRegion, 1);
	220
	221	/*
	222	* create a ROM region using the default mapping window size of
93bf276d CLG	223	* the flash module. The window size is 64MB for the AST2400
	224	* SoC and 128MB for the AST2500 SoC, which is twice as big as
	225	* needed by the flash modules of the Aspeed machines.
d769a1da	226	*/
44cf837d	227	memory_region_init_rom(boot_rom, OBJECT(bmc), "aspeed.boot_rom",
d769a1da CLG	228	fl->size, &error_abort);
	229	memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR,
	230	boot_rom);
	231	write_boot_rom(drive0, FIRMWARE_ADDR, fl->size, &error_abort);
	232	}
	233
74fb1f38 CLG	234	aspeed_board_binfo.kernel_filename = machine->kernel_filename;
	235	aspeed_board_binfo.initrd_filename = machine->initrd_filename;
	236	aspeed_board_binfo.kernel_cmdline = machine->kernel_cmdline;
	237	aspeed_board_binfo.ram_size = ram_size;
	238	aspeed_board_binfo.loader_start = sc->info->sdram_base;
e1ad9bc4	239
2cf6cb50 CLG	240	if (cfg->i2c_init) {
	241	cfg->i2c_init(bmc);
	242	}
	243
74fb1f38 CLG	244	arm_load_kernel(ARM_CPU(first_cpu), &aspeed_board_binfo);
74fb1f38 CLG	245	}
b033271f	246
2cf6cb50 CLG	247	static void palmetto_bmc_i2c_init(AspeedBoardState *bmc)
	248	{
	249	AspeedSoCState *soc = &bmc->soc;
a87e81b9	250	DeviceState *dev;
2cf6cb50 CLG	251
	252	/* The palmetto platform expects a ds3231 RTC but a ds1338 is
	253	* enough to provide basic RTC features. Alarms will be missing */
	254	i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 0), "ds1338", 0x68);
a87e81b9 CLG	255
	256	/* add a TMP423 temperature sensor */
	257	dev = i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 2),
	258	"tmp423", 0x4c);
	259	object_property_set_int(OBJECT(dev), 31000, "temperature0", &error_abort);
	260	object_property_set_int(OBJECT(dev), 28000, "temperature1", &error_abort);
	261	object_property_set_int(OBJECT(dev), 20000, "temperature2", &error_abort);
	262	object_property_set_int(OBJECT(dev), 110000, "temperature3", &error_abort);
2cf6cb50 CLG	263	}
2cf6cb50 CLG	264
74fb1f38 CLG	265	static void palmetto_bmc_init(MachineState *machine)
74fb1f38 CLG	266	{
c3ba99f7	267	aspeed_board_init(machine, &aspeed_boards[PALMETTO_BMC]);
327d8e4e AJ	268	}
327d8e4e AJ	269
74fb1f38	270	static void palmetto_bmc_class_init(ObjectClass oc, void data)
327d8e4e	271	{
74fb1f38 CLG	272	MachineClass *mc = MACHINE_CLASS(oc);
	273
	274	mc->desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)";
327d8e4e AJ	275	mc->init = palmetto_bmc_init;
	276	mc->max_cpus = 1;
	277	mc->no_sdcard = 1;
	278	mc->no_floppy = 1;
	279	mc->no_cdrom = 1;
327d8e4e AJ	280	mc->no_parallel = 1;
	281	}
	282
74fb1f38 CLG	283	static const TypeInfo palmetto_bmc_type = {
	284	.name = MACHINE_TYPE_NAME("palmetto-bmc"),
	285	.parent = TYPE_MACHINE,
	286	.class_init = palmetto_bmc_class_init,
	287	};
	288
2cf6cb50 CLG	289	static void ast2500_evb_i2c_init(AspeedBoardState *bmc)
	290	{
	291	AspeedSoCState *soc = &bmc->soc;
	292
	293	/* The AST2500 EVB expects a LM75 but a TMP105 is compatible */
	294	i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7), "tmp105", 0x4d);
	295	}
	296
9a7c1750 CLG	297	static void ast2500_evb_init(MachineState *machine)
	298	{
	299	aspeed_board_init(machine, &aspeed_boards[AST2500_EVB]);
	300	}
	301
	302	static void ast2500_evb_class_init(ObjectClass oc, void data)
	303	{
	304	MachineClass *mc = MACHINE_CLASS(oc);
	305
	306	mc->desc = "Aspeed AST2500 EVB (ARM1176)";
	307	mc->init = ast2500_evb_init;
	308	mc->max_cpus = 1;
	309	mc->no_sdcard = 1;
	310	mc->no_floppy = 1;
	311	mc->no_cdrom = 1;
	312	mc->no_parallel = 1;
	313	}
	314
	315	static const TypeInfo ast2500_evb_type = {
	316	.name = MACHINE_TYPE_NAME("ast2500-evb"),
	317	.parent = TYPE_MACHINE,
	318	.class_init = ast2500_evb_class_init,
	319	};
	320
ef17f836 CLG	321	static void romulus_bmc_init(MachineState *machine)
	322	{
	323	aspeed_board_init(machine, &aspeed_boards[ROMULUS_BMC]);
	324	}
	325
	326	static void romulus_bmc_class_init(ObjectClass oc, void data)
	327	{
	328	MachineClass *mc = MACHINE_CLASS(oc);
	329
	330	mc->desc = "OpenPOWER Romulus BMC (ARM1176)";
	331	mc->init = romulus_bmc_init;
	332	mc->max_cpus = 1;
	333	mc->no_sdcard = 1;
	334	mc->no_floppy = 1;
	335	mc->no_cdrom = 1;
	336	mc->no_parallel = 1;
	337	}
	338
	339	static const TypeInfo romulus_bmc_type = {
	340	.name = MACHINE_TYPE_NAME("romulus-bmc"),
	341	.parent = TYPE_MACHINE,
	342	.class_init = romulus_bmc_class_init,
	343	};
	344
74fb1f38 CLG	345	static void aspeed_machine_init(void)
	346	{
	347	type_register_static(&palmetto_bmc_type);
9a7c1750	348	type_register_static(&ast2500_evb_type);
ef17f836	349	type_register_static(&romulus_bmc_type);
74fb1f38 CLG	350	}
	351
	352	type_init(aspeed_machine_init)