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df2d8b3e IY |
1 | /* |
2 | * Q35 chipset based pc system emulator | |
3 | * | |
4 | * Copyright (c) 2003-2004 Fabrice Bellard | |
5 | * Copyright (c) 2009, 2010 | |
6 | * Isaku Yamahata <yamahata at valinux co jp> | |
7 | * VA Linux Systems Japan K.K. | |
8 | * Copyright (C) 2012 Jason Baron <jbaron@redhat.com> | |
9 | * | |
10 | * This is based on pc.c, but heavily modified. | |
11 | * | |
12 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
13 | * of this software and associated documentation files (the "Software"), to deal | |
14 | * in the Software without restriction, including without limitation the rights | |
15 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
16 | * copies of the Software, and to permit persons to whom the Software is | |
17 | * furnished to do so, subject to the following conditions: | |
18 | * | |
19 | * The above copyright notice and this permission notice shall be included in | |
20 | * all copies or substantial portions of the Software. | |
21 | * | |
22 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
23 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
24 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
25 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
26 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
27 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
28 | * THE SOFTWARE. | |
29 | */ | |
e688df6b | 30 | |
b6a0aa05 | 31 | #include "qemu/osdep.h" |
d471bf3e | 32 | #include "qemu/units.h" |
04920fc0 | 33 | #include "hw/loader.h" |
9c17d615 | 34 | #include "sysemu/arch_init.h" |
93198b6c | 35 | #include "hw/i2c/smbus_eeprom.h" |
bcdb9064 | 36 | #include "hw/rtc/mc146818rtc.h" |
0d09e41a | 37 | #include "hw/xen/xen.h" |
9c17d615 | 38 | #include "sysemu/kvm.h" |
83c9f4ca | 39 | #include "hw/kvm/clock.h" |
0d09e41a | 40 | #include "hw/pci-host/q35.h" |
a27bd6c7 | 41 | #include "hw/qdev-properties.h" |
022c62cb | 42 | #include "exec/address-spaces.h" |
549e984e | 43 | #include "hw/i386/x86.h" |
b094f2e0 | 44 | #include "hw/i386/pc.h" |
0d09e41a | 45 | #include "hw/i386/ich9.h" |
ef18310d EH |
46 | #include "hw/i386/amd_iommu.h" |
47 | #include "hw/i386/intel_iommu.h" | |
94692dcd | 48 | #include "hw/display/ramfb.h" |
a2eb5c0c | 49 | #include "hw/firmware/smbios.h" |
df2d8b3e IY |
50 | #include "hw/ide/pci.h" |
51 | #include "hw/ide/ahci.h" | |
52 | #include "hw/usb.h" | |
e688df6b | 53 | #include "qapi/error.h" |
c87b1520 | 54 | #include "qemu/error-report.h" |
3bfe5716 | 55 | #include "sysemu/numa.h" |
4b997690 | 56 | #include "hw/mem/nvdimm.h" |
5c94b826 | 57 | #include "hw/i386/acpi-build.h" |
df2d8b3e IY |
58 | |
59 | /* ICH9 AHCI has 6 ports */ | |
60 | #define MAX_SATA_PORTS 6 | |
61 | ||
efce3175 PB |
62 | struct ehci_companions { |
63 | const char *name; | |
64 | int func; | |
65 | int port; | |
66 | }; | |
67 | ||
68 | static const struct ehci_companions ich9_1d[] = { | |
69 | { .name = "ich9-usb-uhci1", .func = 0, .port = 0 }, | |
70 | { .name = "ich9-usb-uhci2", .func = 1, .port = 2 }, | |
71 | { .name = "ich9-usb-uhci3", .func = 2, .port = 4 }, | |
72 | }; | |
73 | ||
74 | static const struct ehci_companions ich9_1a[] = { | |
75 | { .name = "ich9-usb-uhci4", .func = 0, .port = 0 }, | |
76 | { .name = "ich9-usb-uhci5", .func = 1, .port = 2 }, | |
77 | { .name = "ich9-usb-uhci6", .func = 2, .port = 4 }, | |
78 | }; | |
79 | ||
80 | static int ehci_create_ich9_with_companions(PCIBus *bus, int slot) | |
81 | { | |
82 | const struct ehci_companions *comp; | |
83 | PCIDevice *ehci, *uhci; | |
84 | BusState *usbbus; | |
85 | const char *name; | |
86 | int i; | |
87 | ||
88 | switch (slot) { | |
89 | case 0x1d: | |
90 | name = "ich9-usb-ehci1"; | |
91 | comp = ich9_1d; | |
92 | break; | |
93 | case 0x1a: | |
94 | name = "ich9-usb-ehci2"; | |
95 | comp = ich9_1a; | |
96 | break; | |
97 | default: | |
98 | return -1; | |
99 | } | |
100 | ||
101 | ehci = pci_create_multifunction(bus, PCI_DEVFN(slot, 7), true, name); | |
102 | qdev_init_nofail(&ehci->qdev); | |
103 | usbbus = QLIST_FIRST(&ehci->qdev.child_bus); | |
104 | ||
105 | for (i = 0; i < 3; i++) { | |
106 | uhci = pci_create_multifunction(bus, PCI_DEVFN(slot, comp[i].func), | |
107 | true, comp[i].name); | |
108 | qdev_prop_set_string(&uhci->qdev, "masterbus", usbbus->name); | |
109 | qdev_prop_set_uint32(&uhci->qdev, "firstport", comp[i].port); | |
110 | qdev_init_nofail(&uhci->qdev); | |
111 | } | |
112 | return 0; | |
113 | } | |
114 | ||
df2d8b3e | 115 | /* PC hardware initialisation */ |
3ef96221 | 116 | static void pc_q35_init(MachineState *machine) |
df2d8b3e | 117 | { |
ec68007a | 118 | PCMachineState *pcms = PC_MACHINE(machine); |
7102fa70 | 119 | PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); |
f0bb276b | 120 | X86MachineState *x86ms = X86_MACHINE(machine); |
df2d8b3e | 121 | Q35PCIHost *q35_host; |
ce88812f | 122 | PCIHostState *phb; |
df2d8b3e IY |
123 | PCIBus *host_bus; |
124 | PCIDevice *lpc; | |
f999c0de | 125 | DeviceState *lpc_dev; |
df2d8b3e IY |
126 | BusState *idebus[MAX_SATA_PORTS]; |
127 | ISADevice *rtc_state; | |
5fe79386 | 128 | MemoryRegion *system_io = get_system_io(); |
df2d8b3e IY |
129 | MemoryRegion *pci_memory; |
130 | MemoryRegion *rom_memory; | |
131 | MemoryRegion *ram_memory; | |
132 | GSIState *gsi_state; | |
133 | ISABus *isa_bus; | |
df2d8b3e IY |
134 | int i; |
135 | ICH9LPCState *ich9_lpc; | |
136 | PCIDevice *ahci; | |
c87b1520 | 137 | ram_addr_t lowmem; |
d93162e1 | 138 | DriveInfo *hd[MAX_SATA_PORTS]; |
6cd2234c | 139 | MachineClass *mc = MACHINE_GET_CLASS(machine); |
f0513d2c | 140 | |
4e17997d MT |
141 | /* Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory |
142 | * and 256 Mbytes for PCI Express Enhanced Configuration Access Mapping | |
143 | * also known as MMCFG). | |
144 | * If it doesn't, we need to split it in chunks below and above 4G. | |
145 | * In any case, try to make sure that guest addresses aligned at | |
146 | * 1G boundaries get mapped to host addresses aligned at 1G boundaries. | |
4e17997d | 147 | */ |
3ef96221 | 148 | if (machine->ram_size >= 0xb0000000) { |
533e8bbb | 149 | lowmem = 0x80000000; |
c87b1520 DS |
150 | } else { |
151 | lowmem = 0xb0000000; | |
152 | } | |
153 | ||
a9dd38db | 154 | /* Handle the machine opt max-ram-below-4g. It is basically doing |
c87b1520 DS |
155 | * min(qemu limit, user limit). |
156 | */ | |
f0bb276b PB |
157 | if (!x86ms->max_ram_below_4g) { |
158 | x86ms->max_ram_below_4g = 4 * GiB; | |
5ec7d098 | 159 | } |
f0bb276b PB |
160 | if (lowmem > x86ms->max_ram_below_4g) { |
161 | lowmem = x86ms->max_ram_below_4g; | |
c87b1520 | 162 | if (machine->ram_size - lowmem > lowmem && |
d471bf3e | 163 | lowmem & (1 * GiB - 1)) { |
9e5d2c52 AF |
164 | warn_report("There is possibly poor performance as the ram size " |
165 | " (0x%" PRIx64 ") is more then twice the size of" | |
166 | " max-ram-below-4g (%"PRIu64") and" | |
167 | " max-ram-below-4g is not a multiple of 1G.", | |
f0bb276b | 168 | (uint64_t)machine->ram_size, x86ms->max_ram_below_4g); |
c87b1520 DS |
169 | } |
170 | } | |
171 | ||
172 | if (machine->ram_size >= lowmem) { | |
f0bb276b PB |
173 | x86ms->above_4g_mem_size = machine->ram_size - lowmem; |
174 | x86ms->below_4g_mem_size = lowmem; | |
df2d8b3e | 175 | } else { |
f0bb276b PB |
176 | x86ms->above_4g_mem_size = 0; |
177 | x86ms->below_4g_mem_size = machine->ram_size; | |
df2d8b3e IY |
178 | } |
179 | ||
dced4d2f MA |
180 | if (xen_enabled()) { |
181 | xen_hvm_init(pcms, &ram_memory); | |
3c2a9669 DS |
182 | } |
183 | ||
703a548a | 184 | x86_cpus_init(x86ms, pcmc->default_cpu_version); |
3c2a9669 DS |
185 | |
186 | kvmclock_create(); | |
187 | ||
df2d8b3e | 188 | /* pci enabled */ |
7102fa70 | 189 | if (pcmc->pci_enabled) { |
df2d8b3e | 190 | pci_memory = g_new(MemoryRegion, 1); |
286690e3 | 191 | memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); |
df2d8b3e IY |
192 | rom_memory = pci_memory; |
193 | } else { | |
194 | pci_memory = NULL; | |
195 | rom_memory = get_system_memory(); | |
196 | } | |
197 | ||
5db3f0de | 198 | pc_guest_info_init(pcms); |
07fb6176 | 199 | |
7102fa70 | 200 | if (pcmc->smbios_defaults) { |
b29ad07e | 201 | /* These values are guest ABI, do not change */ |
e6667f71 | 202 | smbios_set_defaults("QEMU", "Standard PC (Q35 + ICH9, 2009)", |
7102fa70 EH |
203 | mc->name, pcmc->smbios_legacy_mode, |
204 | pcmc->smbios_uuid_encoded, | |
86299120 | 205 | SMBIOS_ENTRY_POINT_21); |
b29ad07e MA |
206 | } |
207 | ||
df2d8b3e IY |
208 | /* allocate ram and load rom/bios */ |
209 | if (!xen_enabled()) { | |
62b160c0 | 210 | pc_memory_init(pcms, get_system_memory(), |
5934e216 | 211 | rom_memory, &ram_memory); |
df2d8b3e IY |
212 | } |
213 | ||
df2d8b3e IY |
214 | /* create pci host bus */ |
215 | q35_host = Q35_HOST_DEVICE(qdev_create(NULL, TYPE_Q35_HOST_DEVICE)); | |
216 | ||
d2623129 | 217 | object_property_add_child(qdev_get_machine(), "q35", OBJECT(q35_host)); |
8d1c7158 EV |
218 | object_property_set_link(OBJECT(q35_host), OBJECT(ram_memory), |
219 | MCH_HOST_PROP_RAM_MEM, NULL); | |
220 | object_property_set_link(OBJECT(q35_host), OBJECT(pci_memory), | |
221 | MCH_HOST_PROP_PCI_MEM, NULL); | |
222 | object_property_set_link(OBJECT(q35_host), OBJECT(get_system_memory()), | |
223 | MCH_HOST_PROP_SYSTEM_MEM, NULL); | |
224 | object_property_set_link(OBJECT(q35_host), OBJECT(system_io), | |
225 | MCH_HOST_PROP_IO_MEM, NULL); | |
f0bb276b | 226 | object_property_set_int(OBJECT(q35_host), x86ms->below_4g_mem_size, |
8d1c7158 | 227 | PCI_HOST_BELOW_4G_MEM_SIZE, NULL); |
f0bb276b | 228 | object_property_set_int(OBJECT(q35_host), x86ms->above_4g_mem_size, |
8d1c7158 | 229 | PCI_HOST_ABOVE_4G_MEM_SIZE, NULL); |
df2d8b3e IY |
230 | /* pci */ |
231 | qdev_init_nofail(DEVICE(q35_host)); | |
ce88812f HT |
232 | phb = PCI_HOST_BRIDGE(q35_host); |
233 | host_bus = phb->bus; | |
df2d8b3e IY |
234 | /* create ISA bus */ |
235 | lpc = pci_create_simple_multifunction(host_bus, PCI_DEVFN(ICH9_LPC_DEV, | |
236 | ICH9_LPC_FUNC), true, | |
237 | TYPE_ICH9_LPC_DEVICE); | |
781bbd6b IM |
238 | |
239 | object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, | |
240 | TYPE_HOTPLUG_HANDLER, | |
ec68007a | 241 | (Object **)&pcms->acpi_dev, |
781bbd6b | 242 | object_property_allow_set_link, |
d2623129 | 243 | OBJ_PROP_LINK_STRONG); |
781bbd6b IM |
244 | object_property_set_link(OBJECT(machine), OBJECT(lpc), |
245 | PC_MACHINE_ACPI_DEVICE_PROP, &error_abort); | |
246 | ||
b00c6f18 PMD |
247 | /* irq lines */ |
248 | gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled); | |
249 | ||
df2d8b3e | 250 | ich9_lpc = ICH9_LPC_DEVICE(lpc); |
f999c0de EV |
251 | lpc_dev = DEVICE(lpc); |
252 | for (i = 0; i < GSI_NUM_PINS; i++) { | |
f0bb276b | 253 | qdev_connect_gpio_out_named(lpc_dev, ICH9_GPIO_GSI, i, x86ms->gsi[i]); |
f999c0de | 254 | } |
df2d8b3e IY |
255 | pci_bus_irqs(host_bus, ich9_lpc_set_irq, ich9_lpc_map_irq, ich9_lpc, |
256 | ICH9_LPC_NB_PIRQS); | |
91c3f2f0 | 257 | pci_bus_set_route_irq_fn(host_bus, ich9_route_intx_pin_to_irq); |
df2d8b3e IY |
258 | isa_bus = ich9_lpc->isa_bus; |
259 | ||
4501d317 | 260 | pc_i8259_create(isa_bus, gsi_state->i8259_irq); |
8197e24c | 261 | |
7102fa70 | 262 | if (pcmc->pci_enabled) { |
552b48f4 | 263 | ioapic_init_gsi(gsi_state, "q35"); |
df2d8b3e IY |
264 | } |
265 | ||
6f529b75 PB |
266 | if (tcg_enabled()) { |
267 | x86_register_ferr_irq(x86ms->gsi[13]); | |
268 | } | |
df2d8b3e | 269 | |
7fb1cf16 | 270 | assert(pcms->vmport != ON_OFF_AUTO__MAX); |
ec68007a EH |
271 | if (pcms->vmport == ON_OFF_AUTO_AUTO) { |
272 | pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON; | |
d1048bef DS |
273 | } |
274 | ||
df2d8b3e | 275 | /* init basic PC hardware */ |
f0bb276b | 276 | pc_basic_device_init(isa_bus, x86ms->gsi, &rtc_state, !mc->no_floppy, |
f5878b03 | 277 | (pcms->vmport != ON_OFF_AUTO_ON), pcms->pit_enabled, |
feddd2fd | 278 | 0xff0104); |
df2d8b3e IY |
279 | |
280 | /* connect pm stuff to lpc */ | |
ed9e923c | 281 | ich9_lpc_pm_init(lpc, x86_machine_is_smm_enabled(x86ms)); |
df2d8b3e | 282 | |
f5878b03 | 283 | if (pcms->sata_enabled) { |
272f0428 CP |
284 | /* ahci and SATA device, for q35 1 ahci controller is built-in */ |
285 | ahci = pci_create_simple_multifunction(host_bus, | |
286 | PCI_DEVFN(ICH9_SATA1_DEV, | |
287 | ICH9_SATA1_FUNC), | |
288 | true, "ich9-ahci"); | |
289 | idebus[0] = qdev_get_child_bus(&ahci->qdev, "ide.0"); | |
290 | idebus[1] = qdev_get_child_bus(&ahci->qdev, "ide.1"); | |
bbe3179a JS |
291 | g_assert(MAX_SATA_PORTS == ahci_get_num_ports(ahci)); |
292 | ide_drive_get(hd, ahci_get_num_ports(ahci)); | |
272f0428 CP |
293 | ahci_ide_create_devs(ahci, hd); |
294 | } else { | |
295 | idebus[0] = idebus[1] = NULL; | |
296 | } | |
df2d8b3e | 297 | |
4bcbe0b6 | 298 | if (machine_usb(machine)) { |
df2d8b3e IY |
299 | /* Should we create 6 UHCI according to ich9 spec? */ |
300 | ehci_create_ich9_with_companions(host_bus, 0x1d); | |
301 | } | |
302 | ||
f5878b03 | 303 | if (pcms->smbus_enabled) { |
be232eb0 | 304 | /* TODO: Populate SPD eeprom data. */ |
ebe15582 CM |
305 | pcms->smbus = ich9_smb_init(host_bus, |
306 | PCI_DEVFN(ICH9_SMB_DEV, ICH9_SMB_FUNC), | |
307 | 0xb100); | |
308 | smbus_eeprom_init(pcms->smbus, 8, NULL, 0); | |
be232eb0 | 309 | } |
df2d8b3e | 310 | |
88076854 | 311 | pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); |
df2d8b3e IY |
312 | |
313 | /* the rest devices to which pci devfn is automatically assigned */ | |
314 | pc_vga_init(isa_bus, host_bus); | |
4b9c264b | 315 | pc_nic_init(pcmc, isa_bus, host_bus); |
5fe79386 | 316 | |
f6a0d06b EA |
317 | if (machine->nvdimms_state->is_enabled) { |
318 | nvdimm_init_acpi_state(machine->nvdimms_state, system_io, | |
5c94b826 | 319 | x86_nvdimm_acpi_dsmio, |
f0bb276b | 320 | x86ms->fw_cfg, OBJECT(pcms)); |
5fe79386 | 321 | } |
df2d8b3e IY |
322 | } |
323 | ||
99fbeafe EH |
324 | #define DEFINE_Q35_MACHINE(suffix, name, compatfn, optionfn) \ |
325 | static void pc_init_##suffix(MachineState *machine) \ | |
326 | { \ | |
327 | void (*compat)(MachineState *m) = (compatfn); \ | |
328 | if (compat) { \ | |
329 | compat(machine); \ | |
330 | } \ | |
331 | pc_q35_init(machine); \ | |
332 | } \ | |
333 | DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn) | |
3458b2b0 | 334 | |
9953f882 | 335 | |
865906f7 | 336 | static void pc_q35_machine_options(MachineClass *m) |
fddd179a | 337 | { |
4b9c264b PB |
338 | PCMachineClass *pcmc = PC_MACHINE_CLASS(m); |
339 | pcmc->default_nic_model = "e1000e"; | |
340 | ||
fddd179a EH |
341 | m->family = "pc_q35"; |
342 | m->desc = "Standard PC (Q35 + ICH9, 2009)"; | |
fddd179a | 343 | m->units_per_default_bus = 1; |
0b7783a7 EH |
344 | m->default_machine_opts = "firmware=bios-256k.bin"; |
345 | m->default_display = "std"; | |
c87759ce | 346 | m->default_kernel_irqchip_split = false; |
0b7783a7 | 347 | m->no_floppy = 1; |
ef18310d EH |
348 | machine_class_allow_dynamic_sysbus_dev(m, TYPE_AMD_IOMMU_DEVICE); |
349 | machine_class_allow_dynamic_sysbus_dev(m, TYPE_INTEL_IOMMU_DEVICE); | |
94692dcd | 350 | machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE); |
00d0f9fd | 351 | m->max_cpus = 288; |
fddd179a EH |
352 | } |
353 | ||
541aaa1d | 354 | static void pc_q35_5_1_machine_options(MachineClass *m) |
87e896ab | 355 | { |
0788a56b | 356 | PCMachineClass *pcmc = PC_MACHINE_CLASS(m); |
87e896ab EH |
357 | pc_q35_machine_options(m); |
358 | m->alias = "q35"; | |
0788a56b | 359 | pcmc->default_cpu_version = 1; |
a6fd5b0e MA |
360 | } |
361 | ||
541aaa1d CH |
362 | DEFINE_Q35_MACHINE(v5_1, "pc-q35-5.1", NULL, |
363 | pc_q35_5_1_machine_options); | |
364 | ||
365 | static void pc_q35_5_0_machine_options(MachineClass *m) | |
366 | { | |
367 | pc_q35_5_1_machine_options(m); | |
368 | m->alias = NULL; | |
369 | compat_props_add(m->compat_props, hw_compat_5_0, hw_compat_5_0_len); | |
370 | compat_props_add(m->compat_props, pc_compat_5_0, pc_compat_5_0_len); | |
371 | } | |
372 | ||
3eb74d20 CH |
373 | DEFINE_Q35_MACHINE(v5_0, "pc-q35-5.0", NULL, |
374 | pc_q35_5_0_machine_options); | |
375 | ||
376 | static void pc_q35_4_2_machine_options(MachineClass *m) | |
377 | { | |
378 | pc_q35_5_0_machine_options(m); | |
379 | m->alias = NULL; | |
380 | compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len); | |
381 | compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len); | |
382 | } | |
383 | ||
9aec2e52 CH |
384 | DEFINE_Q35_MACHINE(v4_2, "pc-q35-4.2", NULL, |
385 | pc_q35_4_2_machine_options); | |
386 | ||
387 | static void pc_q35_4_1_machine_options(MachineClass *m) | |
388 | { | |
389 | pc_q35_4_2_machine_options(m); | |
390 | m->alias = NULL; | |
391 | compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len); | |
392 | compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len); | |
393 | } | |
394 | ||
9bf2650b CH |
395 | DEFINE_Q35_MACHINE(v4_1, "pc-q35-4.1", NULL, |
396 | pc_q35_4_1_machine_options); | |
397 | ||
c87759ce | 398 | static void pc_q35_4_0_1_machine_options(MachineClass *m) |
9bf2650b | 399 | { |
0788a56b | 400 | PCMachineClass *pcmc = PC_MACHINE_CLASS(m); |
9bf2650b CH |
401 | pc_q35_4_1_machine_options(m); |
402 | m->alias = NULL; | |
0788a56b | 403 | pcmc->default_cpu_version = CPU_VERSION_LEGACY; |
8e8cbed0 GK |
404 | /* |
405 | * This is the default machine for the 4.0-stable branch. It is basically | |
406 | * a 4.0 that doesn't use split irqchip by default. It MUST hence apply the | |
407 | * 4.0 compat props. | |
408 | */ | |
409 | compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len); | |
410 | compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len); | |
c87759ce AW |
411 | } |
412 | ||
413 | DEFINE_Q35_MACHINE(v4_0_1, "pc-q35-4.0.1", NULL, | |
414 | pc_q35_4_0_1_machine_options); | |
415 | ||
416 | static void pc_q35_4_0_machine_options(MachineClass *m) | |
417 | { | |
418 | pc_q35_4_0_1_machine_options(m); | |
419 | m->default_kernel_irqchip_split = true; | |
420 | m->alias = NULL; | |
8e8cbed0 | 421 | /* Compat props are applied by the 4.0.1 machine */ |
9bf2650b CH |
422 | } |
423 | ||
84e060bf AW |
424 | DEFINE_Q35_MACHINE(v4_0, "pc-q35-4.0", NULL, |
425 | pc_q35_4_0_machine_options); | |
426 | ||
427 | static void pc_q35_3_1_machine_options(MachineClass *m) | |
428 | { | |
fda672b5 SG |
429 | PCMachineClass *pcmc = PC_MACHINE_CLASS(m); |
430 | ||
84e060bf | 431 | pc_q35_4_0_machine_options(m); |
b2fc91db | 432 | m->default_kernel_irqchip_split = false; |
ebe15582 | 433 | pcmc->do_not_add_smb_acpi = true; |
7fccf2a0 | 434 | m->smbus_no_migration_support = true; |
84e060bf | 435 | m->alias = NULL; |
fda672b5 | 436 | pcmc->pvh_enabled = false; |
abd93cc7 MAL |
437 | compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len); |
438 | compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len); | |
84e060bf AW |
439 | } |
440 | ||
4a93722f MAL |
441 | DEFINE_Q35_MACHINE(v3_1, "pc-q35-3.1", NULL, |
442 | pc_q35_3_1_machine_options); | |
443 | ||
444 | static void pc_q35_3_0_machine_options(MachineClass *m) | |
445 | { | |
446 | pc_q35_3_1_machine_options(m); | |
ddb3235d MAL |
447 | compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len); |
448 | compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len); | |
4a93722f MAL |
449 | } |
450 | ||
aa78a16d PM |
451 | DEFINE_Q35_MACHINE(v3_0, "pc-q35-3.0", NULL, |
452 | pc_q35_3_0_machine_options); | |
968ee4ad BM |
453 | |
454 | static void pc_q35_2_12_machine_options(MachineClass *m) | |
455 | { | |
aa78a16d | 456 | pc_q35_3_0_machine_options(m); |
0d47310b MAL |
457 | compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len); |
458 | compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len); | |
968ee4ad BM |
459 | } |
460 | ||
df47ce8a HZ |
461 | DEFINE_Q35_MACHINE(v2_12, "pc-q35-2.12", NULL, |
462 | pc_q35_2_12_machine_options); | |
463 | ||
464 | static void pc_q35_2_11_machine_options(MachineClass *m) | |
465 | { | |
4b9c264b PB |
466 | PCMachineClass *pcmc = PC_MACHINE_CLASS(m); |
467 | ||
df47ce8a | 468 | pc_q35_2_12_machine_options(m); |
4b9c264b | 469 | pcmc->default_nic_model = "e1000"; |
43df70a9 MAL |
470 | compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len); |
471 | compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len); | |
df47ce8a HZ |
472 | } |
473 | ||
a6fd5b0e MA |
474 | DEFINE_Q35_MACHINE(v2_11, "pc-q35-2.11", NULL, |
475 | pc_q35_2_11_machine_options); | |
476 | ||
477 | static void pc_q35_2_10_machine_options(MachineClass *m) | |
478 | { | |
479 | pc_q35_2_11_machine_options(m); | |
503224f4 MAL |
480 | compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len); |
481 | compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len); | |
3bfe5716 | 482 | m->numa_auto_assign_ram = numa_legacy_auto_assign_ram; |
7b8be49d | 483 | m->auto_enable_numa_with_memhp = false; |
87e896ab EH |
484 | } |
485 | ||
465238d9 PX |
486 | DEFINE_Q35_MACHINE(v2_10, "pc-q35-2.10", NULL, |
487 | pc_q35_2_10_machine_options); | |
488 | ||
489 | static void pc_q35_2_9_machine_options(MachineClass *m) | |
490 | { | |
491 | pc_q35_2_10_machine_options(m); | |
3e803152 MAL |
492 | compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len); |
493 | compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len); | |
465238d9 PX |
494 | } |
495 | ||
d580bd4b EH |
496 | DEFINE_Q35_MACHINE(v2_9, "pc-q35-2.9", NULL, |
497 | pc_q35_2_9_machine_options); | |
498 | ||
499 | static void pc_q35_2_8_machine_options(MachineClass *m) | |
500 | { | |
501 | pc_q35_2_9_machine_options(m); | |
edc24ccd MAL |
502 | compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len); |
503 | compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len); | |
d580bd4b EH |
504 | } |
505 | ||
a4d3c834 LM |
506 | DEFINE_Q35_MACHINE(v2_8, "pc-q35-2.8", NULL, |
507 | pc_q35_2_8_machine_options); | |
508 | ||
509 | static void pc_q35_2_7_machine_options(MachineClass *m) | |
510 | { | |
511 | pc_q35_2_8_machine_options(m); | |
00d0f9fd | 512 | m->max_cpus = 255; |
5a995064 MAL |
513 | compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len); |
514 | compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len); | |
a4d3c834 LM |
515 | } |
516 | ||
d86c1451 IM |
517 | DEFINE_Q35_MACHINE(v2_7, "pc-q35-2.7", NULL, |
518 | pc_q35_2_7_machine_options); | |
519 | ||
520 | static void pc_q35_2_6_machine_options(MachineClass *m) | |
521 | { | |
679dd1a9 | 522 | PCMachineClass *pcmc = PC_MACHINE_CLASS(m); |
88cbe073 | 523 | |
d86c1451 | 524 | pc_q35_2_7_machine_options(m); |
679dd1a9 | 525 | pcmc->legacy_cpu_hotplug = true; |
98e753a6 | 526 | pcmc->linuxboot_dma_enabled = false; |
ff8f261f MAL |
527 | compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len); |
528 | compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len); | |
d86c1451 IM |
529 | } |
530 | ||
240240d5 EH |
531 | DEFINE_Q35_MACHINE(v2_6, "pc-q35-2.6", NULL, |
532 | pc_q35_2_6_machine_options); | |
533 | ||
534 | static void pc_q35_2_5_machine_options(MachineClass *m) | |
535 | { | |
2f34ebf2 | 536 | X86MachineClass *x86mc = X86_MACHINE_CLASS(m); |
88cbe073 | 537 | |
240240d5 | 538 | pc_q35_2_6_machine_options(m); |
2f34ebf2 | 539 | x86mc->save_tsc_khz = false; |
bab47d9a | 540 | m->legacy_fw_cfg_order = 1; |
fe759610 MAL |
541 | compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len); |
542 | compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len); | |
240240d5 EH |
543 | } |
544 | ||
87e896ab EH |
545 | DEFINE_Q35_MACHINE(v2_5, "pc-q35-2.5", NULL, |
546 | pc_q35_2_5_machine_options); | |
547 | ||
865906f7 | 548 | static void pc_q35_2_4_machine_options(MachineClass *m) |
fddd179a | 549 | { |
2f8b5008 | 550 | PCMachineClass *pcmc = PC_MACHINE_CLASS(m); |
88cbe073 | 551 | |
87e896ab | 552 | pc_q35_2_5_machine_options(m); |
de796d93 | 553 | m->hw_version = "2.4.0"; |
2f8b5008 | 554 | pcmc->broken_reserved_end = true; |
2f99b9c2 MAL |
555 | compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len); |
556 | compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len); | |
fddd179a | 557 | } |
aeca6e8d | 558 | |
99fbeafe EH |
559 | DEFINE_Q35_MACHINE(v2_4, "pc-q35-2.4", NULL, |
560 | pc_q35_2_4_machine_options); |