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6a8b1ae2
EI
1/*
2 * Model of Petalogix linux reference design targeting Xilinx Spartan 3ADSP-1800
3 * boards.
4 *
5 * Copyright (c) 2009 Edgar E. Iglesias.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
8fd9dece 26#include "qemu/osdep.h"
a4fb331d 27#include "qemu/units.h"
da34e65c 28#include "qapi/error.h"
4771d756 29#include "cpu.h"
83c9f4ca 30#include "hw/sysbus.h"
1422e32d 31#include "net/net.h"
0d09e41a 32#include "hw/block/flash.h"
9c17d615 33#include "sysemu/sysemu.h"
83c9f4ca 34#include "hw/boards.h"
619ddf5b 35#include "hw/misc/unimp.h"
022c62cb 36#include "exec/address-spaces.h"
1b6d0781 37#include "hw/char/xilinx_uartlite.h"
6a8b1ae2 38
47b43a1f 39#include "boot.h"
b861b741 40
a4fb331d
PMD
41#define LMB_BRAM_SIZE (128 * KiB)
42#define FLASH_SIZE (16 * MiB)
6a8b1ae2 43
6a8b1ae2 44#define BINARY_DEVICE_TREE_FILE "petalogix-s3adsp1800.dtb"
409dbce5 45
cba1fd36
PC
46#define MEMORY_BASEADDR 0x90000000
47#define FLASH_BASEADDR 0xa0000000
619ddf5b 48#define GPIO_BASEADDR 0x81400000
cba1fd36
PC
49#define INTC_BASEADDR 0x81800000
50#define TIMER_BASEADDR 0x83c00000
51#define UARTLITE_BASEADDR 0x84000000
52#define ETHLITE_BASEADDR 0x81000000
53
05a738c4
PC
54#define TIMER_IRQ 0
55#define ETHLITE_IRQ 1
56#define UARTLITE_IRQ 3
57
6a8b1ae2 58static void
3ef96221 59petalogix_s3adsp1800_init(MachineState *machine)
6a8b1ae2 60{
3ef96221 61 ram_addr_t ram_size = machine->ram_size;
6a8b1ae2 62 DeviceState *dev;
3ed60733 63 MicroBlazeCPU *cpu;
751c6a17 64 DriveInfo *dinfo;
6a8b1ae2 65 int i;
a8170e5e 66 hwaddr ddr_base = MEMORY_BASEADDR;
589f0aad
AK
67 MemoryRegion *phys_lmb_bram = g_new(MemoryRegion, 1);
68 MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
73c69456 69 qemu_irq irq[32];
589f0aad 70 MemoryRegion *sysmem = get_system_memory();
6a8b1ae2 71
d87636b1 72 cpu = MICROBLAZE_CPU(object_new(TYPE_MICROBLAZE_CPU));
5325cc34 73 object_property_set_str(OBJECT(cpu), "version", "7.10.d", &error_abort);
ce189ab2 74 qdev_realize(DEVICE(cpu), NULL, &error_abort);
6a8b1ae2 75
6a8b1ae2 76 /* Attach emulated BRAM through the LMB. */
98a99ce0 77 memory_region_init_ram(phys_lmb_bram, NULL,
49946538 78 "petalogix_s3adsp1800.lmb_bram", LMB_BRAM_SIZE,
f8ed85ac 79 &error_fatal);
589f0aad 80 memory_region_add_subregion(sysmem, 0x00000000, phys_lmb_bram);
6a8b1ae2 81
98a99ce0 82 memory_region_init_ram(phys_ram, NULL, "petalogix_s3adsp1800.ram",
f8ed85ac 83 ram_size, &error_fatal);
589f0aad 84 memory_region_add_subregion(sysmem, ddr_base, phys_ram);
6a8b1ae2 85
751c6a17 86 dinfo = drive_get(IF_PFLASH, 0, 0);
cba1fd36 87 pflash_cfi01_register(FLASH_BASEADDR,
940d5b13 88 "petalogix_s3adsp1800.flash", FLASH_SIZE,
4be74634 89 dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
ce14710f 90 64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1);
6a8b1ae2 91
3e80f690 92 dev = qdev_new("xlnx.xps-intc");
13c9bfbf
PC
93 qdev_prop_set_uint32(dev, "kind-of-intr",
94 1 << ETHLITE_IRQ | 1 << UARTLITE_IRQ);
3c6ef471 95 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
13c9bfbf
PC
96 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR);
97 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
98 qdev_get_gpio_in(DEVICE(cpu), MB_CPU_IRQ));
6a8b1ae2
EI
99 for (i = 0; i < 32; i++) {
100 irq[i] = qdev_get_gpio_in(dev, i);
101 }
102
1b6d0781 103 xilinx_uartlite_create(UARTLITE_BASEADDR, irq[UARTLITE_IRQ],
9bca0edb 104 serial_hd(0));
29873712 105
6a8b1ae2 106 /* 2 timers at irq 2 @ 62 Mhz. */
3e80f690 107 dev = qdev_new("xlnx.xps-timer");
29873712
PC
108 qdev_prop_set_uint32(dev, "one-timer-only", 0);
109 qdev_prop_set_uint32(dev, "clock-frequency", 62 * 1000000);
3c6ef471 110 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
29873712
PC
111 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR);
112 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]);
113
b8d4e1c4 114 qemu_check_nic_model(&nd_table[0], "xlnx.xps-ethernetlite");
3e80f690 115 dev = qdev_new("xlnx.xps-ethernetlite");
b8d4e1c4
PC
116 qdev_set_nic_properties(dev, &nd_table[0]);
117 qdev_prop_set_uint32(dev, "tx-ping-pong", 0);
118 qdev_prop_set_uint32(dev, "rx-ping-pong", 0);
3c6ef471 119 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
b8d4e1c4
PC
120 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, ETHLITE_BASEADDR);
121 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[ETHLITE_IRQ]);
6a8b1ae2 122
619ddf5b
EI
123 create_unimplemented_device("gpio", GPIO_BASEADDR, 0x10000);
124
bf494367 125 microblaze_load_kernel(cpu, ddr_base, ram_size,
3ef96221 126 machine->initrd_filename,
ec426ff8 127 BINARY_DEVICE_TREE_FILE,
033af8e9 128 NULL);
6a8b1ae2
EI
129}
130
e264d29d 131static void petalogix_s3adsp1800_machine_init(MachineClass *mc)
6a8b1ae2 132{
e264d29d
EH
133 mc->desc = "PetaLogix linux refdesign for xilinx Spartan 3ADSP1800";
134 mc->init = petalogix_s3adsp1800_init;
ea0ac7f6 135 mc->is_default = true;
6a8b1ae2
EI
136}
137
e264d29d 138DEFINE_MACHINE("petalogix-s3adsp1800", petalogix_s3adsp1800_machine_init)