cryptodev_backend_set_queues,
NULL, NULL);
/* Initialize devices' queues property to 1 */
- object_property_set_int(obj, 1, "queues", NULL);
+ object_property_set_int(obj, "queues", 1, NULL);
}
static void cryptodev_backend_finalize(Object *obj)
static void rng_backend_complete(UserCreatable *uc, Error **errp)
{
- object_property_set_bool(OBJECT(uc), true, "opened", errp);
+ object_property_set_bool(OBJECT(uc), "opened", true, errp);
}
static void rng_backend_prop_set_opened(Object *obj, bool value, Error **errp)
prop);
/* initialize devices' bootindex property to -1 */
- object_property_set_int(obj, -1, name, NULL);
+ object_property_set_int(obj, name, -1, NULL);
}
typedef struct FWLCHSEntry FWLCHSEntry;
static void
qcrypto_secret_complete(UserCreatable *uc, Error **errp)
{
- object_property_set_bool(OBJECT(uc), true, "loaded", errp);
+ object_property_set_bool(OBJECT(uc), "loaded", true, errp);
}
static void
qcrypto_secret_keyring_complete(UserCreatable *uc, Error **errp)
{
- object_property_set_bool(OBJECT(uc), true, "loaded", errp);
+ object_property_set_bool(OBJECT(uc), "loaded", true, errp);
}
static void
qcrypto_tls_creds_anon_complete(UserCreatable *uc, Error **errp)
{
- object_property_set_bool(OBJECT(uc), true, "loaded", errp);
+ object_property_set_bool(OBJECT(uc), "loaded", true, errp);
}
static void
qcrypto_tls_creds_psk_complete(UserCreatable *uc, Error **errp)
{
- object_property_set_bool(OBJECT(uc), true, "loaded", errp);
+ object_property_set_bool(OBJECT(uc), "loaded", true, errp);
}
static void
qcrypto_tls_creds_x509_complete(UserCreatable *uc, Error **errp)
{
- object_property_set_bool(OBJECT(uc), true, "loaded", errp);
+ object_property_set_bool(OBJECT(uc), "loaded", true, errp);
}
*/
if (addr == 0 && data == 0) {
AcpiCpuHotplug *cpus = opaque;
- object_property_set_bool(cpus->device, false, "cpu-hotplug-legacy",
+ object_property_set_bool(cpus->device, "cpu-hotplug-legacy", false,
&error_abort);
}
}
cpu_id = k->get_arch_id(cpu);
if ((cpu_id / 8) >= ACPI_GPE_PROC_LEN) {
- object_property_set_bool(g->device, false, "cpu-hotplug-legacy",
+ object_property_set_bool(g->device, "cpu-hotplug-legacy", false,
&error_abort);
return;
}
{
ICH9LPCPMRegs *s = opaque;
Object *obj = OBJECT(s->gpe_cpu.device);
- object_property_set_bool(obj, false, "cpu-hotplug-legacy", &error_abort);
+ object_property_set_bool(obj, "cpu-hotplug-legacy", false, &error_abort);
return 0;
}
static int vmstate_cpuhp_pre_load(void *opaque)
{
Object *obj = OBJECT(opaque);
- object_property_set_bool(obj, false, "cpu-hotplug-legacy", &error_abort);
+ object_property_set_bool(obj, "cpu-hotplug-legacy", false, &error_abort);
return 0;
}
sprintf(bus, "usb-bus.%d", i);
- object_property_set_bool(OBJECT(&s->ehci[i]), true,
- "companion-enable", &error_fatal);
+ object_property_set_bool(OBJECT(&s->ehci[i]), "companion-enable",
+ true, &error_fatal);
sysbus_realize(SYS_BUS_DEVICE(&s->ehci[i]), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0,
AW_A10_EHCI_BASE + i * 0x8000);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0,
qdev_get_gpio_in(dev, 39 + i));
- object_property_set_str(OBJECT(&s->ohci[i]), bus, "masterbus",
+ object_property_set_str(OBJECT(&s->ohci[i]), "masterbus", bus,
&error_fatal);
sysbus_realize(SYS_BUS_DEVICE(&s->ohci[i]), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->ohci[i]), 0,
* later if necessary.
*/
if (extract32(info->cpuwait_rst, i, 1)) {
- object_property_set_bool(cpuobj, true, "start-powered-off", &err);
+ object_property_set_bool(cpuobj, "start-powered-off", true, &err);
if (err) {
error_propagate(errp, err);
return;
}
}
if (!s->cpu_fpu[i]) {
- object_property_set_bool(cpuobj, false, "vfp", &err);
+ object_property_set_bool(cpuobj, "vfp", false, &err);
if (err) {
error_propagate(errp, err);
return;
}
}
if (!s->cpu_dsp[i]) {
- object_property_set_bool(cpuobj, false, "dsp", &err);
+ object_property_set_bool(cpuobj, "dsp", false, &err);
if (err) {
error_propagate(errp, err);
return;
memory_region_add_subregion_overlap(&s->cpu_container[i], 0,
&s->container, -1);
}
- object_property_set_link(cpuobj, OBJECT(&s->cpu_container[i]),
- "memory", &error_abort);
- object_property_set_link(cpuobj, OBJECT(s), "idau", &error_abort);
+ object_property_set_link(cpuobj, "memory",
+ OBJECT(&s->cpu_container[i]), &error_abort);
+ object_property_set_link(cpuobj, "idau", OBJECT(s), &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(cpuobj), &err)) {
error_propagate(errp, err);
return;
DeviceState *devs = DEVICE(splitter);
int cpunum;
- object_property_set_int(splitter, info->num_cpus,
- "num-lines", &err);
+ object_property_set_int(splitter, "num-lines", info->num_cpus,
+ &err);
if (err) {
error_propagate(errp, err);
return;
* multiple lines, one for each of the PPCs within the ARMSSE and one
* that will be an output from the ARMSSE to the system.
*/
- object_property_set_int(OBJECT(&s->sec_resp_splitter), 3,
- "num-lines", &err);
+ object_property_set_int(OBJECT(&s->sec_resp_splitter), "num-lines", 3,
+ &err);
if (err) {
error_propagate(errp, err);
return;
error_propagate(errp, err);
return;
}
- object_property_set_link(OBJECT(&s->mpc[i]), OBJECT(&s->sram[i]),
- "downstream", &error_abort);
+ object_property_set_link(OBJECT(&s->mpc[i]), "downstream",
+ OBJECT(&s->sram[i]), &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->mpc[i]), &err)) {
error_propagate(errp, err);
return;
}
/* We must OR together lines from the MPC splitters to go to the NVIC */
- object_property_set_int(OBJECT(&s->mpc_irq_orgate),
- IOTS_NUM_EXP_MPC + info->sram_banks,
- "num-lines", &err);
+ object_property_set_int(OBJECT(&s->mpc_irq_orgate), "num-lines",
+ IOTS_NUM_EXP_MPC + info->sram_banks, &err);
if (err) {
error_propagate(errp, err);
return;
sysbus_connect_irq(SYS_BUS_DEVICE(&s->timer0), 0,
armsse_get_common_irq_in(s, 3));
mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->timer0), 0);
- object_property_set_link(OBJECT(&s->apb_ppc0), OBJECT(mr), "port[0]",
+ object_property_set_link(OBJECT(&s->apb_ppc0), "port[0]", OBJECT(mr),
&error_abort);
qdev_prop_set_uint32(DEVICE(&s->timer1), "pclk-frq", s->mainclk_frq);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->timer1), 0,
armsse_get_common_irq_in(s, 4));
mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->timer1), 0);
- object_property_set_link(OBJECT(&s->apb_ppc0), OBJECT(mr), "port[1]",
+ object_property_set_link(OBJECT(&s->apb_ppc0), "port[1]", OBJECT(mr),
&error_abort);
qdev_prop_set_uint32(DEVICE(&s->dualtimer), "pclk-frq", s->mainclk_frq);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->dualtimer), 0,
armsse_get_common_irq_in(s, 5));
mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dualtimer), 0);
- object_property_set_link(OBJECT(&s->apb_ppc0), OBJECT(mr), "port[2]",
+ object_property_set_link(OBJECT(&s->apb_ppc0), "port[2]", OBJECT(mr),
&error_abort);
if (info->has_mhus) {
}
port = g_strdup_printf("port[%d]", i + 3);
mr = sysbus_mmio_get_region(mhu_sbd, 0);
- object_property_set_link(OBJECT(&s->apb_ppc0), OBJECT(mr),
- port, &error_abort);
+ object_property_set_link(OBJECT(&s->apb_ppc0), port, OBJECT(mr),
+ &error_abort);
g_free(port);
/*
* ones) are sent individually to the security controller, and also
* ORed together to give a single combined PPC interrupt to the NVIC.
*/
- object_property_set_int(OBJECT(&s->ppc_irq_orgate),
- NUM_PPCS, "num-lines", &err);
+ object_property_set_int(OBJECT(&s->ppc_irq_orgate), "num-lines", NUM_PPCS,
+ &err);
if (err) {
error_propagate(errp, err);
return;
sysbus_connect_irq(SYS_BUS_DEVICE(&s->s32ktimer), 0,
armsse_get_common_irq_in(s, 2));
mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->s32ktimer), 0);
- object_property_set_link(OBJECT(&s->apb_ppc1), OBJECT(mr), "port[0]",
+ object_property_set_link(OBJECT(&s->apb_ppc1), "port[0]", OBJECT(mr),
&error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->apb_ppc1), &err)) {
qdev_get_gpio_in_named(dev_apb_ppc1,
"cfg_sec_resp", 0));
- object_property_set_int(OBJECT(&s->sysinfo), info->sys_version,
- "SYS_VERSION", &err);
+ object_property_set_int(OBJECT(&s->sysinfo), "SYS_VERSION",
+ info->sys_version, &err);
if (err) {
error_propagate(errp, err);
return;
}
- object_property_set_int(OBJECT(&s->sysinfo),
- armsse_sys_config_value(s, info),
- "SYS_CONFIG", &err);
+ object_property_set_int(OBJECT(&s->sysinfo), "SYS_CONFIG",
+ armsse_sys_config_value(s, info), &err);
if (err) {
error_propagate(errp, err);
return;
/* System information registers */
sysbus_mmio_map(SYS_BUS_DEVICE(&s->sysinfo), 0, 0x40020000);
/* System control registers */
- object_property_set_int(OBJECT(&s->sysctl), info->sys_version,
- "SYS_VERSION", &error_abort);
- object_property_set_int(OBJECT(&s->sysctl), info->cpuwait_rst,
- "CPUWAIT_RST", &error_abort);
- object_property_set_int(OBJECT(&s->sysctl), s->init_svtor,
- "INITSVTOR0_RST", &error_abort);
- object_property_set_int(OBJECT(&s->sysctl), s->init_svtor,
- "INITSVTOR1_RST", &error_abort);
+ object_property_set_int(OBJECT(&s->sysctl), "SYS_VERSION",
+ info->sys_version, &error_abort);
+ object_property_set_int(OBJECT(&s->sysctl), "CPUWAIT_RST",
+ info->cpuwait_rst, &error_abort);
+ object_property_set_int(OBJECT(&s->sysctl), "INITSVTOR0_RST",
+ s->init_svtor, &error_abort);
+ object_property_set_int(OBJECT(&s->sysctl), "INITSVTOR1_RST",
+ s->init_svtor, &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->sysctl), &err)) {
error_propagate(errp, err);
return;
}
/* This OR gate wires together outputs from the secure watchdogs to NMI */
- object_property_set_int(OBJECT(&s->nmi_orgate), 2, "num-lines", &err);
+ object_property_set_int(OBJECT(&s->nmi_orgate), "num-lines", 2, &err);
if (err) {
error_propagate(errp, err);
return;
for (i = 0; i < ARRAY_SIZE(s->ppc_irq_splitter); i++) {
Object *splitter = OBJECT(&s->ppc_irq_splitter[i]);
- object_property_set_int(splitter, 2, "num-lines", &err);
+ object_property_set_int(splitter, "num-lines", 2, &err);
if (err) {
error_propagate(errp, err);
return;
SplitIRQ *splitter = &s->mpc_irq_splitter[i];
DeviceState *dev_splitter = DEVICE(splitter);
- object_property_set_int(OBJECT(splitter), 2, "num-lines", &err);
+ object_property_set_int(OBJECT(splitter), "num-lines", 2, &err);
if (err) {
error_propagate(errp, err);
return;
return;
}
- object_property_set_link(OBJECT(s->cpu), OBJECT(&s->container), "memory",
+ object_property_set_link(OBJECT(s->cpu), "memory", OBJECT(&s->container),
&error_abort);
if (object_property_find(OBJECT(s->cpu), "idau", NULL)) {
- object_property_set_link(OBJECT(s->cpu), s->idau, "idau",
+ object_property_set_link(OBJECT(s->cpu), "idau", s->idau,
&error_abort);
}
if (object_property_find(OBJECT(s->cpu), "init-svtor", NULL)) {
- object_property_set_uint(OBJECT(s->cpu), s->init_svtor,
- "init-svtor", &err);
+ object_property_set_uint(OBJECT(s->cpu), "init-svtor", s->init_svtor,
+ &err);
if (err != NULL) {
error_propagate(errp, err);
return;
}
}
if (object_property_find(OBJECT(s->cpu), "start-powered-off", NULL)) {
- object_property_set_bool(OBJECT(s->cpu), s->start_powered_off,
- "start-powered-off", &err);
+ object_property_set_bool(OBJECT(s->cpu), "start-powered-off",
+ s->start_powered_off, &err);
if (err != NULL) {
error_propagate(errp, err);
return;
}
}
if (object_property_find(OBJECT(s->cpu), "vfp", NULL)) {
- object_property_set_bool(OBJECT(s->cpu), s->vfp,
- "vfp", &err);
+ object_property_set_bool(OBJECT(s->cpu), "vfp", s->vfp, &err);
if (err != NULL) {
error_propagate(errp, err);
return;
}
}
if (object_property_find(OBJECT(s->cpu), "dsp", NULL)) {
- object_property_set_bool(OBJECT(s->cpu), s->dsp,
- "dsp", &err);
+ object_property_set_bool(OBJECT(s->cpu), "dsp", s->dsp, &err);
if (err != NULL) {
error_propagate(errp, err);
return;
Object *obj = OBJECT(&s->bitband[i]);
SysBusDevice *sbd = SYS_BUS_DEVICE(&s->bitband[i]);
- object_property_set_int(obj, bitband_input_addr[i], "base", &err);
+ object_property_set_int(obj, "base", bitband_input_addr[i], &err);
if (err != NULL) {
error_propagate(errp, err);
return;
}
- object_property_set_link(obj, OBJECT(s->board_memory),
- "source-memory", &error_abort);
+ object_property_set_link(obj, "source-memory",
+ OBJECT(s->board_memory), &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(obj), &err)) {
error_propagate(errp, err);
return;
/*
* This will error out if isize is not supported by memory controller.
*/
- object_property_set_uint(OBJECT(&bmc->soc), ram_size, "ram-size",
+ object_property_set_uint(OBJECT(&bmc->soc), "ram-size", ram_size,
&error_fatal);
for (i = 0; i < sc->macs_num; i++) {
}
}
- object_property_set_int(OBJECT(&bmc->soc), amc->hw_strap1, "hw-strap1",
+ object_property_set_int(OBJECT(&bmc->soc), "hw-strap1", amc->hw_strap1,
&error_abort);
- object_property_set_int(OBJECT(&bmc->soc), amc->hw_strap2, "hw-strap2",
+ object_property_set_int(OBJECT(&bmc->soc), "hw-strap2", amc->hw_strap2,
&error_abort);
- object_property_set_int(OBJECT(&bmc->soc), amc->num_cs, "num-cs",
+ object_property_set_int(OBJECT(&bmc->soc), "num-cs", amc->num_cs,
&error_abort);
- object_property_set_link(OBJECT(&bmc->soc), OBJECT(&bmc->ram_container),
- "dram", &error_abort);
+ object_property_set_link(OBJECT(&bmc->soc), "dram",
+ OBJECT(&bmc->ram_container), &error_abort);
if (machine->kernel_filename) {
/*
* When booting with a -kernel command line there is no u-boot
* that runs to unlock the SCU. In this case set the default to
* be unlocked as the kernel expects
*/
- object_property_set_int(OBJECT(&bmc->soc), ASPEED_SCU_PROT_KEY,
- "hw-prot-key", &error_abort);
+ object_property_set_int(OBJECT(&bmc->soc), "hw-prot-key",
+ ASPEED_SCU_PROT_KEY, &error_abort);
}
qdev_realize(DEVICE(&bmc->soc), NULL, &error_abort);
/* add a TMP423 temperature sensor */
dev = i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 2),
"tmp423", 0x4c);
- object_property_set_int(OBJECT(dev), 31000, "temperature0", &error_abort);
- object_property_set_int(OBJECT(dev), 28000, "temperature1", &error_abort);
- object_property_set_int(OBJECT(dev), 20000, "temperature2", &error_abort);
- object_property_set_int(OBJECT(dev), 110000, "temperature3", &error_abort);
+ object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort);
+ object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort);
+ object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort);
+ object_property_set_int(OBJECT(dev), "temperature3", 110000, &error_abort);
}
static void ast2500_evb_i2c_init(AspeedMachineState *bmc)
object_initialize_child(obj, "sd-controller", &s->sdhci,
TYPE_ASPEED_SDHCI);
- object_property_set_int(OBJECT(&s->sdhci), 2, "num-slots", &error_abort);
+ object_property_set_int(OBJECT(&s->sdhci), "num-slots", 2, &error_abort);
/* Init sd card slot class here so that they're under the correct parent */
for (i = 0; i < ASPEED_SDHCI_NUM_SLOTS; ++i) {
object_initialize_child(obj, "emmc-controller", &s->emmc,
TYPE_ASPEED_SDHCI);
- object_property_set_int(OBJECT(&s->emmc), 1, "num-slots", &error_abort);
+ object_property_set_int(OBJECT(&s->emmc), "num-slots", 1, &error_abort);
object_initialize_child(obj, "emmc-controller.sdhci", &s->emmc.slots[0],
TYPE_SYSBUS_SDHCI);
/* CPU */
for (i = 0; i < sc->num_cpus; i++) {
- object_property_set_int(OBJECT(&s->cpu[i]), QEMU_PSCI_CONDUIT_SMC,
- "psci-conduit", &error_abort);
+ object_property_set_int(OBJECT(&s->cpu[i]), "psci-conduit",
+ QEMU_PSCI_CONDUIT_SMC, &error_abort);
if (sc->num_cpus > 1) {
- object_property_set_int(OBJECT(&s->cpu[i]),
- ASPEED_A7MPCORE_ADDR,
- "reset-cbar", &error_abort);
+ object_property_set_int(OBJECT(&s->cpu[i]), "reset-cbar",
+ ASPEED_A7MPCORE_ADDR, &error_abort);
}
- object_property_set_int(OBJECT(&s->cpu[i]), aspeed_calc_affinity(i),
- "mp-affinity", &error_abort);
+ object_property_set_int(OBJECT(&s->cpu[i]), "mp-affinity",
+ aspeed_calc_affinity(i), &error_abort);
- object_property_set_int(OBJECT(&s->cpu[i]), 1125000000, "cntfrq",
+ object_property_set_int(OBJECT(&s->cpu[i]), "cntfrq", 1125000000,
&error_abort);
/*
}
/* A7MPCORE */
- object_property_set_int(OBJECT(&s->a7mpcore), sc->num_cpus, "num-cpu",
+ object_property_set_int(OBJECT(&s->a7mpcore), "num-cpu", sc->num_cpus,
&error_abort);
- object_property_set_int(OBJECT(&s->a7mpcore),
+ object_property_set_int(OBJECT(&s->a7mpcore), "num-irq",
ASPEED_SOC_AST2600_MAX_IRQ + GIC_INTERNAL,
- "num-irq", &error_abort);
+ &error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->a7mpcore), &error_abort);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->a7mpcore), 0, ASPEED_A7MPCORE_ADDR);
aspeed_soc_get_irq(s, ASPEED_RTC));
/* Timer */
- object_property_set_link(OBJECT(&s->timerctrl),
- OBJECT(&s->scu), "scu", &error_abort);
+ object_property_set_link(OBJECT(&s->timerctrl), "scu", OBJECT(&s->scu),
+ &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->timerctrl), &err)) {
error_propagate(errp, err);
return;
}
/* I2C */
- object_property_set_link(OBJECT(&s->i2c), OBJECT(s->dram_mr), "dram",
+ object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr),
&error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->i2c), &err)) {
error_propagate(errp, err);
}
/* FMC, The number of CS is set at the board level */
- object_property_set_link(OBJECT(&s->fmc), OBJECT(s->dram_mr), "dram",
+ object_property_set_link(OBJECT(&s->fmc), "dram", OBJECT(s->dram_mr),
&error_abort);
- object_property_set_int(OBJECT(&s->fmc), sc->memmap[ASPEED_SDRAM],
- "sdram-base", &err);
+ object_property_set_int(OBJECT(&s->fmc), "sdram-base",
+ sc->memmap[ASPEED_SDRAM], &err);
if (err) {
error_propagate(errp, err);
return;
/* SPI */
for (i = 0; i < sc->spis_num; i++) {
- object_property_set_link(OBJECT(&s->spi[i]), OBJECT(s->dram_mr),
- "dram", &error_abort);
- object_property_set_int(OBJECT(&s->spi[i]), 1, "num-cs",
- &error_abort);
+ object_property_set_link(OBJECT(&s->spi[i]), "dram",
+ OBJECT(s->dram_mr), &error_abort);
+ object_property_set_int(OBJECT(&s->spi[i]), "num-cs", 1, &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), &err)) {
error_propagate(errp, err);
return;
for (i = 0; i < sc->wdts_num; i++) {
AspeedWDTClass *awc = ASPEED_WDT_GET_CLASS(&s->wdt[i]);
- object_property_set_link(OBJECT(&s->wdt[i]),
- OBJECT(&s->scu), "scu", &error_abort);
+ object_property_set_link(OBJECT(&s->wdt[i]), "scu", OBJECT(&s->scu),
+ &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->wdt[i]), &err)) {
error_propagate(errp, err);
return;
/* Net */
for (i = 0; i < sc->macs_num; i++) {
- object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "aspeed",
+ object_property_set_bool(OBJECT(&s->ftgmac100[i]), "aspeed", true,
&error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->ftgmac100[i]), &err)) {
error_propagate(errp, err);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->ftgmac100[i]), 0,
aspeed_soc_get_irq(s, ASPEED_ETH1 + i));
- object_property_set_link(OBJECT(&s->mii[i]), OBJECT(&s->ftgmac100[i]),
- "nic", &error_abort);
+ object_property_set_link(OBJECT(&s->mii[i]), "nic",
+ OBJECT(&s->ftgmac100[i]), &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->mii[i]), &err)) {
error_propagate(errp, err);
return;
object_initialize_child(obj, "sdc", &s->sdhci, TYPE_ASPEED_SDHCI);
- object_property_set_int(OBJECT(&s->sdhci), 2, "num-slots", &error_abort);
+ object_property_set_int(OBJECT(&s->sdhci), "num-slots", 2, &error_abort);
/* Init sd card slot class here so that they're under the correct parent */
for (i = 0; i < ASPEED_SDHCI_NUM_SLOTS; ++i) {
aspeed_soc_get_irq(s, ASPEED_RTC));
/* Timer */
- object_property_set_link(OBJECT(&s->timerctrl),
- OBJECT(&s->scu), "scu", &error_abort);
+ object_property_set_link(OBJECT(&s->timerctrl), "scu", OBJECT(&s->scu),
+ &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->timerctrl), &err)) {
error_propagate(errp, err);
return;
}
/* I2C */
- object_property_set_link(OBJECT(&s->i2c), OBJECT(s->dram_mr), "dram",
+ object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr),
&error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->i2c), &err)) {
error_propagate(errp, err);
aspeed_soc_get_irq(s, ASPEED_I2C));
/* FMC, The number of CS is set at the board level */
- object_property_set_link(OBJECT(&s->fmc), OBJECT(s->dram_mr), "dram",
+ object_property_set_link(OBJECT(&s->fmc), "dram", OBJECT(s->dram_mr),
&error_abort);
- object_property_set_int(OBJECT(&s->fmc), sc->memmap[ASPEED_SDRAM],
- "sdram-base", &err);
+ object_property_set_int(OBJECT(&s->fmc), "sdram-base",
+ sc->memmap[ASPEED_SDRAM], &err);
if (err) {
error_propagate(errp, err);
return;
/* SPI */
for (i = 0; i < sc->spis_num; i++) {
- object_property_set_int(OBJECT(&s->spi[i]), 1, "num-cs",
- &error_abort);
+ object_property_set_int(OBJECT(&s->spi[i]), "num-cs", 1, &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), &err)) {
error_propagate(errp, err);
return;
for (i = 0; i < sc->wdts_num; i++) {
AspeedWDTClass *awc = ASPEED_WDT_GET_CLASS(&s->wdt[i]);
- object_property_set_link(OBJECT(&s->wdt[i]),
- OBJECT(&s->scu), "scu", &error_abort);
+ object_property_set_link(OBJECT(&s->wdt[i]), "scu", OBJECT(&s->scu),
+ &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->wdt[i]), &err)) {
error_propagate(errp, err);
return;
/* Net */
for (i = 0; i < sc->macs_num; i++) {
- object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "aspeed",
+ object_property_set_bool(OBJECT(&s->ftgmac100[i]), "aspeed", true,
&error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->ftgmac100[i]), &err)) {
error_propagate(errp, err);
return;
}
- object_property_set_uint(OBJECT(&s->fb), ram_size - vcram_size,
- "vcram-base", &err);
+ object_property_set_uint(OBJECT(&s->fb), "vcram-base",
+ ram_size - vcram_size, &err);
if (err) {
error_propagate(errp, err);
return;
* For the exact details please refer to the Arasan documentation:
* SD3.0_Host_AHB_eMMC4.4_Usersguide_ver5.9_jan11_10.pdf
*/
- object_property_set_uint(OBJECT(&s->sdhci), 3, "sd-spec-version",
+ object_property_set_uint(OBJECT(&s->sdhci), "sd-spec-version", 3,
&error_abort);
- object_property_set_uint(OBJECT(&s->sdhci), BCM2835_SDHC_CAPAREG, "capareg",
- &error_abort);
- object_property_set_bool(OBJECT(&s->sdhci), true, "pending-insert-quirk",
+ object_property_set_uint(OBJECT(&s->sdhci), "capareg",
+ BCM2835_SDHC_CAPAREG, &error_abort);
+ object_property_set_bool(OBJECT(&s->sdhci), "pending-insert-quirk", true,
&error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), &err)) {
error_propagate(errp, err);
s->cpu[n].core.mp_affinity = (info->clusterid << 8) | n;
/* set periphbase/CBAR value for CPU-local registers */
- object_property_set_int(OBJECT(&s->cpu[n].core),
- info->peri_base,
- "reset-cbar", &err);
+ object_property_set_int(OBJECT(&s->cpu[n].core), "reset-cbar",
+ info->peri_base, &err);
if (err) {
error_propagate(errp, err);
return;
}
/* start powered off if not enabled */
- object_property_set_bool(OBJECT(&s->cpu[n].core), n >= s->enabled_cpus,
- "start-powered-off", &err);
+ object_property_set_bool(OBJECT(&s->cpu[n].core), "start-powered-off",
+ n >= s->enabled_cpus, &err);
if (err) {
error_propagate(errp, err);
return;
object_property_add_child(OBJECT(machine), "soc", OBJECT(a10));
object_unref(OBJECT(a10));
- object_property_set_int(OBJECT(&a10->emac), 1, "phy-addr", &err);
+ object_property_set_int(OBJECT(&a10->emac), "phy-addr", 1, &err);
if (err != NULL) {
error_reportf_err(err, "Couldn't set phy address: ");
exit(1);
}
- object_property_set_int(OBJECT(&a10->timer), 32768, "clk0-freq", &err);
+ object_property_set_int(OBJECT(&a10->timer), "clk0-freq", 32768, &err);
if (err != NULL) {
error_reportf_err(err, "Couldn't set clk0 frequency: ");
exit(1);
}
- object_property_set_int(OBJECT(&a10->timer), 24000000, "clk1-freq", &err);
+ object_property_set_int(OBJECT(&a10->timer), "clk1-freq", 24000000, &err);
if (err != NULL) {
error_reportf_err(err, "Couldn't set clk1 frequency: ");
exit(1);
SysBusDevice *sbd;
int i;
- object_property_set_bool(OBJECT(&s->cpu), true, "reset-hivecs", &err);
+ object_property_set_bool(OBJECT(&s->cpu), "reset-hivecs", true, &err);
if (err != NULL) {
error_propagate(errp, err);
return;
sysbus_realize_and_unref(busdev, &error_fatal);
sysbus_mmio_map(busdev, 0, base);
- object_property_set_int(OBJECT(orgate), nevents + 1, "num-lines",
+ object_property_set_int(OBJECT(orgate), "num-lines", nevents + 1,
&error_abort);
qdev_realize(DEVICE(orgate), NULL, &error_abort);
* support EL3 so the CPU EL3 property is disabled before realization.
*/
if (object_property_find(cpuobj, "has_el3", NULL)) {
- object_property_set_bool(cpuobj, false, "has_el3", &error_fatal);
+ object_property_set_bool(cpuobj, "has_el3", false, &error_fatal);
}
s->cpu[n] = ARM_CPU(cpuobj);
- object_property_set_int(cpuobj, exynos4210_calc_affinity(n),
- "mp-affinity", &error_abort);
- object_property_set_int(cpuobj, EXYNOS4210_SMP_PRIVATE_BASE_ADDR,
- "reset-cbar", &error_abort);
+ object_property_set_int(cpuobj, "mp-affinity",
+ exynos4210_calc_affinity(n), &error_abort);
+ object_property_set_int(cpuobj, "reset-cbar",
+ EXYNOS4210_SMP_PRIVATE_BASE_ADDR,
+ &error_abort);
qdev_realize(DEVICE(cpuobj), NULL, &error_fatal);
}
{ FSL_IMX25_ESDHC2_ADDR, FSL_IMX25_ESDHC2_IRQ },
};
- object_property_set_uint(OBJECT(&s->esdhc[i]), 2, "sd-spec-version",
- &error_abort);
- object_property_set_uint(OBJECT(&s->esdhc[i]), IMX25_ESDHC_CAPABILITIES,
- "capareg",
- &error_abort);
- object_property_set_uint(OBJECT(&s->esdhc[i]), SDHCI_VENDOR_IMX,
- "vendor",
+ object_property_set_uint(OBJECT(&s->esdhc[i]), "sd-spec-version", 2,
&error_abort);
+ object_property_set_uint(OBJECT(&s->esdhc[i]), "capareg",
+ IMX25_ESDHC_CAPABILITIES, &error_abort);
+ object_property_set_uint(OBJECT(&s->esdhc[i]), "vendor",
+ SDHCI_VENDOR_IMX, &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->esdhc[i]), &err)) {
error_propagate(errp, err);
return;
}
/* Watchdog */
- object_property_set_bool(OBJECT(&s->wdt), true, "pretimeout-support",
+ object_property_set_bool(OBJECT(&s->wdt), "pretimeout-support", true,
&error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->wdt), &error_abort);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt), 0, FSL_IMX25_WDT_ADDR);
{ FSL_IMX31_GPIO3_ADDR, FSL_IMX31_GPIO3_IRQ }
};
- object_property_set_bool(OBJECT(&s->gpio[i]), false, "has-edge-sel",
+ object_property_set_bool(OBJECT(&s->gpio[i]), "has-edge-sel", false,
&error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio[i]), &err)) {
error_propagate(errp, err);
/* On uniprocessor, the CBAR is set to 0 */
if (smp_cpus > 1) {
- object_property_set_int(OBJECT(&s->cpu[i]), FSL_IMX6_A9MPCORE_ADDR,
- "reset-cbar", &error_abort);
+ object_property_set_int(OBJECT(&s->cpu[i]), "reset-cbar",
+ FSL_IMX6_A9MPCORE_ADDR, &error_abort);
}
/* All CPU but CPU 0 start in power off mode */
if (i) {
- object_property_set_bool(OBJECT(&s->cpu[i]), true,
- "start-powered-off", &error_abort);
+ object_property_set_bool(OBJECT(&s->cpu[i]), "start-powered-off",
+ true, &error_abort);
}
if (!qdev_realize(DEVICE(&s->cpu[i]), NULL, &err)) {
}
}
- object_property_set_int(OBJECT(&s->a9mpcore), smp_cpus, "num-cpu",
+ object_property_set_int(OBJECT(&s->a9mpcore), "num-cpu", smp_cpus,
&error_abort);
- object_property_set_int(OBJECT(&s->a9mpcore),
- FSL_IMX6_MAX_IRQ + GIC_INTERNAL, "num-irq",
- &error_abort);
+ object_property_set_int(OBJECT(&s->a9mpcore), "num-irq",
+ FSL_IMX6_MAX_IRQ + GIC_INTERNAL, &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->a9mpcore), &err)) {
error_propagate(errp, err);
},
};
- object_property_set_bool(OBJECT(&s->gpio[i]), true, "has-edge-sel",
- &error_abort);
- object_property_set_bool(OBJECT(&s->gpio[i]), true, "has-upper-pin-irq",
+ object_property_set_bool(OBJECT(&s->gpio[i]), "has-edge-sel", true,
&error_abort);
+ object_property_set_bool(OBJECT(&s->gpio[i]), "has-upper-pin-irq",
+ true, &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio[i]), &err)) {
error_propagate(errp, err);
return;
};
/* UHS-I SDIO3.0 SDR104 1.8V ADMA */
- object_property_set_uint(OBJECT(&s->esdhc[i]), 3, "sd-spec-version",
- &error_abort);
- object_property_set_uint(OBJECT(&s->esdhc[i]), IMX6_ESDHC_CAPABILITIES,
- "capareg",
- &error_abort);
- object_property_set_uint(OBJECT(&s->esdhc[i]), SDHCI_VENDOR_IMX,
- "vendor",
+ object_property_set_uint(OBJECT(&s->esdhc[i]), "sd-spec-version", 3,
&error_abort);
+ object_property_set_uint(OBJECT(&s->esdhc[i]), "capareg",
+ IMX6_ESDHC_CAPABILITIES, &error_abort);
+ object_property_set_uint(OBJECT(&s->esdhc[i]), "vendor",
+ SDHCI_VENDOR_IMX, &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->esdhc[i]), &err)) {
error_propagate(errp, err);
return;
FSL_IMX6_WDOG2_IRQ,
};
- object_property_set_bool(OBJECT(&s->wdt[i]), true, "pretimeout-support",
- &error_abort);
+ object_property_set_bool(OBJECT(&s->wdt[i]), "pretimeout-support",
+ true, &error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->wdt[i]), &error_abort);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[i]), 0, FSL_IMX6_WDOGn_ADDR[i]);
return;
}
- object_property_set_int(OBJECT(&s->cpu), QEMU_PSCI_CONDUIT_SMC,
- "psci-conduit", &error_abort);
+ object_property_set_int(OBJECT(&s->cpu), "psci-conduit",
+ QEMU_PSCI_CONDUIT_SMC, &error_abort);
qdev_realize(DEVICE(&s->cpu), NULL, &error_abort);
/*
* A7MPCORE
*/
- object_property_set_int(OBJECT(&s->a7mpcore), 1, "num-cpu", &error_abort);
- object_property_set_int(OBJECT(&s->a7mpcore),
- FSL_IMX6UL_MAX_IRQ + GIC_INTERNAL,
- "num-irq", &error_abort);
+ object_property_set_int(OBJECT(&s->a7mpcore), "num-cpu", 1, &error_abort);
+ object_property_set_int(OBJECT(&s->a7mpcore), "num-irq",
+ FSL_IMX6UL_MAX_IRQ + GIC_INTERNAL, &error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->a7mpcore), &error_abort);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->a7mpcore), 0, FSL_IMX6UL_A7MPCORE_ADDR);
FSL_IMX6UL_ENET2_TIMER_IRQ,
};
- object_property_set_uint(OBJECT(&s->eth[i]),
- s->phy_num[i],
- "phy-num", &error_abort);
- object_property_set_uint(OBJECT(&s->eth[i]),
- FSL_IMX6UL_ETH_NUM_TX_RINGS,
- "tx-ring-num", &error_abort);
+ object_property_set_uint(OBJECT(&s->eth[i]), "phy-num",
+ s->phy_num[i], &error_abort);
+ object_property_set_uint(OBJECT(&s->eth[i]), "tx-ring-num",
+ FSL_IMX6UL_ETH_NUM_TX_RINGS, &error_abort);
qdev_set_nic_properties(DEVICE(&s->eth[i]), &nd_table[i]);
sysbus_realize(SYS_BUS_DEVICE(&s->eth[i]), &error_abort);
FSL_IMX6UL_USDHC2_IRQ,
};
- object_property_set_uint(OBJECT(&s->usdhc[i]), SDHCI_VENDOR_IMX,
- "vendor", &error_abort);
+ object_property_set_uint(OBJECT(&s->usdhc[i]), "vendor",
+ SDHCI_VENDOR_IMX, &error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->usdhc[i]), &error_abort);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->usdhc[i]), 0,
FSL_IMX6UL_WDOG3_IRQ,
};
- object_property_set_bool(OBJECT(&s->wdt[i]), true, "pretimeout-support",
- &error_abort);
+ object_property_set_bool(OBJECT(&s->wdt[i]), "pretimeout-support",
+ true, &error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->wdt[i]), &error_abort);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[i]), 0,
for (i = 0; i < smp_cpus; i++) {
o = OBJECT(&s->cpu[i]);
- object_property_set_int(o, QEMU_PSCI_CONDUIT_SMC,
- "psci-conduit", &error_abort);
+ object_property_set_int(o, "psci-conduit", QEMU_PSCI_CONDUIT_SMC,
+ &error_abort);
/* On uniprocessor, the CBAR is set to 0 */
if (smp_cpus > 1) {
- object_property_set_int(o, FSL_IMX7_A7MPCORE_ADDR,
- "reset-cbar", &error_abort);
+ object_property_set_int(o, "reset-cbar", FSL_IMX7_A7MPCORE_ADDR,
+ &error_abort);
}
if (i) {
/* Secondary CPUs start in PSCI powered-down state */
- object_property_set_bool(o, true,
- "start-powered-off", &error_abort);
+ object_property_set_bool(o, "start-powered-off", true,
+ &error_abort);
}
qdev_realize(DEVICE(o), NULL, &error_abort);
/*
* A7MPCORE
*/
- object_property_set_int(OBJECT(&s->a7mpcore), smp_cpus, "num-cpu",
+ object_property_set_int(OBJECT(&s->a7mpcore), "num-cpu", smp_cpus,
&error_abort);
- object_property_set_int(OBJECT(&s->a7mpcore),
- FSL_IMX7_MAX_IRQ + GIC_INTERNAL,
- "num-irq", &error_abort);
+ object_property_set_int(OBJECT(&s->a7mpcore), "num-irq",
+ FSL_IMX7_MAX_IRQ + GIC_INTERNAL, &error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->a7mpcore), &error_abort);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->a7mpcore), 0, FSL_IMX7_A7MPCORE_ADDR);
FSL_IMX7_ENET2_ADDR,
};
- object_property_set_uint(OBJECT(&s->eth[i]), FSL_IMX7_ETH_NUM_TX_RINGS,
- "tx-ring-num", &error_abort);
+ object_property_set_uint(OBJECT(&s->eth[i]), "tx-ring-num",
+ FSL_IMX7_ETH_NUM_TX_RINGS, &error_abort);
qdev_set_nic_properties(DEVICE(&s->eth[i]), &nd_table[i]);
sysbus_realize(SYS_BUS_DEVICE(&s->eth[i]), &error_abort);
FSL_IMX7_USDHC3_IRQ,
};
- object_property_set_uint(OBJECT(&s->usdhc[i]), SDHCI_VENDOR_IMX,
- "vendor", &error_abort);
+ object_property_set_uint(OBJECT(&s->usdhc[i]), "vendor",
+ SDHCI_VENDOR_IMX, &error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->usdhc[i]), &error_abort);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->usdhc[i]), 0,
FSL_IMX7_WDOG4_IRQ,
};
- object_property_set_bool(OBJECT(&s->wdt[i]), true, "pretimeout-support",
- &error_abort);
+ object_property_set_bool(OBJECT(&s->wdt[i]), "pretimeout-support",
+ true, &error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->wdt[i]), &error_abort);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[i]), 0, FSL_IMX7_WDOGn_ADDR[i]);
cpuobj = object_new(machine->cpu_type);
cpu = ARM_CPU(cpuobj);
- object_property_set_int(cpuobj, QEMU_PSCI_CONDUIT_SMC,
- "psci-conduit", &error_abort);
+ object_property_set_int(cpuobj, "psci-conduit", QEMU_PSCI_CONDUIT_SMC,
+ &error_abort);
if (n) {
/* Secondary CPUs start in PSCI powered-down state */
- object_property_set_bool(cpuobj, true,
- "start-powered-off", &error_abort);
+ object_property_set_bool(cpuobj, "start-powered-off", true,
+ &error_abort);
}
if (object_property_find(cpuobj, "reset-cbar", NULL)) {
- object_property_set_int(cpuobj, MPCORE_PERIPHBASE,
- "reset-cbar", &error_abort);
+ object_property_set_int(cpuobj, "reset-cbar", MPCORE_PERIPHBASE,
+ &error_abort);
}
qdev_realize(DEVICE(cpuobj), NULL, &error_fatal);
cpu_irq[n] = qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ);
* realization.
*/
if (object_property_find(cpuobj, "has_el3", NULL)) {
- object_property_set_bool(cpuobj, false, "has_el3", &error_fatal);
+ object_property_set_bool(cpuobj, "has_el3", false, &error_fatal);
}
qdev_realize(DEVICE(cpuobj), NULL, &error_fatal);
s = FSL_IMX6UL(object_new(TYPE_FSL_IMX6UL));
object_property_add_child(OBJECT(machine), "soc", OBJECT(s));
- object_property_set_uint(OBJECT(s), 2, "fec1-phy-num", &error_fatal);
- object_property_set_uint(OBJECT(s), 1, "fec2-phy-num", &error_fatal);
+ object_property_set_uint(OBJECT(s), "fec1-phy-num", 2, &error_fatal);
+ object_property_set_uint(OBJECT(s), "fec2-phy-num", 1, &error_fatal);
qdev_realize(DEVICE(s), NULL, &error_fatal);
memory_region_add_subregion(get_system_memory(), FSL_IMX6UL_MMDC_ADDR,
object_initialize_child(OBJECT(machine), "nrf51", &s->nrf51,
TYPE_NRF51_SOC);
qdev_prop_set_chr(DEVICE(&s->nrf51), "serial0", serial_hd(0));
- object_property_set_link(OBJECT(&s->nrf51), OBJECT(system_memory),
- "memory", &error_fatal);
+ object_property_set_link(OBJECT(&s->nrf51), "memory",
+ OBJECT(system_memory), &error_fatal);
sysbus_realize(SYS_BUS_DEVICE(&s->nrf51), &error_fatal);
/*
memory_region_init_ram(ssram, NULL, name, ramsize[i], &error_fatal);
object_initialize_child(OBJECT(mms), mpcname, mpc, TYPE_TZ_MPC);
- object_property_set_link(OBJECT(mpc), OBJECT(ssram),
- "downstream", &error_fatal);
+ object_property_set_link(OBJECT(mpc), "downstream", OBJECT(ssram),
+ &error_fatal);
sysbus_realize(SYS_BUS_DEVICE(mpc), &error_fatal);
/* Map the upstream end of the MPC into system memory */
upstream = sysbus_mmio_get_region(SYS_BUS_DEVICE(mpc), 1);
*/
object_initialize_child(OBJECT(mms), mscname, msc, TYPE_TZ_MSC);
msc_downstream = sysbus_mmio_get_region(SYS_BUS_DEVICE(&mms->iotkit), 0);
- object_property_set_link(OBJECT(msc), OBJECT(msc_downstream),
- "downstream", &error_fatal);
- object_property_set_link(OBJECT(msc), OBJECT(mms),
- "idau", &error_fatal);
+ object_property_set_link(OBJECT(msc), "downstream",
+ OBJECT(msc_downstream), &error_fatal);
+ object_property_set_link(OBJECT(msc), "idau", OBJECT(mms), &error_fatal);
sysbus_realize(SYS_BUS_DEVICE(msc), &error_fatal);
qdev_connect_gpio_out_named(DEVICE(msc), "irq", 0,
msc_upstream = sysbus_mmio_get_region(SYS_BUS_DEVICE(msc), 0);
object_initialize_child(OBJECT(mms), name, dma, TYPE_PL081);
- object_property_set_link(OBJECT(dma), OBJECT(msc_upstream),
- "downstream", &error_fatal);
+ object_property_set_link(OBJECT(dma), "downstream", OBJECT(msc_upstream),
+ &error_fatal);
sysbus_realize(SYS_BUS_DEVICE(dma), &error_fatal);
s = SYS_BUS_DEVICE(dma);
object_initialize_child(OBJECT(machine), TYPE_IOTKIT, &mms->iotkit,
mmc->armsse_type);
iotkitdev = DEVICE(&mms->iotkit);
- object_property_set_link(OBJECT(&mms->iotkit), OBJECT(system_memory),
- "memory", &error_abort);
+ object_property_set_link(OBJECT(&mms->iotkit), "memory",
+ OBJECT(system_memory), &error_abort);
qdev_prop_set_uint32(iotkitdev, "EXP_NUMIRQ", MPS2TZ_NUMIRQ);
qdev_prop_set_uint32(iotkitdev, "MAINCLK", SYSCLK_FRQ);
sysbus_realize(SYS_BUS_DEVICE(&mms->iotkit), &error_fatal);
NULL);
g_free(name);
- object_property_set_int(OBJECT(splitter), 2, "num-lines",
+ object_property_set_int(OBJECT(splitter), "num-lines", 2,
&error_fatal);
qdev_realize(DEVICE(splitter), NULL, &error_fatal);
qdev_connect_gpio_out(DEVICE(splitter), 0,
*/
object_initialize_child(OBJECT(machine), "sec-resp-splitter",
&mms->sec_resp_splitter, TYPE_SPLIT_IRQ);
- object_property_set_int(OBJECT(&mms->sec_resp_splitter),
+ object_property_set_int(OBJECT(&mms->sec_resp_splitter), "num-lines",
ARRAY_SIZE(mms->ppc) + ARRAY_SIZE(mms->msc),
- "num-lines", &error_fatal);
+ &error_fatal);
qdev_realize(DEVICE(&mms->sec_resp_splitter), NULL, &error_fatal);
dev_splitter = DEVICE(&mms->sec_resp_splitter);
qdev_connect_gpio_out_named(iotkitdev, "sec_resp_cfg", 0,
*/
object_initialize_child(OBJECT(mms), "uart-irq-orgate",
&mms->uart_irq_orgate, TYPE_OR_IRQ);
- object_property_set_int(OBJECT(&mms->uart_irq_orgate), 10, "num-lines",
+ object_property_set_int(OBJECT(&mms->uart_irq_orgate), "num-lines", 10,
&error_fatal);
qdev_realize(DEVICE(&mms->uart_irq_orgate), NULL, &error_fatal);
qdev_connect_gpio_out(DEVICE(&mms->uart_irq_orgate), 0,
mr = pinfo->devfn(mms, pinfo->opaque, pinfo->name, pinfo->size);
portname = g_strdup_printf("port[%d]", port);
- object_property_set_link(OBJECT(ppc), OBJECT(mr),
- portname, &error_fatal);
+ object_property_set_link(OBJECT(ppc), portname, OBJECT(mr),
+ &error_fatal);
g_free(portname);
}
}
qdev_prop_set_string(armv7m, "cpu-type", machine->cpu_type);
qdev_prop_set_bit(armv7m, "enable-bitband", true);
- object_property_set_link(OBJECT(&mms->armv7m), OBJECT(system_memory),
- "memory", &error_abort);
+ object_property_set_link(OBJECT(&mms->armv7m), "memory",
+ OBJECT(system_memory), &error_abort);
sysbus_realize(SYS_BUS_DEVICE(&mms->armv7m), &error_fatal);
create_unimplemented_device("zbtsmram mirror", 0x00400000, 0x00400000);
DeviceState *orgate_dev;
orgate = object_new(TYPE_OR_IRQ);
- object_property_set_int(orgate, 6, "num-lines", &error_fatal);
+ object_property_set_int(orgate, "num-lines", 6, &error_fatal);
qdev_realize(DEVICE(orgate), NULL, &error_fatal);
orgate_dev = DEVICE(orgate);
qdev_connect_gpio_out(orgate_dev, 0, qdev_get_gpio_in(armv7m, 12));
DeviceState *orgate_dev;
orgate = object_new(TYPE_OR_IRQ);
- object_property_set_int(orgate, 10, "num-lines", &error_fatal);
+ object_property_set_int(orgate, "num-lines", 10, &error_fatal);
qdev_realize(DEVICE(orgate), NULL, &error_fatal);
orgate_dev = DEVICE(orgate);
qdev_connect_gpio_out(orgate_dev, 0, qdev_get_gpio_in(armv7m, 12));
DeviceState *txrx_orgate_dev;
txrx_orgate = object_new(TYPE_OR_IRQ);
- object_property_set_int(txrx_orgate, 2, "num-lines", &error_fatal);
+ object_property_set_int(txrx_orgate, "num-lines", 2, &error_fatal);
qdev_realize(DEVICE(txrx_orgate), NULL, &error_fatal);
txrx_orgate_dev = DEVICE(txrx_orgate);
qdev_connect_gpio_out(txrx_orgate_dev, 0,
int j;
orgate = object_new(TYPE_OR_IRQ);
- object_property_set_int(orgate, 2, "num-lines", &error_fatal);
+ object_property_set_int(orgate, "num-lines", 2, &error_fatal);
orgate_dev = DEVICE(orgate);
qdev_realize(orgate_dev, NULL, &error_fatal);
qdev_connect_gpio_out(orgate_dev, 0,
qdev_prop_set_uint32(armv7m, "num-irq", 81);
qdev_prop_set_string(armv7m, "cpu-type", s->cpu_type);
qdev_prop_set_bit(armv7m, "enable-bitband", true);
- object_property_set_link(OBJECT(&s->armv7m), OBJECT(get_system_memory()),
- "memory", &error_abort);
+ object_property_set_link(OBJECT(&s->armv7m), "memory",
+ OBJECT(get_system_memory()), &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->armv7m), &err)) {
error_propagate(errp, err);
return;
}
dev = DEVICE(&s->emac);
- object_property_set_link(OBJECT(&s->emac), OBJECT(get_system_memory()),
- "ahb-bus", &error_abort);
+ object_property_set_link(OBJECT(&s->emac), "ahb-bus",
+ OBJECT(get_system_memory()), &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->emac), &err)) {
error_propagate(errp, err);
return;
}
object_initialize_child(OBJECT(mms), mpcname, mpc, TYPE_TZ_MPC);
- object_property_set_link(OBJECT(mpc), OBJECT(downstream),
- "downstream", &error_fatal);
+ object_property_set_link(OBJECT(mpc), "downstream", OBJECT(downstream),
+ &error_fatal);
sysbus_realize(SYS_BUS_DEVICE(mpc), &error_fatal);
/* Map the upstream end of the MPC into system memory */
upstream = sysbus_mmio_get_region(SYS_BUS_DEVICE(mpc), 1);
object_initialize_child(OBJECT(machine), "sse-200", &mms->sse,
TYPE_SSE200);
ssedev = DEVICE(&mms->sse);
- object_property_set_link(OBJECT(&mms->sse), OBJECT(system_memory),
- "memory", &error_fatal);
+ object_property_set_link(OBJECT(&mms->sse), "memory",
+ OBJECT(system_memory), &error_fatal);
qdev_prop_set_uint32(ssedev, "EXP_NUMIRQ", mmc->num_irqs);
qdev_prop_set_uint32(ssedev, "init-svtor", mmc->init_svtor);
qdev_prop_set_uint32(ssedev, "SRAM_ADDR_WIDTH", mmc->sram_addr_width);
&error_fatal, NULL);
g_free(name);
- object_property_set_int(OBJECT(splitter), 2, "num-lines",
+ object_property_set_int(OBJECT(splitter), "num-lines", 2,
&error_fatal);
qdev_realize(DEVICE(splitter), NULL, &error_fatal);
qdev_connect_gpio_out(DEVICE(splitter), 0,
sizeof(mms->sec_resp_splitter),
TYPE_SPLIT_IRQ, &error_fatal, NULL);
- object_property_set_int(OBJECT(&mms->sec_resp_splitter),
- ARRAY_SIZE(mms->ppc), "num-lines", &error_fatal);
+ object_property_set_int(OBJECT(&mms->sec_resp_splitter), "num-lines",
+ ARRAY_SIZE(mms->ppc), &error_fatal);
qdev_realize(DEVICE(&mms->sec_resp_splitter), NULL, &error_fatal);
dev_splitter = DEVICE(&mms->sec_resp_splitter);
qdev_connect_gpio_out_named(ssedev, "sec_resp_cfg", 0,
mr = pinfo->devfn(mms, pinfo->opaque, pinfo->name, pinfo->size);
portname = g_strdup_printf("port[%d]", port);
- object_property_set_link(OBJECT(ppc), OBJECT(mr),
- portname, &error_fatal);
+ object_property_set_link(OBJECT(ppc), portname, OBJECT(mr),
+ &error_fatal);
g_free(portname);
}
wm8750_dev = i2c_create_slave(i2c, TYPE_WM8750, MP_WM_ADDR);
dev = qdev_new(TYPE_MV88W8618_AUDIO);
s = SYS_BUS_DEVICE(dev);
- object_property_set_link(OBJECT(dev), OBJECT(wm8750_dev),
- "wm8750", NULL);
+ object_property_set_link(OBJECT(dev), "wm8750", OBJECT(wm8750_dev),
+ NULL);
sysbus_realize_and_unref(s, &error_fatal);
sysbus_mmio_map(s, 0, MP_AUDIO_BASE);
sysbus_connect_irq(s, 0, pic[MP_AUDIO_IRQ]);
return;
}
- object_property_set_link(OBJECT(&s->cpu), OBJECT(&s->container), "memory",
+ object_property_set_link(OBJECT(&s->cpu), "memory", OBJECT(&s->container),
&error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->cpu), &err)) {
error_propagate(errp, err);
BASE_TO_IRQ(NRF51_RNG_BASE)));
/* UICR, FICR, NVMC, FLASH */
- object_property_set_uint(OBJECT(&s->nvm), s->flash_size, "flash-size",
+ object_property_set_uint(OBJECT(&s->nvm), "flash-size", s->flash_size,
&err);
if (err) {
error_propagate(errp, err);
/* TIMER */
for (i = 0; i < NRF51_NUM_TIMERS; i++) {
- object_property_set_uint(OBJECT(&s->timer[i]), i, "id", &err);
+ object_property_set_uint(OBJECT(&s->timer[i]), "id", i, &err);
if (err) {
error_propagate(errp, err);
return;
object_unref(OBJECT(h3));
/* Setup timer properties */
- object_property_set_int(OBJECT(h3), 32768, "clk0-freq",
- &error_abort);
- object_property_set_int(OBJECT(h3), 24 * 1000 * 1000, "clk1-freq",
+ object_property_set_int(OBJECT(h3), "clk0-freq", 32768, &error_abort);
+ object_property_set_int(OBJECT(h3), "clk1-freq", 24 * 1000 * 1000,
&error_abort);
/* Setup SID properties. Currently using a default fixed SID identifier. */
}
/* Setup EMAC properties */
- object_property_set_int(OBJECT(&h3->emac), 1, "phy-addr", &error_abort);
+ object_property_set_int(OBJECT(&h3->emac), "phy-addr", 1, &error_abort);
/* DRAMC */
- object_property_set_uint(OBJECT(h3), h3->memmap[AW_H3_SDRAM],
- "ram-addr", &error_abort);
- object_property_set_int(OBJECT(h3), machine->ram_size / MiB, "ram-size",
+ object_property_set_uint(OBJECT(h3), "ram-addr", h3->memmap[AW_H3_SDRAM],
+ &error_abort);
+ object_property_set_int(OBJECT(h3), "ram-size", machine->ram_size / MiB,
&error_abort);
/* Mark H3 object realized */
object_initialize_child(OBJECT(machine), "soc", &s->soc,
board_soc_type(board_rev));
object_property_add_const_link(OBJECT(&s->soc), "ram", OBJECT(machine->ram));
- object_property_set_int(OBJECT(&s->soc), board_rev, "board-rev",
+ object_property_set_int(OBJECT(&s->soc), "board-rev", board_rev,
&error_abort);
qdev_realize(DEVICE(&s->soc), NULL, &error_abort);
* before realization.
*/
if (object_property_find(cpuobj, "has_el3", NULL)) {
- object_property_set_bool(cpuobj, false, "has_el3", &error_fatal);
+ object_property_set_bool(cpuobj, "has_el3", false, &error_fatal);
}
if (is_pb && is_mpcore) {
- object_property_set_int(cpuobj, periphbase, "reset-cbar",
+ object_property_set_int(cpuobj, "reset-cbar", periphbase,
&error_fatal);
}
/* DMA controller is optional, apparently. */
dev = qdev_new("pl081");
- object_property_set_link(OBJECT(dev), OBJECT(sysmem), "downstream",
+ object_property_set_link(OBJECT(dev), "downstream", OBJECT(sysmem),
&error_fatal);
busdev = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(busdev, &error_fatal);
dev = qdev_new("arm-smmuv3");
- object_property_set_link(OBJECT(dev), OBJECT(bus), "primary-bus",
+ object_property_set_link(OBJECT(dev), "primary-bus", OBJECT(bus),
&error_abort);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
}
cpuobj = object_new(possible_cpus->cpus[n].type);
- object_property_set_int(cpuobj, possible_cpus->cpus[n].arch_id,
- "mp-affinity", NULL);
+ object_property_set_int(cpuobj, "mp-affinity",
+ possible_cpus->cpus[n].arch_id, NULL);
cs = CPU(cpuobj);
cs->cpu_index = n;
&error_fatal);
if (object_property_find(cpuobj, "reset-cbar", NULL)) {
- object_property_set_int(cpuobj,
+ object_property_set_int(cpuobj, "reset-cbar",
sbsa_ref_memmap[SBSA_CPUPERIPHS].base,
- "reset-cbar", &error_abort);
+ &error_abort);
}
- object_property_set_link(cpuobj, OBJECT(sysmem), "memory",
+ object_property_set_link(cpuobj, "memory", OBJECT(sysmem),
&error_abort);
- object_property_set_link(cpuobj, OBJECT(secure_sysmem),
- "secure-memory", &error_abort);
+ object_property_set_link(cpuobj, "secure-memory",
+ OBJECT(secure_sysmem), &error_abort);
qdev_realize(DEVICE(cpuobj), NULL, &error_fatal);
object_unref(cpuobj);
qdev_prop_set_uint32(nvic, "num-irq", NUM_IRQ_LINES);
qdev_prop_set_string(nvic, "cpu-type", ms->cpu_type);
qdev_prop_set_bit(nvic, "enable-bitband", true);
- object_property_set_link(OBJECT(nvic), OBJECT(get_system_memory()),
- "memory", &error_abort);
+ object_property_set_link(OBJECT(nvic), "memory",
+ OBJECT(get_system_memory()), &error_abort);
/* This will exit with an error if the user passed us a bad cpu_type */
sysbus_realize_and_unref(SYS_BUS_DEVICE(nvic), &error_fatal);
qdev_prop_set_uint32(armv7m, "num-irq", 96);
qdev_prop_set_string(armv7m, "cpu-type", s->cpu_type);
qdev_prop_set_bit(armv7m, "enable-bitband", true);
- object_property_set_link(OBJECT(&s->armv7m), OBJECT(get_system_memory()),
- "memory", &error_abort);
+ object_property_set_link(OBJECT(&s->armv7m), "memory",
+ OBJECT(get_system_memory()), &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->armv7m), &err)) {
error_propagate(errp, err);
return;
}
/* ADC 1 to 3 */
- object_property_set_int(OBJECT(s->adc_irqs), STM_NUM_ADCS,
- "num-lines", &error_abort);
+ object_property_set_int(OBJECT(s->adc_irqs), "num-lines", STM_NUM_ADCS,
+ &error_abort);
if (!qdev_realize(DEVICE(s->adc_irqs), NULL, &err)) {
error_propagate(errp, err);
return;
qdev_prop_set_uint32(armv7m, "num-irq", 96);
qdev_prop_set_string(armv7m, "cpu-type", s->cpu_type);
qdev_prop_set_bit(armv7m, "enable-bitband", true);
- object_property_set_link(OBJECT(&s->armv7m), OBJECT(system_memory),
- "memory", &error_abort);
+ object_property_set_link(OBJECT(&s->armv7m), "memory",
+ OBJECT(system_memory), &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->armv7m), &err)) {
error_propagate(errp, err);
return;
error_propagate(errp, err);
return;
}
- object_property_set_int(OBJECT(&s->adc_irqs), STM_NUM_ADCS,
- "num-lines", &error_abort);
+ object_property_set_int(OBJECT(&s->adc_irqs), "num-lines", STM_NUM_ADCS,
+ &error_abort);
if (!qdev_realize(DEVICE(&s->adc_irqs), NULL, &err)) {
error_propagate(errp, err);
return;
* realization.
*/
if (object_property_find(cpuobj, "has_el3", NULL)) {
- object_property_set_bool(cpuobj, false, "has_el3", &error_fatal);
+ object_property_set_bool(cpuobj, "has_el3", false, &error_fatal);
}
qdev_realize(DEVICE(cpuobj), NULL, &error_fatal);
pl011_create(0x10009000, sic[6], serial_hd(3));
dev = qdev_new("pl080");
- object_property_set_link(OBJECT(dev), OBJECT(sysmem), "downstream",
+ object_property_set_link(OBJECT(dev), "downstream", OBJECT(sysmem),
&error_fatal);
busdev = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(busdev, &error_fatal);
Object *cpuobj = object_new(cpu_type);
if (!secure) {
- object_property_set_bool(cpuobj, false, "has_el3", NULL);
+ object_property_set_bool(cpuobj, "has_el3", false, NULL);
}
if (!virt) {
if (object_property_find(cpuobj, "has_el2", NULL)) {
- object_property_set_bool(cpuobj, false, "has_el2", NULL);
+ object_property_set_bool(cpuobj, "has_el2", false, NULL);
}
}
if (object_property_find(cpuobj, "reset-cbar", NULL)) {
- object_property_set_int(cpuobj, periphbase,
- "reset-cbar", &error_abort);
+ object_property_set_int(cpuobj, "reset-cbar", periphbase,
+ &error_abort);
}
qdev_realize(DEVICE(cpuobj), NULL, &error_fatal);
}
dev = qdev_new(itsclass);
- object_property_set_link(OBJECT(dev), OBJECT(vms->gic), "parent-gicv3",
+ object_property_set_link(OBJECT(dev), "parent-gicv3", OBJECT(vms->gic),
&error_abort);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_GIC_ITS].base);
dev = qdev_new("arm-smmuv3");
- object_property_set_link(OBJECT(dev), OBJECT(bus), "primary-bus",
+ object_property_set_link(OBJECT(dev), "primary-bus", OBJECT(bus),
&error_abort);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
}
cpuobj = object_new(possible_cpus->cpus[n].type);
- object_property_set_int(cpuobj, possible_cpus->cpus[n].arch_id,
- "mp-affinity", NULL);
+ object_property_set_int(cpuobj, "mp-affinity",
+ possible_cpus->cpus[n].arch_id, NULL);
cs = CPU(cpuobj);
cs->cpu_index = n;
aarch64 &= object_property_get_bool(cpuobj, "aarch64", NULL);
if (!vms->secure) {
- object_property_set_bool(cpuobj, false, "has_el3", NULL);
+ object_property_set_bool(cpuobj, "has_el3", false, NULL);
}
if (!vms->virt && object_property_find(cpuobj, "has_el2", NULL)) {
- object_property_set_bool(cpuobj, false, "has_el2", NULL);
+ object_property_set_bool(cpuobj, "has_el2", false, NULL);
}
if (vms->psci_conduit != QEMU_PSCI_CONDUIT_DISABLED) {
- object_property_set_int(cpuobj, vms->psci_conduit,
- "psci-conduit", NULL);
+ object_property_set_int(cpuobj, "psci-conduit", vms->psci_conduit,
+ NULL);
/* Secondary CPUs start in PSCI powered-down state */
if (n > 0) {
- object_property_set_bool(cpuobj, true,
- "start-powered-off", NULL);
+ object_property_set_bool(cpuobj, "start-powered-off", true,
+ NULL);
}
}
if (vmc->kvm_no_adjvtime &&
object_property_find(cpuobj, "kvm-no-adjvtime", NULL)) {
- object_property_set_bool(cpuobj, true, "kvm-no-adjvtime", NULL);
+ object_property_set_bool(cpuobj, "kvm-no-adjvtime", true, NULL);
}
if (vmc->no_pmu && object_property_find(cpuobj, "pmu", NULL)) {
- object_property_set_bool(cpuobj, false, "pmu", NULL);
+ object_property_set_bool(cpuobj, "pmu", false, NULL);
}
if (object_property_find(cpuobj, "reset-cbar", NULL)) {
- object_property_set_int(cpuobj, vms->memmap[VIRT_CPUPERIPHS].base,
- "reset-cbar", &error_abort);
+ object_property_set_int(cpuobj, "reset-cbar",
+ vms->memmap[VIRT_CPUPERIPHS].base,
+ &error_abort);
}
- object_property_set_link(cpuobj, OBJECT(sysmem), "memory",
+ object_property_set_link(cpuobj, "memory", OBJECT(sysmem),
&error_abort);
if (vms->secure) {
- object_property_set_link(cpuobj, OBJECT(secure_sysmem),
- "secure-memory", &error_abort);
+ object_property_set_link(cpuobj, "secure-memory",
+ OBJECT(secure_sysmem), &error_abort);
}
/*
}
}
- object_property_set_link(cpuobj, OBJECT(tag_sysmem),
- "tag-memory", &error_abort);
+ object_property_set_link(cpuobj, "tag-memory", OBJECT(tag_sysmem),
+ &error_abort);
if (vms->secure) {
- object_property_set_link(cpuobj, OBJECT(secure_tag_sysmem),
- "secure-tag-memory", &error_abort);
+ object_property_set_link(cpuobj, "secure-tag-memory",
+ OBJECT(secure_tag_sysmem),
+ &error_abort);
}
}
* realization.
*/
if (object_property_find(OBJECT(cpu), "has_el3", NULL)) {
- object_property_set_bool(OBJECT(cpu), false, "has_el3", &error_fatal);
+ object_property_set_bool(OBJECT(cpu), "has_el3", false, &error_fatal);
}
- object_property_set_int(OBJECT(cpu), ZYNQ_BOARD_MIDR, "midr",
+ object_property_set_int(OBJECT(cpu), "midr", ZYNQ_BOARD_MIDR,
&error_fatal);
- object_property_set_int(OBJECT(cpu), MPCORE_PERIPHBASE, "reset-cbar",
+ object_property_set_int(OBJECT(cpu), "reset-cbar", MPCORE_PERIPHBASE,
&error_fatal);
qdev_realize(DEVICE(cpu), NULL, &error_fatal);
object_initialize_child(OBJECT(machine), "xlnx-versal", &s->soc,
TYPE_XLNX_VERSAL);
- object_property_set_link(OBJECT(&s->soc), OBJECT(machine->ram),
- "ddr", &error_abort);
- object_property_set_int(OBJECT(&s->soc), psci_conduit,
- "psci-conduit", &error_abort);
+ object_property_set_link(OBJECT(&s->soc), "ddr", OBJECT(machine->ram),
+ &error_abort);
+ object_property_set_int(OBJECT(&s->soc), "psci-conduit", psci_conduit,
+ &error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_fatal);
fdt_create(s);
object_initialize_child(OBJECT(s), "apu-cpu[*]", &s->fpd.apu.cpu[i],
XLNX_VERSAL_ACPU_TYPE);
obj = OBJECT(&s->fpd.apu.cpu[i]);
- object_property_set_int(obj, s->cfg.psci_conduit,
- "psci-conduit", &error_abort);
+ object_property_set_int(obj, "psci-conduit", s->cfg.psci_conduit,
+ &error_abort);
if (i) {
/* Secondary CPUs start in PSCI powered-down state */
- object_property_set_bool(obj, true,
- "start-powered-off", &error_abort);
+ object_property_set_bool(obj, "start-powered-off", true,
+ &error_abort);
}
- object_property_set_int(obj, ARRAY_SIZE(s->fpd.apu.cpu),
- "core-count", &error_abort);
- object_property_set_link(obj, OBJECT(&s->fpd.apu.mr), "memory",
+ object_property_set_int(obj, "core-count", ARRAY_SIZE(s->fpd.apu.cpu),
+ &error_abort);
+ object_property_set_link(obj, "memory", OBJECT(&s->fpd.apu.mr),
&error_abort);
qdev_realize(DEVICE(obj), NULL, &error_fatal);
}
qemu_check_nic_model(nd, "cadence_gem");
qdev_set_nic_properties(dev, nd);
}
- object_property_set_int(OBJECT(dev),
- 2, "num-priority-queues",
+ object_property_set_int(OBJECT(dev), "num-priority-queues", 2,
&error_abort);
- object_property_set_link(OBJECT(dev),
- OBJECT(&s->mr_ps), "dma",
+ object_property_set_link(OBJECT(dev), "dma", OBJECT(&s->mr_ps),
&error_abort);
sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
object_initialize_child(OBJECT(s), name, &s->lpd.iou.adma[i],
TYPE_XLNX_ZDMA);
dev = DEVICE(&s->lpd.iou.adma[i]);
- object_property_set_int(OBJECT(dev), 128, "bus-width", &error_abort);
+ object_property_set_int(OBJECT(dev), "bus-width", 128, &error_abort);
sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
TYPE_SYSBUS_SDHCI);
dev = DEVICE(&s->pmc.iou.sd[i]);
- object_property_set_uint(OBJECT(dev),
- 3, "sd-spec-version", &error_fatal);
- object_property_set_uint(OBJECT(dev), SDHCI_CAPABILITIES, "capareg",
+ object_property_set_uint(OBJECT(dev), "sd-spec-version", 3,
+ &error_fatal);
+ object_property_set_uint(OBJECT(dev), "capareg", SDHCI_CAPABILITIES,
&error_fatal);
- object_property_set_uint(OBJECT(dev), UHS_I, "uhs", &error_fatal);
+ object_property_set_uint(OBJECT(dev), "uhs", UHS_I, &error_fatal);
sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_XLNX_ZYNQMP);
- object_property_set_link(OBJECT(&s->soc), OBJECT(machine->ram),
- "ddr-ram", &error_abort);
- object_property_set_bool(OBJECT(&s->soc), s->secure, "secure",
+ object_property_set_link(OBJECT(&s->soc), "ddr-ram", OBJECT(machine->ram),
+ &error_abort);
+ object_property_set_bool(OBJECT(&s->soc), "secure", s->secure,
&error_fatal);
- object_property_set_bool(OBJECT(&s->soc), s->virt, "virtualization",
+ object_property_set_bool(OBJECT(&s->soc), "virtualization", s->virt,
&error_fatal);
qdev_realize(DEVICE(&s->soc), NULL, &error_fatal);
name = object_get_canonical_path_component(OBJECT(&s->rpu_cpu[i]));
if (strcmp(name, boot_cpu)) {
/* Secondary CPUs start in PSCI powered-down state */
- object_property_set_bool(OBJECT(&s->rpu_cpu[i]), true,
- "start-powered-off", &error_abort);
+ object_property_set_bool(OBJECT(&s->rpu_cpu[i]),
+ "start-powered-off", true, &error_abort);
} else {
s->boot_cpu_ptr = &s->rpu_cpu[i];
}
g_free(name);
- object_property_set_bool(OBJECT(&s->rpu_cpu[i]), true, "reset-hivecs",
+ object_property_set_bool(OBJECT(&s->rpu_cpu[i]), "reset-hivecs", true,
&error_abort);
if (!qdev_realize(DEVICE(&s->rpu_cpu[i]), NULL, &err)) {
error_propagate(errp, err);
for (i = 0; i < num_apus; i++) {
char *name;
- object_property_set_int(OBJECT(&s->apu_cpu[i]), QEMU_PSCI_CONDUIT_SMC,
- "psci-conduit", &error_abort);
+ object_property_set_int(OBJECT(&s->apu_cpu[i]), "psci-conduit",
+ QEMU_PSCI_CONDUIT_SMC, &error_abort);
name = object_get_canonical_path_component(OBJECT(&s->apu_cpu[i]));
if (strcmp(name, boot_cpu)) {
/* Secondary CPUs start in PSCI powered-down state */
- object_property_set_bool(OBJECT(&s->apu_cpu[i]), true,
- "start-powered-off", &error_abort);
+ object_property_set_bool(OBJECT(&s->apu_cpu[i]),
+ "start-powered-off", true, &error_abort);
} else {
s->boot_cpu_ptr = &s->apu_cpu[i];
}
g_free(name);
- object_property_set_bool(OBJECT(&s->apu_cpu[i]),
- s->secure, "has_el3", NULL);
- object_property_set_bool(OBJECT(&s->apu_cpu[i]),
- s->virt, "has_el2", NULL);
- object_property_set_int(OBJECT(&s->apu_cpu[i]), GIC_BASE_ADDR,
- "reset-cbar", &error_abort);
- object_property_set_int(OBJECT(&s->apu_cpu[i]), num_apus,
- "core-count", &error_abort);
+ object_property_set_bool(OBJECT(&s->apu_cpu[i]), "has_el3", s->secure,
+ NULL);
+ object_property_set_bool(OBJECT(&s->apu_cpu[i]), "has_el2", s->virt,
+ NULL);
+ object_property_set_int(OBJECT(&s->apu_cpu[i]), "reset-cbar",
+ GIC_BASE_ADDR, &error_abort);
+ object_property_set_int(OBJECT(&s->apu_cpu[i]), "core-count",
+ num_apus, &error_abort);
if (!qdev_realize(DEVICE(&s->apu_cpu[i]), NULL, &err)) {
error_propagate(errp, err);
return;
qemu_check_nic_model(nd, TYPE_CADENCE_GEM);
qdev_set_nic_properties(DEVICE(&s->gem[i]), nd);
}
- object_property_set_int(OBJECT(&s->gem[i]), GEM_REVISION, "revision",
+ object_property_set_int(OBJECT(&s->gem[i]), "revision", GEM_REVISION,
&error_abort);
- object_property_set_int(OBJECT(&s->gem[i]), 2, "num-priority-queues",
+ object_property_set_int(OBJECT(&s->gem[i]), "num-priority-queues", 2,
&error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->gem[i]), &err)) {
error_propagate(errp, err);
gic_spi[uart_intr[i]]);
}
- object_property_set_int(OBJECT(&s->sata), SATA_NUM_PORTS, "num-ports",
+ object_property_set_int(OBJECT(&s->sata), "num-ports", SATA_NUM_PORTS,
&error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->sata), &err)) {
error_propagate(errp, err);
* - SDIO Specification Version 3.0
* - eMMC Specification Version 4.51
*/
- object_property_set_uint(sdhci, 3, "sd-spec-version", &err);
+ object_property_set_uint(sdhci, "sd-spec-version", 3, &err);
if (err) {
error_propagate(errp, err);
return;
}
- object_property_set_uint(sdhci, SDHCI_CAPABILITIES, "capareg", &err);
+ object_property_set_uint(sdhci, "capareg", SDHCI_CAPABILITIES, &err);
if (err) {
error_propagate(errp, err);
return;
}
- object_property_set_uint(sdhci, UHS_I, "uhs", &err);
+ object_property_set_uint(sdhci, "uhs", UHS_I, &err);
if (err) {
error_propagate(errp, err);
return;
error_propagate(errp, err);
return;
}
- object_property_set_link(OBJECT(&s->dp), OBJECT(&s->dpdma), "dpdma",
+ object_property_set_link(OBJECT(&s->dp), "dpdma", OBJECT(&s->dpdma),
&error_abort);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->dpdma), 0, DPDMA_ADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->dpdma), 0, gic_spi[DPDMA_IRQ]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0, gic_spi[RTC_IRQ]);
for (i = 0; i < XLNX_ZYNQMP_NUM_GDMA_CH; i++) {
- object_property_set_uint(OBJECT(&s->gdma[i]), 128, "bus-width", &err);
+ object_property_set_uint(OBJECT(&s->gdma[i]), "bus-width", 128, &err);
if (err) {
error_propagate(errp, err);
return;
xendev = XEN_DEVICE(qdev_new(type));
blockdev = XEN_BLOCK_DEVICE(xendev);
- object_property_set_str(OBJECT(xendev), vdev, "vdev", &local_err);
+ object_property_set_str(OBJECT(xendev), "vdev", vdev, &local_err);
if (local_err) {
error_propagate_prepend(errp, local_err, "failed to set 'vdev': ");
goto fail;
}
- object_property_set_str(OBJECT(xendev),
- xen_block_drive_get_node_name(drive), "drive",
- &local_err);
+ object_property_set_str(OBJECT(xendev), "drive",
+ xen_block_drive_get_node_name(drive), &local_err);
if (local_err) {
error_propagate_prepend(errp, local_err, "failed to set 'drive': ");
goto fail;
}
- object_property_set_str(OBJECT(xendev), iothread->id, "iothread",
+ object_property_set_str(OBJECT(xendev), "iothread", iothread->id,
&local_err);
if (local_err) {
error_propagate_prepend(errp, local_err,
void qbus_set_hotplug_handler(BusState *bus, Object *handler)
{
- object_property_set_link(OBJECT(bus), handler,
- QDEV_HOTPLUG_HANDLER_PROPERTY, &error_abort);
+ object_property_set_link(OBJECT(bus), QDEV_HOTPLUG_HANDLER_PROPERTY,
+ handler, &error_abort);
}
void qbus_set_bus_hotplug_handler(BusState *bus)
{
Error *err = NULL;
- object_property_set_bool(OBJECT(bus), true, "realized", &err);
+ object_property_set_bool(OBJECT(bus), "realized", true, &err);
error_propagate(errp, err);
return !err;
}
void qbus_unrealize(BusState *bus)
{
- object_property_set_bool(OBJECT(bus), false, "realized", &error_abort);
+ object_property_set_bool(OBJECT(bus), "realized", false, &error_abort);
}
static bool bus_get_realized(Object *obj, Error **errp)
/* due to bug in libvirt, it doesn't pass node-id from props on
* device_add as expected, so we have to fix it up here */
if (slot->props.has_node_id) {
- object_property_set_int(OBJECT(dev), slot->props.node_id,
- "node-id", errp);
+ object_property_set_int(OBJECT(dev), "node-id",
+ slot->props.node_id, errp);
}
} else if (node_id != slot->props.node_id) {
error_setg(errp, "invalid node-id, must be %"PRId64,
}
}
- object_property_set_str(OBJECT(dev), ref, name, errp);
+ object_property_set_str(OBJECT(dev), name, ref, errp);
}
void qdev_prop_set_drive(DeviceState *dev, const char *name,
Chardev *value)
{
assert(!value || value->label);
- object_property_set_str(OBJECT(dev),
- value ? value->label : "", name, &error_abort);
+ object_property_set_str(OBJECT(dev), name, value ? value->label : "",
+ &error_abort);
}
void qdev_prop_set_netdev(DeviceState *dev, const char *name,
NetClientState *value)
{
assert(!value || value->name);
- object_property_set_str(OBJECT(dev),
- value ? value->name : "", name, &error_abort);
+ object_property_set_str(OBJECT(dev), name, value ? value->name : "",
+ &error_abort);
}
void qdev_set_nic_properties(DeviceState *dev, NICInfo *nd)
void qdev_prop_set_bit(DeviceState *dev, const char *name, bool value)
{
- object_property_set_bool(OBJECT(dev), value, name, &error_abort);
+ object_property_set_bool(OBJECT(dev), name, value, &error_abort);
}
void qdev_prop_set_uint8(DeviceState *dev, const char *name, uint8_t value)
{
- object_property_set_int(OBJECT(dev), value, name, &error_abort);
+ object_property_set_int(OBJECT(dev), name, value, &error_abort);
}
void qdev_prop_set_uint16(DeviceState *dev, const char *name, uint16_t value)
{
- object_property_set_int(OBJECT(dev), value, name, &error_abort);
+ object_property_set_int(OBJECT(dev), name, value, &error_abort);
}
void qdev_prop_set_uint32(DeviceState *dev, const char *name, uint32_t value)
{
- object_property_set_int(OBJECT(dev), value, name, &error_abort);
+ object_property_set_int(OBJECT(dev), name, value, &error_abort);
}
void qdev_prop_set_int32(DeviceState *dev, const char *name, int32_t value)
{
- object_property_set_int(OBJECT(dev), value, name, &error_abort);
+ object_property_set_int(OBJECT(dev), name, value, &error_abort);
}
void qdev_prop_set_uint64(DeviceState *dev, const char *name, uint64_t value)
{
- object_property_set_int(OBJECT(dev), value, name, &error_abort);
+ object_property_set_int(OBJECT(dev), name, value, &error_abort);
}
void qdev_prop_set_string(DeviceState *dev, const char *name, const char *value)
{
- object_property_set_str(OBJECT(dev), value, name, &error_abort);
+ object_property_set_str(OBJECT(dev), name, value, &error_abort);
}
void qdev_prop_set_macaddr(DeviceState *dev, const char *name,
snprintf(str, sizeof(str), "%02x:%02x:%02x:%02x:%02x:%02x",
value[0], value[1], value[2], value[3], value[4], value[5]);
- object_property_set_str(OBJECT(dev), str, name, &error_abort);
+ object_property_set_str(OBJECT(dev), name, str, &error_abort);
}
void qdev_prop_set_enum(DeviceState *dev, const char *name, int value)
Property *prop;
prop = qdev_prop_find(dev, name);
- object_property_set_str(OBJECT(dev),
+ object_property_set_str(OBJECT(dev), name,
qapi_enum_lookup(prop->info->enum_table, value),
- name, &error_abort);
+ &error_abort);
}
static GPtrArray *global_props(void)
assert(!DEVICE_GET_CLASS(dev)->bus_type);
}
- object_property_set_bool(OBJECT(dev), true, "realized", &err);
+ object_property_set_bool(OBJECT(dev), "realized", true, &err);
if (err) {
error_propagate(errp, err);
}
void qdev_unrealize(DeviceState *dev)
{
- object_property_set_bool(OBJECT(dev), false, "realized", &error_abort);
+ object_property_set_bool(OBJECT(dev), "realized", false, &error_abort);
}
static int qdev_assert_realized_properly(Object *obj, void *opaque)
"/unattached"),
"non-qdev-gpio[*]", OBJECT(pin));
}
- object_property_set_link(OBJECT(dev), OBJECT(pin), propname, &error_abort);
+ object_property_set_link(OBJECT(dev), propname, OBJECT(pin), &error_abort);
g_free(propname);
}
qemu_irq ret = (qemu_irq)object_property_get_link(OBJECT(dev), propname,
NULL);
if (ret) {
- object_property_set_link(OBJECT(dev), NULL, propname, NULL);
+ object_property_set_link(OBJECT(dev), propname, NULL, NULL);
}
g_free(propname);
return ret;
}
for (i = 0; i < g->conf.max_outputs; i++) {
- object_property_set_link(OBJECT(g->scanout[i].con),
- OBJECT(vpci_dev),
- "device", &error_abort);
+ object_property_set_link(OBJECT(g->scanout[i].con), "device",
+ OBJECT(vpci_dev), &error_abort);
}
}
graphic_console_set_hwops(vga->con, &virtio_vga_base_ops, vvga);
for (i = 0; i < g->conf.max_outputs; i++) {
- object_property_set_link(OBJECT(g->scanout[i].con),
- OBJECT(vpci_dev),
- "device", &error_abort);
+ object_property_set_link(OBJECT(g->scanout[i].con), "device",
+ OBJECT(vpci_dev), &error_abort);
}
}
d = qdev_new(TYPE_LANCE);
object_property_add_child(OBJECT(dev), "lance", OBJECT(d));
qdev_set_nic_properties(d, nd);
- object_property_set_link(OBJECT(d), OBJECT(dev), "dma", &error_abort);
+ object_property_set_link(OBJECT(d), "dma", OBJECT(dev), &error_abort);
sysbus_realize_and_unref(SYS_BUS_DEVICE(d), &error_fatal);
}
}
espdma = qdev_new(TYPE_SPARC32_ESPDMA_DEVICE);
- object_property_set_link(OBJECT(espdma), iommu, "iommu", &error_abort);
+ object_property_set_link(OBJECT(espdma), "iommu", iommu, &error_abort);
object_property_add_child(OBJECT(s), "espdma", OBJECT(espdma));
sysbus_realize_and_unref(SYS_BUS_DEVICE(espdma), &error_fatal);
sysbus_mmio_get_region(sbd, 0));
ledma = qdev_new(TYPE_SPARC32_LEDMA_DEVICE);
- object_property_set_link(OBJECT(ledma), iommu, "iommu", &error_abort);
+ object_property_set_link(OBJECT(ledma), "iommu", iommu, &error_abort);
object_property_add_child(OBJECT(s), "ledma", OBJECT(ledma));
sysbus_realize_and_unref(SYS_BUS_DEVICE(ledma), &error_fatal);
(Object **)&cs->dma,
object_property_allow_set_link,
OBJ_PROP_LINK_STRONG);
- object_property_set_link(OBJECT(ds), OBJECT(s), "dma", &error_abort);
- object_property_set_link(OBJECT(cs), OBJECT(s), "dma", &error_abort);
+ object_property_set_link(OBJECT(ds), "dma", OBJECT(s), &error_abort);
+ object_property_set_link(OBJECT(cs), "dma", OBJECT(s), &error_abort);
for (i = 0; i < 2; i++) {
struct Stream *st = &s->streams[i];
(Object **)&x86ms->rtc,
object_property_allow_set_link,
OBJ_PROP_LINK_STRONG);
- object_property_set_link(OBJECT(pcms), OBJECT(s),
- "rtc_state", &error_abort);
+ object_property_set_link(OBJECT(pcms), "rtc_state", OBJECT(s),
+ &error_abort);
set_boot_dev(s, MACHINE(pcms)->boot_order, &error_fatal);
vmmouse = NULL;
}
if (vmmouse) {
- object_property_set_link(OBJECT(vmmouse), OBJECT(i8042),
- "i8042", &error_abort);
+ object_property_set_link(OBJECT(vmmouse), "i8042", OBJECT(i8042),
+ &error_abort);
isa_realize_and_unref(vmmouse, isa_bus, &error_fatal);
}
port92 = isa_create_simple(isa_bus, TYPE_PORT92);
(Object **)&pcms->acpi_dev,
object_property_allow_set_link,
OBJ_PROP_LINK_STRONG);
- object_property_set_link(OBJECT(machine), OBJECT(piix4_pm),
- PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
+ object_property_set_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
+ OBJECT(piix4_pm), &error_abort);
}
if (machine->nvdimms_state->is_enabled) {
q35_host = Q35_HOST_DEVICE(qdev_new(TYPE_Q35_HOST_DEVICE));
object_property_add_child(qdev_get_machine(), "q35", OBJECT(q35_host));
- object_property_set_link(OBJECT(q35_host), OBJECT(ram_memory),
- MCH_HOST_PROP_RAM_MEM, NULL);
- object_property_set_link(OBJECT(q35_host), OBJECT(pci_memory),
- MCH_HOST_PROP_PCI_MEM, NULL);
- object_property_set_link(OBJECT(q35_host), OBJECT(get_system_memory()),
- MCH_HOST_PROP_SYSTEM_MEM, NULL);
- object_property_set_link(OBJECT(q35_host), OBJECT(system_io),
- MCH_HOST_PROP_IO_MEM, NULL);
- object_property_set_int(OBJECT(q35_host), x86ms->below_4g_mem_size,
- PCI_HOST_BELOW_4G_MEM_SIZE, NULL);
- object_property_set_int(OBJECT(q35_host), x86ms->above_4g_mem_size,
- PCI_HOST_ABOVE_4G_MEM_SIZE, NULL);
+ object_property_set_link(OBJECT(q35_host), MCH_HOST_PROP_RAM_MEM,
+ OBJECT(ram_memory), NULL);
+ object_property_set_link(OBJECT(q35_host), MCH_HOST_PROP_PCI_MEM,
+ OBJECT(pci_memory), NULL);
+ object_property_set_link(OBJECT(q35_host), MCH_HOST_PROP_SYSTEM_MEM,
+ OBJECT(get_system_memory()), NULL);
+ object_property_set_link(OBJECT(q35_host), MCH_HOST_PROP_IO_MEM,
+ OBJECT(system_io), NULL);
+ object_property_set_int(OBJECT(q35_host), PCI_HOST_BELOW_4G_MEM_SIZE,
+ x86ms->below_4g_mem_size, NULL);
+ object_property_set_int(OBJECT(q35_host), PCI_HOST_ABOVE_4G_MEM_SIZE,
+ x86ms->above_4g_mem_size, NULL);
/* pci */
sysbus_realize_and_unref(SYS_BUS_DEVICE(q35_host), &error_fatal);
phb = PCI_HOST_BRIDGE(q35_host);
(Object **)&pcms->acpi_dev,
object_property_allow_set_link,
OBJ_PROP_LINK_STRONG);
- object_property_set_link(OBJECT(machine), OBJECT(lpc),
- PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
+ object_property_set_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
+ OBJECT(lpc), &error_abort);
/* irq lines */
gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled);
Error *local_err = NULL;
Object *cpu = object_new(MACHINE(x86ms)->cpu_type);
- object_property_set_uint(cpu, apic_id, "apic-id", &local_err);
+ object_property_set_uint(cpu, "apic-id", apic_id, &local_err);
if (local_err) {
goto out;
}
object_property_add(obj, "bootindex", "int32",
ide_dev_get_bootindex,
ide_dev_set_bootindex, NULL, NULL);
- object_property_set_int(obj, -1, "bootindex", NULL);
+ object_property_set_int(obj, "bootindex", -1, NULL);
}
static void ide_hd_realize(IDEDevice *dev, Error **errp)
* resized dynamically when the controller is configured by the FW
* to limit accesses to resources not provisioned.
*/
- object_property_set_int(OBJECT(xsrc), PNV_XIVE_NR_IRQS, "nr-irqs",
+ object_property_set_int(OBJECT(xsrc), "nr-irqs", PNV_XIVE_NR_IRQS,
&error_fatal);
- object_property_set_link(OBJECT(xsrc), OBJECT(xive), "xive",
- &error_abort);
+ object_property_set_link(OBJECT(xsrc), "xive", OBJECT(xive), &error_abort);
if (!qdev_realize(DEVICE(xsrc), NULL, &local_err)) {
error_propagate(errp, local_err);
return;
}
- object_property_set_int(OBJECT(end_xsrc), PNV_XIVE_NR_ENDS, "nr-ends",
+ object_property_set_int(OBJECT(end_xsrc), "nr-ends", PNV_XIVE_NR_ENDS,
&error_fatal);
- object_property_set_link(OBJECT(end_xsrc), OBJECT(xive), "xive",
+ object_property_set_link(OBJECT(end_xsrc), "xive", OBJECT(xive),
&error_abort);
if (!qdev_realize(DEVICE(end_xsrc), NULL, &local_err)) {
error_propagate(errp, local_err);
/*
* Initialize the internal sources, for IPIs and virtual devices.
*/
- object_property_set_int(OBJECT(xsrc), xive->nr_irqs, "nr-irqs",
+ object_property_set_int(OBJECT(xsrc), "nr-irqs", xive->nr_irqs,
&error_fatal);
- object_property_set_link(OBJECT(xsrc), OBJECT(xive), "xive",
- &error_abort);
+ object_property_set_link(OBJECT(xsrc), "xive", OBJECT(xive), &error_abort);
if (!qdev_realize(DEVICE(xsrc), NULL, &local_err)) {
error_propagate(errp, local_err);
return;
/*
* Initialize the END ESB source
*/
- object_property_set_int(OBJECT(end_xsrc), xive->nr_irqs, "nr-ends",
+ object_property_set_int(OBJECT(end_xsrc), "nr-ends", xive->nr_irqs,
&error_fatal);
- object_property_set_link(OBJECT(end_xsrc), OBJECT(xive), "xive",
+ object_property_set_link(OBJECT(end_xsrc), "xive", OBJECT(xive),
&error_abort);
if (!qdev_realize(DEVICE(end_xsrc), NULL, &local_err)) {
error_propagate(errp, local_err);
obj = object_new(type);
object_property_add_child(cpu, type, obj);
object_unref(obj);
- object_property_set_link(obj, OBJECT(xi), ICP_PROP_XICS, &error_abort);
- object_property_set_link(obj, cpu, ICP_PROP_CPU, &error_abort);
+ object_property_set_link(obj, ICP_PROP_XICS, OBJECT(xi), &error_abort);
+ object_property_set_link(obj, ICP_PROP_CPU, cpu, &error_abort);
if (!qdev_realize(DEVICE(obj), NULL, &local_err)) {
object_unparent(obj);
error_propagate(errp, local_err);
obj = object_new(TYPE_XIVE_TCTX);
object_property_add_child(cpu, TYPE_XIVE_TCTX, obj);
object_unref(obj);
- object_property_set_link(obj, cpu, "cpu", &error_abort);
- object_property_set_link(obj, OBJECT(xptr), "presenter", &error_abort);
+ object_property_set_link(obj, "cpu", cpu, &error_abort);
+ object_property_set_link(obj, "presenter", OBJECT(xptr), &error_abort);
if (!qdev_realize(DEVICE(obj), NULL, &local_err)) {
goto error;
}
qdev_set_nic_properties(dev, &nd_table[0]);
qdev_prop_set_uint8(dev, "it_shift", 2);
qdev_prop_set_bit(dev, "big_endian", true);
- object_property_set_link(OBJECT(dev), OBJECT(get_system_memory()),
- "dma_mr", &error_abort);
+ object_property_set_link(OBJECT(dev), "dma_mr",
+ OBJECT(get_system_memory()), &error_abort);
sysbus = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(sysbus, &error_fatal);
sysbus_mmio_map(sysbus, 0, SONIC_BASE);
if (local_err) {
goto out;
}
- object_property_set_int(OBJECT(dimm), slot, PC_DIMM_SLOT_PROP,
+ object_property_set_int(OBJECT(dimm), PC_DIMM_SLOT_PROP, slot,
&error_abort);
trace_mhp_pc_dimm_assigned_slot(slot);
static void pc_dimm_md_set_addr(MemoryDeviceState *md, uint64_t addr,
Error **errp)
{
- object_property_set_uint(OBJECT(md), addr, PC_DIMM_ADDR_PROP, errp);
+ object_property_set_uint(OBJECT(md), PC_DIMM_ADDR_PROP, addr, errp);
}
static MemoryRegion *pc_dimm_md_get_memory_region(MemoryDeviceState *md,
/* init CPUs */
cpu = MICROBLAZE_CPU(object_new(TYPE_MICROBLAZE_CPU));
- object_property_set_str(OBJECT(cpu), "8.10.a", "version", &error_abort);
+ object_property_set_str(OBJECT(cpu), "version", "8.10.a", &error_abort);
/* Use FPU but don't use floating point conversion and square
* root instructions
*/
- object_property_set_int(OBJECT(cpu), 1, "use-fpu", &error_abort);
- object_property_set_bool(OBJECT(cpu), true, "dcache-writeback",
+ object_property_set_int(OBJECT(cpu), "use-fpu", 1, &error_abort);
+ object_property_set_bool(OBJECT(cpu), "dcache-writeback", true,
&error_abort);
- object_property_set_bool(OBJECT(cpu), true, "endianness", &error_abort);
+ object_property_set_bool(OBJECT(cpu), "endianness", true, &error_abort);
qdev_realize(DEVICE(cpu), NULL, &error_abort);
/* Attach emulated BRAM through the LMB. */
qdev_set_nic_properties(eth0, &nd_table[0]);
qdev_prop_set_uint32(eth0, "rxmem", 0x1000);
qdev_prop_set_uint32(eth0, "txmem", 0x1000);
- object_property_set_link(OBJECT(eth0), ds,
- "axistream-connected", &error_abort);
- object_property_set_link(OBJECT(eth0), cs,
- "axistream-control-connected", &error_abort);
+ object_property_set_link(OBJECT(eth0), "axistream-connected", ds,
+ &error_abort);
+ object_property_set_link(OBJECT(eth0), "axistream-control-connected", cs,
+ &error_abort);
sysbus_realize_and_unref(SYS_BUS_DEVICE(eth0), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(eth0), 0, AXIENET_BASEADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(eth0), 0, irq[AXIENET_IRQ]);
cs = object_property_get_link(OBJECT(eth0),
"axistream-control-connected-target", NULL);
qdev_prop_set_uint32(dma, "freqhz", 100 * 1000000);
- object_property_set_link(OBJECT(dma), ds,
- "axistream-connected", &error_abort);
- object_property_set_link(OBJECT(dma), cs,
- "axistream-control-connected", &error_abort);
+ object_property_set_link(OBJECT(dma), "axistream-connected", ds,
+ &error_abort);
+ object_property_set_link(OBJECT(dma), "axistream-control-connected", cs,
+ &error_abort);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dma), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dma), 0, AXIDMA_BASEADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(dma), 0, irq[AXIDMA_IRQ0]);
MemoryRegion *sysmem = get_system_memory();
cpu = MICROBLAZE_CPU(object_new(TYPE_MICROBLAZE_CPU));
- object_property_set_str(OBJECT(cpu), "7.10.d", "version", &error_abort);
+ object_property_set_str(OBJECT(cpu), "version", "7.10.d", &error_abort);
qdev_realize(DEVICE(cpu), NULL, &error_abort);
/* Attach emulated BRAM through the LMB. */
XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(dev);
Error *err = NULL;
- object_property_set_uint(OBJECT(&s->cpu), XLNX_ZYNQMP_PMU_ROM_ADDR,
- "base-vectors", &error_abort);
- object_property_set_bool(OBJECT(&s->cpu), true, "use-stack-protection",
+ object_property_set_uint(OBJECT(&s->cpu), "base-vectors",
+ XLNX_ZYNQMP_PMU_ROM_ADDR, &error_abort);
+ object_property_set_bool(OBJECT(&s->cpu), "use-stack-protection", true,
&error_abort);
- object_property_set_uint(OBJECT(&s->cpu), 0, "use-fpu", &error_abort);
- object_property_set_uint(OBJECT(&s->cpu), 0, "use-hw-mul", &error_abort);
- object_property_set_bool(OBJECT(&s->cpu), true, "use-barrel",
+ object_property_set_uint(OBJECT(&s->cpu), "use-fpu", 0, &error_abort);
+ object_property_set_uint(OBJECT(&s->cpu), "use-hw-mul", 0, &error_abort);
+ object_property_set_bool(OBJECT(&s->cpu), "use-barrel", true,
&error_abort);
- object_property_set_bool(OBJECT(&s->cpu), true, "use-msr-instr",
+ object_property_set_bool(OBJECT(&s->cpu), "use-msr-instr", true,
&error_abort);
- object_property_set_bool(OBJECT(&s->cpu), true, "use-pcmp-instr",
+ object_property_set_bool(OBJECT(&s->cpu), "use-pcmp-instr", true,
&error_abort);
- object_property_set_bool(OBJECT(&s->cpu), false, "use-mmu", &error_abort);
- object_property_set_bool(OBJECT(&s->cpu), true, "endianness",
+ object_property_set_bool(OBJECT(&s->cpu), "use-mmu", false, &error_abort);
+ object_property_set_bool(OBJECT(&s->cpu), "endianness", true,
&error_abort);
- object_property_set_str(OBJECT(&s->cpu), "8.40.b", "version",
+ object_property_set_str(OBJECT(&s->cpu), "version", "8.40.b",
&error_abort);
- object_property_set_uint(OBJECT(&s->cpu), 0, "pvr", &error_abort);
+ object_property_set_uint(OBJECT(&s->cpu), "pvr", 0, &error_abort);
if (!qdev_realize(DEVICE(&s->cpu), NULL, &err)) {
error_propagate(errp, err);
return;
}
- object_property_set_uint(OBJECT(&s->intc), 0x10, "intc-intr-size",
+ object_property_set_uint(OBJECT(&s->intc), "intc-intr-size", 0x10,
&error_abort);
- object_property_set_uint(OBJECT(&s->intc), 0x0, "intc-level-edge",
+ object_property_set_uint(OBJECT(&s->intc), "intc-level-edge", 0x0,
&error_abort);
- object_property_set_uint(OBJECT(&s->intc), 0xffff, "intc-positive",
+ object_property_set_uint(OBJECT(&s->intc), "intc-positive", 0xffff,
&error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->intc), &err)) {
error_propagate(errp, err);
is_64b = cpu_supports_isa(machine->cpu_type, ISA_MIPS64);
object_initialize_child(OBJECT(machine), "cps", &s->cps, TYPE_MIPS_CPS);
- object_property_set_str(OBJECT(&s->cps), machine->cpu_type, "cpu-type",
+ object_property_set_str(OBJECT(&s->cps), "cpu-type", machine->cpu_type,
&error_fatal);
- object_property_set_int(OBJECT(&s->cps), machine->smp.cpus, "num-vp",
+ object_property_set_int(OBJECT(&s->cps), "num-vp", machine->smp.cpus,
&error_fatal);
sysbus_realize(SYS_BUS_DEVICE(&s->cps), &error_fatal);
/* Inter-Thread Communication Unit */
if (itu_present) {
object_initialize_child(OBJECT(dev), "itu", &s->itu, TYPE_MIPS_ITU);
- object_property_set_int(OBJECT(&s->itu), 16, "num-fifo",
+ object_property_set_int(OBJECT(&s->itu), "num-fifo", 16,
&error_abort);
- object_property_set_int(OBJECT(&s->itu), 16, "num-semaphores",
+ object_property_set_int(OBJECT(&s->itu), "num-semaphores", 16,
&error_abort);
- object_property_set_bool(OBJECT(&s->itu), saar_present, "saar-present",
+ object_property_set_bool(OBJECT(&s->itu), "saar-present", saar_present,
&error_abort);
if (saar_present) {
s->itu.saar = &env->CP0_SAAR;
/* Cluster Power Controller */
object_initialize_child(OBJECT(dev), "cpc", &s->cpc, TYPE_MIPS_CPC);
- object_property_set_int(OBJECT(&s->cpc), s->num_vp, "num-vp",
+ object_property_set_int(OBJECT(&s->cpc), "num-vp", s->num_vp,
&error_abort);
- object_property_set_int(OBJECT(&s->cpc), 1, "vp-start-running",
+ object_property_set_int(OBJECT(&s->cpc), "vp-start-running", 1,
&error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->cpc), &err)) {
error_propagate(errp, err);
/* Global Interrupt Controller */
object_initialize_child(OBJECT(dev), "gic", &s->gic, TYPE_MIPS_GIC);
- object_property_set_int(OBJECT(&s->gic), s->num_vp, "num-vp",
+ object_property_set_int(OBJECT(&s->gic), "num-vp", s->num_vp,
&error_abort);
- object_property_set_int(OBJECT(&s->gic), 128, "num-irq",
+ object_property_set_int(OBJECT(&s->gic), "num-irq", 128,
&error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->gic), &err)) {
error_propagate(errp, err);
gcr_base = env->CP0_CMGCRBase << 4;
object_initialize_child(OBJECT(dev), "gcr", &s->gcr, TYPE_MIPS_GCR);
- object_property_set_int(OBJECT(&s->gcr), s->num_vp, "num-vp",
+ object_property_set_int(OBJECT(&s->gcr), "num-vp", s->num_vp,
&error_abort);
- object_property_set_int(OBJECT(&s->gcr), 0x800, "gcr-rev",
+ object_property_set_int(OBJECT(&s->gcr), "gcr-rev", 0x800,
&error_abort);
- object_property_set_int(OBJECT(&s->gcr), gcr_base, "gcr-base",
+ object_property_set_int(OBJECT(&s->gcr), "gcr-base", gcr_base,
&error_abort);
- object_property_set_link(OBJECT(&s->gcr), OBJECT(&s->gic.mr), "gic",
+ object_property_set_link(OBJECT(&s->gcr), "gic", OBJECT(&s->gic.mr),
&error_abort);
- object_property_set_link(OBJECT(&s->gcr), OBJECT(&s->cpc.mr), "cpc",
+ object_property_set_link(OBJECT(&s->gcr), "cpc", OBJECT(&s->cpc.mr),
&error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->gcr), &err)) {
error_propagate(errp, err);
dev = qdev_new("dp8393x");
qdev_set_nic_properties(dev, nd);
qdev_prop_set_uint8(dev, "it_shift", 2);
- object_property_set_link(OBJECT(dev), OBJECT(rc4030_dma_mr),
- "dma_mr", &error_abort);
+ object_property_set_link(OBJECT(dev), "dma_mr",
+ OBJECT(rc4030_dma_mr), &error_abort);
sysbus = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(sysbus, &error_fatal);
sysbus_mmio_map(sysbus, 0, 0x80001000);
qemu_irq *cbus_irq, qemu_irq *i8259_irq)
{
object_initialize_child(OBJECT(s), "cps", &s->cps, TYPE_MIPS_CPS);
- object_property_set_str(OBJECT(&s->cps), ms->cpu_type, "cpu-type",
+ object_property_set_str(OBJECT(&s->cps), "cpu-type", ms->cpu_type,
&error_fatal);
- object_property_set_int(OBJECT(&s->cps), ms->smp.cpus, "num-vp",
+ object_property_set_int(OBJECT(&s->cps), "num-vp", ms->smp.cpus,
&error_fatal);
sysbus_realize(SYS_BUS_DEVICE(&s->cps), &error_fatal);
if (cpuobj) {
if (object_property_find(cpuobj, "init-svtor", NULL)) {
- object_property_set_uint(cpuobj, vtor, "init-svtor", &error_abort);
+ object_property_set_uint(cpuobj, "init-svtor", vtor, &error_abort);
}
}
}
sysbus_connect_irq(sysbus_dev, 0, irq0);
sysbus_connect_irq(sysbus_dev, 1, irq1);
qdev_prop_set_uint32(DEVICE(ide), "channel", dmaid);
- object_property_set_link(OBJECT(ide), OBJECT(&s->dbdma), "dbdma",
+ object_property_set_link(OBJECT(ide), "dbdma", OBJECT(&s->dbdma),
&error_abort);
macio_ide_register_dma(ide);
if (ns->has_pmu) {
/* GPIOs */
sysbus_dev = SYS_BUS_DEVICE(&ns->gpio);
- object_property_set_link(OBJECT(&ns->gpio), OBJECT(pic_dev), "pic",
+ object_property_set_link(OBJECT(&ns->gpio), "pic", OBJECT(pic_dev),
&error_abort);
memory_region_add_subregion(&s->bar, 0x50,
sysbus_mmio_get_region(sysbus_dev, 0));
/* PMU */
object_initialize_child(OBJECT(s), "pmu", &s->pmu, TYPE_VIA_PMU);
- object_property_set_link(OBJECT(&s->pmu), OBJECT(sysbus_dev), "gpio",
+ object_property_set_link(OBJECT(&s->pmu), "gpio", OBJECT(sysbus_dev),
&error_abort);
qdev_prop_set_bit(DEVICE(&s->pmu), "has-adb", ns->has_adb);
if (!qdev_realize(DEVICE(&s->pmu), BUS(&s->macio_bus), &err)) {
object_property_add(obj, "bootindex", "int32",
isa_ne2000_get_bootindex,
isa_ne2000_set_bootindex, NULL, NULL);
- object_property_set_int(obj, -1, "bootindex", NULL);
+ object_property_set_int(obj, "bootindex", -1, NULL);
}
static const TypeInfo ne2000_isa_info = {
.name = TYPE_ISA_NE2000,
(Object **) &cs->enet,
object_property_allow_set_link,
OBJ_PROP_LINK_STRONG);
- object_property_set_link(OBJECT(ds), OBJECT(s), "enet", &error_abort);
- object_property_set_link(OBJECT(cs), OBJECT(s), "enet", &error_abort);
+ object_property_set_link(OBJECT(ds), "enet", OBJECT(s), &error_abort);
+ object_property_set_link(OBJECT(cs), "enet", OBJECT(s), &error_abort);
qemu_macaddr_default_if_unset(&s->conf.macaddr);
s->nic = qemu_new_nic(&net_xilinx_enet_info, &s->conf,
}
/* LSI sources */
- object_property_set_link(OBJECT(&phb->lsis), OBJECT(pnv), "xics",
- &error_abort);
- object_property_set_int(OBJECT(&phb->lsis), PNV_PHB3_NUM_LSI, "nr-irqs",
+ object_property_set_link(OBJECT(&phb->lsis), "xics", OBJECT(pnv),
+ &error_abort);
+ object_property_set_int(OBJECT(&phb->lsis), "nr-irqs", PNV_PHB3_NUM_LSI,
&error_abort);
if (!qdev_realize(DEVICE(&phb->lsis), NULL, &local_err)) {
error_propagate(errp, local_err);
phb->qirqs = qemu_allocate_irqs(ics_set_irq, &phb->lsis, phb->lsis.nr_irqs);
/* MSI sources */
- object_property_set_link(OBJECT(&phb->msis), OBJECT(phb), "phb",
- &error_abort);
- object_property_set_link(OBJECT(&phb->msis), OBJECT(pnv), "xics",
- &error_abort);
- object_property_set_int(OBJECT(&phb->msis), PHB3_MAX_MSI, "nr-irqs",
+ object_property_set_link(OBJECT(&phb->msis), "phb", OBJECT(phb),
+ &error_abort);
+ object_property_set_link(OBJECT(&phb->msis), "xics", OBJECT(pnv),
+ &error_abort);
+ object_property_set_int(OBJECT(&phb->msis), "nr-irqs", PHB3_MAX_MSI,
&error_abort);
if (!qdev_realize(DEVICE(&phb->msis), NULL, &local_err)) {
error_propagate(errp, local_err);
}
/* Power Bus Common Queue */
- object_property_set_link(OBJECT(&phb->pbcq), OBJECT(phb), "phb",
- &error_abort);
+ object_property_set_link(OBJECT(&phb->pbcq), "phb", OBJECT(phb),
+ &error_abort);
if (!qdev_realize(DEVICE(&phb->pbcq), NULL, &local_err)) {
error_propagate(errp, local_err);
return;
} else {
nr_irqs = PNV_PHB4_MAX_INTs >> 1;
}
- object_property_set_int(OBJECT(xsrc), nr_irqs, "nr-irqs", &error_fatal);
- object_property_set_link(OBJECT(xsrc), OBJECT(phb), "xive", &error_fatal);
+ object_property_set_int(OBJECT(xsrc), "nr-irqs", nr_irqs, &error_fatal);
+ object_property_set_link(OBJECT(xsrc), "xive", OBJECT(phb), &error_fatal);
if (!qdev_realize(DEVICE(xsrc), NULL, &local_err)) {
error_propagate(errp, local_err);
return;
PnvPhb4PecStack *stack = &pec->stacks[i];
Object *stk_obj = OBJECT(stack);
- object_property_set_int(stk_obj, i, "stack-no", &error_abort);
- object_property_set_link(stk_obj, OBJECT(pec), "pec", &error_abort);
+ object_property_set_int(stk_obj, "stack-no", i, &error_abort);
+ object_property_set_link(stk_obj, "pec", OBJECT(pec), &error_abort);
if (!qdev_realize(DEVICE(stk_obj), NULL, &local_err)) {
error_propagate(errp, local_err);
return;
/* According to PReP specification section 6.1.6 "System Interrupt
* Assignments", all PCI interrupts are routed via IRQ 15 */
s->or_irq = OR_IRQ(object_new(TYPE_OR_IRQ));
- object_property_set_int(OBJECT(s->or_irq), PCI_NUM_PINS, "num-lines",
+ object_property_set_int(OBJECT(s->or_irq), "num-lines", PCI_NUM_PINS,
&error_fatal);
qdev_realize(DEVICE(s->or_irq), NULL, &error_fatal);
sysbus_init_irq(dev, &s->or_irq->out_irq);
object_initialize(&s->pci_dev, sizeof(s->pci_dev), TYPE_RAVEN_PCI_DEVICE);
pci_dev = DEVICE(&s->pci_dev);
- object_property_set_int(OBJECT(&s->pci_dev), PCI_DEVFN(0, 0), "addr",
+ object_property_set_int(OBJECT(&s->pci_dev), "addr", PCI_DEVFN(0, 0),
NULL);
qdev_prop_set_bit(pci_dev, "multifunction", false);
}
/* 970 gets a U3 bus */
/* Uninorth AGP bus */
dev = qdev_new(TYPE_U3_AGP_HOST_BRIDGE);
- object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
+ object_property_set_link(OBJECT(dev), "pic", OBJECT(pic_dev),
&error_abort);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
uninorth_pci = U3_AGP_HOST_BRIDGE(dev);
/* Use values found on a real PowerMac */
/* Uninorth AGP bus */
dev = qdev_new(TYPE_UNI_NORTH_AGP_HOST_BRIDGE);
- object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
+ object_property_set_link(OBJECT(dev), "pic", OBJECT(pic_dev),
&error_abort);
s = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(s, &error_fatal);
/* Uninorth internal bus */
dev = qdev_new(TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE);
- object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
+ object_property_set_link(OBJECT(dev), "pic", OBJECT(pic_dev),
&error_abort);
s = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(s, &error_fatal);
/* Uninorth main bus */
dev = qdev_new(TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
qdev_prop_set_uint32(dev, "ofw-addr", 0xf2000000);
- object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
+ object_property_set_link(OBJECT(dev), "pic", OBJECT(pic_dev),
&error_abort);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
uninorth_pci = UNI_NORTH_PCI_HOST_BRIDGE(dev);
qdev_prop_set_uint64(dev, "frequency", tbfreq);
qdev_prop_set_bit(dev, "has-pmu", has_pmu);
qdev_prop_set_bit(dev, "has-adb", has_adb);
- object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic",
+ object_property_set_link(OBJECT(macio), "pic", OBJECT(pic_dev),
&error_abort);
pci_realize_and_unref(macio, pci_bus, &error_fatal);
/* Grackle PCI host bridge */
dev = qdev_new(TYPE_GRACKLE_PCI_HOST_BRIDGE);
qdev_prop_set_uint32(dev, "ofw-addr", 0x80000000);
- object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
+ object_property_set_link(OBJECT(dev), "pic", OBJECT(pic_dev),
&error_abort);
s = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(s, &error_fatal);
macio = pci_new(-1, TYPE_OLDWORLD_MACIO);
dev = DEVICE(macio);
qdev_prop_set_uint64(dev, "frequency", tbfreq);
- object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic",
+ object_property_set_link(OBJECT(macio), "pic", OBJECT(pic_dev),
&error_abort);
pci_realize_and_unref(macio, pci_bus, &error_fatal);
{
ISADevice *dev = isa_new("isa-ipmi-bt");
- object_property_set_link(OBJECT(dev), OBJECT(bmc), "bmc", &error_fatal);
- object_property_set_int(OBJECT(dev), irq, "irq", &error_fatal);
+ object_property_set_link(OBJECT(dev), "bmc", OBJECT(bmc), &error_fatal);
+ object_property_set_int(OBJECT(dev), "irq", irq, &error_fatal);
isa_realize_and_unref(dev, bus, &error_fatal);
}
* way to specify different ranges for each chip
*/
if (i == 0) {
- object_property_set_int(chip, machine->ram_size, "ram-size",
+ object_property_set_int(chip, "ram-size", machine->ram_size,
&error_fatal);
}
snprintf(chip_name, sizeof(chip_name), "chip[%d]", PNV_CHIP_HWID(i));
object_property_add_child(OBJECT(pnv), chip_name, chip);
- object_property_set_int(chip, PNV_CHIP_HWID(i), "chip-id",
+ object_property_set_int(chip, "chip-id", PNV_CHIP_HWID(i),
+ &error_fatal);
+ object_property_set_int(chip, "nr-cores", machine->smp.cores,
+ &error_fatal);
+ object_property_set_int(chip, "nr-threads", machine->smp.threads,
&error_fatal);
- object_property_set_int(chip, machine->smp.cores,
- "nr-cores", &error_fatal);
- object_property_set_int(chip, machine->smp.threads,
- "nr-threads", &error_fatal);
/*
* The POWER8 machine use the XICS interrupt interface.
* Propagate the XICS fabric to the chip and its controllers.
*/
if (object_dynamic_cast(OBJECT(pnv), TYPE_XICS_FABRIC)) {
- object_property_set_link(chip, OBJECT(pnv), "xics", &error_abort);
+ object_property_set_link(chip, "xics", OBJECT(pnv), &error_abort);
}
if (object_dynamic_cast(OBJECT(pnv), TYPE_XIVE_FABRIC)) {
- object_property_set_link(chip, OBJECT(pnv), "xive-fabric",
+ object_property_set_link(chip, "xive-fabric", OBJECT(pnv),
&error_abort);
}
sysbus_realize_and_unref(SYS_BUS_DEVICE(chip), &error_fatal);
}
/* Processor Service Interface (PSI) Host Bridge */
- object_property_set_int(OBJECT(&chip8->psi), PNV_PSIHB_BASE(chip),
- "bar", &error_fatal);
- object_property_set_link(OBJECT(&chip8->psi), OBJECT(chip8->xics),
- ICS_PROP_XICS, &error_abort);
+ object_property_set_int(OBJECT(&chip8->psi), "bar", PNV_PSIHB_BASE(chip),
+ &error_fatal);
+ object_property_set_link(OBJECT(&chip8->psi), ICS_PROP_XICS,
+ OBJECT(chip8->xics), &error_abort);
if (!qdev_realize(DEVICE(&chip8->psi), NULL, &local_err)) {
error_propagate(errp, local_err);
return;
&PNV_PSI(psi8)->xscom_regs);
/* Create LPC controller */
- object_property_set_link(OBJECT(&chip8->lpc), OBJECT(&chip8->psi), "psi",
+ object_property_set_link(OBJECT(&chip8->lpc), "psi", OBJECT(&chip8->psi),
&error_abort);
qdev_realize(DEVICE(&chip8->lpc), NULL, &error_fatal);
pnv_xscom_add_subregion(chip, PNV_XSCOM_LPC_BASE, &chip8->lpc.xscom_regs);
}
/* Create the simplified OCC model */
- object_property_set_link(OBJECT(&chip8->occ), OBJECT(&chip8->psi), "psi",
+ object_property_set_link(OBJECT(&chip8->occ), "psi", OBJECT(&chip8->psi),
&error_abort);
if (!qdev_realize(DEVICE(&chip8->occ), NULL, &local_err)) {
error_propagate(errp, local_err);
&chip8->occ.sram_regs);
/* HOMER */
- object_property_set_link(OBJECT(&chip8->homer), OBJECT(chip), "chip",
+ object_property_set_link(OBJECT(&chip8->homer), "chip", OBJECT(chip),
&error_abort);
if (!qdev_realize(DEVICE(&chip8->homer), NULL, &local_err)) {
error_propagate(errp, local_err);
PnvPHB3 *phb = &chip8->phbs[i];
PnvPBCQState *pbcq = &phb->pbcq;
- object_property_set_int(OBJECT(phb), i, "index", &error_fatal);
- object_property_set_int(OBJECT(phb), chip->chip_id, "chip-id",
+ object_property_set_int(OBJECT(phb), "index", i, &error_fatal);
+ object_property_set_int(OBJECT(phb), "chip-id", chip->chip_id,
&error_fatal);
if (!sysbus_realize(SYS_BUS_DEVICE(phb), &local_err)) {
error_propagate(errp, local_err);
sizeof(*eq), TYPE_PNV_QUAD,
&error_fatal, NULL);
- object_property_set_int(OBJECT(eq), core_id, "id", &error_fatal);
+ object_property_set_int(OBJECT(eq), "id", core_id, &error_fatal);
qdev_realize(DEVICE(eq), NULL, &error_fatal);
pnv_xscom_add_subregion(chip, PNV9_XSCOM_EQ_BASE(eq->id),
uint32_t pec_nest_base;
uint32_t pec_pci_base;
- object_property_set_int(OBJECT(pec), i, "index", &error_fatal);
+ object_property_set_int(OBJECT(pec), "index", i, &error_fatal);
/*
* PEC0 -> 1 stack
* PEC1 -> 2 stacks
* PEC2 -> 3 stacks
*/
- object_property_set_int(OBJECT(pec), i + 1, "num-stacks",
+ object_property_set_int(OBJECT(pec), "num-stacks", i + 1,
+ &error_fatal);
+ object_property_set_int(OBJECT(pec), "chip-id", chip->chip_id,
&error_fatal);
- object_property_set_int(OBJECT(pec), chip->chip_id, "chip-id",
- &error_fatal);
- object_property_set_link(OBJECT(pec), OBJECT(get_system_memory()),
- "system-memory", &error_abort);
+ object_property_set_link(OBJECT(pec), "system-memory",
+ OBJECT(get_system_memory()), &error_abort);
if (!qdev_realize(DEVICE(pec), NULL, &local_err)) {
error_propagate(errp, local_err);
return;
PnvPhb4PecStack *stack = &pec->stacks[j];
Object *obj = OBJECT(&stack->phb);
- object_property_set_int(obj, phb_id, "index", &error_fatal);
- object_property_set_int(obj, chip->chip_id, "chip-id",
+ object_property_set_int(obj, "index", phb_id, &error_fatal);
+ object_property_set_int(obj, "chip-id", chip->chip_id,
&error_fatal);
- object_property_set_int(obj, PNV_PHB4_VERSION, "version",
+ object_property_set_int(obj, "version", PNV_PHB4_VERSION,
&error_fatal);
- object_property_set_int(obj, PNV_PHB4_DEVICE_ID, "device-id",
+ object_property_set_int(obj, "device-id", PNV_PHB4_DEVICE_ID,
&error_fatal);
- object_property_set_link(obj, OBJECT(stack), "stack", &error_abort);
+ object_property_set_link(obj, "stack", OBJECT(stack),
+ &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(obj), &local_err)) {
error_propagate(errp, local_err);
return;
}
/* XIVE interrupt controller (POWER9) */
- object_property_set_int(OBJECT(&chip9->xive), PNV9_XIVE_IC_BASE(chip),
- "ic-bar", &error_fatal);
- object_property_set_int(OBJECT(&chip9->xive), PNV9_XIVE_VC_BASE(chip),
- "vc-bar", &error_fatal);
- object_property_set_int(OBJECT(&chip9->xive), PNV9_XIVE_PC_BASE(chip),
- "pc-bar", &error_fatal);
- object_property_set_int(OBJECT(&chip9->xive), PNV9_XIVE_TM_BASE(chip),
- "tm-bar", &error_fatal);
- object_property_set_link(OBJECT(&chip9->xive), OBJECT(chip), "chip",
+ object_property_set_int(OBJECT(&chip9->xive), "ic-bar",
+ PNV9_XIVE_IC_BASE(chip), &error_fatal);
+ object_property_set_int(OBJECT(&chip9->xive), "vc-bar",
+ PNV9_XIVE_VC_BASE(chip), &error_fatal);
+ object_property_set_int(OBJECT(&chip9->xive), "pc-bar",
+ PNV9_XIVE_PC_BASE(chip), &error_fatal);
+ object_property_set_int(OBJECT(&chip9->xive), "tm-bar",
+ PNV9_XIVE_TM_BASE(chip), &error_fatal);
+ object_property_set_link(OBJECT(&chip9->xive), "chip", OBJECT(chip),
&error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&chip9->xive), &local_err)) {
error_propagate(errp, local_err);
&chip9->xive.xscom_regs);
/* Processor Service Interface (PSI) Host Bridge */
- object_property_set_int(OBJECT(&chip9->psi), PNV9_PSIHB_BASE(chip),
- "bar", &error_fatal);
+ object_property_set_int(OBJECT(&chip9->psi), "bar", PNV9_PSIHB_BASE(chip),
+ &error_fatal);
if (!qdev_realize(DEVICE(&chip9->psi), NULL, &local_err)) {
error_propagate(errp, local_err);
return;
&PNV_PSI(psi9)->xscom_regs);
/* LPC */
- object_property_set_link(OBJECT(&chip9->lpc), OBJECT(&chip9->psi), "psi",
+ object_property_set_link(OBJECT(&chip9->lpc), "psi", OBJECT(&chip9->psi),
&error_abort);
if (!qdev_realize(DEVICE(&chip9->lpc), NULL, &local_err)) {
error_propagate(errp, local_err);
(uint64_t) PNV9_LPCM_BASE(chip));
/* Create the simplified OCC model */
- object_property_set_link(OBJECT(&chip9->occ), OBJECT(&chip9->psi), "psi",
+ object_property_set_link(OBJECT(&chip9->occ), "psi", OBJECT(&chip9->psi),
&error_abort);
if (!qdev_realize(DEVICE(&chip9->occ), NULL, &local_err)) {
error_propagate(errp, local_err);
&chip9->occ.sram_regs);
/* HOMER */
- object_property_set_link(OBJECT(&chip9->homer), OBJECT(chip), "chip",
+ object_property_set_link(OBJECT(&chip9->homer), "chip", OBJECT(chip),
&error_abort);
if (!qdev_realize(DEVICE(&chip9->homer), NULL, &local_err)) {
error_propagate(errp, local_err);
}
/* Processor Service Interface (PSI) Host Bridge */
- object_property_set_int(OBJECT(&chip10->psi), PNV10_PSIHB_BASE(chip),
- "bar", &error_fatal);
+ object_property_set_int(OBJECT(&chip10->psi), "bar",
+ PNV10_PSIHB_BASE(chip), &error_fatal);
if (!qdev_realize(DEVICE(&chip10->psi), NULL, &local_err)) {
error_propagate(errp, local_err);
return;
&PNV_PSI(&chip10->psi)->xscom_regs);
/* LPC */
- object_property_set_link(OBJECT(&chip10->lpc), OBJECT(&chip10->psi), "psi",
- &error_abort);
+ object_property_set_link(OBJECT(&chip10->lpc), "psi",
+ OBJECT(&chip10->psi), &error_abort);
if (!qdev_realize(DEVICE(&chip10->lpc), NULL, &local_err)) {
error_propagate(errp, local_err);
return;
snprintf(core_name, sizeof(core_name), "core[%d]", core_hwid);
object_property_add_child(OBJECT(chip), core_name, OBJECT(pnv_core));
chip->cores[i] = pnv_core;
- object_property_set_int(OBJECT(pnv_core), chip->nr_threads,
- "nr-threads", &error_fatal);
- object_property_set_int(OBJECT(pnv_core), core_hwid,
- CPU_CORE_PROP_CORE_ID, &error_fatal);
- object_property_set_int(OBJECT(pnv_core),
- pcc->core_pir(chip, core_hwid),
- "pir", &error_fatal);
- object_property_set_int(OBJECT(pnv_core), pnv->fw_load_addr,
- "hrmor", &error_fatal);
- object_property_set_link(OBJECT(pnv_core), OBJECT(chip), "chip",
+ object_property_set_int(OBJECT(pnv_core), "nr-threads",
+ chip->nr_threads, &error_fatal);
+ object_property_set_int(OBJECT(pnv_core), CPU_CORE_PROP_CORE_ID,
+ core_hwid, &error_fatal);
+ object_property_set_int(OBJECT(pnv_core), "pir",
+ pcc->core_pir(chip, core_hwid), &error_fatal);
+ object_property_set_int(OBJECT(pnv_core), "hrmor", pnv->fw_load_addr,
+ &error_fatal);
+ object_property_set_link(OBJECT(pnv_core), "chip", OBJECT(chip),
&error_abort);
qdev_realize(DEVICE(pnv_core), NULL, &error_fatal);
unsigned int i;
/* Create PSI interrupt control source */
- object_property_set_int(OBJECT(ics), PSI_NUM_INTERRUPTS, "nr-irqs", &err);
+ object_property_set_int(OBJECT(ics), "nr-irqs", PSI_NUM_INTERRUPTS, &err);
if (err) {
error_propagate(errp, err);
return;
int i;
/* This is the only device with 4k ESB pages */
- object_property_set_int(OBJECT(xsrc), XIVE_ESB_4K, "shift",
+ object_property_set_int(OBJECT(xsrc), "shift", XIVE_ESB_4K, &error_fatal);
+ object_property_set_int(OBJECT(xsrc), "nr-irqs", PSIHB9_NUM_IRQS,
&error_fatal);
- object_property_set_int(OBJECT(xsrc), PSIHB9_NUM_IRQS, "nr-irqs",
- &error_fatal);
- object_property_set_link(OBJECT(xsrc), OBJECT(psi), "xive", &error_abort);
+ object_property_set_link(OBJECT(xsrc), "xive", OBJECT(psi), &error_abort);
if (!qdev_realize(DEVICE(xsrc), NULL, &local_err)) {
error_propagate(errp, local_err);
return;
nr_threads = smp_cpus - i * smp_threads;
}
- object_property_set_int(core, nr_threads, "nr-threads",
+ object_property_set_int(core, "nr-threads", nr_threads,
&error_fatal);
- object_property_set_int(core, core_id, CPU_CORE_PROP_CORE_ID,
+ object_property_set_int(core, CPU_CORE_PROP_CORE_ID, core_id,
&error_fatal);
qdev_realize(DEVICE(core), NULL, &error_fatal);
obj = object_new(TYPE_ICS_SPAPR);
object_property_add_child(OBJECT(spapr), "ics", obj);
- object_property_set_link(obj, OBJECT(spapr), ICS_PROP_XICS,
+ object_property_set_link(obj, ICS_PROP_XICS, OBJECT(spapr),
&error_abort);
- object_property_set_int(obj, smc->nr_xirqs, "nr-irqs", &error_abort);
+ object_property_set_int(obj, "nr-irqs", smc->nr_xirqs, &error_abort);
if (!qdev_realize(DEVICE(obj), NULL, &local_err)) {
error_propagate(errp, local_err);
return;
* priority
*/
qdev_prop_set_uint32(dev, "nr-ends", nr_servers << 3);
- object_property_set_link(OBJECT(dev), OBJECT(spapr), "xive-fabric",
+ object_property_set_link(OBJECT(dev), "xive-fabric", OBJECT(spapr),
&error_abort);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
if (object_dynamic_cast(OBJECT(dev), "VGA")
|| object_dynamic_cast(OBJECT(dev), "secondary-vga")) {
- object_property_set_bool(OBJECT(dev), be, "big-endian-framebuffer",
+ object_property_set_bool(OBJECT(dev), "big-endian-framebuffer", be,
&error_abort);
}
return 0;
MemoryRegion *sys_mem = get_system_memory();
Error *err = NULL;
- object_property_set_str(OBJECT(&s->cpus), ms->cpu_type, "cpu-type",
+ object_property_set_str(OBJECT(&s->cpus), "cpu-type", ms->cpu_type,
&error_abort);
- object_property_set_int(OBJECT(&s->cpus), ms->smp.cpus, "num-harts",
+ object_property_set_int(OBJECT(&s->cpus), "num-harts", ms->smp.cpus,
&error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->cpus), &error_abort);
SiFiveESoCState *s = RISCV_E_SOC(obj);
object_initialize_child(obj, "cpus", &s->cpus, TYPE_RISCV_HART_ARRAY);
- object_property_set_int(OBJECT(&s->cpus), ms->smp.cpus, "num-harts",
+ object_property_set_int(OBJECT(&s->cpus), "num-harts", ms->smp.cpus,
&error_abort);
object_initialize_child(obj, "riscv.sifive.e.gpio0", &s->gpio,
TYPE_SIFIVE_GPIO);
SiFiveESoCState *s = RISCV_E_SOC(dev);
MemoryRegion *sys_mem = get_system_memory();
- object_property_set_str(OBJECT(&s->cpus), ms->cpu_type, "cpu-type",
+ object_property_set_str(OBJECT(&s->cpus), "cpu-type", ms->cpu_type,
&error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->cpus), &error_abort);
/* Initialize SoC */
object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_RISCV_U_SOC);
- object_property_set_uint(OBJECT(&s->soc), s->serial, "serial",
- &error_abort);
+ object_property_set_uint(OBJECT(&s->soc), "serial", s->serial,
+ &error_abort);
qdev_realize(DEVICE(&s->soc), NULL, &error_abort);
/* register RAM */
qemu_check_nic_model(nd, TYPE_CADENCE_GEM);
qdev_set_nic_properties(DEVICE(&s->gem), nd);
}
- object_property_set_int(OBJECT(&s->gem), GEM_REVISION, "revision",
+ object_property_set_int(OBJECT(&s->gem), "revision", GEM_REVISION,
&error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->gem), &err)) {
error_propagate(errp, err);
/* Initialize SOC */
object_initialize_child(OBJECT(machine), "soc", &s->soc,
TYPE_RISCV_HART_ARRAY);
- object_property_set_str(OBJECT(&s->soc), machine->cpu_type, "cpu-type",
+ object_property_set_str(OBJECT(&s->soc), "cpu-type", machine->cpu_type,
&error_abort);
- object_property_set_int(OBJECT(&s->soc), smp_cpus, "num-harts",
+ object_property_set_int(OBJECT(&s->soc), "num-harts", smp_cpus,
&error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_abort);
/* Initialize SOC */
object_initialize_child(OBJECT(machine), "soc", &s->soc,
TYPE_RISCV_HART_ARRAY);
- object_property_set_str(OBJECT(&s->soc), machine->cpu_type, "cpu-type",
+ object_property_set_str(OBJECT(&s->soc), "cpu-type", machine->cpu_type,
&error_abort);
- object_property_set_int(OBJECT(&s->soc), smp_cpus, "num-harts",
+ object_property_set_int(OBJECT(&s->soc), "num-harts", smp_cpus,
&error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_abort);
/* Initialize MCU */
object_initialize_child(OBJECT(machine), "mcu", &s->mcu, rxc->mcu_name);
- object_property_set_link(OBJECT(&s->mcu), OBJECT(sysmem),
- "main-bus", &error_abort);
- object_property_set_uint(OBJECT(&s->mcu), rxc->xtal_freq_hz,
- "xtal-frequency-hz", &error_abort);
- object_property_set_bool(OBJECT(&s->mcu), kernel_filename != NULL,
- "load-kernel", &error_abort);
+ object_property_set_link(OBJECT(&s->mcu), "main-bus", OBJECT(sysmem),
+ &error_abort);
+ object_property_set_uint(OBJECT(&s->mcu), "xtal-frequency-hz",
+ rxc->xtal_freq_hz, &error_abort);
+ object_property_set_bool(OBJECT(&s->mcu), "load-kernel",
+ kernel_filename != NULL, &error_abort);
qdev_realize(DEVICE(&s->mcu), NULL, &error_abort);
/* Load kernel and dtb */
ascii_loadparm[i] = ebcdic2ascii[(uint8_t) ebcdic_loadparm[i]];
}
ascii_loadparm[i] = 0;
- object_property_set_str(machine, ascii_loadparm, "loadparm", &err);
+ object_property_set_str(machine, "loadparm", ascii_loadparm, &err);
} else {
- object_property_set_str(machine, "", "loadparm", &err);
+ object_property_set_str(machine, "loadparm", "", &err);
}
if (err) {
warn_report_err(err);
return NULL;
}
- object_property_set_str(OBJECT(dev), target, "target", &local_err);
+ object_property_set_str(OBJECT(dev), "target", target, &local_err);
if (local_err) {
object_unparent(OBJECT(dev));
error_propagate_prepend(errp, local_err,
object_property_add_bool(obj, "migration-enabled",
s390_skeys_get_migration_enabled,
s390_skeys_set_migration_enabled);
- object_property_set_bool(obj, true, "migration-enabled", NULL);
+ object_property_set_bool(obj, "migration-enabled", true, NULL);
}
static void s390_skeys_class_init(ObjectClass *oc, void *data)
object_property_add_bool(obj, "migration-enabled",
s390_stattrib_get_migration_enabled,
s390_stattrib_set_migration_enabled);
- object_property_set_bool(obj, true, "migration-enabled", NULL);
+ object_property_set_bool(obj, "migration-enabled", true, NULL);
sas->migration_cur_gfn = 0;
}
S390CPU *cpu = S390_CPU(object_new(typename));
Error *err = NULL;
- object_property_set_int(OBJECT(cpu), core_id, "core-id", &err);
+ object_property_set_int(OBJECT(cpu), "core-id", core_id, &err);
if (err != NULL) {
goto out;
}
machine_set_aes_key_wrap);
object_property_set_description(obj, "aes-key-wrap",
"enable/disable AES key wrapping using the CPACF wrapping key");
- object_property_set_bool(obj, true, "aes-key-wrap", NULL);
+ object_property_set_bool(obj, "aes-key-wrap", true, NULL);
object_property_add_bool(obj, "dea-key-wrap",
machine_get_dea_key_wrap,
machine_set_dea_key_wrap);
object_property_set_description(obj, "dea-key-wrap",
"enable/disable DEA key wrapping using the CPACF wrapping key");
- object_property_set_bool(obj, true, "dea-key-wrap", NULL);
+ object_property_set_bool(obj, "dea-key-wrap", true, NULL);
object_property_add_str(obj, "loadparm",
machine_get_loadparm, machine_set_loadparm);
object_property_set_description(obj, "loadparm",
return;
}
- object_property_set_link(OBJECT(vdev),
- OBJECT(dev->vdev.conf.cryptodev), "cryptodev",
- NULL);
+ object_property_set_link(OBJECT(vdev), "cryptodev",
+ OBJECT(dev->vdev.conf.cryptodev), NULL);
}
static void virtio_ccw_crypto_instance_init(Object *obj)
return;
}
- object_property_set_link(OBJECT(dev),
- OBJECT(dev->vdev.conf.rng), "rng",
+ object_property_set_link(OBJECT(dev), "rng", OBJECT(dev->vdev.conf.rng),
NULL);
}
qdev_prop_set_uint32(dev, "scsi-id", unit);
if (bootindex >= 0) {
- object_property_set_int(OBJECT(dev), bootindex, "bootindex",
+ object_property_set_int(OBJECT(dev), "bootindex", bootindex,
&error_abort);
}
if (object_property_find(OBJECT(dev), "removable", NULL)) {
object_unparent(OBJECT(dev));
return NULL;
}
- object_property_set_bool(OBJECT(dev), share_rw, "share-rw", &err);
+ object_property_set_bool(OBJECT(dev), "share-rw", share_rw, &err);
if (err != NULL) {
error_propagate(errp, err);
object_unparent(OBJECT(dev));
Object *sdhci_slot = OBJECT(&sdhci->slots[i]);
SysBusDevice *sbd_slot = SYS_BUS_DEVICE(&sdhci->slots[i]);
- object_property_set_int(sdhci_slot, 2, "sd-spec-version", &err);
+ object_property_set_int(sdhci_slot, "sd-spec-version", 2, &err);
if (err) {
error_propagate(errp, err);
return;
}
- object_property_set_uint(sdhci_slot, ASPEED_SDHCI_CAPABILITIES,
- "capareg", &err);
+ object_property_set_uint(sdhci_slot, "capareg",
+ ASPEED_SDHCI_CAPABILITIES, &err);
if (err) {
error_propagate(errp, err);
return;
}
}
- object_property_set_bool(OBJECT(carddev), true, "spi", &err);
+ object_property_set_bool(OBJECT(carddev), "spi", true, &err);
if (err) {
goto fail;
}
/* Create and map RAM frontend */
dev = qdev_new("memory");
- object_property_set_link(OBJECT(dev), ram_memdev, "memdev", &error_fatal);
+ object_property_set_link(OBJECT(dev), "memdev", ram_memdev, &error_fatal);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0);
sabre = SABRE_DEVICE(qdev_new(TYPE_SABRE));
qdev_prop_set_uint64(DEVICE(sabre), "special-base", PBM_SPECIAL_BASE);
qdev_prop_set_uint64(DEVICE(sabre), "mem-base", PBM_MEM_BASE);
- object_property_set_link(OBJECT(sabre), OBJECT(iommu), "iommu",
+ object_property_set_link(OBJECT(sabre), "iommu", OBJECT(iommu),
&error_abort);
sysbus_realize_and_unref(SYS_BUS_DEVICE(sabre), &error_fatal);
s->conf.bootindex = boot_index;
if (s->scsi_dev) {
- object_property_set_int(OBJECT(s->scsi_dev), boot_index, "bootindex",
+ object_property_set_int(OBJECT(s->scsi_dev), "bootindex", boot_index,
&error_abort);
}
object_property_add(obj, "bootindex", "int32",
usb_msd_get_bootindex,
usb_msd_set_bootindex, NULL, NULL);
- object_property_set_int(obj, -1, "bootindex", NULL);
+ object_property_set_int(obj, "bootindex", -1, NULL);
}
static void usb_msd_class_bot_initfn(ObjectClass *klass, void *data)
if (!qdev_realize(vdev, BUS(&vpci_dev->bus), errp)) {
return;
}
- object_property_set_link(OBJECT(vcrypto),
- OBJECT(vcrypto->vdev.conf.cryptodev), "cryptodev",
- NULL);
+ object_property_set_link(OBJECT(vcrypto), "cryptodev",
+ OBJECT(vcrypto->vdev.conf.cryptodev), NULL);
}
static void virtio_crypto_pci_class_init(ObjectClass *klass, void *data)
error_append_hint(errp, "Valid values are 0 and 1\n");
}
}
- object_property_set_link(OBJECT(dev),
+ object_property_set_link(OBJECT(dev), "primary-bus",
OBJECT(pci_get_bus(&vpci_dev->pci_dev)),
- "primary-bus", &error_abort);
+ &error_abort);
qdev_realize(vdev, BUS(&vpci_dev->bus), errp);
}
DeviceState *vdev = DEVICE(&mem_pci->vdev);
qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
- object_property_set_bool(OBJECT(vdev), true, "realized", errp);
+ object_property_set_bool(OBJECT(vdev), "realized", true, errp);
}
static void virtio_mem_pci_set_addr(MemoryDeviceState *md, uint64_t addr,
Error **errp)
{
- object_property_set_uint(OBJECT(md), addr, VIRTIO_MEM_ADDR_PROP, errp);
+ object_property_set_uint(OBJECT(md), VIRTIO_MEM_ADDR_PROP, addr, errp);
}
static uint64_t virtio_mem_pci_get_addr(const MemoryDeviceState *md)
static void virtio_pmem_pci_set_addr(MemoryDeviceState *md, uint64_t addr,
Error **errp)
{
- object_property_set_uint(OBJECT(md), addr, VIRTIO_PMEM_ADDR_PROP, errp);
+ object_property_set_uint(OBJECT(md), VIRTIO_PMEM_ADDR_PROP, addr, errp);
}
static uint64_t virtio_pmem_pci_get_addr(const MemoryDeviceState *md)
return;
}
- object_property_set_link(OBJECT(vrng),
- OBJECT(vrng->vdev.conf.rng), "rng",
+ object_property_set_link(OBJECT(vrng), "rng", OBJECT(vrng->vdev.conf.rng),
NULL);
}
/* The child property took a reference, we can safely drop ours now */
object_unref(default_backend);
- object_property_set_link(OBJECT(dev), default_backend,
- "rng", &error_abort);
+ object_property_set_link(OBJECT(dev), "rng", default_backend,
+ &error_abort);
}
vrng->rng = vrng->conf.rng;
static inline void pcspk_init(ISADevice *isadev, ISABus *bus, ISADevice *pit)
{
- object_property_set_link(OBJECT(isadev), OBJECT(pit), "pit", NULL);
+ object_property_set_link(OBJECT(isadev), "pit", OBJECT(pit), NULL);
isa_realize_and_unref(isadev, bus, &error_fatal);
}
/**
* object_property_get:
* @obj: the object
+ * @name: the name of the property
* @v: the visitor that will receive the property value. This should be an
* Output visitor and the data will be written with @name as the name.
- * @name: the name of the property
* @errp: returns an error if this function fails
*
* Reads a property from a object.
*/
-void object_property_get(Object *obj, Visitor *v, const char *name,
+void object_property_get(Object *obj, const char *name, Visitor *v,
Error **errp);
/**
* object_property_set_str:
- * @value: the value to be written to the property
* @name: the name of the property
+ * @value: the value to be written to the property
* @errp: returns an error if this function fails
*
* Writes a string value to a property.
*/
-void object_property_set_str(Object *obj, const char *value,
- const char *name, Error **errp);
+void object_property_set_str(Object *obj, const char *name,
+ const char *value, Error **errp);
/**
* object_property_get_str:
/**
* object_property_set_link:
- * @value: the value to be written to the property
* @name: the name of the property
+ * @value: the value to be written to the property
* @errp: returns an error if this function fails
*
* Writes an object's canonical path to a property.
* unreferenced, and a reference is added to the new target object.
*
*/
-void object_property_set_link(Object *obj, Object *value,
- const char *name, Error **errp);
+void object_property_set_link(Object *obj, const char *name,
+ Object *value, Error **errp);
/**
* object_property_get_link:
/**
* object_property_set_bool:
- * @value: the value to be written to the property
* @name: the name of the property
+ * @value: the value to be written to the property
* @errp: returns an error if this function fails
*
* Writes a bool value to a property.
*/
-void object_property_set_bool(Object *obj, bool value,
- const char *name, Error **errp);
+void object_property_set_bool(Object *obj, const char *name,
+ bool value, Error **errp);
/**
* object_property_get_bool:
/**
* object_property_set_int:
- * @value: the value to be written to the property
* @name: the name of the property
+ * @value: the value to be written to the property
* @errp: returns an error if this function fails
*
* Writes an integer value to a property.
*/
-void object_property_set_int(Object *obj, int64_t value,
- const char *name, Error **errp);
+void object_property_set_int(Object *obj, const char *name,
+ int64_t value, Error **errp);
/**
* object_property_get_int:
/**
* object_property_set_uint:
- * @value: the value to be written to the property
* @name: the name of the property
+ * @value: the value to be written to the property
* @errp: returns an error if this function fails
*
* Writes an unsigned integer value to a property.
*/
-void object_property_set_uint(Object *obj, uint64_t value,
- const char *name, Error **errp);
+void object_property_set_uint(Object *obj, const char *name,
+ uint64_t value, Error **errp);
/**
* object_property_get_uint:
/**
* object_property_set:
* @obj: the object
+ * @name: the name of the property
* @v: the visitor that will be used to write the property value. This should
* be an Input visitor and the data will be first read with @name as the
* name and then written as the property value.
- * @name: the name of the property
* @errp: returns an error if this function fails
*
* Writes a property to a object.
*/
-void object_property_set(Object *obj, Visitor *v, const char *name,
+void object_property_set(Object *obj, const char *name, Visitor *v,
Error **errp);
/**
* object_property_parse:
* @obj: the object
- * @string: the string that will be used to parse the property value.
* @name: the name of the property
+ * @string: the string that will be used to parse the property value.
* @errp: returns an error if this function fails
*
* Parses a string and writes the result into a property of an object.
*/
-void object_property_parse(Object *obj, const char *string,
- const char *name, Error **errp);
+void object_property_parse(Object *obj, const char *name,
+ const char *string, Error **errp);
/**
* object_property_print:
/**
* object_property_set_qobject:
* @obj: the object
- * @ret: The value that will be written to the property.
* @name: the name of the property
+ * @value: The value that will be written to the property.
* @errp: returns an error if this function fails
*
* Writes a property to a object.
*/
-void object_property_set_qobject(Object *obj, struct QObject *qobj,
- const char *name, struct Error **errp);
+void object_property_set_qobject(Object *obj,
+ const char *name, struct QObject *value,
+ struct Error **errp);
#endif
if (CPU_NEXT(first_cpu)) {
TaskState *ts = cpu->opaque;
- object_property_set_bool(OBJECT(cpu), false, "realized", NULL);
+ object_property_set_bool(OBJECT(cpu), "realized", false, NULL);
object_unref(OBJECT(cpu));
/*
* At this point the CPU should be unrealized and removed
case COLO_EVENT_CHECKPOINT:
break;
case COLO_EVENT_FAILOVER:
- object_property_set_str(OBJECT(nf), "off", "status", errp);
+ object_property_set_str(OBJECT(nf), "status", "off", errp);
break;
default:
break;
continue;
}
v = string_output_visitor_new(false, &str);
- object_property_get(OBJECT(nf), v, prop->name, NULL);
+ object_property_get(OBJECT(nf), prop->name, v, NULL);
visit_complete(v, &str);
visit_free(v);
monitor_printf(mon, ",%s=%s", prop->name, str);
if (strcmp(name, "bus") == 0)
return 0;
- object_property_parse(obj, value, name, &err);
+ object_property_parse(obj, name, value, &err);
if (err != NULL) {
error_propagate(errp, err);
return -1;
continue;
}
p->used = true;
- object_property_parse(obj, p->value, p->property, &err);
+ object_property_parse(obj, p->property, p->value, &err);
if (err != NULL) {
error_prepend(&err, "can't apply global %s.%s=%s: ",
p->driver, p->property, p->value);
const char *value = va_arg(vargs, char *);
g_assert(value != NULL);
- object_property_parse(obj, value, propname, &local_err);
+ object_property_parse(obj, propname, value, &local_err);
if (local_err) {
error_propagate(errp, local_err);
return -1;
g_hash_table_remove(obj->properties, name);
}
-void object_property_get(Object *obj, Visitor *v, const char *name,
+void object_property_get(Object *obj, const char *name, Visitor *v,
Error **errp)
{
ObjectProperty *prop = object_property_find(obj, name, errp);
}
}
-void object_property_set(Object *obj, Visitor *v, const char *name,
+void object_property_set(Object *obj, const char *name, Visitor *v,
Error **errp)
{
ObjectProperty *prop = object_property_find(obj, name, errp);
}
}
-void object_property_set_str(Object *obj, const char *value,
- const char *name, Error **errp)
+void object_property_set_str(Object *obj, const char *name,
+ const char *value, Error **errp)
{
QString *qstr = qstring_from_str(value);
- object_property_set_qobject(obj, QOBJECT(qstr), name, errp);
+ object_property_set_qobject(obj, name, QOBJECT(qstr), errp);
qobject_unref(qstr);
}
return retval;
}
-void object_property_set_link(Object *obj, Object *value,
- const char *name, Error **errp)
+void object_property_set_link(Object *obj, const char *name,
+ Object *value, Error **errp)
{
if (value) {
char *path = object_get_canonical_path(value);
- object_property_set_str(obj, path, name, errp);
+ object_property_set_str(obj, name, path, errp);
g_free(path);
} else {
- object_property_set_str(obj, "", name, errp);
+ object_property_set_str(obj, name, "", errp);
}
}
return target;
}
-void object_property_set_bool(Object *obj, bool value,
- const char *name, Error **errp)
+void object_property_set_bool(Object *obj, const char *name,
+ bool value, Error **errp)
{
QBool *qbool = qbool_from_bool(value);
- object_property_set_qobject(obj, QOBJECT(qbool), name, errp);
+ object_property_set_qobject(obj, name, QOBJECT(qbool), errp);
qobject_unref(qbool);
}
return retval;
}
-void object_property_set_int(Object *obj, int64_t value,
- const char *name, Error **errp)
+void object_property_set_int(Object *obj, const char *name,
+ int64_t value, Error **errp)
{
QNum *qnum = qnum_from_int(value);
- object_property_set_qobject(obj, QOBJECT(qnum), name, errp);
+ object_property_set_qobject(obj, name, QOBJECT(qnum), errp);
qobject_unref(qnum);
}
object_property_set_default(prop, QOBJECT(qnum_from_uint(value)));
}
-void object_property_set_uint(Object *obj, uint64_t value,
- const char *name, Error **errp)
+void object_property_set_uint(Object *obj, const char *name,
+ uint64_t value, Error **errp)
{
QNum *qnum = qnum_from_uint(value);
- object_property_set_qobject(obj, QOBJECT(qnum), name, errp);
+ object_property_set_qobject(obj, name, QOBJECT(qnum), errp);
qobject_unref(qnum);
}
return ret;
}
-void object_property_parse(Object *obj, const char *string,
- const char *name, Error **errp)
+void object_property_parse(Object *obj, const char *name,
+ const char *string, Error **errp)
{
Visitor *v = string_input_visitor_new(string);
- object_property_set(obj, v, name, errp);
+ object_property_set(obj, name, v, errp);
visit_free(v);
}
Error *local_err = NULL;
v = string_output_visitor_new(human, &string);
- object_property_get(obj, v, name, &local_err);
+ object_property_get(obj, name, v, &local_err);
if (local_err) {
error_propagate(errp, local_err);
goto out;
{
AliasProperty *prop = opaque;
- object_property_get(prop->target_obj, v, prop->target_name, errp);
+ object_property_get(prop->target_obj, prop->target_name, v, errp);
}
static void property_set_alias(Object *obj, Visitor *v, const char *name,
{
AliasProperty *prop = opaque;
- object_property_set(prop->target_obj, v, prop->target_name, errp);
+ object_property_set(prop->target_obj, prop->target_name, v, errp);
}
static Object *property_resolve_alias(Object *obj, void *opaque,
goto out;
}
for (e = qdict_first(qdict); e; e = qdict_next(qdict, e)) {
- object_property_set(obj, v, e->key, &local_err);
+ object_property_set(obj, e->key, v, &local_err);
if (local_err) {
break;
}
error_set(&err, ERROR_CLASS_DEVICE_NOT_FOUND,
"Device '%s' not found", path);
} else {
- object_property_parse(obj, value, property, &err);
+ object_property_parse(obj, property, value, &err);
}
} else {
QObject *obj = qobject_from_json(value, &err);
return;
}
- object_property_set_qobject(obj, value, property, errp);
+ object_property_set_qobject(obj, property, value, errp);
}
QObject *qmp_qom_get(const char *path, const char *property, Error **errp)
#include "qapi/qobject-input-visitor.h"
#include "qapi/qobject-output-visitor.h"
-void object_property_set_qobject(Object *obj, QObject *value,
- const char *name, Error **errp)
+void object_property_set_qobject(Object *obj,
+ const char *name, QObject *value,
+ Error **errp)
{
Visitor *v;
v = qobject_input_visitor_new(value);
- object_property_set(obj, v, name, errp);
+ object_property_set(obj, name, v, errp);
visit_free(v);
}
Visitor *v;
v = qobject_output_visitor_new(&ret);
- object_property_get(obj, v, name, &local_err);
+ object_property_get(obj, name, v, &local_err);
if (!local_err) {
visit_complete(v, &ret);
}
return 0;
}
- object_property_parse(obj, value, name, &local_err);
+ object_property_parse(obj, name, value, &local_err);
if (local_err) {
error_propagate(errp, local_err);
obj = object_new(path ? TYPE_MEMORY_BACKEND_FILE : TYPE_MEMORY_BACKEND_RAM);
if (path) {
- object_property_set_str(obj, path, "mem-path", &error_fatal);
+ object_property_set_str(obj, "mem-path", path, &error_fatal);
}
- object_property_set_int(obj, ms->ram_size, "size", &error_fatal);
+ object_property_set_int(obj, "size", ms->ram_size, &error_fatal);
object_property_add_child(object_get_objects_root(), mc->default_ram_id,
obj);
/* Ensure backend's memory region name is equal to mc->default_ram_id */
- object_property_set_bool(obj, false, "x-use-canonical-path-for-ramblock-id",
- &error_fatal);
+ object_property_set_bool(obj, "x-use-canonical-path-for-ramblock-id",
+ false, &error_fatal);
user_creatable_complete(USER_CREATABLE(obj), &error_fatal);
object_unref(obj);
- object_property_set_str(OBJECT(ms), mc->default_ram_id, "memory-backend",
+ object_property_set_str(OBJECT(ms), "memory-backend", mc->default_ram_id,
&error_fatal);
}
i = 0;
while ((name = cpu_model_advertised_features[i++]) != NULL) {
if (qdict_get(qdict_in, name)) {
- object_property_set(obj, visitor, name, &err);
+ object_property_set(obj, name, visitor, &err);
if (err) {
break;
}
host_vendor_fms(vendor, &family, &model, &stepping);
cpu_x86_fill_model_id(model_id);
- object_property_set_str(OBJECT(cpu), vendor, "vendor", &error_abort);
- object_property_set_int(OBJECT(cpu), family, "family", &error_abort);
- object_property_set_int(OBJECT(cpu), model, "model", &error_abort);
- object_property_set_int(OBJECT(cpu), stepping, "stepping",
+ object_property_set_str(OBJECT(cpu), "vendor", vendor, &error_abort);
+ object_property_set_int(OBJECT(cpu), "family", family, &error_abort);
+ object_property_set_int(OBJECT(cpu), "model", model, &error_abort);
+ object_property_set_int(OBJECT(cpu), "stepping", stepping,
&error_abort);
- object_property_set_str(OBJECT(cpu), model_id, "model-id",
+ object_property_set_str(OBJECT(cpu), "model-id", model_id,
&error_abort);
if (kvm_enabled()) {
}
if (lmce_supported()) {
- object_property_set_bool(OBJECT(cpu), true, "lmce", &error_abort);
+ object_property_set_bool(OBJECT(cpu), "lmce", true, &error_abort);
}
} else {
- object_property_set_str(OBJECT(cpu), CPUID_VENDOR_AMD,
- "vendor", &error_abort);
- object_property_set_int(OBJECT(cpu), 6, "family", &error_abort);
- object_property_set_int(OBJECT(cpu), 6, "model", &error_abort);
- object_property_set_int(OBJECT(cpu), 3, "stepping", &error_abort);
- object_property_set_str(OBJECT(cpu),
+ object_property_set_str(OBJECT(cpu), "vendor", CPUID_VENDOR_AMD,
+ &error_abort);
+ object_property_set_int(OBJECT(cpu), "family", 6, &error_abort);
+ object_property_set_int(OBJECT(cpu), "model", 6, &error_abort);
+ object_property_set_int(OBJECT(cpu), "stepping", 3, &error_abort);
+ object_property_set_str(OBJECT(cpu), "model-id",
"QEMU TCG CPU version " QEMU_HW_VERSION,
- "model-id", &error_abort);
+ &error_abort);
}
- object_property_set_bool(OBJECT(cpu), true, "pmu", &error_abort);
+ object_property_set_bool(OBJECT(cpu), "pmu", true, &error_abort);
}
static const TypeInfo max_x86_cpu_type_info = {
if (!pv->value) {
continue;
}
- object_property_parse(OBJECT(cpu), pv->value, pv->prop,
+ object_property_parse(OBJECT(cpu), pv->prop, pv->value,
&error_abort);
}
}
PropValue *p;
for (p = vdef->props; p && p->prop; p++) {
- object_property_parse(OBJECT(cpu), p->value, p->prop,
+ object_property_parse(OBJECT(cpu), p->prop, p->value,
&error_abort);
}
*/
/* CPU models only set _minimum_ values for level/xlevel: */
- object_property_set_uint(OBJECT(cpu), def->level, "min-level",
+ object_property_set_uint(OBJECT(cpu), "min-level", def->level,
&error_abort);
- object_property_set_uint(OBJECT(cpu), def->xlevel, "min-xlevel",
+ object_property_set_uint(OBJECT(cpu), "min-xlevel", def->xlevel,
&error_abort);
- object_property_set_int(OBJECT(cpu), def->family, "family",
- &error_abort);
- object_property_set_int(OBJECT(cpu), def->model, "model",
+ object_property_set_int(OBJECT(cpu), "family", def->family, &error_abort);
+ object_property_set_int(OBJECT(cpu), "model", def->model, &error_abort);
+ object_property_set_int(OBJECT(cpu), "stepping", def->stepping,
&error_abort);
- object_property_set_int(OBJECT(cpu), def->stepping, "stepping",
- &error_abort);
- object_property_set_str(OBJECT(cpu), def->model_id, "model-id",
+ object_property_set_str(OBJECT(cpu), "model-id", def->model_id,
&error_abort);
for (w = 0; w < FEATURE_WORDS; w++) {
env->features[w] = def->features[w];
vendor = host_vendor;
}
- object_property_set_str(OBJECT(cpu), vendor, "vendor",
- &error_abort);
+ object_property_set_str(OBJECT(cpu), "vendor", vendor, &error_abort);
x86_cpu_apply_version_props(cpu, model);
}
Error *err = NULL;
for (prop = qdict_first(props); prop; prop = qdict_next(props, prop)) {
- object_property_set_qobject(obj, qdict_entry_value(prop),
- qdict_entry_key(prop), &err);
+ object_property_set_qobject(obj, qdict_entry_key(prop),
+ qdict_entry_value(prop), &err);
if (err) {
break;
}
for (l = plus_features; l; l = l->next) {
const char *prop = l->data;
- object_property_set_bool(OBJECT(cpu), true, prop, &local_err);
+ object_property_set_bool(OBJECT(cpu), prop, true, &local_err);
if (local_err) {
goto out;
}
for (l = minus_features; l; l = l->next) {
const char *prop = l->data;
- object_property_set_bool(OBJECT(cpu), false, prop, &local_err);
+ object_property_set_bool(OBJECT(cpu), prop, false, &local_err);
if (local_err) {
goto out;
}
if (compat_str) {
char *v = compat_str + strlen("compat=");
- object_property_set_str(machine, v, "max-cpu-compat", &local_err);
+ object_property_set_str(machine, "max-cpu-compat", v, &local_err);
}
g_strfreev(inpieces);
if (local_err) {
return;
}
for (e = qdict_first(qdict); e; e = qdict_next(qdict, e)) {
- object_property_set(obj, visitor, e->key, &err);
+ object_property_set(obj, e->key, visitor, &err);
if (err) {
break;
}
}
graphic_console_set_hwops(s, hw_ops, opaque);
if (dev) {
- object_property_set_link(OBJECT(s), OBJECT(dev), "device",
+ object_property_set_link(OBJECT(s), "device", OBJECT(dev),
&error_abort);
}
}
trace_console_gfx_close(con->index);
- object_property_set_link(OBJECT(con), NULL, "device", &error_abort);
+ object_property_set_link(OBJECT(con), "device", NULL, &error_abort);
graphic_console_set_hwops(con, &unused_ops, NULL);
if (con->gl) {
projects / mirror_qemu.git / commitdiff