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1 /*
2 * QEMU Motorla 680x0 Macintosh hardware System Emulator
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
20 * THE SOFTWARE.
21 */
22
23 #include "qemu/osdep.h"
24 #include "qemu/units.h"
25 #include "qemu-common.h"
26 #include "sysemu/sysemu.h"
27 #include "cpu.h"
28 #include "hw/hw.h"
29 #include "hw/boards.h"
30 #include "hw/irq.h"
31 #include "elf.h"
32 #include "hw/loader.h"
33 #include "ui/console.h"
34 #include "exec/address-spaces.h"
35 #include "hw/char/escc.h"
36 #include "hw/sysbus.h"
37 #include "hw/scsi/esp.h"
38 #include "bootinfo.h"
39 #include "hw/misc/mac_via.h"
40 #include "hw/input/adb.h"
41 #include "hw/nubus/mac-nubus-bridge.h"
42 #include "hw/display/macfb.h"
43 #include "hw/block/swim.h"
44 #include "net/net.h"
45 #include "qapi/error.h"
46 #include "sysemu/qtest.h"
47 #include "sysemu/runstate.h"
48 #include "sysemu/reset.h"
49
50 #define MACROM_ADDR 0x40800000
51 #define MACROM_SIZE 0x00100000
52
53 #define MACROM_FILENAME "MacROM.bin"
54
55 #define Q800_MACHINE_ID 35
56 #define Q800_CPU_ID (1 << 2)
57 #define Q800_FPU_ID (1 << 2)
58 #define Q800_MMU_ID (1 << 2)
59
60 #define MACH_MAC 3
61 #define Q800_MAC_CPU_ID 2
62
63 #define IO_BASE 0x50000000
64 #define IO_SLICE 0x00040000
65 #define IO_SIZE 0x04000000
66
67 #define VIA_BASE (IO_BASE + 0x00000)
68 #define SONIC_PROM_BASE (IO_BASE + 0x08000)
69 #define SONIC_BASE (IO_BASE + 0x0a000)
70 #define SCC_BASE (IO_BASE + 0x0c020)
71 #define ESP_BASE (IO_BASE + 0x10000)
72 #define ESP_PDMA (IO_BASE + 0x10100)
73 #define ASC_BASE (IO_BASE + 0x14000)
74 #define SWIM_BASE (IO_BASE + 0x1E000)
75
76 #define NUBUS_SUPER_SLOT_BASE 0x60000000
77 #define NUBUS_SLOT_BASE 0xf0000000
78
79 /*
80 * the video base, whereas it a Nubus address,
81 * is needed by the kernel to have early display and
82 * thus provided by the bootloader
83 */
84 #define VIDEO_BASE 0xf9001000
85
86 #define MAC_CLOCK 3686418
87
88 /*
89 * The GLUE (General Logic Unit) is an Apple custom integrated circuit chip
90 * that performs a variety of functions (RAM management, clock generation, ...).
91 * The GLUE chip receives interrupt requests from various devices,
92 * assign priority to each, and asserts one or more interrupt line to the
93 * CPU.
94 */
95
96 typedef struct {
97 M68kCPU *cpu;
98 uint8_t ipr;
99 } GLUEState;
100
101 static void GLUE_set_irq(void *opaque, int irq, int level)
102 {
103 GLUEState *s = opaque;
104 int i;
105
106 if (level) {
107 s->ipr |= 1 << irq;
108 } else {
109 s->ipr &= ~(1 << irq);
110 }
111
112 for (i = 7; i >= 0; i--) {
113 if ((s->ipr >> i) & 1) {
114 m68k_set_irq_level(s->cpu, i + 1, i + 25);
115 return;
116 }
117 }
118 m68k_set_irq_level(s->cpu, 0, 0);
119 }
120
121 static void main_cpu_reset(void *opaque)
122 {
123 M68kCPU *cpu = opaque;
124 CPUState *cs = CPU(cpu);
125
126 cpu_reset(cs);
127 cpu->env.aregs[7] = ldl_phys(cs->as, 0);
128 cpu->env.pc = ldl_phys(cs->as, 4);
129 }
130
131 static uint8_t fake_mac_rom[] = {
132 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
133
134 /* offset: 0xa - mac_reset */
135
136 /* via2[vDirB] |= VIA2B_vPower */
137 0x20, 0x7C, 0x50, 0xF0, 0x24, 0x00, /* moveal VIA2_BASE+vDirB,%a0 */
138 0x10, 0x10, /* moveb %a0@,%d0 */
139 0x00, 0x00, 0x00, 0x04, /* orib #4,%d0 */
140 0x10, 0x80, /* moveb %d0,%a0@ */
141
142 /* via2[vBufB] &= ~VIA2B_vPower */
143 0x20, 0x7C, 0x50, 0xF0, 0x20, 0x00, /* moveal VIA2_BASE+vBufB,%a0 */
144 0x10, 0x10, /* moveb %a0@,%d0 */
145 0x02, 0x00, 0xFF, 0xFB, /* andib #-5,%d0 */
146 0x10, 0x80, /* moveb %d0,%a0@ */
147
148 /* while (true) ; */
149 0x60, 0xFE /* bras [self] */
150 };
151
152 static void q800_init(MachineState *machine)
153 {
154 M68kCPU *cpu = NULL;
155 int linux_boot;
156 int32_t kernel_size;
157 uint64_t elf_entry;
158 char *filename;
159 int bios_size;
160 ram_addr_t initrd_base;
161 int32_t initrd_size;
162 MemoryRegion *rom;
163 MemoryRegion *io;
164 const int io_slice_nb = (IO_SIZE / IO_SLICE) - 1;
165 int i;
166 ram_addr_t ram_size = machine->ram_size;
167 const char *kernel_filename = machine->kernel_filename;
168 const char *initrd_filename = machine->initrd_filename;
169 const char *kernel_cmdline = machine->kernel_cmdline;
170 hwaddr parameters_base;
171 CPUState *cs;
172 DeviceState *dev;
173 DeviceState *via_dev;
174 SysBusESPState *sysbus_esp;
175 ESPState *esp;
176 SysBusDevice *sysbus;
177 BusState *adb_bus;
178 NubusBus *nubus;
179 GLUEState *irq;
180 qemu_irq *pic;
181 DriveInfo *dinfo;
182
183 linux_boot = (kernel_filename != NULL);
184
185 if (ram_size > 1 * GiB) {
186 error_report("Too much memory for this machine: %" PRId64 " MiB, "
187 "maximum 1024 MiB", ram_size / MiB);
188 exit(1);
189 }
190
191 /* init CPUs */
192 cpu = M68K_CPU(cpu_create(machine->cpu_type));
193 qemu_register_reset(main_cpu_reset, cpu);
194
195 /* RAM */
196 memory_region_add_subregion(get_system_memory(), 0, machine->ram);
197
198 /*
199 * Memory from IO_BASE to IO_BASE + IO_SLICE is repeated
200 * from IO_BASE + IO_SLICE to IO_BASE + IO_SIZE
201 */
202 io = g_new(MemoryRegion, io_slice_nb);
203 for (i = 0; i < io_slice_nb; i++) {
204 char *name = g_strdup_printf("mac_m68k.io[%d]", i + 1);
205
206 memory_region_init_alias(&io[i], NULL, name, get_system_memory(),
207 IO_BASE, IO_SLICE);
208 memory_region_add_subregion(get_system_memory(),
209 IO_BASE + (i + 1) * IO_SLICE, &io[i]);
210 g_free(name);
211 }
212
213 /* IRQ Glue */
214
215 irq = g_new0(GLUEState, 1);
216 irq->cpu = cpu;
217 pic = qemu_allocate_irqs(GLUE_set_irq, irq, 8);
218
219 /* VIA */
220
221 via_dev = qdev_new(TYPE_MAC_VIA);
222 dinfo = drive_get(IF_MTD, 0, 0);
223 if (dinfo) {
224 qdev_prop_set_drive(via_dev, "drive", blk_by_legacy_dinfo(dinfo));
225 }
226 sysbus = SYS_BUS_DEVICE(via_dev);
227 sysbus_realize_and_unref(sysbus, &error_fatal);
228 sysbus_mmio_map(sysbus, 0, VIA_BASE);
229 qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 0, pic[0]);
230 qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 1, pic[1]);
231
232
233 adb_bus = qdev_get_child_bus(via_dev, "adb.0");
234 dev = qdev_new(TYPE_ADB_KEYBOARD);
235 qdev_realize_and_unref(dev, adb_bus, &error_fatal);
236 dev = qdev_new(TYPE_ADB_MOUSE);
237 qdev_realize_and_unref(dev, adb_bus, &error_fatal);
238
239 /* MACSONIC */
240
241 if (nb_nics > 1) {
242 error_report("q800 can only have one ethernet interface");
243 exit(1);
244 }
245
246 qemu_check_nic_model(&nd_table[0], "dp83932");
247
248 /*
249 * MacSonic driver needs an Apple MAC address
250 * Valid prefix are:
251 * 00:05:02 Apple
252 * 00:80:19 Dayna Communications, Inc.
253 * 00:A0:40 Apple
254 * 08:00:07 Apple
255 * (Q800 use the last one)
256 */
257 nd_table[0].macaddr.a[0] = 0x08;
258 nd_table[0].macaddr.a[1] = 0x00;
259 nd_table[0].macaddr.a[2] = 0x07;
260
261 dev = qdev_new("dp8393x");
262 qdev_set_nic_properties(dev, &nd_table[0]);
263 qdev_prop_set_uint8(dev, "it_shift", 2);
264 qdev_prop_set_bit(dev, "big_endian", true);
265 object_property_set_link(OBJECT(dev), OBJECT(get_system_memory()),
266 "dma_mr", &error_abort);
267 sysbus = SYS_BUS_DEVICE(dev);
268 sysbus_realize_and_unref(sysbus, &error_fatal);
269 sysbus_mmio_map(sysbus, 0, SONIC_BASE);
270 sysbus_mmio_map(sysbus, 1, SONIC_PROM_BASE);
271 sysbus_connect_irq(sysbus, 0, pic[2]);
272
273 /* SCC */
274
275 dev = qdev_new(TYPE_ESCC);
276 qdev_prop_set_uint32(dev, "disabled", 0);
277 qdev_prop_set_uint32(dev, "frequency", MAC_CLOCK);
278 qdev_prop_set_uint32(dev, "it_shift", 1);
279 qdev_prop_set_bit(dev, "bit_swap", true);
280 qdev_prop_set_chr(dev, "chrA", serial_hd(0));
281 qdev_prop_set_chr(dev, "chrB", serial_hd(1));
282 qdev_prop_set_uint32(dev, "chnBtype", 0);
283 qdev_prop_set_uint32(dev, "chnAtype", 0);
284 sysbus = SYS_BUS_DEVICE(dev);
285 sysbus_realize_and_unref(sysbus, &error_fatal);
286 sysbus_connect_irq(sysbus, 0, pic[3]);
287 sysbus_connect_irq(sysbus, 1, pic[3]);
288 sysbus_mmio_map(sysbus, 0, SCC_BASE);
289
290 /* SCSI */
291
292 dev = qdev_new(TYPE_ESP);
293 sysbus_esp = ESP_STATE(dev);
294 esp = &sysbus_esp->esp;
295 esp->dma_memory_read = NULL;
296 esp->dma_memory_write = NULL;
297 esp->dma_opaque = NULL;
298 sysbus_esp->it_shift = 4;
299 esp->dma_enabled = 1;
300
301 sysbus = SYS_BUS_DEVICE(dev);
302 sysbus_realize_and_unref(sysbus, &error_fatal);
303 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in_named(via_dev,
304 "via2-irq",
305 VIA2_IRQ_SCSI_BIT));
306 sysbus_connect_irq(sysbus, 1,
307 qdev_get_gpio_in_named(via_dev, "via2-irq",
308 VIA2_IRQ_SCSI_DATA_BIT));
309 sysbus_mmio_map(sysbus, 0, ESP_BASE);
310 sysbus_mmio_map(sysbus, 1, ESP_PDMA);
311
312 scsi_bus_legacy_handle_cmdline(&esp->bus);
313
314 /* SWIM floppy controller */
315
316 dev = qdev_new(TYPE_SWIM);
317 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
318 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, SWIM_BASE);
319
320 /* NuBus */
321
322 dev = qdev_new(TYPE_MAC_NUBUS_BRIDGE);
323 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
324 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, NUBUS_SUPER_SLOT_BASE);
325 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, NUBUS_SLOT_BASE);
326
327 nubus = MAC_NUBUS_BRIDGE(dev)->bus;
328
329 /* framebuffer in nubus slot #9 */
330
331 dev = qdev_new(TYPE_NUBUS_MACFB);
332 qdev_prop_set_uint32(dev, "width", graphic_width);
333 qdev_prop_set_uint32(dev, "height", graphic_height);
334 qdev_prop_set_uint8(dev, "depth", graphic_depth);
335 qdev_realize_and_unref(dev, BUS(nubus), &error_fatal);
336
337 cs = CPU(cpu);
338 if (linux_boot) {
339 uint64_t high;
340 kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
341 &elf_entry, NULL, &high, NULL, 1,
342 EM_68K, 0, 0);
343 if (kernel_size < 0) {
344 error_report("could not load kernel '%s'", kernel_filename);
345 exit(1);
346 }
347 stl_phys(cs->as, 4, elf_entry); /* reset initial PC */
348 parameters_base = (high + 1) & ~1;
349
350 BOOTINFO1(cs->as, parameters_base, BI_MACHTYPE, MACH_MAC);
351 BOOTINFO1(cs->as, parameters_base, BI_FPUTYPE, Q800_FPU_ID);
352 BOOTINFO1(cs->as, parameters_base, BI_MMUTYPE, Q800_MMU_ID);
353 BOOTINFO1(cs->as, parameters_base, BI_CPUTYPE, Q800_CPU_ID);
354 BOOTINFO1(cs->as, parameters_base, BI_MAC_CPUID, Q800_MAC_CPU_ID);
355 BOOTINFO1(cs->as, parameters_base, BI_MAC_MODEL, Q800_MACHINE_ID);
356 BOOTINFO1(cs->as, parameters_base,
357 BI_MAC_MEMSIZE, ram_size >> 20); /* in MB */
358 BOOTINFO2(cs->as, parameters_base, BI_MEMCHUNK, 0, ram_size);
359 BOOTINFO1(cs->as, parameters_base, BI_MAC_VADDR, VIDEO_BASE);
360 BOOTINFO1(cs->as, parameters_base, BI_MAC_VDEPTH, graphic_depth);
361 BOOTINFO1(cs->as, parameters_base, BI_MAC_VDIM,
362 (graphic_height << 16) | graphic_width);
363 BOOTINFO1(cs->as, parameters_base, BI_MAC_VROW,
364 (graphic_width * graphic_depth + 7) / 8);
365 BOOTINFO1(cs->as, parameters_base, BI_MAC_SCCBASE, SCC_BASE);
366
367 rom = g_malloc(sizeof(*rom));
368 memory_region_init_ram_ptr(rom, NULL, "m68k_fake_mac.rom",
369 sizeof(fake_mac_rom), fake_mac_rom);
370 memory_region_set_readonly(rom, true);
371 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, rom);
372
373 if (kernel_cmdline) {
374 BOOTINFOSTR(cs->as, parameters_base, BI_COMMAND_LINE,
375 kernel_cmdline);
376 }
377
378 /* load initrd */
379 if (initrd_filename) {
380 initrd_size = get_image_size(initrd_filename);
381 if (initrd_size < 0) {
382 error_report("could not load initial ram disk '%s'",
383 initrd_filename);
384 exit(1);
385 }
386
387 initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK;
388 load_image_targphys(initrd_filename, initrd_base,
389 ram_size - initrd_base);
390 BOOTINFO2(cs->as, parameters_base, BI_RAMDISK, initrd_base,
391 initrd_size);
392 } else {
393 initrd_base = 0;
394 initrd_size = 0;
395 }
396 BOOTINFO0(cs->as, parameters_base, BI_LAST);
397 } else {
398 uint8_t *ptr;
399 /* allocate and load BIOS */
400 rom = g_malloc(sizeof(*rom));
401 memory_region_init_rom(rom, NULL, "m68k_mac.rom", MACROM_SIZE,
402 &error_abort);
403 if (bios_name == NULL) {
404 bios_name = MACROM_FILENAME;
405 }
406 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
407 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, rom);
408
409 /* Load MacROM binary */
410 if (filename) {
411 bios_size = load_image_targphys(filename, MACROM_ADDR, MACROM_SIZE);
412 g_free(filename);
413 } else {
414 bios_size = -1;
415 }
416
417 /* Remove qtest_enabled() check once firmware files are in the tree */
418 if (!qtest_enabled()) {
419 if (bios_size < 0 || bios_size > MACROM_SIZE) {
420 error_report("could not load MacROM '%s'", bios_name);
421 exit(1);
422 }
423
424 ptr = rom_ptr(MACROM_ADDR, MACROM_SIZE);
425 stl_phys(cs->as, 0, ldl_p(ptr)); /* reset initial SP */
426 stl_phys(cs->as, 4,
427 MACROM_ADDR + ldl_p(ptr + 4)); /* reset initial PC */
428 }
429 }
430 }
431
432 static void q800_machine_class_init(ObjectClass *oc, void *data)
433 {
434 MachineClass *mc = MACHINE_CLASS(oc);
435 mc->desc = "Macintosh Quadra 800";
436 mc->init = q800_init;
437 mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040");
438 mc->max_cpus = 1;
439 mc->block_default_type = IF_SCSI;
440 mc->default_ram_id = "m68k_mac.ram";
441 }
442
443 static const TypeInfo q800_machine_typeinfo = {
444 .name = MACHINE_TYPE_NAME("q800"),
445 .parent = TYPE_MACHINE,
446 .class_init = q800_machine_class_init,
447 };
448
449 static void q800_machine_register_types(void)
450 {
451 type_register_static(&q800_machine_typeinfo);
452 }
453
454 type_init(q800_machine_register_types)