2 * Raspberry Pi emulation (c) 2012 Gregory Estrade
3 * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
5 * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft
6 * Written by Andrew Baumann
8 * This work is licensed under the terms of the GNU GPL, version 2 or later.
9 * See the COPYING file in the top-level directory.
12 #include "qemu/osdep.h"
13 #include "qapi/error.h"
14 #include "qemu/module.h"
16 #include "hw/arm/bcm2836.h"
17 #include "hw/arm/raspi_platform.h"
18 #include "hw/sysbus.h"
23 hwaddr peri_base
; /* Peripheral base address seen by the CPU */
24 hwaddr ctrl_base
; /* Interrupt controller and mailboxes etc. */
28 static const BCM283XInfo bcm283x_socs
[] = {
31 .cpu_type
= ARM_CPU_TYPE_NAME("cortex-a7"),
32 .peri_base
= 0x3f000000,
33 .ctrl_base
= 0x40000000,
39 .cpu_type
= ARM_CPU_TYPE_NAME("cortex-a53"),
40 .peri_base
= 0x3f000000,
41 .ctrl_base
= 0x40000000,
47 static void bcm2836_init(Object
*obj
)
49 BCM283XState
*s
= BCM283X(obj
);
50 BCM283XClass
*bc
= BCM283X_GET_CLASS(obj
);
51 const BCM283XInfo
*info
= bc
->info
;
54 for (n
= 0; n
< BCM283X_NCPUS
; n
++) {
55 object_initialize_child(obj
, "cpu[*]", &s
->cpu
[n
].core
,
59 object_initialize_child(obj
, "control", &s
->control
, TYPE_BCM2836_CONTROL
);
61 object_initialize_child(obj
, "peripherals", &s
->peripherals
,
62 TYPE_BCM2835_PERIPHERALS
);
63 object_property_add_alias(obj
, "board-rev", OBJECT(&s
->peripherals
),
65 object_property_add_alias(obj
, "vcram-size", OBJECT(&s
->peripherals
),
69 static void bcm2836_realize(DeviceState
*dev
, Error
**errp
)
71 BCM283XState
*s
= BCM283X(dev
);
72 BCM283XClass
*bc
= BCM283X_GET_CLASS(dev
);
73 const BCM283XInfo
*info
= bc
->info
;
78 /* common peripherals from bcm2835 */
80 obj
= object_property_get_link(OBJECT(dev
), "ram", &error_abort
);
82 object_property_add_const_link(OBJECT(&s
->peripherals
), "ram", obj
);
84 if (!sysbus_realize(SYS_BUS_DEVICE(&s
->peripherals
), &err
)) {
85 error_propagate(errp
, err
);
89 object_property_add_alias(OBJECT(s
), "sd-bus", OBJECT(&s
->peripherals
),
92 sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s
->peripherals
), 0,
95 /* bcm2836 interrupt controller (and mailboxes, etc.) */
96 if (!sysbus_realize(SYS_BUS_DEVICE(&s
->control
), &err
)) {
97 error_propagate(errp
, err
);
101 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->control
), 0, info
->ctrl_base
);
103 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->peripherals
), 0,
104 qdev_get_gpio_in_named(DEVICE(&s
->control
), "gpu-irq", 0));
105 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->peripherals
), 1,
106 qdev_get_gpio_in_named(DEVICE(&s
->control
), "gpu-fiq", 0));
108 for (n
= 0; n
< BCM283X_NCPUS
; n
++) {
109 /* TODO: this should be converted to a property of ARM_CPU */
110 s
->cpu
[n
].core
.mp_affinity
= (info
->clusterid
<< 8) | n
;
112 /* set periphbase/CBAR value for CPU-local registers */
113 object_property_set_int(OBJECT(&s
->cpu
[n
].core
), "reset-cbar",
114 info
->peri_base
, &err
);
116 error_propagate(errp
, err
);
120 /* start powered off if not enabled */
121 object_property_set_bool(OBJECT(&s
->cpu
[n
].core
), "start-powered-off",
122 n
>= s
->enabled_cpus
, &err
);
124 error_propagate(errp
, err
);
128 if (!qdev_realize(DEVICE(&s
->cpu
[n
].core
), NULL
, &err
)) {
129 error_propagate(errp
, err
);
133 /* Connect irq/fiq outputs from the interrupt controller. */
134 qdev_connect_gpio_out_named(DEVICE(&s
->control
), "irq", n
,
135 qdev_get_gpio_in(DEVICE(&s
->cpu
[n
].core
), ARM_CPU_IRQ
));
136 qdev_connect_gpio_out_named(DEVICE(&s
->control
), "fiq", n
,
137 qdev_get_gpio_in(DEVICE(&s
->cpu
[n
].core
), ARM_CPU_FIQ
));
139 /* Connect timers from the CPU to the interrupt controller */
140 qdev_connect_gpio_out(DEVICE(&s
->cpu
[n
].core
), GTIMER_PHYS
,
141 qdev_get_gpio_in_named(DEVICE(&s
->control
), "cntpnsirq", n
));
142 qdev_connect_gpio_out(DEVICE(&s
->cpu
[n
].core
), GTIMER_VIRT
,
143 qdev_get_gpio_in_named(DEVICE(&s
->control
), "cntvirq", n
));
144 qdev_connect_gpio_out(DEVICE(&s
->cpu
[n
].core
), GTIMER_HYP
,
145 qdev_get_gpio_in_named(DEVICE(&s
->control
), "cnthpirq", n
));
146 qdev_connect_gpio_out(DEVICE(&s
->cpu
[n
].core
), GTIMER_SEC
,
147 qdev_get_gpio_in_named(DEVICE(&s
->control
), "cntpsirq", n
));
151 static Property bcm2836_props
[] = {
152 DEFINE_PROP_UINT32("enabled-cpus", BCM283XState
, enabled_cpus
,
154 DEFINE_PROP_END_OF_LIST()
157 static void bcm283x_class_init(ObjectClass
*oc
, void *data
)
159 DeviceClass
*dc
= DEVICE_CLASS(oc
);
160 BCM283XClass
*bc
= BCM283X_CLASS(oc
);
163 dc
->realize
= bcm2836_realize
;
164 device_class_set_props(dc
, bcm2836_props
);
165 /* Reason: Must be wired up in code (see raspi_init() function) */
166 dc
->user_creatable
= false;
169 static const TypeInfo bcm283x_type_info
= {
170 .name
= TYPE_BCM283X
,
171 .parent
= TYPE_DEVICE
,
172 .instance_size
= sizeof(BCM283XState
),
173 .instance_init
= bcm2836_init
,
174 .class_size
= sizeof(BCM283XClass
),
178 static void bcm2836_register_types(void)
182 type_register_static(&bcm283x_type_info
);
183 for (i
= 0; i
< ARRAY_SIZE(bcm283x_socs
); i
++) {
185 .name
= bcm283x_socs
[i
].name
,
186 .parent
= TYPE_BCM283X
,
187 .class_init
= bcm283x_class_init
,
188 .class_data
= (void *) &bcm283x_socs
[i
],
194 type_init(bcm2836_register_types
)