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memory: MemoryRegion: Add container and addr props
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CommitLineData
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1/*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
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PB
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
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14 */
15
022c62cb
PB
16#include "exec/memory.h"
17#include "exec/address-spaces.h"
18#include "exec/ioport.h"
409ddd01 19#include "qapi/visitor.h"
1de7afc9 20#include "qemu/bitops.h"
2c9b15ca 21#include "qom/object.h"
55d5d048 22#include "trace.h"
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23#include <assert.h>
24
022c62cb 25#include "exec/memory-internal.h"
220c3ebd 26#include "exec/ram_addr.h"
e1c57ab8 27#include "sysemu/sysemu.h"
67d95c15 28
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PB
29//#define DEBUG_UNASSIGNED
30
22bde714
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31static unsigned memory_region_transaction_depth;
32static bool memory_region_update_pending;
4dc56152 33static bool ioeventfd_update_pending;
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34static bool global_dirty_log = false;
35
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PB
36/* flat_view_mutex is taken around reading as->current_map; the critical
37 * section is extremely short, so I'm using a single mutex for every AS.
38 * We could also RCU for the read-side.
39 *
40 * The BQL is taken around transaction commits, hence both locks are taken
41 * while writing to as->current_map (with the BQL taken outside).
42 */
43static QemuMutex flat_view_mutex;
44
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45static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
46 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
4ef4db86 47
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48static QTAILQ_HEAD(, AddressSpace) address_spaces
49 = QTAILQ_HEAD_INITIALIZER(address_spaces);
50
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PB
51static void memory_init(void)
52{
53 qemu_mutex_init(&flat_view_mutex);
54}
55
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56typedef struct AddrRange AddrRange;
57
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58/*
59 * Note using signed integers limits us to physical addresses at most
60 * 63 bits wide. They are needed for negative offsetting in aliases
61 * (large MemoryRegion::alias_offset).
62 */
093bc2cd 63struct AddrRange {
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64 Int128 start;
65 Int128 size;
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66};
67
08dafab4 68static AddrRange addrrange_make(Int128 start, Int128 size)
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69{
70 return (AddrRange) { start, size };
71}
72
73static bool addrrange_equal(AddrRange r1, AddrRange r2)
74{
08dafab4 75 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
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76}
77
08dafab4 78static Int128 addrrange_end(AddrRange r)
093bc2cd 79{
08dafab4 80 return int128_add(r.start, r.size);
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81}
82
08dafab4 83static AddrRange addrrange_shift(AddrRange range, Int128 delta)
093bc2cd 84{
08dafab4 85 int128_addto(&range.start, delta);
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86 return range;
87}
88
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89static bool addrrange_contains(AddrRange range, Int128 addr)
90{
91 return int128_ge(addr, range.start)
92 && int128_lt(addr, addrrange_end(range));
93}
94
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95static bool addrrange_intersects(AddrRange r1, AddrRange r2)
96{
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97 return addrrange_contains(r1, r2.start)
98 || addrrange_contains(r2, r1.start);
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99}
100
101static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
102{
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103 Int128 start = int128_max(r1.start, r2.start);
104 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
105 return addrrange_make(start, int128_sub(end, start));
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106}
107
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108enum ListenerDirection { Forward, Reverse };
109
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110static bool memory_listener_match(MemoryListener *listener,
111 MemoryRegionSection *section)
112{
113 return !listener->address_space_filter
114 || listener->address_space_filter == section->address_space;
115}
116
117#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
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118 do { \
119 MemoryListener *_listener; \
120 \
121 switch (_direction) { \
122 case Forward: \
123 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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124 if (_listener->_callback) { \
125 _listener->_callback(_listener, ##_args); \
126 } \
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127 } \
128 break; \
129 case Reverse: \
130 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
131 memory_listeners, link) { \
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132 if (_listener->_callback) { \
133 _listener->_callback(_listener, ##_args); \
134 } \
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135 } \
136 break; \
137 default: \
138 abort(); \
139 } \
140 } while (0)
141
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142#define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
143 do { \
144 MemoryListener *_listener; \
145 \
146 switch (_direction) { \
147 case Forward: \
148 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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149 if (_listener->_callback \
150 && memory_listener_match(_listener, _section)) { \
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151 _listener->_callback(_listener, _section, ##_args); \
152 } \
153 } \
154 break; \
155 case Reverse: \
156 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
157 memory_listeners, link) { \
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158 if (_listener->_callback \
159 && memory_listener_match(_listener, _section)) { \
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160 _listener->_callback(_listener, _section, ##_args); \
161 } \
162 } \
163 break; \
164 default: \
165 abort(); \
166 } \
167 } while (0)
168
dfde4e6e 169/* No need to ref/unref .mr, the FlatRange keeps it alive. */
0e0d36b4 170#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
7376e582 171 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
0e0d36b4 172 .mr = (fr)->mr, \
f6790af6 173 .address_space = (as), \
0e0d36b4 174 .offset_within_region = (fr)->offset_in_region, \
052e87b0 175 .size = (fr)->addr.size, \
0e0d36b4 176 .offset_within_address_space = int128_get64((fr)->addr.start), \
7a8499e8 177 .readonly = (fr)->readonly, \
7376e582 178 }))
0e0d36b4 179
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180struct CoalescedMemoryRange {
181 AddrRange addr;
182 QTAILQ_ENTRY(CoalescedMemoryRange) link;
183};
184
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185struct MemoryRegionIoeventfd {
186 AddrRange addr;
187 bool match_data;
188 uint64_t data;
753d5e14 189 EventNotifier *e;
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190};
191
192static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
193 MemoryRegionIoeventfd b)
194{
08dafab4 195 if (int128_lt(a.addr.start, b.addr.start)) {
3e9d69e7 196 return true;
08dafab4 197 } else if (int128_gt(a.addr.start, b.addr.start)) {
3e9d69e7 198 return false;
08dafab4 199 } else if (int128_lt(a.addr.size, b.addr.size)) {
3e9d69e7 200 return true;
08dafab4 201 } else if (int128_gt(a.addr.size, b.addr.size)) {
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202 return false;
203 } else if (a.match_data < b.match_data) {
204 return true;
205 } else if (a.match_data > b.match_data) {
206 return false;
207 } else if (a.match_data) {
208 if (a.data < b.data) {
209 return true;
210 } else if (a.data > b.data) {
211 return false;
212 }
213 }
753d5e14 214 if (a.e < b.e) {
3e9d69e7 215 return true;
753d5e14 216 } else if (a.e > b.e) {
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217 return false;
218 }
219 return false;
220}
221
222static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
223 MemoryRegionIoeventfd b)
224{
225 return !memory_region_ioeventfd_before(a, b)
226 && !memory_region_ioeventfd_before(b, a);
227}
228
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229typedef struct FlatRange FlatRange;
230typedef struct FlatView FlatView;
231
232/* Range of memory in the global map. Addresses are absolute. */
233struct FlatRange {
234 MemoryRegion *mr;
a8170e5e 235 hwaddr offset_in_region;
093bc2cd 236 AddrRange addr;
5a583347 237 uint8_t dirty_log_mask;
5f9a5ea1 238 bool romd_mode;
fb1cd6f9 239 bool readonly;
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240};
241
242/* Flattened global view of current active memory hierarchy. Kept in sorted
243 * order.
244 */
245struct FlatView {
856d7245 246 unsigned ref;
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247 FlatRange *ranges;
248 unsigned nr;
249 unsigned nr_allocated;
250};
251
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252typedef struct AddressSpaceOps AddressSpaceOps;
253
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254#define FOR_EACH_FLAT_RANGE(var, view) \
255 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
256
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257static bool flatrange_equal(FlatRange *a, FlatRange *b)
258{
259 return a->mr == b->mr
260 && addrrange_equal(a->addr, b->addr)
d0a9b5bc 261 && a->offset_in_region == b->offset_in_region
5f9a5ea1 262 && a->romd_mode == b->romd_mode
fb1cd6f9 263 && a->readonly == b->readonly;
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264}
265
266static void flatview_init(FlatView *view)
267{
856d7245 268 view->ref = 1;
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269 view->ranges = NULL;
270 view->nr = 0;
271 view->nr_allocated = 0;
272}
273
274/* Insert a range into a given position. Caller is responsible for maintaining
275 * sorting order.
276 */
277static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
278{
279 if (view->nr == view->nr_allocated) {
280 view->nr_allocated = MAX(2 * view->nr, 10);
7267c094 281 view->ranges = g_realloc(view->ranges,
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282 view->nr_allocated * sizeof(*view->ranges));
283 }
284 memmove(view->ranges + pos + 1, view->ranges + pos,
285 (view->nr - pos) * sizeof(FlatRange));
286 view->ranges[pos] = *range;
dfde4e6e 287 memory_region_ref(range->mr);
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288 ++view->nr;
289}
290
291static void flatview_destroy(FlatView *view)
292{
dfde4e6e
PB
293 int i;
294
295 for (i = 0; i < view->nr; i++) {
296 memory_region_unref(view->ranges[i].mr);
297 }
7267c094 298 g_free(view->ranges);
a9a0c06d 299 g_free(view);
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300}
301
856d7245
PB
302static void flatview_ref(FlatView *view)
303{
304 atomic_inc(&view->ref);
305}
306
307static void flatview_unref(FlatView *view)
308{
309 if (atomic_fetch_dec(&view->ref) == 1) {
310 flatview_destroy(view);
311 }
312}
313
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314static bool can_merge(FlatRange *r1, FlatRange *r2)
315{
08dafab4 316 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
3d8e6bf9 317 && r1->mr == r2->mr
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318 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
319 r1->addr.size),
320 int128_make64(r2->offset_in_region))
d0a9b5bc 321 && r1->dirty_log_mask == r2->dirty_log_mask
5f9a5ea1 322 && r1->romd_mode == r2->romd_mode
fb1cd6f9 323 && r1->readonly == r2->readonly;
3d8e6bf9
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324}
325
8508e024 326/* Attempt to simplify a view by merging adjacent ranges */
3d8e6bf9
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327static void flatview_simplify(FlatView *view)
328{
329 unsigned i, j;
330
331 i = 0;
332 while (i < view->nr) {
333 j = i + 1;
334 while (j < view->nr
335 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
08dafab4 336 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
3d8e6bf9
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337 ++j;
338 }
339 ++i;
340 memmove(&view->ranges[i], &view->ranges[j],
341 (view->nr - j) * sizeof(view->ranges[j]));
342 view->nr -= j - i;
343 }
344}
345
e7342aa3
PB
346static bool memory_region_big_endian(MemoryRegion *mr)
347{
348#ifdef TARGET_WORDS_BIGENDIAN
349 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
350#else
351 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
352#endif
353}
354
e11ef3d1
PB
355static bool memory_region_wrong_endianness(MemoryRegion *mr)
356{
357#ifdef TARGET_WORDS_BIGENDIAN
358 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
359#else
360 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
361#endif
362}
363
364static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
365{
366 if (memory_region_wrong_endianness(mr)) {
367 switch (size) {
368 case 1:
369 break;
370 case 2:
371 *data = bswap16(*data);
372 break;
373 case 4:
374 *data = bswap32(*data);
375 break;
376 case 8:
377 *data = bswap64(*data);
378 break;
379 default:
380 abort();
381 }
382 }
383}
384
547e9201 385static void memory_region_oldmmio_read_accessor(MemoryRegion *mr,
ce5d2f33
PB
386 hwaddr addr,
387 uint64_t *value,
388 unsigned size,
389 unsigned shift,
390 uint64_t mask)
391{
ce5d2f33
PB
392 uint64_t tmp;
393
394 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
55d5d048 395 trace_memory_region_ops_read(mr, addr, tmp, size);
ce5d2f33
PB
396 *value |= (tmp & mask) << shift;
397}
398
547e9201 399static void memory_region_read_accessor(MemoryRegion *mr,
a8170e5e 400 hwaddr addr,
164a4dcd
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401 uint64_t *value,
402 unsigned size,
403 unsigned shift,
404 uint64_t mask)
405{
164a4dcd
AK
406 uint64_t tmp;
407
d410515e
JK
408 if (mr->flush_coalesced_mmio) {
409 qemu_flush_coalesced_mmio_buffer();
410 }
164a4dcd 411 tmp = mr->ops->read(mr->opaque, addr, size);
55d5d048 412 trace_memory_region_ops_read(mr, addr, tmp, size);
164a4dcd
AK
413 *value |= (tmp & mask) << shift;
414}
415
547e9201 416static void memory_region_oldmmio_write_accessor(MemoryRegion *mr,
ce5d2f33
PB
417 hwaddr addr,
418 uint64_t *value,
419 unsigned size,
420 unsigned shift,
421 uint64_t mask)
422{
ce5d2f33
PB
423 uint64_t tmp;
424
425 tmp = (*value >> shift) & mask;
55d5d048 426 trace_memory_region_ops_write(mr, addr, tmp, size);
ce5d2f33
PB
427 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
428}
429
547e9201 430static void memory_region_write_accessor(MemoryRegion *mr,
a8170e5e 431 hwaddr addr,
164a4dcd
AK
432 uint64_t *value,
433 unsigned size,
434 unsigned shift,
435 uint64_t mask)
436{
164a4dcd
AK
437 uint64_t tmp;
438
d410515e
JK
439 if (mr->flush_coalesced_mmio) {
440 qemu_flush_coalesced_mmio_buffer();
441 }
164a4dcd 442 tmp = (*value >> shift) & mask;
55d5d048 443 trace_memory_region_ops_write(mr, addr, tmp, size);
164a4dcd
AK
444 mr->ops->write(mr->opaque, addr, tmp, size);
445}
446
a8170e5e 447static void access_with_adjusted_size(hwaddr addr,
164a4dcd
AK
448 uint64_t *value,
449 unsigned size,
450 unsigned access_size_min,
451 unsigned access_size_max,
547e9201 452 void (*access)(MemoryRegion *mr,
a8170e5e 453 hwaddr addr,
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454 uint64_t *value,
455 unsigned size,
456 unsigned shift,
457 uint64_t mask),
547e9201 458 MemoryRegion *mr)
164a4dcd
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459{
460 uint64_t access_mask;
461 unsigned access_size;
462 unsigned i;
463
464 if (!access_size_min) {
465 access_size_min = 1;
466 }
467 if (!access_size_max) {
468 access_size_max = 4;
469 }
ce5d2f33
PB
470
471 /* FIXME: support unaligned access? */
164a4dcd
AK
472 access_size = MAX(MIN(size, access_size_max), access_size_min);
473 access_mask = -1ULL >> (64 - access_size * 8);
e7342aa3
PB
474 if (memory_region_big_endian(mr)) {
475 for (i = 0; i < size; i += access_size) {
476 access(mr, addr + i, value, access_size,
477 (size - access_size - i) * 8, access_mask);
478 }
479 } else {
480 for (i = 0; i < size; i += access_size) {
481 access(mr, addr + i, value, access_size, i * 8, access_mask);
482 }
164a4dcd
AK
483 }
484}
485
e2177955
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486static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
487{
0d673e36
AK
488 AddressSpace *as;
489
feca4ac1
PB
490 while (mr->container) {
491 mr = mr->container;
e2177955 492 }
0d673e36
AK
493 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
494 if (mr == as->root) {
495 return as;
496 }
e2177955 497 }
eed2bacf 498 return NULL;
e2177955
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499}
500
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501/* Render a memory region into the global view. Ranges in @view obscure
502 * ranges in @mr.
503 */
504static void render_memory_region(FlatView *view,
505 MemoryRegion *mr,
08dafab4 506 Int128 base,
fb1cd6f9
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507 AddrRange clip,
508 bool readonly)
093bc2cd
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509{
510 MemoryRegion *subregion;
511 unsigned i;
a8170e5e 512 hwaddr offset_in_region;
08dafab4
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513 Int128 remain;
514 Int128 now;
093bc2cd
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515 FlatRange fr;
516 AddrRange tmp;
517
6bba19ba
AK
518 if (!mr->enabled) {
519 return;
520 }
521
08dafab4 522 int128_addto(&base, int128_make64(mr->addr));
fb1cd6f9 523 readonly |= mr->readonly;
093bc2cd
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524
525 tmp = addrrange_make(base, mr->size);
526
527 if (!addrrange_intersects(tmp, clip)) {
528 return;
529 }
530
531 clip = addrrange_intersection(tmp, clip);
532
533 if (mr->alias) {
08dafab4
AK
534 int128_subfrom(&base, int128_make64(mr->alias->addr));
535 int128_subfrom(&base, int128_make64(mr->alias_offset));
fb1cd6f9 536 render_memory_region(view, mr->alias, base, clip, readonly);
093bc2cd
AK
537 return;
538 }
539
540 /* Render subregions in priority order. */
541 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
fb1cd6f9 542 render_memory_region(view, subregion, base, clip, readonly);
093bc2cd
AK
543 }
544
14a3c10a 545 if (!mr->terminates) {
093bc2cd
AK
546 return;
547 }
548
08dafab4 549 offset_in_region = int128_get64(int128_sub(clip.start, base));
093bc2cd
AK
550 base = clip.start;
551 remain = clip.size;
552
2eb74e1a
PC
553 fr.mr = mr;
554 fr.dirty_log_mask = mr->dirty_log_mask;
555 fr.romd_mode = mr->romd_mode;
556 fr.readonly = readonly;
557
093bc2cd 558 /* Render the region itself into any gaps left by the current view. */
08dafab4
AK
559 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
560 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
093bc2cd
AK
561 continue;
562 }
08dafab4
AK
563 if (int128_lt(base, view->ranges[i].addr.start)) {
564 now = int128_min(remain,
565 int128_sub(view->ranges[i].addr.start, base));
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AK
566 fr.offset_in_region = offset_in_region;
567 fr.addr = addrrange_make(base, now);
568 flatview_insert(view, i, &fr);
569 ++i;
08dafab4
AK
570 int128_addto(&base, now);
571 offset_in_region += int128_get64(now);
572 int128_subfrom(&remain, now);
093bc2cd 573 }
d26a8cae
AK
574 now = int128_sub(int128_min(int128_add(base, remain),
575 addrrange_end(view->ranges[i].addr)),
576 base);
577 int128_addto(&base, now);
578 offset_in_region += int128_get64(now);
579 int128_subfrom(&remain, now);
093bc2cd 580 }
08dafab4 581 if (int128_nz(remain)) {
093bc2cd
AK
582 fr.offset_in_region = offset_in_region;
583 fr.addr = addrrange_make(base, remain);
584 flatview_insert(view, i, &fr);
585 }
586}
587
588/* Render a memory topology into a list of disjoint absolute ranges. */
a9a0c06d 589static FlatView *generate_memory_topology(MemoryRegion *mr)
093bc2cd 590{
a9a0c06d 591 FlatView *view;
093bc2cd 592
a9a0c06d
PB
593 view = g_new(FlatView, 1);
594 flatview_init(view);
093bc2cd 595
83f3c251 596 if (mr) {
a9a0c06d 597 render_memory_region(view, mr, int128_zero(),
83f3c251
AK
598 addrrange_make(int128_zero(), int128_2_64()), false);
599 }
a9a0c06d 600 flatview_simplify(view);
093bc2cd
AK
601
602 return view;
603}
604
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605static void address_space_add_del_ioeventfds(AddressSpace *as,
606 MemoryRegionIoeventfd *fds_new,
607 unsigned fds_new_nb,
608 MemoryRegionIoeventfd *fds_old,
609 unsigned fds_old_nb)
610{
611 unsigned iold, inew;
80a1ea37
AK
612 MemoryRegionIoeventfd *fd;
613 MemoryRegionSection section;
3e9d69e7
AK
614
615 /* Generate a symmetric difference of the old and new fd sets, adding
616 * and deleting as necessary.
617 */
618
619 iold = inew = 0;
620 while (iold < fds_old_nb || inew < fds_new_nb) {
621 if (iold < fds_old_nb
622 && (inew == fds_new_nb
623 || memory_region_ioeventfd_before(fds_old[iold],
624 fds_new[inew]))) {
80a1ea37
AK
625 fd = &fds_old[iold];
626 section = (MemoryRegionSection) {
f6790af6 627 .address_space = as,
80a1ea37 628 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 629 .size = fd->addr.size,
80a1ea37
AK
630 };
631 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
753d5e14 632 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
633 ++iold;
634 } else if (inew < fds_new_nb
635 && (iold == fds_old_nb
636 || memory_region_ioeventfd_before(fds_new[inew],
637 fds_old[iold]))) {
80a1ea37
AK
638 fd = &fds_new[inew];
639 section = (MemoryRegionSection) {
f6790af6 640 .address_space = as,
80a1ea37 641 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 642 .size = fd->addr.size,
80a1ea37
AK
643 };
644 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
753d5e14 645 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
646 ++inew;
647 } else {
648 ++iold;
649 ++inew;
650 }
651 }
652}
653
856d7245
PB
654static FlatView *address_space_get_flatview(AddressSpace *as)
655{
656 FlatView *view;
657
658 qemu_mutex_lock(&flat_view_mutex);
659 view = as->current_map;
660 flatview_ref(view);
661 qemu_mutex_unlock(&flat_view_mutex);
662 return view;
663}
664
3e9d69e7
AK
665static void address_space_update_ioeventfds(AddressSpace *as)
666{
99e86347 667 FlatView *view;
3e9d69e7
AK
668 FlatRange *fr;
669 unsigned ioeventfd_nb = 0;
670 MemoryRegionIoeventfd *ioeventfds = NULL;
671 AddrRange tmp;
672 unsigned i;
673
856d7245 674 view = address_space_get_flatview(as);
99e86347 675 FOR_EACH_FLAT_RANGE(fr, view) {
3e9d69e7
AK
676 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
677 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
08dafab4
AK
678 int128_sub(fr->addr.start,
679 int128_make64(fr->offset_in_region)));
3e9d69e7
AK
680 if (addrrange_intersects(fr->addr, tmp)) {
681 ++ioeventfd_nb;
7267c094 682 ioeventfds = g_realloc(ioeventfds,
3e9d69e7
AK
683 ioeventfd_nb * sizeof(*ioeventfds));
684 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
685 ioeventfds[ioeventfd_nb-1].addr = tmp;
686 }
687 }
688 }
689
690 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
691 as->ioeventfds, as->ioeventfd_nb);
692
7267c094 693 g_free(as->ioeventfds);
3e9d69e7
AK
694 as->ioeventfds = ioeventfds;
695 as->ioeventfd_nb = ioeventfd_nb;
856d7245 696 flatview_unref(view);
3e9d69e7
AK
697}
698
b8af1afb 699static void address_space_update_topology_pass(AddressSpace *as,
a9a0c06d
PB
700 const FlatView *old_view,
701 const FlatView *new_view,
b8af1afb 702 bool adding)
093bc2cd 703{
093bc2cd
AK
704 unsigned iold, inew;
705 FlatRange *frold, *frnew;
093bc2cd
AK
706
707 /* Generate a symmetric difference of the old and new memory maps.
708 * Kill ranges in the old map, and instantiate ranges in the new map.
709 */
710 iold = inew = 0;
a9a0c06d
PB
711 while (iold < old_view->nr || inew < new_view->nr) {
712 if (iold < old_view->nr) {
713 frold = &old_view->ranges[iold];
093bc2cd
AK
714 } else {
715 frold = NULL;
716 }
a9a0c06d
PB
717 if (inew < new_view->nr) {
718 frnew = &new_view->ranges[inew];
093bc2cd
AK
719 } else {
720 frnew = NULL;
721 }
722
723 if (frold
724 && (!frnew
08dafab4
AK
725 || int128_lt(frold->addr.start, frnew->addr.start)
726 || (int128_eq(frold->addr.start, frnew->addr.start)
093bc2cd 727 && !flatrange_equal(frold, frnew)))) {
41a6e477 728 /* In old but not in new, or in both but attributes changed. */
093bc2cd 729
b8af1afb 730 if (!adding) {
72e22d2f 731 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
b8af1afb
AK
732 }
733
093bc2cd
AK
734 ++iold;
735 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
41a6e477 736 /* In both and unchanged (except logging may have changed) */
093bc2cd 737
b8af1afb 738 if (adding) {
50c1e149 739 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
b8af1afb 740 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
72e22d2f 741 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
b8af1afb 742 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
72e22d2f 743 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
b8af1afb 744 }
5a583347
AK
745 }
746
093bc2cd
AK
747 ++iold;
748 ++inew;
093bc2cd
AK
749 } else {
750 /* In new */
751
b8af1afb 752 if (adding) {
72e22d2f 753 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
b8af1afb
AK
754 }
755
093bc2cd
AK
756 ++inew;
757 }
758 }
b8af1afb
AK
759}
760
761
762static void address_space_update_topology(AddressSpace *as)
763{
856d7245 764 FlatView *old_view = address_space_get_flatview(as);
a9a0c06d 765 FlatView *new_view = generate_memory_topology(as->root);
b8af1afb
AK
766
767 address_space_update_topology_pass(as, old_view, new_view, false);
768 address_space_update_topology_pass(as, old_view, new_view, true);
769
856d7245
PB
770 qemu_mutex_lock(&flat_view_mutex);
771 flatview_unref(as->current_map);
a9a0c06d 772 as->current_map = new_view;
856d7245
PB
773 qemu_mutex_unlock(&flat_view_mutex);
774
775 /* Note that all the old MemoryRegions are still alive up to this
776 * point. This relieves most MemoryListeners from the need to
777 * ref/unref the MemoryRegions they get---unless they use them
778 * outside the iothread mutex, in which case precise reference
779 * counting is necessary.
780 */
781 flatview_unref(old_view);
782
3e9d69e7 783 address_space_update_ioeventfds(as);
093bc2cd
AK
784}
785
4ef4db86
AK
786void memory_region_transaction_begin(void)
787{
bb880ded 788 qemu_flush_coalesced_mmio_buffer();
4ef4db86
AK
789 ++memory_region_transaction_depth;
790}
791
4dc56152
GA
792static void memory_region_clear_pending(void)
793{
794 memory_region_update_pending = false;
795 ioeventfd_update_pending = false;
796}
797
4ef4db86
AK
798void memory_region_transaction_commit(void)
799{
0d673e36
AK
800 AddressSpace *as;
801
4ef4db86
AK
802 assert(memory_region_transaction_depth);
803 --memory_region_transaction_depth;
4dc56152
GA
804 if (!memory_region_transaction_depth) {
805 if (memory_region_update_pending) {
806 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
02e2b95f 807
4dc56152
GA
808 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
809 address_space_update_topology(as);
810 }
02e2b95f 811
4dc56152
GA
812 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
813 } else if (ioeventfd_update_pending) {
814 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
815 address_space_update_ioeventfds(as);
816 }
817 }
818 memory_region_clear_pending();
819 }
4ef4db86
AK
820}
821
545e92e0
AK
822static void memory_region_destructor_none(MemoryRegion *mr)
823{
824}
825
826static void memory_region_destructor_ram(MemoryRegion *mr)
827{
828 qemu_ram_free(mr->ram_addr);
829}
830
dfde4e6e
PB
831static void memory_region_destructor_alias(MemoryRegion *mr)
832{
833 memory_region_unref(mr->alias);
834}
835
545e92e0
AK
836static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
837{
838 qemu_ram_free_from_ptr(mr->ram_addr);
839}
840
d0a9b5bc
AK
841static void memory_region_destructor_rom_device(MemoryRegion *mr)
842{
843 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
d0a9b5bc
AK
844}
845
b4fefef9
PC
846static bool memory_region_need_escape(char c)
847{
848 return c == '/' || c == '[' || c == '\\' || c == ']';
849}
850
851static char *memory_region_escape_name(const char *name)
852{
853 const char *p;
854 char *escaped, *q;
855 uint8_t c;
856 size_t bytes = 0;
857
858 for (p = name; *p; p++) {
859 bytes += memory_region_need_escape(*p) ? 4 : 1;
860 }
861 if (bytes == p - name) {
862 return g_memdup(name, bytes + 1);
863 }
864
865 escaped = g_malloc(bytes + 1);
866 for (p = name, q = escaped; *p; p++) {
867 c = *p;
868 if (unlikely(memory_region_need_escape(c))) {
869 *q++ = '\\';
870 *q++ = 'x';
871 *q++ = "0123456789abcdef"[c >> 4];
872 c = "0123456789abcdef"[c & 15];
873 }
874 *q++ = c;
875 }
876 *q = 0;
877 return escaped;
878}
879
880static void object_property_add_child_array(Object *owner,
881 const char *name,
882 Object *child)
883{
884 int i;
885 char *base_name = memory_region_escape_name(name);
886
887 for (i = 0; ; i++) {
888 char *full_name = g_strdup_printf("%s[%d]", base_name, i);
889 Error *local_err = NULL;
890
891 object_property_add_child(owner, full_name, child, &local_err);
892 g_free(full_name);
893 if (!local_err) {
894 break;
895 }
896
897 error_free(local_err);
898 }
899
900 g_free(base_name);
901}
902
903
093bc2cd 904void memory_region_init(MemoryRegion *mr,
2c9b15ca 905 Object *owner,
093bc2cd
AK
906 const char *name,
907 uint64_t size)
908{
22a893e4
PB
909 if (!owner) {
910 owner = qdev_get_machine();
911 }
b4fefef9 912
22a893e4 913 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
08dafab4
AK
914 mr->size = int128_make64(size);
915 if (size == UINT64_MAX) {
916 mr->size = int128_2_64();
917 }
b4fefef9
PC
918 mr->name = g_strdup(name);
919
920 if (name) {
22a893e4 921 object_property_add_child_array(owner, name, OBJECT(mr));
b4fefef9
PC
922 object_unref(OBJECT(mr));
923 }
924}
925
409ddd01
PC
926static void memory_region_get_addr(Object *obj, Visitor *v, void *opaque,
927 const char *name, Error **errp)
928{
929 MemoryRegion *mr = MEMORY_REGION(obj);
930 uint64_t value = mr->addr;
931
932 visit_type_uint64(v, &value, name, errp);
933}
934
935static void memory_region_get_container(Object *obj, Visitor *v, void *opaque,
936 const char *name, Error **errp)
937{
938 MemoryRegion *mr = MEMORY_REGION(obj);
939 gchar *path = (gchar *)"";
940
941 if (mr->container) {
942 path = object_get_canonical_path(OBJECT(mr->container));
943 }
944 visit_type_str(v, &path, name, errp);
945 if (mr->container) {
946 g_free(path);
947 }
948}
949
950static Object *memory_region_resolve_container(Object *obj, void *opaque,
951 const char *part)
952{
953 MemoryRegion *mr = MEMORY_REGION(obj);
954
955 return OBJECT(mr->container);
956}
957
b4fefef9
PC
958static void memory_region_initfn(Object *obj)
959{
960 MemoryRegion *mr = MEMORY_REGION(obj);
409ddd01 961 ObjectProperty *op;
b4fefef9
PC
962
963 mr->ops = &unassigned_mem_ops;
6bba19ba 964 mr->enabled = true;
5f9a5ea1 965 mr->romd_mode = true;
545e92e0 966 mr->destructor = memory_region_destructor_none;
093bc2cd 967 QTAILQ_INIT(&mr->subregions);
093bc2cd 968 QTAILQ_INIT(&mr->coalesced);
409ddd01
PC
969
970 op = object_property_add(OBJECT(mr), "container",
971 "link<" TYPE_MEMORY_REGION ">",
972 memory_region_get_container,
973 NULL, /* memory_region_set_container */
974 NULL, NULL, &error_abort);
975 op->resolve = memory_region_resolve_container;
976
977 object_property_add(OBJECT(mr), "addr", "uint64",
978 memory_region_get_addr,
979 NULL, /* memory_region_set_addr */
980 NULL, NULL, &error_abort);
093bc2cd
AK
981}
982
b018ddf6
PB
983static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
984 unsigned size)
985{
986#ifdef DEBUG_UNASSIGNED
987 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
988#endif
4917cf44
AF
989 if (current_cpu != NULL) {
990 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
c658b94f 991 }
68a7439a 992 return 0;
b018ddf6
PB
993}
994
995static void unassigned_mem_write(void *opaque, hwaddr addr,
996 uint64_t val, unsigned size)
997{
998#ifdef DEBUG_UNASSIGNED
999 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1000#endif
4917cf44
AF
1001 if (current_cpu != NULL) {
1002 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
c658b94f 1003 }
b018ddf6
PB
1004}
1005
d197063f
PB
1006static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1007 unsigned size, bool is_write)
1008{
1009 return false;
1010}
1011
1012const MemoryRegionOps unassigned_mem_ops = {
1013 .valid.accepts = unassigned_mem_accepts,
1014 .endianness = DEVICE_NATIVE_ENDIAN,
1015};
1016
d2702032
PB
1017bool memory_region_access_valid(MemoryRegion *mr,
1018 hwaddr addr,
1019 unsigned size,
1020 bool is_write)
093bc2cd 1021{
a014ed07
PB
1022 int access_size_min, access_size_max;
1023 int access_size, i;
897fa7cf 1024
093bc2cd
AK
1025 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1026 return false;
1027 }
1028
a014ed07 1029 if (!mr->ops->valid.accepts) {
093bc2cd
AK
1030 return true;
1031 }
1032
a014ed07
PB
1033 access_size_min = mr->ops->valid.min_access_size;
1034 if (!mr->ops->valid.min_access_size) {
1035 access_size_min = 1;
1036 }
1037
1038 access_size_max = mr->ops->valid.max_access_size;
1039 if (!mr->ops->valid.max_access_size) {
1040 access_size_max = 4;
1041 }
1042
1043 access_size = MAX(MIN(size, access_size_max), access_size_min);
1044 for (i = 0; i < size; i += access_size) {
1045 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1046 is_write)) {
1047 return false;
1048 }
093bc2cd 1049 }
a014ed07 1050
093bc2cd
AK
1051 return true;
1052}
1053
a621f38d 1054static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
a8170e5e 1055 hwaddr addr,
a621f38d 1056 unsigned size)
093bc2cd 1057{
164a4dcd 1058 uint64_t data = 0;
093bc2cd 1059
ce5d2f33
PB
1060 if (mr->ops->read) {
1061 access_with_adjusted_size(addr, &data, size,
1062 mr->ops->impl.min_access_size,
1063 mr->ops->impl.max_access_size,
1064 memory_region_read_accessor, mr);
1065 } else {
1066 access_with_adjusted_size(addr, &data, size, 1, 4,
1067 memory_region_oldmmio_read_accessor, mr);
74901c3b
AK
1068 }
1069
093bc2cd
AK
1070 return data;
1071}
1072
791af8c8
PB
1073static bool memory_region_dispatch_read(MemoryRegion *mr,
1074 hwaddr addr,
1075 uint64_t *pval,
1076 unsigned size)
a621f38d 1077{
791af8c8
PB
1078 if (!memory_region_access_valid(mr, addr, size, false)) {
1079 *pval = unassigned_mem_read(mr, addr, size);
1080 return true;
1081 }
a621f38d 1082
791af8c8
PB
1083 *pval = memory_region_dispatch_read1(mr, addr, size);
1084 adjust_endianness(mr, pval, size);
1085 return false;
a621f38d 1086}
093bc2cd 1087
791af8c8 1088static bool memory_region_dispatch_write(MemoryRegion *mr,
a8170e5e 1089 hwaddr addr,
a621f38d
AK
1090 uint64_t data,
1091 unsigned size)
1092{
897fa7cf 1093 if (!memory_region_access_valid(mr, addr, size, true)) {
b018ddf6 1094 unassigned_mem_write(mr, addr, data, size);
791af8c8 1095 return true;
093bc2cd
AK
1096 }
1097
a621f38d
AK
1098 adjust_endianness(mr, &data, size);
1099
ce5d2f33
PB
1100 if (mr->ops->write) {
1101 access_with_adjusted_size(addr, &data, size,
1102 mr->ops->impl.min_access_size,
1103 mr->ops->impl.max_access_size,
1104 memory_region_write_accessor, mr);
1105 } else {
1106 access_with_adjusted_size(addr, &data, size, 1, 4,
1107 memory_region_oldmmio_write_accessor, mr);
74901c3b 1108 }
791af8c8 1109 return false;
093bc2cd
AK
1110}
1111
093bc2cd 1112void memory_region_init_io(MemoryRegion *mr,
2c9b15ca 1113 Object *owner,
093bc2cd
AK
1114 const MemoryRegionOps *ops,
1115 void *opaque,
1116 const char *name,
1117 uint64_t size)
1118{
2c9b15ca 1119 memory_region_init(mr, owner, name, size);
093bc2cd
AK
1120 mr->ops = ops;
1121 mr->opaque = opaque;
14a3c10a 1122 mr->terminates = true;
97161e17 1123 mr->ram_addr = ~(ram_addr_t)0;
093bc2cd
AK
1124}
1125
1126void memory_region_init_ram(MemoryRegion *mr,
2c9b15ca 1127 Object *owner,
093bc2cd
AK
1128 const char *name,
1129 uint64_t size)
1130{
2c9b15ca 1131 memory_region_init(mr, owner, name, size);
8ea9252a 1132 mr->ram = true;
14a3c10a 1133 mr->terminates = true;
545e92e0 1134 mr->destructor = memory_region_destructor_ram;
0b183fc8
PB
1135 mr->ram_addr = qemu_ram_alloc(size, mr);
1136}
1137
1138#ifdef __linux__
1139void memory_region_init_ram_from_file(MemoryRegion *mr,
1140 struct Object *owner,
1141 const char *name,
1142 uint64_t size,
dbcb8981 1143 bool share,
7f56e740
PB
1144 const char *path,
1145 Error **errp)
0b183fc8
PB
1146{
1147 memory_region_init(mr, owner, name, size);
1148 mr->ram = true;
1149 mr->terminates = true;
1150 mr->destructor = memory_region_destructor_ram;
dbcb8981 1151 mr->ram_addr = qemu_ram_alloc_from_file(size, mr, share, path, errp);
093bc2cd 1152}
0b183fc8 1153#endif
093bc2cd
AK
1154
1155void memory_region_init_ram_ptr(MemoryRegion *mr,
2c9b15ca 1156 Object *owner,
093bc2cd
AK
1157 const char *name,
1158 uint64_t size,
1159 void *ptr)
1160{
2c9b15ca 1161 memory_region_init(mr, owner, name, size);
8ea9252a 1162 mr->ram = true;
14a3c10a 1163 mr->terminates = true;
545e92e0 1164 mr->destructor = memory_region_destructor_ram_from_ptr;
c5705a77 1165 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
093bc2cd
AK
1166}
1167
1168void memory_region_init_alias(MemoryRegion *mr,
2c9b15ca 1169 Object *owner,
093bc2cd
AK
1170 const char *name,
1171 MemoryRegion *orig,
a8170e5e 1172 hwaddr offset,
093bc2cd
AK
1173 uint64_t size)
1174{
2c9b15ca 1175 memory_region_init(mr, owner, name, size);
dfde4e6e
PB
1176 memory_region_ref(orig);
1177 mr->destructor = memory_region_destructor_alias;
093bc2cd
AK
1178 mr->alias = orig;
1179 mr->alias_offset = offset;
1180}
1181
d0a9b5bc 1182void memory_region_init_rom_device(MemoryRegion *mr,
2c9b15ca 1183 Object *owner,
d0a9b5bc 1184 const MemoryRegionOps *ops,
75f5941c 1185 void *opaque,
d0a9b5bc
AK
1186 const char *name,
1187 uint64_t size)
1188{
2c9b15ca 1189 memory_region_init(mr, owner, name, size);
7bc2b9cd 1190 mr->ops = ops;
75f5941c 1191 mr->opaque = opaque;
d0a9b5bc 1192 mr->terminates = true;
75c578dc 1193 mr->rom_device = true;
d0a9b5bc 1194 mr->destructor = memory_region_destructor_rom_device;
c5705a77 1195 mr->ram_addr = qemu_ram_alloc(size, mr);
d0a9b5bc
AK
1196}
1197
30951157 1198void memory_region_init_iommu(MemoryRegion *mr,
2c9b15ca 1199 Object *owner,
30951157
AK
1200 const MemoryRegionIOMMUOps *ops,
1201 const char *name,
1202 uint64_t size)
1203{
2c9b15ca 1204 memory_region_init(mr, owner, name, size);
30951157
AK
1205 mr->iommu_ops = ops,
1206 mr->terminates = true; /* then re-forwards */
06866575 1207 notifier_list_init(&mr->iommu_notify);
30951157
AK
1208}
1209
1660e72d 1210void memory_region_init_reservation(MemoryRegion *mr,
2c9b15ca 1211 Object *owner,
1660e72d
JK
1212 const char *name,
1213 uint64_t size)
1214{
2c9b15ca 1215 memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size);
1660e72d
JK
1216}
1217
b4fefef9 1218static void memory_region_finalize(Object *obj)
093bc2cd 1219{
b4fefef9
PC
1220 MemoryRegion *mr = MEMORY_REGION(obj);
1221
093bc2cd 1222 assert(QTAILQ_EMPTY(&mr->subregions));
2be0e25f 1223 assert(memory_region_transaction_depth == 0);
545e92e0 1224 mr->destructor(mr);
093bc2cd 1225 memory_region_clear_coalescing(mr);
7267c094
AL
1226 g_free((char *)mr->name);
1227 g_free(mr->ioeventfds);
093bc2cd
AK
1228}
1229
b4fefef9
PC
1230void memory_region_destroy(MemoryRegion *mr)
1231{
1232 object_unparent(OBJECT(mr));
1233}
1234
1235
803c0816
PB
1236Object *memory_region_owner(MemoryRegion *mr)
1237{
22a893e4
PB
1238 Object *obj = OBJECT(mr);
1239 return obj->parent;
803c0816
PB
1240}
1241
46637be2
PB
1242void memory_region_ref(MemoryRegion *mr)
1243{
22a893e4
PB
1244 /* MMIO callbacks most likely will access data that belongs
1245 * to the owner, hence the need to ref/unref the owner whenever
1246 * the memory region is in use.
1247 *
1248 * The memory region is a child of its owner. As long as the
1249 * owner doesn't call unparent itself on the memory region,
1250 * ref-ing the owner will also keep the memory region alive.
1251 * Memory regions without an owner are supposed to never go away,
1252 * but we still ref/unref them for debugging purposes.
1253 */
1254 Object *obj = OBJECT(mr);
1255 if (obj && obj->parent) {
1256 object_ref(obj->parent);
b4fefef9 1257 } else {
22a893e4 1258 object_ref(obj);
46637be2
PB
1259 }
1260}
1261
1262void memory_region_unref(MemoryRegion *mr)
1263{
22a893e4
PB
1264 Object *obj = OBJECT(mr);
1265 if (obj && obj->parent) {
1266 object_unref(obj->parent);
b4fefef9 1267 } else {
22a893e4 1268 object_unref(obj);
46637be2
PB
1269 }
1270}
1271
093bc2cd
AK
1272uint64_t memory_region_size(MemoryRegion *mr)
1273{
08dafab4
AK
1274 if (int128_eq(mr->size, int128_2_64())) {
1275 return UINT64_MAX;
1276 }
1277 return int128_get64(mr->size);
093bc2cd
AK
1278}
1279
8991c79b
AK
1280const char *memory_region_name(MemoryRegion *mr)
1281{
1282 return mr->name;
1283}
1284
8ea9252a
AK
1285bool memory_region_is_ram(MemoryRegion *mr)
1286{
1287 return mr->ram;
1288}
1289
55043ba3
AK
1290bool memory_region_is_logging(MemoryRegion *mr)
1291{
1292 return mr->dirty_log_mask;
1293}
1294
ce7923da
AK
1295bool memory_region_is_rom(MemoryRegion *mr)
1296{
1297 return mr->ram && mr->readonly;
1298}
1299
30951157
AK
1300bool memory_region_is_iommu(MemoryRegion *mr)
1301{
1302 return mr->iommu_ops;
1303}
1304
06866575
DG
1305void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1306{
1307 notifier_list_add(&mr->iommu_notify, n);
1308}
1309
1310void memory_region_unregister_iommu_notifier(Notifier *n)
1311{
1312 notifier_remove(n);
1313}
1314
1315void memory_region_notify_iommu(MemoryRegion *mr,
1316 IOMMUTLBEntry entry)
1317{
1318 assert(memory_region_is_iommu(mr));
1319 notifier_list_notify(&mr->iommu_notify, &entry);
1320}
1321
093bc2cd
AK
1322void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1323{
5a583347
AK
1324 uint8_t mask = 1 << client;
1325
59023ef4 1326 memory_region_transaction_begin();
5a583347 1327 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
22bde714 1328 memory_region_update_pending |= mr->enabled;
59023ef4 1329 memory_region_transaction_commit();
093bc2cd
AK
1330}
1331
a8170e5e
AK
1332bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1333 hwaddr size, unsigned client)
093bc2cd 1334{
14a3c10a 1335 assert(mr->terminates);
52159192 1336 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
093bc2cd
AK
1337}
1338
a8170e5e
AK
1339void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1340 hwaddr size)
093bc2cd 1341{
14a3c10a 1342 assert(mr->terminates);
75218e7f 1343 cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size);
093bc2cd
AK
1344}
1345
6c279db8
JQ
1346bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1347 hwaddr size, unsigned client)
1348{
1349 bool ret;
1350 assert(mr->terminates);
52159192 1351 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
6c279db8 1352 if (ret) {
a2f4d5be 1353 cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client);
6c279db8
JQ
1354 }
1355 return ret;
1356}
1357
1358
093bc2cd
AK
1359void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1360{
0d673e36 1361 AddressSpace *as;
5a583347
AK
1362 FlatRange *fr;
1363
0d673e36 1364 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
856d7245 1365 FlatView *view = address_space_get_flatview(as);
99e86347 1366 FOR_EACH_FLAT_RANGE(fr, view) {
0d673e36
AK
1367 if (fr->mr == mr) {
1368 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1369 }
5a583347 1370 }
856d7245 1371 flatview_unref(view);
5a583347 1372 }
093bc2cd
AK
1373}
1374
1375void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1376{
fb1cd6f9 1377 if (mr->readonly != readonly) {
59023ef4 1378 memory_region_transaction_begin();
fb1cd6f9 1379 mr->readonly = readonly;
22bde714 1380 memory_region_update_pending |= mr->enabled;
59023ef4 1381 memory_region_transaction_commit();
fb1cd6f9 1382 }
093bc2cd
AK
1383}
1384
5f9a5ea1 1385void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
d0a9b5bc 1386{
5f9a5ea1 1387 if (mr->romd_mode != romd_mode) {
59023ef4 1388 memory_region_transaction_begin();
5f9a5ea1 1389 mr->romd_mode = romd_mode;
22bde714 1390 memory_region_update_pending |= mr->enabled;
59023ef4 1391 memory_region_transaction_commit();
d0a9b5bc
AK
1392 }
1393}
1394
a8170e5e
AK
1395void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1396 hwaddr size, unsigned client)
093bc2cd 1397{
14a3c10a 1398 assert(mr->terminates);
a2f4d5be 1399 cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client);
093bc2cd
AK
1400}
1401
a35ba7be
PB
1402int memory_region_get_fd(MemoryRegion *mr)
1403{
1404 if (mr->alias) {
1405 return memory_region_get_fd(mr->alias);
1406 }
1407
1408 assert(mr->terminates);
1409
1410 return qemu_get_ram_fd(mr->ram_addr & TARGET_PAGE_MASK);
1411}
1412
093bc2cd
AK
1413void *memory_region_get_ram_ptr(MemoryRegion *mr)
1414{
1415 if (mr->alias) {
1416 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1417 }
1418
14a3c10a 1419 assert(mr->terminates);
093bc2cd 1420
021d26d1 1421 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
093bc2cd
AK
1422}
1423
0d673e36 1424static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
093bc2cd 1425{
99e86347 1426 FlatView *view;
093bc2cd
AK
1427 FlatRange *fr;
1428 CoalescedMemoryRange *cmr;
1429 AddrRange tmp;
95d2994a 1430 MemoryRegionSection section;
093bc2cd 1431
856d7245 1432 view = address_space_get_flatview(as);
99e86347 1433 FOR_EACH_FLAT_RANGE(fr, view) {
093bc2cd 1434 if (fr->mr == mr) {
95d2994a 1435 section = (MemoryRegionSection) {
f6790af6 1436 .address_space = as,
95d2994a 1437 .offset_within_address_space = int128_get64(fr->addr.start),
052e87b0 1438 .size = fr->addr.size,
95d2994a
AK
1439 };
1440
1441 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1442 int128_get64(fr->addr.start),
1443 int128_get64(fr->addr.size));
093bc2cd
AK
1444 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1445 tmp = addrrange_shift(cmr->addr,
08dafab4
AK
1446 int128_sub(fr->addr.start,
1447 int128_make64(fr->offset_in_region)));
093bc2cd
AK
1448 if (!addrrange_intersects(tmp, fr->addr)) {
1449 continue;
1450 }
1451 tmp = addrrange_intersection(tmp, fr->addr);
95d2994a
AK
1452 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1453 int128_get64(tmp.start),
1454 int128_get64(tmp.size));
093bc2cd
AK
1455 }
1456 }
1457 }
856d7245 1458 flatview_unref(view);
093bc2cd
AK
1459}
1460
0d673e36
AK
1461static void memory_region_update_coalesced_range(MemoryRegion *mr)
1462{
1463 AddressSpace *as;
1464
1465 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1466 memory_region_update_coalesced_range_as(mr, as);
1467 }
1468}
1469
093bc2cd
AK
1470void memory_region_set_coalescing(MemoryRegion *mr)
1471{
1472 memory_region_clear_coalescing(mr);
08dafab4 1473 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
093bc2cd
AK
1474}
1475
1476void memory_region_add_coalescing(MemoryRegion *mr,
a8170e5e 1477 hwaddr offset,
093bc2cd
AK
1478 uint64_t size)
1479{
7267c094 1480 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
093bc2cd 1481
08dafab4 1482 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
093bc2cd
AK
1483 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1484 memory_region_update_coalesced_range(mr);
d410515e 1485 memory_region_set_flush_coalesced(mr);
093bc2cd
AK
1486}
1487
1488void memory_region_clear_coalescing(MemoryRegion *mr)
1489{
1490 CoalescedMemoryRange *cmr;
ab5b3db5 1491 bool updated = false;
093bc2cd 1492
d410515e
JK
1493 qemu_flush_coalesced_mmio_buffer();
1494 mr->flush_coalesced_mmio = false;
1495
093bc2cd
AK
1496 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1497 cmr = QTAILQ_FIRST(&mr->coalesced);
1498 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
7267c094 1499 g_free(cmr);
ab5b3db5
FZ
1500 updated = true;
1501 }
1502
1503 if (updated) {
1504 memory_region_update_coalesced_range(mr);
093bc2cd 1505 }
093bc2cd
AK
1506}
1507
d410515e
JK
1508void memory_region_set_flush_coalesced(MemoryRegion *mr)
1509{
1510 mr->flush_coalesced_mmio = true;
1511}
1512
1513void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1514{
1515 qemu_flush_coalesced_mmio_buffer();
1516 if (QTAILQ_EMPTY(&mr->coalesced)) {
1517 mr->flush_coalesced_mmio = false;
1518 }
1519}
1520
3e9d69e7 1521void memory_region_add_eventfd(MemoryRegion *mr,
a8170e5e 1522 hwaddr addr,
3e9d69e7
AK
1523 unsigned size,
1524 bool match_data,
1525 uint64_t data,
753d5e14 1526 EventNotifier *e)
3e9d69e7
AK
1527{
1528 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1529 .addr.start = int128_make64(addr),
1530 .addr.size = int128_make64(size),
3e9d69e7
AK
1531 .match_data = match_data,
1532 .data = data,
753d5e14 1533 .e = e,
3e9d69e7
AK
1534 };
1535 unsigned i;
1536
28f362be 1537 adjust_endianness(mr, &mrfd.data, size);
59023ef4 1538 memory_region_transaction_begin();
3e9d69e7
AK
1539 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1540 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1541 break;
1542 }
1543 }
1544 ++mr->ioeventfd_nb;
7267c094 1545 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7
AK
1546 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1547 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1548 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1549 mr->ioeventfds[i] = mrfd;
4dc56152 1550 ioeventfd_update_pending |= mr->enabled;
59023ef4 1551 memory_region_transaction_commit();
3e9d69e7
AK
1552}
1553
1554void memory_region_del_eventfd(MemoryRegion *mr,
a8170e5e 1555 hwaddr addr,
3e9d69e7
AK
1556 unsigned size,
1557 bool match_data,
1558 uint64_t data,
753d5e14 1559 EventNotifier *e)
3e9d69e7
AK
1560{
1561 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1562 .addr.start = int128_make64(addr),
1563 .addr.size = int128_make64(size),
3e9d69e7
AK
1564 .match_data = match_data,
1565 .data = data,
753d5e14 1566 .e = e,
3e9d69e7
AK
1567 };
1568 unsigned i;
1569
28f362be 1570 adjust_endianness(mr, &mrfd.data, size);
59023ef4 1571 memory_region_transaction_begin();
3e9d69e7
AK
1572 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1573 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1574 break;
1575 }
1576 }
1577 assert(i != mr->ioeventfd_nb);
1578 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1579 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1580 --mr->ioeventfd_nb;
7267c094 1581 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7 1582 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
4dc56152 1583 ioeventfd_update_pending |= mr->enabled;
59023ef4 1584 memory_region_transaction_commit();
3e9d69e7
AK
1585}
1586
feca4ac1 1587static void memory_region_update_container_subregions(MemoryRegion *subregion)
093bc2cd 1588{
0598701a 1589 hwaddr offset = subregion->addr;
feca4ac1 1590 MemoryRegion *mr = subregion->container;
093bc2cd
AK
1591 MemoryRegion *other;
1592
59023ef4
JK
1593 memory_region_transaction_begin();
1594
dfde4e6e 1595 memory_region_ref(subregion);
093bc2cd
AK
1596 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1597 if (subregion->may_overlap || other->may_overlap) {
1598 continue;
1599 }
2c7cfd65 1600 if (int128_ge(int128_make64(offset),
08dafab4
AK
1601 int128_add(int128_make64(other->addr), other->size))
1602 || int128_le(int128_add(int128_make64(offset), subregion->size),
1603 int128_make64(other->addr))) {
093bc2cd
AK
1604 continue;
1605 }
a5e1cbc8 1606#if 0
860329b2
MW
1607 printf("warning: subregion collision %llx/%llx (%s) "
1608 "vs %llx/%llx (%s)\n",
093bc2cd 1609 (unsigned long long)offset,
08dafab4 1610 (unsigned long long)int128_get64(subregion->size),
860329b2
MW
1611 subregion->name,
1612 (unsigned long long)other->addr,
08dafab4 1613 (unsigned long long)int128_get64(other->size),
860329b2 1614 other->name);
a5e1cbc8 1615#endif
093bc2cd
AK
1616 }
1617 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1618 if (subregion->priority >= other->priority) {
1619 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1620 goto done;
1621 }
1622 }
1623 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1624done:
22bde714 1625 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1626 memory_region_transaction_commit();
093bc2cd
AK
1627}
1628
0598701a
PC
1629static void memory_region_add_subregion_common(MemoryRegion *mr,
1630 hwaddr offset,
1631 MemoryRegion *subregion)
1632{
feca4ac1
PB
1633 assert(!subregion->container);
1634 subregion->container = mr;
0598701a 1635 subregion->addr = offset;
feca4ac1 1636 memory_region_update_container_subregions(subregion);
0598701a 1637}
093bc2cd
AK
1638
1639void memory_region_add_subregion(MemoryRegion *mr,
a8170e5e 1640 hwaddr offset,
093bc2cd
AK
1641 MemoryRegion *subregion)
1642{
1643 subregion->may_overlap = false;
1644 subregion->priority = 0;
1645 memory_region_add_subregion_common(mr, offset, subregion);
1646}
1647
1648void memory_region_add_subregion_overlap(MemoryRegion *mr,
a8170e5e 1649 hwaddr offset,
093bc2cd 1650 MemoryRegion *subregion,
a1ff8ae0 1651 int priority)
093bc2cd
AK
1652{
1653 subregion->may_overlap = true;
1654 subregion->priority = priority;
1655 memory_region_add_subregion_common(mr, offset, subregion);
1656}
1657
1658void memory_region_del_subregion(MemoryRegion *mr,
1659 MemoryRegion *subregion)
1660{
59023ef4 1661 memory_region_transaction_begin();
feca4ac1
PB
1662 assert(subregion->container == mr);
1663 subregion->container = NULL;
093bc2cd 1664 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
dfde4e6e 1665 memory_region_unref(subregion);
22bde714 1666 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1667 memory_region_transaction_commit();
6bba19ba
AK
1668}
1669
1670void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1671{
1672 if (enabled == mr->enabled) {
1673 return;
1674 }
59023ef4 1675 memory_region_transaction_begin();
6bba19ba 1676 mr->enabled = enabled;
22bde714 1677 memory_region_update_pending = true;
59023ef4 1678 memory_region_transaction_commit();
093bc2cd 1679}
1c0ffa58 1680
67891b8a 1681static void memory_region_readd_subregion(MemoryRegion *mr)
2282e1af 1682{
feca4ac1 1683 MemoryRegion *container = mr->container;
2282e1af 1684
feca4ac1 1685 if (container) {
67891b8a
PC
1686 memory_region_transaction_begin();
1687 memory_region_ref(mr);
feca4ac1
PB
1688 memory_region_del_subregion(container, mr);
1689 mr->container = container;
1690 memory_region_update_container_subregions(mr);
67891b8a
PC
1691 memory_region_unref(mr);
1692 memory_region_transaction_commit();
2282e1af 1693 }
67891b8a 1694}
2282e1af 1695
67891b8a
PC
1696void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1697{
1698 if (addr != mr->addr) {
1699 mr->addr = addr;
1700 memory_region_readd_subregion(mr);
1701 }
2282e1af
AK
1702}
1703
a8170e5e 1704void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
4703359e 1705{
4703359e 1706 assert(mr->alias);
4703359e 1707
59023ef4 1708 if (offset == mr->alias_offset) {
4703359e
AK
1709 return;
1710 }
1711
59023ef4
JK
1712 memory_region_transaction_begin();
1713 mr->alias_offset = offset;
22bde714 1714 memory_region_update_pending |= mr->enabled;
59023ef4 1715 memory_region_transaction_commit();
4703359e
AK
1716}
1717
e34911c4
AK
1718ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1719{
e34911c4
AK
1720 return mr->ram_addr;
1721}
1722
e2177955
AK
1723static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1724{
1725 const AddrRange *addr = addr_;
1726 const FlatRange *fr = fr_;
1727
1728 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1729 return -1;
1730 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1731 return 1;
1732 }
1733 return 0;
1734}
1735
99e86347 1736static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
e2177955 1737{
99e86347 1738 return bsearch(&addr, view->ranges, view->nr,
e2177955
AK
1739 sizeof(FlatRange), cmp_flatrange_addr);
1740}
1741
feca4ac1 1742bool memory_region_present(MemoryRegion *container, hwaddr addr)
3ce10901 1743{
feca4ac1
PB
1744 MemoryRegion *mr = memory_region_find(container, addr, 1).mr;
1745 if (!mr || (mr == container)) {
3ce10901
PB
1746 return false;
1747 }
dfde4e6e 1748 memory_region_unref(mr);
3ce10901
PB
1749 return true;
1750}
1751
eed2bacf
IM
1752bool memory_region_is_mapped(MemoryRegion *mr)
1753{
1754 return mr->container ? true : false;
1755}
1756
73034e9e 1757MemoryRegionSection memory_region_find(MemoryRegion *mr,
a8170e5e 1758 hwaddr addr, uint64_t size)
e2177955 1759{
052e87b0 1760 MemoryRegionSection ret = { .mr = NULL };
73034e9e
PB
1761 MemoryRegion *root;
1762 AddressSpace *as;
1763 AddrRange range;
99e86347 1764 FlatView *view;
73034e9e
PB
1765 FlatRange *fr;
1766
1767 addr += mr->addr;
feca4ac1
PB
1768 for (root = mr; root->container; ) {
1769 root = root->container;
73034e9e
PB
1770 addr += root->addr;
1771 }
e2177955 1772
73034e9e 1773 as = memory_region_to_address_space(root);
eed2bacf
IM
1774 if (!as) {
1775 return ret;
1776 }
73034e9e 1777 range = addrrange_make(int128_make64(addr), int128_make64(size));
99e86347 1778
856d7245 1779 view = address_space_get_flatview(as);
99e86347 1780 fr = flatview_lookup(view, range);
e2177955 1781 if (!fr) {
6307d974 1782 flatview_unref(view);
e2177955
AK
1783 return ret;
1784 }
1785
99e86347 1786 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
e2177955
AK
1787 --fr;
1788 }
1789
1790 ret.mr = fr->mr;
73034e9e 1791 ret.address_space = as;
e2177955
AK
1792 range = addrrange_intersection(range, fr->addr);
1793 ret.offset_within_region = fr->offset_in_region;
1794 ret.offset_within_region += int128_get64(int128_sub(range.start,
1795 fr->addr.start));
052e87b0 1796 ret.size = range.size;
e2177955 1797 ret.offset_within_address_space = int128_get64(range.start);
7a8499e8 1798 ret.readonly = fr->readonly;
dfde4e6e
PB
1799 memory_region_ref(ret.mr);
1800
856d7245 1801 flatview_unref(view);
e2177955
AK
1802 return ret;
1803}
1804
1d671369 1805void address_space_sync_dirty_bitmap(AddressSpace *as)
86e775c6 1806{
99e86347 1807 FlatView *view;
7664e80c
AK
1808 FlatRange *fr;
1809
856d7245 1810 view = address_space_get_flatview(as);
99e86347 1811 FOR_EACH_FLAT_RANGE(fr, view) {
72e22d2f 1812 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
7664e80c 1813 }
856d7245 1814 flatview_unref(view);
7664e80c
AK
1815}
1816
1817void memory_global_dirty_log_start(void)
1818{
7664e80c 1819 global_dirty_log = true;
7376e582 1820 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
7664e80c
AK
1821}
1822
1823void memory_global_dirty_log_stop(void)
1824{
7664e80c 1825 global_dirty_log = false;
7376e582 1826 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
7664e80c
AK
1827}
1828
1829static void listener_add_address_space(MemoryListener *listener,
1830 AddressSpace *as)
1831{
99e86347 1832 FlatView *view;
7664e80c
AK
1833 FlatRange *fr;
1834
221b3a3f 1835 if (listener->address_space_filter
f6790af6 1836 && listener->address_space_filter != as) {
221b3a3f
JG
1837 return;
1838 }
1839
7664e80c 1840 if (global_dirty_log) {
975aefe0
AK
1841 if (listener->log_global_start) {
1842 listener->log_global_start(listener);
1843 }
7664e80c 1844 }
975aefe0 1845
856d7245 1846 view = address_space_get_flatview(as);
99e86347 1847 FOR_EACH_FLAT_RANGE(fr, view) {
7664e80c
AK
1848 MemoryRegionSection section = {
1849 .mr = fr->mr,
f6790af6 1850 .address_space = as,
7664e80c 1851 .offset_within_region = fr->offset_in_region,
052e87b0 1852 .size = fr->addr.size,
7664e80c 1853 .offset_within_address_space = int128_get64(fr->addr.start),
7a8499e8 1854 .readonly = fr->readonly,
7664e80c 1855 };
975aefe0
AK
1856 if (listener->region_add) {
1857 listener->region_add(listener, &section);
1858 }
7664e80c 1859 }
856d7245 1860 flatview_unref(view);
7664e80c
AK
1861}
1862
f6790af6 1863void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
7664e80c 1864{
72e22d2f 1865 MemoryListener *other = NULL;
0d673e36 1866 AddressSpace *as;
72e22d2f 1867
7376e582 1868 listener->address_space_filter = filter;
72e22d2f
AK
1869 if (QTAILQ_EMPTY(&memory_listeners)
1870 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1871 memory_listeners)->priority) {
1872 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1873 } else {
1874 QTAILQ_FOREACH(other, &memory_listeners, link) {
1875 if (listener->priority < other->priority) {
1876 break;
1877 }
1878 }
1879 QTAILQ_INSERT_BEFORE(other, listener, link);
1880 }
0d673e36
AK
1881
1882 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1883 listener_add_address_space(listener, as);
1884 }
7664e80c
AK
1885}
1886
1887void memory_listener_unregister(MemoryListener *listener)
1888{
72e22d2f 1889 QTAILQ_REMOVE(&memory_listeners, listener, link);
86e775c6 1890}
e2177955 1891
7dca8043 1892void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1c0ffa58 1893{
856d7245
PB
1894 if (QTAILQ_EMPTY(&address_spaces)) {
1895 memory_init();
1896 }
1897
59023ef4 1898 memory_region_transaction_begin();
8786db7c
AK
1899 as->root = root;
1900 as->current_map = g_new(FlatView, 1);
1901 flatview_init(as->current_map);
4c19eb72
AK
1902 as->ioeventfd_nb = 0;
1903 as->ioeventfds = NULL;
0d673e36 1904 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
7dca8043 1905 as->name = g_strdup(name ? name : "anonymous");
ac1970fb 1906 address_space_init_dispatch(as);
f43793c7
PB
1907 memory_region_update_pending |= root->enabled;
1908 memory_region_transaction_commit();
1c0ffa58 1909}
658b2224 1910
83f3c251
AK
1911void address_space_destroy(AddressSpace *as)
1912{
078c44f4
DG
1913 MemoryListener *listener;
1914
83f3c251
AK
1915 /* Flush out anything from MemoryListeners listening in on this */
1916 memory_region_transaction_begin();
1917 as->root = NULL;
1918 memory_region_transaction_commit();
1919 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1920 address_space_destroy_dispatch(as);
078c44f4
DG
1921
1922 QTAILQ_FOREACH(listener, &memory_listeners, link) {
1923 assert(listener->address_space_filter != as);
1924 }
1925
856d7245 1926 flatview_unref(as->current_map);
7dca8043 1927 g_free(as->name);
4c19eb72 1928 g_free(as->ioeventfds);
83f3c251
AK
1929}
1930
791af8c8 1931bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size)
acbbec5d 1932{
791af8c8 1933 return memory_region_dispatch_read(mr, addr, pval, size);
acbbec5d
AK
1934}
1935
791af8c8 1936bool io_mem_write(MemoryRegion *mr, hwaddr addr,
acbbec5d
AK
1937 uint64_t val, unsigned size)
1938{
791af8c8 1939 return memory_region_dispatch_write(mr, addr, val, size);
acbbec5d
AK
1940}
1941
314e2987
BS
1942typedef struct MemoryRegionList MemoryRegionList;
1943
1944struct MemoryRegionList {
1945 const MemoryRegion *mr;
1946 bool printed;
1947 QTAILQ_ENTRY(MemoryRegionList) queue;
1948};
1949
1950typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1951
1952static void mtree_print_mr(fprintf_function mon_printf, void *f,
1953 const MemoryRegion *mr, unsigned int level,
a8170e5e 1954 hwaddr base,
9479c57a 1955 MemoryRegionListHead *alias_print_queue)
314e2987 1956{
9479c57a
JK
1957 MemoryRegionList *new_ml, *ml, *next_ml;
1958 MemoryRegionListHead submr_print_queue;
314e2987
BS
1959 const MemoryRegion *submr;
1960 unsigned int i;
1961
7ea692b2 1962 if (!mr || !mr->enabled) {
314e2987
BS
1963 return;
1964 }
1965
1966 for (i = 0; i < level; i++) {
1967 mon_printf(f, " ");
1968 }
1969
1970 if (mr->alias) {
1971 MemoryRegionList *ml;
1972 bool found = false;
1973
1974 /* check if the alias is already in the queue */
9479c57a 1975 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
314e2987
BS
1976 if (ml->mr == mr->alias && !ml->printed) {
1977 found = true;
1978 }
1979 }
1980
1981 if (!found) {
1982 ml = g_new(MemoryRegionList, 1);
1983 ml->mr = mr->alias;
1984 ml->printed = false;
9479c57a 1985 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
314e2987 1986 }
4896d74b
JK
1987 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1988 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1989 "-" TARGET_FMT_plx "\n",
314e2987 1990 base + mr->addr,
08dafab4 1991 base + mr->addr
fd1d9926
AW
1992 + (int128_nz(mr->size) ?
1993 (hwaddr)int128_get64(int128_sub(mr->size,
1994 int128_one())) : 0),
4b474ba7 1995 mr->priority,
5f9a5ea1
JK
1996 mr->romd_mode ? 'R' : '-',
1997 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1998 : '-',
314e2987
BS
1999 mr->name,
2000 mr->alias->name,
2001 mr->alias_offset,
08dafab4 2002 mr->alias_offset
a66670c7
AK
2003 + (int128_nz(mr->size) ?
2004 (hwaddr)int128_get64(int128_sub(mr->size,
2005 int128_one())) : 0));
314e2987 2006 } else {
4896d74b
JK
2007 mon_printf(f,
2008 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
314e2987 2009 base + mr->addr,
08dafab4 2010 base + mr->addr
fd1d9926
AW
2011 + (int128_nz(mr->size) ?
2012 (hwaddr)int128_get64(int128_sub(mr->size,
2013 int128_one())) : 0),
4b474ba7 2014 mr->priority,
5f9a5ea1
JK
2015 mr->romd_mode ? 'R' : '-',
2016 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2017 : '-',
314e2987
BS
2018 mr->name);
2019 }
9479c57a
JK
2020
2021 QTAILQ_INIT(&submr_print_queue);
2022
314e2987 2023 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
9479c57a
JK
2024 new_ml = g_new(MemoryRegionList, 1);
2025 new_ml->mr = submr;
2026 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2027 if (new_ml->mr->addr < ml->mr->addr ||
2028 (new_ml->mr->addr == ml->mr->addr &&
2029 new_ml->mr->priority > ml->mr->priority)) {
2030 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2031 new_ml = NULL;
2032 break;
2033 }
2034 }
2035 if (new_ml) {
2036 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2037 }
2038 }
2039
2040 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2041 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2042 alias_print_queue);
2043 }
2044
88365e47 2045 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
9479c57a 2046 g_free(ml);
314e2987
BS
2047 }
2048}
2049
2050void mtree_info(fprintf_function mon_printf, void *f)
2051{
2052 MemoryRegionListHead ml_head;
2053 MemoryRegionList *ml, *ml2;
0d673e36 2054 AddressSpace *as;
314e2987
BS
2055
2056 QTAILQ_INIT(&ml_head);
2057
0d673e36 2058 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
0d673e36
AK
2059 mon_printf(f, "%s\n", as->name);
2060 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
b9f9be88
BS
2061 }
2062
2063 mon_printf(f, "aliases\n");
314e2987
BS
2064 /* print aliased regions */
2065 QTAILQ_FOREACH(ml, &ml_head, queue) {
2066 if (!ml->printed) {
2067 mon_printf(f, "%s\n", ml->mr->name);
2068 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
2069 }
2070 }
2071
2072 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
88365e47 2073 g_free(ml);
314e2987 2074 }
314e2987 2075}
b4fefef9
PC
2076
2077static const TypeInfo memory_region_info = {
2078 .parent = TYPE_OBJECT,
2079 .name = TYPE_MEMORY_REGION,
2080 .instance_size = sizeof(MemoryRegion),
2081 .instance_init = memory_region_initfn,
2082 .instance_finalize = memory_region_finalize,
2083};
2084
2085static void memory_register_types(void)
2086{
2087 type_register_static(&memory_region_info);
2088}
2089
2090type_init(memory_register_types)