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Commit | Line | Data |
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093bc2cd AK |
1 | /* |
2 | * Physical memory management | |
3 | * | |
4 | * Copyright 2011 Red Hat, Inc. and/or its affiliates | |
5 | * | |
6 | * Authors: | |
7 | * Avi Kivity <avi@redhat.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
10 | * the COPYING file in the top-level directory. | |
11 | * | |
6b620ca3 PB |
12 | * Contributions after 2012-01-13 are licensed under the terms of the |
13 | * GNU GPL, version 2 or (at your option) any later version. | |
093bc2cd AK |
14 | */ |
15 | ||
16 | #include "memory.h" | |
1c0ffa58 | 17 | #include "exec-memory.h" |
658b2224 | 18 | #include "ioport.h" |
74901c3b | 19 | #include "bitops.h" |
3e9d69e7 | 20 | #include "kvm.h" |
093bc2cd AK |
21 | #include <assert.h> |
22 | ||
67d95c15 AK |
23 | #define WANT_EXEC_OBSOLETE |
24 | #include "exec-obsolete.h" | |
25 | ||
4ef4db86 | 26 | unsigned memory_region_transaction_depth = 0; |
e87c099f | 27 | static bool memory_region_update_pending = false; |
7664e80c AK |
28 | static bool global_dirty_log = false; |
29 | ||
72e22d2f AK |
30 | static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners |
31 | = QTAILQ_HEAD_INITIALIZER(memory_listeners); | |
4ef4db86 | 32 | |
093bc2cd AK |
33 | typedef struct AddrRange AddrRange; |
34 | ||
8417cebf AK |
35 | /* |
36 | * Note using signed integers limits us to physical addresses at most | |
37 | * 63 bits wide. They are needed for negative offsetting in aliases | |
38 | * (large MemoryRegion::alias_offset). | |
39 | */ | |
093bc2cd | 40 | struct AddrRange { |
08dafab4 AK |
41 | Int128 start; |
42 | Int128 size; | |
093bc2cd AK |
43 | }; |
44 | ||
08dafab4 | 45 | static AddrRange addrrange_make(Int128 start, Int128 size) |
093bc2cd AK |
46 | { |
47 | return (AddrRange) { start, size }; | |
48 | } | |
49 | ||
50 | static bool addrrange_equal(AddrRange r1, AddrRange r2) | |
51 | { | |
08dafab4 | 52 | return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size); |
093bc2cd AK |
53 | } |
54 | ||
08dafab4 | 55 | static Int128 addrrange_end(AddrRange r) |
093bc2cd | 56 | { |
08dafab4 | 57 | return int128_add(r.start, r.size); |
093bc2cd AK |
58 | } |
59 | ||
08dafab4 | 60 | static AddrRange addrrange_shift(AddrRange range, Int128 delta) |
093bc2cd | 61 | { |
08dafab4 | 62 | int128_addto(&range.start, delta); |
093bc2cd AK |
63 | return range; |
64 | } | |
65 | ||
08dafab4 AK |
66 | static bool addrrange_contains(AddrRange range, Int128 addr) |
67 | { | |
68 | return int128_ge(addr, range.start) | |
69 | && int128_lt(addr, addrrange_end(range)); | |
70 | } | |
71 | ||
093bc2cd AK |
72 | static bool addrrange_intersects(AddrRange r1, AddrRange r2) |
73 | { | |
08dafab4 AK |
74 | return addrrange_contains(r1, r2.start) |
75 | || addrrange_contains(r2, r1.start); | |
093bc2cd AK |
76 | } |
77 | ||
78 | static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2) | |
79 | { | |
08dafab4 AK |
80 | Int128 start = int128_max(r1.start, r2.start); |
81 | Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2)); | |
82 | return addrrange_make(start, int128_sub(end, start)); | |
093bc2cd AK |
83 | } |
84 | ||
0e0d36b4 AK |
85 | enum ListenerDirection { Forward, Reverse }; |
86 | ||
87 | #define MEMORY_LISTENER_CALL(_callback, _direction, _args...) \ | |
88 | do { \ | |
89 | MemoryListener *_listener; \ | |
90 | \ | |
91 | switch (_direction) { \ | |
92 | case Forward: \ | |
93 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
94 | _listener->_callback(_listener, ##_args); \ | |
95 | } \ | |
96 | break; \ | |
97 | case Reverse: \ | |
98 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
99 | memory_listeners, link) { \ | |
100 | _listener->_callback(_listener, ##_args); \ | |
101 | } \ | |
102 | break; \ | |
103 | default: \ | |
104 | abort(); \ | |
105 | } \ | |
106 | } while (0) | |
107 | ||
108 | #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \ | |
109 | MEMORY_LISTENER_CALL(callback, dir, &(MemoryRegionSection) { \ | |
110 | .mr = (fr)->mr, \ | |
111 | .address_space = (as)->root, \ | |
112 | .offset_within_region = (fr)->offset_in_region, \ | |
113 | .size = int128_get64((fr)->addr.size), \ | |
114 | .offset_within_address_space = int128_get64((fr)->addr.start), \ | |
7a8499e8 | 115 | .readonly = (fr)->readonly, \ |
0e0d36b4 AK |
116 | }) |
117 | ||
093bc2cd AK |
118 | struct CoalescedMemoryRange { |
119 | AddrRange addr; | |
120 | QTAILQ_ENTRY(CoalescedMemoryRange) link; | |
121 | }; | |
122 | ||
3e9d69e7 AK |
123 | struct MemoryRegionIoeventfd { |
124 | AddrRange addr; | |
125 | bool match_data; | |
126 | uint64_t data; | |
127 | int fd; | |
128 | }; | |
129 | ||
130 | static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a, | |
131 | MemoryRegionIoeventfd b) | |
132 | { | |
08dafab4 | 133 | if (int128_lt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 134 | return true; |
08dafab4 | 135 | } else if (int128_gt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 136 | return false; |
08dafab4 | 137 | } else if (int128_lt(a.addr.size, b.addr.size)) { |
3e9d69e7 | 138 | return true; |
08dafab4 | 139 | } else if (int128_gt(a.addr.size, b.addr.size)) { |
3e9d69e7 AK |
140 | return false; |
141 | } else if (a.match_data < b.match_data) { | |
142 | return true; | |
143 | } else if (a.match_data > b.match_data) { | |
144 | return false; | |
145 | } else if (a.match_data) { | |
146 | if (a.data < b.data) { | |
147 | return true; | |
148 | } else if (a.data > b.data) { | |
149 | return false; | |
150 | } | |
151 | } | |
152 | if (a.fd < b.fd) { | |
153 | return true; | |
154 | } else if (a.fd > b.fd) { | |
155 | return false; | |
156 | } | |
157 | return false; | |
158 | } | |
159 | ||
160 | static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a, | |
161 | MemoryRegionIoeventfd b) | |
162 | { | |
163 | return !memory_region_ioeventfd_before(a, b) | |
164 | && !memory_region_ioeventfd_before(b, a); | |
165 | } | |
166 | ||
093bc2cd AK |
167 | typedef struct FlatRange FlatRange; |
168 | typedef struct FlatView FlatView; | |
169 | ||
170 | /* Range of memory in the global map. Addresses are absolute. */ | |
171 | struct FlatRange { | |
172 | MemoryRegion *mr; | |
173 | target_phys_addr_t offset_in_region; | |
174 | AddrRange addr; | |
5a583347 | 175 | uint8_t dirty_log_mask; |
d0a9b5bc | 176 | bool readable; |
fb1cd6f9 | 177 | bool readonly; |
093bc2cd AK |
178 | }; |
179 | ||
180 | /* Flattened global view of current active memory hierarchy. Kept in sorted | |
181 | * order. | |
182 | */ | |
183 | struct FlatView { | |
184 | FlatRange *ranges; | |
185 | unsigned nr; | |
186 | unsigned nr_allocated; | |
187 | }; | |
188 | ||
cc31e6e7 AK |
189 | typedef struct AddressSpace AddressSpace; |
190 | typedef struct AddressSpaceOps AddressSpaceOps; | |
191 | ||
192 | /* A system address space - I/O, memory, etc. */ | |
193 | struct AddressSpace { | |
194 | const AddressSpaceOps *ops; | |
195 | MemoryRegion *root; | |
196 | FlatView current_map; | |
3e9d69e7 AK |
197 | int ioeventfd_nb; |
198 | MemoryRegionIoeventfd *ioeventfds; | |
cc31e6e7 AK |
199 | }; |
200 | ||
201 | struct AddressSpaceOps { | |
202 | void (*range_add)(AddressSpace *as, FlatRange *fr); | |
203 | void (*range_del)(AddressSpace *as, FlatRange *fr); | |
204 | void (*log_start)(AddressSpace *as, FlatRange *fr); | |
205 | void (*log_stop)(AddressSpace *as, FlatRange *fr); | |
206 | }; | |
207 | ||
093bc2cd AK |
208 | #define FOR_EACH_FLAT_RANGE(var, view) \ |
209 | for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var) | |
210 | ||
093bc2cd AK |
211 | static bool flatrange_equal(FlatRange *a, FlatRange *b) |
212 | { | |
213 | return a->mr == b->mr | |
214 | && addrrange_equal(a->addr, b->addr) | |
d0a9b5bc | 215 | && a->offset_in_region == b->offset_in_region |
fb1cd6f9 AK |
216 | && a->readable == b->readable |
217 | && a->readonly == b->readonly; | |
093bc2cd AK |
218 | } |
219 | ||
220 | static void flatview_init(FlatView *view) | |
221 | { | |
222 | view->ranges = NULL; | |
223 | view->nr = 0; | |
224 | view->nr_allocated = 0; | |
225 | } | |
226 | ||
227 | /* Insert a range into a given position. Caller is responsible for maintaining | |
228 | * sorting order. | |
229 | */ | |
230 | static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range) | |
231 | { | |
232 | if (view->nr == view->nr_allocated) { | |
233 | view->nr_allocated = MAX(2 * view->nr, 10); | |
7267c094 | 234 | view->ranges = g_realloc(view->ranges, |
093bc2cd AK |
235 | view->nr_allocated * sizeof(*view->ranges)); |
236 | } | |
237 | memmove(view->ranges + pos + 1, view->ranges + pos, | |
238 | (view->nr - pos) * sizeof(FlatRange)); | |
239 | view->ranges[pos] = *range; | |
240 | ++view->nr; | |
241 | } | |
242 | ||
243 | static void flatview_destroy(FlatView *view) | |
244 | { | |
7267c094 | 245 | g_free(view->ranges); |
093bc2cd AK |
246 | } |
247 | ||
3d8e6bf9 AK |
248 | static bool can_merge(FlatRange *r1, FlatRange *r2) |
249 | { | |
08dafab4 | 250 | return int128_eq(addrrange_end(r1->addr), r2->addr.start) |
3d8e6bf9 | 251 | && r1->mr == r2->mr |
08dafab4 AK |
252 | && int128_eq(int128_add(int128_make64(r1->offset_in_region), |
253 | r1->addr.size), | |
254 | int128_make64(r2->offset_in_region)) | |
d0a9b5bc | 255 | && r1->dirty_log_mask == r2->dirty_log_mask |
fb1cd6f9 AK |
256 | && r1->readable == r2->readable |
257 | && r1->readonly == r2->readonly; | |
3d8e6bf9 AK |
258 | } |
259 | ||
260 | /* Attempt to simplify a view by merging ajacent ranges */ | |
261 | static void flatview_simplify(FlatView *view) | |
262 | { | |
263 | unsigned i, j; | |
264 | ||
265 | i = 0; | |
266 | while (i < view->nr) { | |
267 | j = i + 1; | |
268 | while (j < view->nr | |
269 | && can_merge(&view->ranges[j-1], &view->ranges[j])) { | |
08dafab4 | 270 | int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size); |
3d8e6bf9 AK |
271 | ++j; |
272 | } | |
273 | ++i; | |
274 | memmove(&view->ranges[i], &view->ranges[j], | |
275 | (view->nr - j) * sizeof(view->ranges[j])); | |
276 | view->nr -= j - i; | |
277 | } | |
278 | } | |
279 | ||
164a4dcd AK |
280 | static void memory_region_read_accessor(void *opaque, |
281 | target_phys_addr_t addr, | |
282 | uint64_t *value, | |
283 | unsigned size, | |
284 | unsigned shift, | |
285 | uint64_t mask) | |
286 | { | |
287 | MemoryRegion *mr = opaque; | |
288 | uint64_t tmp; | |
289 | ||
290 | tmp = mr->ops->read(mr->opaque, addr, size); | |
291 | *value |= (tmp & mask) << shift; | |
292 | } | |
293 | ||
294 | static void memory_region_write_accessor(void *opaque, | |
295 | target_phys_addr_t addr, | |
296 | uint64_t *value, | |
297 | unsigned size, | |
298 | unsigned shift, | |
299 | uint64_t mask) | |
300 | { | |
301 | MemoryRegion *mr = opaque; | |
302 | uint64_t tmp; | |
303 | ||
304 | tmp = (*value >> shift) & mask; | |
305 | mr->ops->write(mr->opaque, addr, tmp, size); | |
306 | } | |
307 | ||
308 | static void access_with_adjusted_size(target_phys_addr_t addr, | |
309 | uint64_t *value, | |
310 | unsigned size, | |
311 | unsigned access_size_min, | |
312 | unsigned access_size_max, | |
313 | void (*access)(void *opaque, | |
314 | target_phys_addr_t addr, | |
315 | uint64_t *value, | |
316 | unsigned size, | |
317 | unsigned shift, | |
318 | uint64_t mask), | |
319 | void *opaque) | |
320 | { | |
321 | uint64_t access_mask; | |
322 | unsigned access_size; | |
323 | unsigned i; | |
324 | ||
325 | if (!access_size_min) { | |
326 | access_size_min = 1; | |
327 | } | |
328 | if (!access_size_max) { | |
329 | access_size_max = 4; | |
330 | } | |
331 | access_size = MAX(MIN(size, access_size_max), access_size_min); | |
332 | access_mask = -1ULL >> (64 - access_size * 8); | |
333 | for (i = 0; i < size; i += access_size) { | |
334 | /* FIXME: big-endian support */ | |
335 | access(opaque, addr + i, value, access_size, i * 8, access_mask); | |
336 | } | |
337 | } | |
338 | ||
cc31e6e7 AK |
339 | static void as_memory_range_add(AddressSpace *as, FlatRange *fr) |
340 | { | |
dd81124b AK |
341 | MemoryRegionSection section = { |
342 | .mr = fr->mr, | |
343 | .offset_within_address_space = int128_get64(fr->addr.start), | |
344 | .offset_within_region = fr->offset_in_region, | |
345 | .size = int128_get64(fr->addr.size), | |
7a8499e8 | 346 | .readonly = fr->readonly, |
dd81124b AK |
347 | }; |
348 | ||
d7ec83e6 | 349 | cpu_register_physical_memory_log(§ion, fr->readonly); |
cc31e6e7 AK |
350 | } |
351 | ||
352 | static void as_memory_range_del(AddressSpace *as, FlatRange *fr) | |
353 | { | |
dd81124b AK |
354 | MemoryRegionSection section = { |
355 | .mr = &io_mem_unassigned, | |
356 | .offset_within_address_space = int128_get64(fr->addr.start), | |
357 | .offset_within_region = int128_get64(fr->addr.start), | |
358 | .size = int128_get64(fr->addr.size), | |
7a8499e8 | 359 | .readonly = fr->readonly, |
dd81124b AK |
360 | }; |
361 | ||
d7ec83e6 | 362 | cpu_register_physical_memory_log(§ion, false); |
cc31e6e7 AK |
363 | } |
364 | ||
365 | static void as_memory_log_start(AddressSpace *as, FlatRange *fr) | |
366 | { | |
cc31e6e7 AK |
367 | } |
368 | ||
369 | static void as_memory_log_stop(AddressSpace *as, FlatRange *fr) | |
370 | { | |
cc31e6e7 AK |
371 | } |
372 | ||
373 | static const AddressSpaceOps address_space_ops_memory = { | |
374 | .range_add = as_memory_range_add, | |
375 | .range_del = as_memory_range_del, | |
376 | .log_start = as_memory_log_start, | |
377 | .log_stop = as_memory_log_stop, | |
378 | }; | |
379 | ||
380 | static AddressSpace address_space_memory = { | |
381 | .ops = &address_space_ops_memory, | |
382 | }; | |
383 | ||
627a0e90 AK |
384 | static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset, |
385 | unsigned width, bool write) | |
386 | { | |
387 | const MemoryRegionPortio *mrp; | |
388 | ||
389 | for (mrp = mr->ops->old_portio; mrp->size; ++mrp) { | |
390 | if (offset >= mrp->offset && offset < mrp->offset + mrp->len | |
391 | && width == mrp->size | |
392 | && (write ? (bool)mrp->write : (bool)mrp->read)) { | |
393 | return mrp; | |
394 | } | |
395 | } | |
396 | return NULL; | |
397 | } | |
398 | ||
658b2224 AK |
399 | static void memory_region_iorange_read(IORange *iorange, |
400 | uint64_t offset, | |
401 | unsigned width, | |
402 | uint64_t *data) | |
403 | { | |
404 | MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange); | |
405 | ||
627a0e90 AK |
406 | if (mr->ops->old_portio) { |
407 | const MemoryRegionPortio *mrp = find_portio(mr, offset, width, false); | |
408 | ||
409 | *data = ((uint64_t)1 << (width * 8)) - 1; | |
410 | if (mrp) { | |
2b50aa1f | 411 | *data = mrp->read(mr->opaque, offset); |
03808f58 JK |
412 | } else if (width == 2) { |
413 | mrp = find_portio(mr, offset, 1, false); | |
414 | assert(mrp); | |
2b50aa1f AK |
415 | *data = mrp->read(mr->opaque, offset) | |
416 | (mrp->read(mr->opaque, offset + 1) << 8); | |
627a0e90 AK |
417 | } |
418 | return; | |
419 | } | |
3a130f4e | 420 | *data = 0; |
2b50aa1f | 421 | access_with_adjusted_size(offset, data, width, |
3a130f4e AK |
422 | mr->ops->impl.min_access_size, |
423 | mr->ops->impl.max_access_size, | |
424 | memory_region_read_accessor, mr); | |
658b2224 AK |
425 | } |
426 | ||
427 | static void memory_region_iorange_write(IORange *iorange, | |
428 | uint64_t offset, | |
429 | unsigned width, | |
430 | uint64_t data) | |
431 | { | |
432 | MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange); | |
433 | ||
627a0e90 AK |
434 | if (mr->ops->old_portio) { |
435 | const MemoryRegionPortio *mrp = find_portio(mr, offset, width, true); | |
436 | ||
437 | if (mrp) { | |
2b50aa1f | 438 | mrp->write(mr->opaque, offset, data); |
03808f58 JK |
439 | } else if (width == 2) { |
440 | mrp = find_portio(mr, offset, 1, false); | |
441 | assert(mrp); | |
2b50aa1f AK |
442 | mrp->write(mr->opaque, offset, data & 0xff); |
443 | mrp->write(mr->opaque, offset + 1, data >> 8); | |
627a0e90 AK |
444 | } |
445 | return; | |
446 | } | |
2b50aa1f | 447 | access_with_adjusted_size(offset, &data, width, |
3a130f4e AK |
448 | mr->ops->impl.min_access_size, |
449 | mr->ops->impl.max_access_size, | |
450 | memory_region_write_accessor, mr); | |
658b2224 AK |
451 | } |
452 | ||
453 | static const IORangeOps memory_region_iorange_ops = { | |
454 | .read = memory_region_iorange_read, | |
455 | .write = memory_region_iorange_write, | |
456 | }; | |
457 | ||
458 | static void as_io_range_add(AddressSpace *as, FlatRange *fr) | |
459 | { | |
460 | iorange_init(&fr->mr->iorange, &memory_region_iorange_ops, | |
08dafab4 | 461 | int128_get64(fr->addr.start), int128_get64(fr->addr.size)); |
658b2224 AK |
462 | ioport_register(&fr->mr->iorange); |
463 | } | |
464 | ||
465 | static void as_io_range_del(AddressSpace *as, FlatRange *fr) | |
466 | { | |
08dafab4 AK |
467 | isa_unassign_ioport(int128_get64(fr->addr.start), |
468 | int128_get64(fr->addr.size)); | |
658b2224 AK |
469 | } |
470 | ||
471 | static const AddressSpaceOps address_space_ops_io = { | |
472 | .range_add = as_io_range_add, | |
473 | .range_del = as_io_range_del, | |
474 | }; | |
475 | ||
476 | static AddressSpace address_space_io = { | |
477 | .ops = &address_space_ops_io, | |
478 | }; | |
479 | ||
e2177955 AK |
480 | static AddressSpace *memory_region_to_address_space(MemoryRegion *mr) |
481 | { | |
482 | while (mr->parent) { | |
483 | mr = mr->parent; | |
484 | } | |
485 | if (mr == address_space_memory.root) { | |
486 | return &address_space_memory; | |
487 | } | |
488 | if (mr == address_space_io.root) { | |
489 | return &address_space_io; | |
490 | } | |
491 | abort(); | |
492 | } | |
493 | ||
093bc2cd AK |
494 | /* Render a memory region into the global view. Ranges in @view obscure |
495 | * ranges in @mr. | |
496 | */ | |
497 | static void render_memory_region(FlatView *view, | |
498 | MemoryRegion *mr, | |
08dafab4 | 499 | Int128 base, |
fb1cd6f9 AK |
500 | AddrRange clip, |
501 | bool readonly) | |
093bc2cd AK |
502 | { |
503 | MemoryRegion *subregion; | |
504 | unsigned i; | |
505 | target_phys_addr_t offset_in_region; | |
08dafab4 AK |
506 | Int128 remain; |
507 | Int128 now; | |
093bc2cd AK |
508 | FlatRange fr; |
509 | AddrRange tmp; | |
510 | ||
6bba19ba AK |
511 | if (!mr->enabled) { |
512 | return; | |
513 | } | |
514 | ||
08dafab4 | 515 | int128_addto(&base, int128_make64(mr->addr)); |
fb1cd6f9 | 516 | readonly |= mr->readonly; |
093bc2cd AK |
517 | |
518 | tmp = addrrange_make(base, mr->size); | |
519 | ||
520 | if (!addrrange_intersects(tmp, clip)) { | |
521 | return; | |
522 | } | |
523 | ||
524 | clip = addrrange_intersection(tmp, clip); | |
525 | ||
526 | if (mr->alias) { | |
08dafab4 AK |
527 | int128_subfrom(&base, int128_make64(mr->alias->addr)); |
528 | int128_subfrom(&base, int128_make64(mr->alias_offset)); | |
fb1cd6f9 | 529 | render_memory_region(view, mr->alias, base, clip, readonly); |
093bc2cd AK |
530 | return; |
531 | } | |
532 | ||
533 | /* Render subregions in priority order. */ | |
534 | QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) { | |
fb1cd6f9 | 535 | render_memory_region(view, subregion, base, clip, readonly); |
093bc2cd AK |
536 | } |
537 | ||
14a3c10a | 538 | if (!mr->terminates) { |
093bc2cd AK |
539 | return; |
540 | } | |
541 | ||
08dafab4 | 542 | offset_in_region = int128_get64(int128_sub(clip.start, base)); |
093bc2cd AK |
543 | base = clip.start; |
544 | remain = clip.size; | |
545 | ||
546 | /* Render the region itself into any gaps left by the current view. */ | |
08dafab4 AK |
547 | for (i = 0; i < view->nr && int128_nz(remain); ++i) { |
548 | if (int128_ge(base, addrrange_end(view->ranges[i].addr))) { | |
093bc2cd AK |
549 | continue; |
550 | } | |
08dafab4 AK |
551 | if (int128_lt(base, view->ranges[i].addr.start)) { |
552 | now = int128_min(remain, | |
553 | int128_sub(view->ranges[i].addr.start, base)); | |
093bc2cd AK |
554 | fr.mr = mr; |
555 | fr.offset_in_region = offset_in_region; | |
556 | fr.addr = addrrange_make(base, now); | |
5a583347 | 557 | fr.dirty_log_mask = mr->dirty_log_mask; |
d0a9b5bc | 558 | fr.readable = mr->readable; |
fb1cd6f9 | 559 | fr.readonly = readonly; |
093bc2cd AK |
560 | flatview_insert(view, i, &fr); |
561 | ++i; | |
08dafab4 AK |
562 | int128_addto(&base, now); |
563 | offset_in_region += int128_get64(now); | |
564 | int128_subfrom(&remain, now); | |
093bc2cd | 565 | } |
08dafab4 AK |
566 | if (int128_eq(base, view->ranges[i].addr.start)) { |
567 | now = int128_min(remain, view->ranges[i].addr.size); | |
568 | int128_addto(&base, now); | |
569 | offset_in_region += int128_get64(now); | |
570 | int128_subfrom(&remain, now); | |
093bc2cd AK |
571 | } |
572 | } | |
08dafab4 | 573 | if (int128_nz(remain)) { |
093bc2cd AK |
574 | fr.mr = mr; |
575 | fr.offset_in_region = offset_in_region; | |
576 | fr.addr = addrrange_make(base, remain); | |
5a583347 | 577 | fr.dirty_log_mask = mr->dirty_log_mask; |
d0a9b5bc | 578 | fr.readable = mr->readable; |
fb1cd6f9 | 579 | fr.readonly = readonly; |
093bc2cd AK |
580 | flatview_insert(view, i, &fr); |
581 | } | |
582 | } | |
583 | ||
584 | /* Render a memory topology into a list of disjoint absolute ranges. */ | |
585 | static FlatView generate_memory_topology(MemoryRegion *mr) | |
586 | { | |
587 | FlatView view; | |
588 | ||
589 | flatview_init(&view); | |
590 | ||
08dafab4 AK |
591 | render_memory_region(&view, mr, int128_zero(), |
592 | addrrange_make(int128_zero(), int128_2_64()), false); | |
3d8e6bf9 | 593 | flatview_simplify(&view); |
093bc2cd AK |
594 | |
595 | return view; | |
596 | } | |
597 | ||
3e9d69e7 AK |
598 | static void address_space_add_del_ioeventfds(AddressSpace *as, |
599 | MemoryRegionIoeventfd *fds_new, | |
600 | unsigned fds_new_nb, | |
601 | MemoryRegionIoeventfd *fds_old, | |
602 | unsigned fds_old_nb) | |
603 | { | |
604 | unsigned iold, inew; | |
80a1ea37 AK |
605 | MemoryRegionIoeventfd *fd; |
606 | MemoryRegionSection section; | |
3e9d69e7 AK |
607 | |
608 | /* Generate a symmetric difference of the old and new fd sets, adding | |
609 | * and deleting as necessary. | |
610 | */ | |
611 | ||
612 | iold = inew = 0; | |
613 | while (iold < fds_old_nb || inew < fds_new_nb) { | |
614 | if (iold < fds_old_nb | |
615 | && (inew == fds_new_nb | |
616 | || memory_region_ioeventfd_before(fds_old[iold], | |
617 | fds_new[inew]))) { | |
80a1ea37 AK |
618 | fd = &fds_old[iold]; |
619 | section = (MemoryRegionSection) { | |
620 | .address_space = as->root, | |
621 | .offset_within_address_space = int128_get64(fd->addr.start), | |
622 | .size = int128_get64(fd->addr.size), | |
623 | }; | |
624 | MEMORY_LISTENER_CALL(eventfd_del, Forward, §ion, | |
625 | fd->match_data, fd->data, fd->fd); | |
3e9d69e7 AK |
626 | ++iold; |
627 | } else if (inew < fds_new_nb | |
628 | && (iold == fds_old_nb | |
629 | || memory_region_ioeventfd_before(fds_new[inew], | |
630 | fds_old[iold]))) { | |
80a1ea37 AK |
631 | fd = &fds_new[inew]; |
632 | section = (MemoryRegionSection) { | |
633 | .address_space = as->root, | |
634 | .offset_within_address_space = int128_get64(fd->addr.start), | |
635 | .size = int128_get64(fd->addr.size), | |
636 | }; | |
637 | MEMORY_LISTENER_CALL(eventfd_add, Reverse, §ion, | |
638 | fd->match_data, fd->data, fd->fd); | |
3e9d69e7 AK |
639 | ++inew; |
640 | } else { | |
641 | ++iold; | |
642 | ++inew; | |
643 | } | |
644 | } | |
645 | } | |
646 | ||
647 | static void address_space_update_ioeventfds(AddressSpace *as) | |
648 | { | |
649 | FlatRange *fr; | |
650 | unsigned ioeventfd_nb = 0; | |
651 | MemoryRegionIoeventfd *ioeventfds = NULL; | |
652 | AddrRange tmp; | |
653 | unsigned i; | |
654 | ||
655 | FOR_EACH_FLAT_RANGE(fr, &as->current_map) { | |
656 | for (i = 0; i < fr->mr->ioeventfd_nb; ++i) { | |
657 | tmp = addrrange_shift(fr->mr->ioeventfds[i].addr, | |
08dafab4 AK |
658 | int128_sub(fr->addr.start, |
659 | int128_make64(fr->offset_in_region))); | |
3e9d69e7 AK |
660 | if (addrrange_intersects(fr->addr, tmp)) { |
661 | ++ioeventfd_nb; | |
7267c094 | 662 | ioeventfds = g_realloc(ioeventfds, |
3e9d69e7 AK |
663 | ioeventfd_nb * sizeof(*ioeventfds)); |
664 | ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i]; | |
665 | ioeventfds[ioeventfd_nb-1].addr = tmp; | |
666 | } | |
667 | } | |
668 | } | |
669 | ||
670 | address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb, | |
671 | as->ioeventfds, as->ioeventfd_nb); | |
672 | ||
7267c094 | 673 | g_free(as->ioeventfds); |
3e9d69e7 AK |
674 | as->ioeventfds = ioeventfds; |
675 | as->ioeventfd_nb = ioeventfd_nb; | |
676 | } | |
677 | ||
b8af1afb AK |
678 | static void address_space_update_topology_pass(AddressSpace *as, |
679 | FlatView old_view, | |
680 | FlatView new_view, | |
681 | bool adding) | |
093bc2cd | 682 | { |
093bc2cd AK |
683 | unsigned iold, inew; |
684 | FlatRange *frold, *frnew; | |
093bc2cd AK |
685 | |
686 | /* Generate a symmetric difference of the old and new memory maps. | |
687 | * Kill ranges in the old map, and instantiate ranges in the new map. | |
688 | */ | |
689 | iold = inew = 0; | |
690 | while (iold < old_view.nr || inew < new_view.nr) { | |
691 | if (iold < old_view.nr) { | |
692 | frold = &old_view.ranges[iold]; | |
693 | } else { | |
694 | frold = NULL; | |
695 | } | |
696 | if (inew < new_view.nr) { | |
697 | frnew = &new_view.ranges[inew]; | |
698 | } else { | |
699 | frnew = NULL; | |
700 | } | |
701 | ||
702 | if (frold | |
703 | && (!frnew | |
08dafab4 AK |
704 | || int128_lt(frold->addr.start, frnew->addr.start) |
705 | || (int128_eq(frold->addr.start, frnew->addr.start) | |
093bc2cd AK |
706 | && !flatrange_equal(frold, frnew)))) { |
707 | /* In old, but (not in new, or in new but attributes changed). */ | |
708 | ||
b8af1afb | 709 | if (!adding) { |
72e22d2f | 710 | MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del); |
b8af1afb AK |
711 | as->ops->range_del(as, frold); |
712 | } | |
713 | ||
093bc2cd AK |
714 | ++iold; |
715 | } else if (frold && frnew && flatrange_equal(frold, frnew)) { | |
716 | /* In both (logging may have changed) */ | |
717 | ||
b8af1afb AK |
718 | if (adding) { |
719 | if (frold->dirty_log_mask && !frnew->dirty_log_mask) { | |
72e22d2f | 720 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop); |
b8af1afb AK |
721 | as->ops->log_stop(as, frnew); |
722 | } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) { | |
723 | as->ops->log_start(as, frnew); | |
72e22d2f | 724 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start); |
b8af1afb | 725 | } |
5a583347 AK |
726 | } |
727 | ||
093bc2cd AK |
728 | ++iold; |
729 | ++inew; | |
093bc2cd AK |
730 | } else { |
731 | /* In new */ | |
732 | ||
b8af1afb AK |
733 | if (adding) { |
734 | as->ops->range_add(as, frnew); | |
72e22d2f | 735 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add); |
b8af1afb AK |
736 | } |
737 | ||
093bc2cd AK |
738 | ++inew; |
739 | } | |
740 | } | |
b8af1afb AK |
741 | } |
742 | ||
743 | ||
744 | static void address_space_update_topology(AddressSpace *as) | |
745 | { | |
746 | FlatView old_view = as->current_map; | |
747 | FlatView new_view = generate_memory_topology(as->root); | |
748 | ||
749 | address_space_update_topology_pass(as, old_view, new_view, false); | |
750 | address_space_update_topology_pass(as, old_view, new_view, true); | |
751 | ||
cc31e6e7 | 752 | as->current_map = new_view; |
093bc2cd | 753 | flatview_destroy(&old_view); |
3e9d69e7 | 754 | address_space_update_ioeventfds(as); |
093bc2cd AK |
755 | } |
756 | ||
6bba19ba | 757 | static void memory_region_update_topology(MemoryRegion *mr) |
cc31e6e7 | 758 | { |
4ef4db86 | 759 | if (memory_region_transaction_depth) { |
e87c099f | 760 | memory_region_update_pending |= !mr || mr->enabled; |
4ef4db86 AK |
761 | return; |
762 | } | |
763 | ||
6bba19ba AK |
764 | if (mr && !mr->enabled) { |
765 | return; | |
766 | } | |
767 | ||
658b2224 AK |
768 | if (address_space_memory.root) { |
769 | address_space_update_topology(&address_space_memory); | |
770 | } | |
771 | if (address_space_io.root) { | |
772 | address_space_update_topology(&address_space_io); | |
773 | } | |
e87c099f AK |
774 | |
775 | memory_region_update_pending = false; | |
cc31e6e7 AK |
776 | } |
777 | ||
4ef4db86 AK |
778 | void memory_region_transaction_begin(void) |
779 | { | |
780 | ++memory_region_transaction_depth; | |
781 | } | |
782 | ||
783 | void memory_region_transaction_commit(void) | |
784 | { | |
785 | assert(memory_region_transaction_depth); | |
786 | --memory_region_transaction_depth; | |
e87c099f AK |
787 | if (!memory_region_transaction_depth && memory_region_update_pending) { |
788 | memory_region_update_topology(NULL); | |
789 | } | |
4ef4db86 AK |
790 | } |
791 | ||
545e92e0 AK |
792 | static void memory_region_destructor_none(MemoryRegion *mr) |
793 | { | |
794 | } | |
795 | ||
796 | static void memory_region_destructor_ram(MemoryRegion *mr) | |
797 | { | |
798 | qemu_ram_free(mr->ram_addr); | |
799 | } | |
800 | ||
801 | static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr) | |
802 | { | |
803 | qemu_ram_free_from_ptr(mr->ram_addr); | |
804 | } | |
805 | ||
806 | static void memory_region_destructor_iomem(MemoryRegion *mr) | |
807 | { | |
808 | cpu_unregister_io_memory(mr->ram_addr); | |
809 | } | |
810 | ||
d0a9b5bc AK |
811 | static void memory_region_destructor_rom_device(MemoryRegion *mr) |
812 | { | |
813 | qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK); | |
75c578dc | 814 | cpu_unregister_io_memory(mr->ram_addr & ~TARGET_PAGE_MASK); |
d0a9b5bc AK |
815 | } |
816 | ||
be675c97 AK |
817 | static bool memory_region_wrong_endianness(MemoryRegion *mr) |
818 | { | |
2c3579ab | 819 | #ifdef TARGET_WORDS_BIGENDIAN |
be675c97 AK |
820 | return mr->ops->endianness == DEVICE_LITTLE_ENDIAN; |
821 | #else | |
822 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
823 | #endif | |
824 | } | |
825 | ||
093bc2cd AK |
826 | void memory_region_init(MemoryRegion *mr, |
827 | const char *name, | |
828 | uint64_t size) | |
829 | { | |
830 | mr->ops = NULL; | |
831 | mr->parent = NULL; | |
08dafab4 AK |
832 | mr->size = int128_make64(size); |
833 | if (size == UINT64_MAX) { | |
834 | mr->size = int128_2_64(); | |
835 | } | |
093bc2cd | 836 | mr->addr = 0; |
b3b00c78 | 837 | mr->subpage = false; |
6bba19ba | 838 | mr->enabled = true; |
14a3c10a | 839 | mr->terminates = false; |
8ea9252a | 840 | mr->ram = false; |
d0a9b5bc | 841 | mr->readable = true; |
fb1cd6f9 | 842 | mr->readonly = false; |
75c578dc | 843 | mr->rom_device = false; |
545e92e0 | 844 | mr->destructor = memory_region_destructor_none; |
093bc2cd AK |
845 | mr->priority = 0; |
846 | mr->may_overlap = false; | |
847 | mr->alias = NULL; | |
848 | QTAILQ_INIT(&mr->subregions); | |
849 | memset(&mr->subregions_link, 0, sizeof mr->subregions_link); | |
850 | QTAILQ_INIT(&mr->coalesced); | |
7267c094 | 851 | mr->name = g_strdup(name); |
5a583347 | 852 | mr->dirty_log_mask = 0; |
3e9d69e7 AK |
853 | mr->ioeventfd_nb = 0; |
854 | mr->ioeventfds = NULL; | |
093bc2cd AK |
855 | } |
856 | ||
857 | static bool memory_region_access_valid(MemoryRegion *mr, | |
858 | target_phys_addr_t addr, | |
897fa7cf AK |
859 | unsigned size, |
860 | bool is_write) | |
093bc2cd | 861 | { |
897fa7cf AK |
862 | if (mr->ops->valid.accepts |
863 | && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write)) { | |
864 | return false; | |
865 | } | |
866 | ||
093bc2cd AK |
867 | if (!mr->ops->valid.unaligned && (addr & (size - 1))) { |
868 | return false; | |
869 | } | |
870 | ||
871 | /* Treat zero as compatibility all valid */ | |
872 | if (!mr->ops->valid.max_access_size) { | |
873 | return true; | |
874 | } | |
875 | ||
876 | if (size > mr->ops->valid.max_access_size | |
877 | || size < mr->ops->valid.min_access_size) { | |
878 | return false; | |
879 | } | |
880 | return true; | |
881 | } | |
882 | ||
a621f38d AK |
883 | static uint64_t memory_region_dispatch_read1(MemoryRegion *mr, |
884 | target_phys_addr_t addr, | |
885 | unsigned size) | |
093bc2cd | 886 | { |
164a4dcd | 887 | uint64_t data = 0; |
093bc2cd | 888 | |
897fa7cf | 889 | if (!memory_region_access_valid(mr, addr, size, false)) { |
093bc2cd AK |
890 | return -1U; /* FIXME: better signalling */ |
891 | } | |
892 | ||
74901c3b AK |
893 | if (!mr->ops->read) { |
894 | return mr->ops->old_mmio.read[bitops_ffsl(size)](mr->opaque, addr); | |
895 | } | |
896 | ||
093bc2cd | 897 | /* FIXME: support unaligned access */ |
2b50aa1f | 898 | access_with_adjusted_size(addr, &data, size, |
164a4dcd AK |
899 | mr->ops->impl.min_access_size, |
900 | mr->ops->impl.max_access_size, | |
901 | memory_region_read_accessor, mr); | |
093bc2cd AK |
902 | |
903 | return data; | |
904 | } | |
905 | ||
a621f38d | 906 | static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size) |
093bc2cd | 907 | { |
a621f38d AK |
908 | if (memory_region_wrong_endianness(mr)) { |
909 | switch (size) { | |
910 | case 1: | |
911 | break; | |
912 | case 2: | |
913 | *data = bswap16(*data); | |
914 | break; | |
915 | case 4: | |
916 | *data = bswap32(*data); | |
1470a0cd | 917 | break; |
a621f38d AK |
918 | default: |
919 | abort(); | |
920 | } | |
921 | } | |
922 | } | |
923 | ||
924 | static uint64_t memory_region_dispatch_read(MemoryRegion *mr, | |
925 | target_phys_addr_t addr, | |
926 | unsigned size) | |
927 | { | |
928 | uint64_t ret; | |
929 | ||
930 | ret = memory_region_dispatch_read1(mr, addr, size); | |
931 | adjust_endianness(mr, &ret, size); | |
932 | return ret; | |
933 | } | |
093bc2cd | 934 | |
a621f38d AK |
935 | static void memory_region_dispatch_write(MemoryRegion *mr, |
936 | target_phys_addr_t addr, | |
937 | uint64_t data, | |
938 | unsigned size) | |
939 | { | |
897fa7cf | 940 | if (!memory_region_access_valid(mr, addr, size, true)) { |
093bc2cd AK |
941 | return; /* FIXME: better signalling */ |
942 | } | |
943 | ||
a621f38d AK |
944 | adjust_endianness(mr, &data, size); |
945 | ||
74901c3b AK |
946 | if (!mr->ops->write) { |
947 | mr->ops->old_mmio.write[bitops_ffsl(size)](mr->opaque, addr, data); | |
948 | return; | |
949 | } | |
950 | ||
093bc2cd | 951 | /* FIXME: support unaligned access */ |
2b50aa1f | 952 | access_with_adjusted_size(addr, &data, size, |
164a4dcd AK |
953 | mr->ops->impl.min_access_size, |
954 | mr->ops->impl.max_access_size, | |
955 | memory_region_write_accessor, mr); | |
093bc2cd AK |
956 | } |
957 | ||
093bc2cd AK |
958 | void memory_region_init_io(MemoryRegion *mr, |
959 | const MemoryRegionOps *ops, | |
960 | void *opaque, | |
961 | const char *name, | |
962 | uint64_t size) | |
963 | { | |
964 | memory_region_init(mr, name, size); | |
965 | mr->ops = ops; | |
966 | mr->opaque = opaque; | |
14a3c10a | 967 | mr->terminates = true; |
26a83ad0 | 968 | mr->destructor = memory_region_destructor_iomem; |
a621f38d | 969 | mr->ram_addr = cpu_register_io_memory(mr); |
093bc2cd AK |
970 | } |
971 | ||
972 | void memory_region_init_ram(MemoryRegion *mr, | |
093bc2cd AK |
973 | const char *name, |
974 | uint64_t size) | |
975 | { | |
976 | memory_region_init(mr, name, size); | |
8ea9252a | 977 | mr->ram = true; |
14a3c10a | 978 | mr->terminates = true; |
545e92e0 | 979 | mr->destructor = memory_region_destructor_ram; |
c5705a77 | 980 | mr->ram_addr = qemu_ram_alloc(size, mr); |
093bc2cd AK |
981 | } |
982 | ||
983 | void memory_region_init_ram_ptr(MemoryRegion *mr, | |
093bc2cd AK |
984 | const char *name, |
985 | uint64_t size, | |
986 | void *ptr) | |
987 | { | |
988 | memory_region_init(mr, name, size); | |
8ea9252a | 989 | mr->ram = true; |
14a3c10a | 990 | mr->terminates = true; |
545e92e0 | 991 | mr->destructor = memory_region_destructor_ram_from_ptr; |
c5705a77 | 992 | mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr); |
093bc2cd AK |
993 | } |
994 | ||
995 | void memory_region_init_alias(MemoryRegion *mr, | |
996 | const char *name, | |
997 | MemoryRegion *orig, | |
998 | target_phys_addr_t offset, | |
999 | uint64_t size) | |
1000 | { | |
1001 | memory_region_init(mr, name, size); | |
1002 | mr->alias = orig; | |
1003 | mr->alias_offset = offset; | |
1004 | } | |
1005 | ||
d0a9b5bc AK |
1006 | void memory_region_init_rom_device(MemoryRegion *mr, |
1007 | const MemoryRegionOps *ops, | |
75f5941c | 1008 | void *opaque, |
d0a9b5bc AK |
1009 | const char *name, |
1010 | uint64_t size) | |
1011 | { | |
1012 | memory_region_init(mr, name, size); | |
7bc2b9cd | 1013 | mr->ops = ops; |
75f5941c | 1014 | mr->opaque = opaque; |
d0a9b5bc | 1015 | mr->terminates = true; |
75c578dc | 1016 | mr->rom_device = true; |
d0a9b5bc | 1017 | mr->destructor = memory_region_destructor_rom_device; |
c5705a77 | 1018 | mr->ram_addr = qemu_ram_alloc(size, mr); |
a621f38d | 1019 | mr->ram_addr |= cpu_register_io_memory(mr); |
d0a9b5bc AK |
1020 | } |
1021 | ||
1660e72d JK |
1022 | static uint64_t invalid_read(void *opaque, target_phys_addr_t addr, |
1023 | unsigned size) | |
1024 | { | |
1025 | MemoryRegion *mr = opaque; | |
1026 | ||
1027 | if (!mr->warning_printed) { | |
1028 | fprintf(stderr, "Invalid read from memory region %s\n", mr->name); | |
1029 | mr->warning_printed = true; | |
1030 | } | |
1031 | return -1U; | |
1032 | } | |
1033 | ||
1034 | static void invalid_write(void *opaque, target_phys_addr_t addr, uint64_t data, | |
1035 | unsigned size) | |
1036 | { | |
1037 | MemoryRegion *mr = opaque; | |
1038 | ||
1039 | if (!mr->warning_printed) { | |
1040 | fprintf(stderr, "Invalid write to memory region %s\n", mr->name); | |
1041 | mr->warning_printed = true; | |
1042 | } | |
1043 | } | |
1044 | ||
1045 | static const MemoryRegionOps reservation_ops = { | |
1046 | .read = invalid_read, | |
1047 | .write = invalid_write, | |
1048 | .endianness = DEVICE_NATIVE_ENDIAN, | |
1049 | }; | |
1050 | ||
1051 | void memory_region_init_reservation(MemoryRegion *mr, | |
1052 | const char *name, | |
1053 | uint64_t size) | |
1054 | { | |
1055 | memory_region_init_io(mr, &reservation_ops, mr, name, size); | |
1056 | } | |
1057 | ||
093bc2cd AK |
1058 | void memory_region_destroy(MemoryRegion *mr) |
1059 | { | |
1060 | assert(QTAILQ_EMPTY(&mr->subregions)); | |
545e92e0 | 1061 | mr->destructor(mr); |
093bc2cd | 1062 | memory_region_clear_coalescing(mr); |
7267c094 AL |
1063 | g_free((char *)mr->name); |
1064 | g_free(mr->ioeventfds); | |
093bc2cd AK |
1065 | } |
1066 | ||
1067 | uint64_t memory_region_size(MemoryRegion *mr) | |
1068 | { | |
08dafab4 AK |
1069 | if (int128_eq(mr->size, int128_2_64())) { |
1070 | return UINT64_MAX; | |
1071 | } | |
1072 | return int128_get64(mr->size); | |
093bc2cd AK |
1073 | } |
1074 | ||
8991c79b AK |
1075 | const char *memory_region_name(MemoryRegion *mr) |
1076 | { | |
1077 | return mr->name; | |
1078 | } | |
1079 | ||
8ea9252a AK |
1080 | bool memory_region_is_ram(MemoryRegion *mr) |
1081 | { | |
1082 | return mr->ram; | |
1083 | } | |
1084 | ||
55043ba3 AK |
1085 | bool memory_region_is_logging(MemoryRegion *mr) |
1086 | { | |
1087 | return mr->dirty_log_mask; | |
1088 | } | |
1089 | ||
ce7923da AK |
1090 | bool memory_region_is_rom(MemoryRegion *mr) |
1091 | { | |
1092 | return mr->ram && mr->readonly; | |
1093 | } | |
1094 | ||
093bc2cd AK |
1095 | void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client) |
1096 | { | |
5a583347 AK |
1097 | uint8_t mask = 1 << client; |
1098 | ||
1099 | mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask); | |
6bba19ba | 1100 | memory_region_update_topology(mr); |
093bc2cd AK |
1101 | } |
1102 | ||
1103 | bool memory_region_get_dirty(MemoryRegion *mr, target_phys_addr_t addr, | |
cd7a45c9 | 1104 | target_phys_addr_t size, unsigned client) |
093bc2cd | 1105 | { |
14a3c10a | 1106 | assert(mr->terminates); |
cd7a45c9 BS |
1107 | return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, |
1108 | 1 << client); | |
093bc2cd AK |
1109 | } |
1110 | ||
fd4aa979 BS |
1111 | void memory_region_set_dirty(MemoryRegion *mr, target_phys_addr_t addr, |
1112 | target_phys_addr_t size) | |
093bc2cd | 1113 | { |
14a3c10a | 1114 | assert(mr->terminates); |
fd4aa979 | 1115 | return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1); |
093bc2cd AK |
1116 | } |
1117 | ||
1118 | void memory_region_sync_dirty_bitmap(MemoryRegion *mr) | |
1119 | { | |
5a583347 AK |
1120 | FlatRange *fr; |
1121 | ||
cc31e6e7 | 1122 | FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) { |
5a583347 | 1123 | if (fr->mr == mr) { |
72e22d2f AK |
1124 | MEMORY_LISTENER_UPDATE_REGION(fr, &address_space_memory, |
1125 | Forward, log_sync); | |
5a583347 AK |
1126 | } |
1127 | } | |
093bc2cd AK |
1128 | } |
1129 | ||
1130 | void memory_region_set_readonly(MemoryRegion *mr, bool readonly) | |
1131 | { | |
fb1cd6f9 AK |
1132 | if (mr->readonly != readonly) { |
1133 | mr->readonly = readonly; | |
6bba19ba | 1134 | memory_region_update_topology(mr); |
fb1cd6f9 | 1135 | } |
093bc2cd AK |
1136 | } |
1137 | ||
d0a9b5bc AK |
1138 | void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable) |
1139 | { | |
1140 | if (mr->readable != readable) { | |
1141 | mr->readable = readable; | |
6bba19ba | 1142 | memory_region_update_topology(mr); |
d0a9b5bc AK |
1143 | } |
1144 | } | |
1145 | ||
093bc2cd AK |
1146 | void memory_region_reset_dirty(MemoryRegion *mr, target_phys_addr_t addr, |
1147 | target_phys_addr_t size, unsigned client) | |
1148 | { | |
14a3c10a | 1149 | assert(mr->terminates); |
5a583347 AK |
1150 | cpu_physical_memory_reset_dirty(mr->ram_addr + addr, |
1151 | mr->ram_addr + addr + size, | |
1152 | 1 << client); | |
093bc2cd AK |
1153 | } |
1154 | ||
1155 | void *memory_region_get_ram_ptr(MemoryRegion *mr) | |
1156 | { | |
1157 | if (mr->alias) { | |
1158 | return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset; | |
1159 | } | |
1160 | ||
14a3c10a | 1161 | assert(mr->terminates); |
093bc2cd | 1162 | |
021d26d1 | 1163 | return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK); |
093bc2cd AK |
1164 | } |
1165 | ||
1166 | static void memory_region_update_coalesced_range(MemoryRegion *mr) | |
1167 | { | |
1168 | FlatRange *fr; | |
1169 | CoalescedMemoryRange *cmr; | |
1170 | AddrRange tmp; | |
1171 | ||
cc31e6e7 | 1172 | FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) { |
093bc2cd | 1173 | if (fr->mr == mr) { |
08dafab4 AK |
1174 | qemu_unregister_coalesced_mmio(int128_get64(fr->addr.start), |
1175 | int128_get64(fr->addr.size)); | |
093bc2cd AK |
1176 | QTAILQ_FOREACH(cmr, &mr->coalesced, link) { |
1177 | tmp = addrrange_shift(cmr->addr, | |
08dafab4 AK |
1178 | int128_sub(fr->addr.start, |
1179 | int128_make64(fr->offset_in_region))); | |
093bc2cd AK |
1180 | if (!addrrange_intersects(tmp, fr->addr)) { |
1181 | continue; | |
1182 | } | |
1183 | tmp = addrrange_intersection(tmp, fr->addr); | |
08dafab4 AK |
1184 | qemu_register_coalesced_mmio(int128_get64(tmp.start), |
1185 | int128_get64(tmp.size)); | |
093bc2cd AK |
1186 | } |
1187 | } | |
1188 | } | |
1189 | } | |
1190 | ||
1191 | void memory_region_set_coalescing(MemoryRegion *mr) | |
1192 | { | |
1193 | memory_region_clear_coalescing(mr); | |
08dafab4 | 1194 | memory_region_add_coalescing(mr, 0, int128_get64(mr->size)); |
093bc2cd AK |
1195 | } |
1196 | ||
1197 | void memory_region_add_coalescing(MemoryRegion *mr, | |
1198 | target_phys_addr_t offset, | |
1199 | uint64_t size) | |
1200 | { | |
7267c094 | 1201 | CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr)); |
093bc2cd | 1202 | |
08dafab4 | 1203 | cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size)); |
093bc2cd AK |
1204 | QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link); |
1205 | memory_region_update_coalesced_range(mr); | |
1206 | } | |
1207 | ||
1208 | void memory_region_clear_coalescing(MemoryRegion *mr) | |
1209 | { | |
1210 | CoalescedMemoryRange *cmr; | |
1211 | ||
1212 | while (!QTAILQ_EMPTY(&mr->coalesced)) { | |
1213 | cmr = QTAILQ_FIRST(&mr->coalesced); | |
1214 | QTAILQ_REMOVE(&mr->coalesced, cmr, link); | |
7267c094 | 1215 | g_free(cmr); |
093bc2cd AK |
1216 | } |
1217 | memory_region_update_coalesced_range(mr); | |
1218 | } | |
1219 | ||
3e9d69e7 AK |
1220 | void memory_region_add_eventfd(MemoryRegion *mr, |
1221 | target_phys_addr_t addr, | |
1222 | unsigned size, | |
1223 | bool match_data, | |
1224 | uint64_t data, | |
1225 | int fd) | |
1226 | { | |
1227 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1228 | .addr.start = int128_make64(addr), |
1229 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1230 | .match_data = match_data, |
1231 | .data = data, | |
1232 | .fd = fd, | |
1233 | }; | |
1234 | unsigned i; | |
1235 | ||
1236 | for (i = 0; i < mr->ioeventfd_nb; ++i) { | |
1237 | if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) { | |
1238 | break; | |
1239 | } | |
1240 | } | |
1241 | ++mr->ioeventfd_nb; | |
7267c094 | 1242 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 AK |
1243 | sizeof(*mr->ioeventfds) * mr->ioeventfd_nb); |
1244 | memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i], | |
1245 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i)); | |
1246 | mr->ioeventfds[i] = mrfd; | |
6bba19ba | 1247 | memory_region_update_topology(mr); |
3e9d69e7 AK |
1248 | } |
1249 | ||
1250 | void memory_region_del_eventfd(MemoryRegion *mr, | |
1251 | target_phys_addr_t addr, | |
1252 | unsigned size, | |
1253 | bool match_data, | |
1254 | uint64_t data, | |
1255 | int fd) | |
1256 | { | |
1257 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1258 | .addr.start = int128_make64(addr), |
1259 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1260 | .match_data = match_data, |
1261 | .data = data, | |
1262 | .fd = fd, | |
1263 | }; | |
1264 | unsigned i; | |
1265 | ||
1266 | for (i = 0; i < mr->ioeventfd_nb; ++i) { | |
1267 | if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) { | |
1268 | break; | |
1269 | } | |
1270 | } | |
1271 | assert(i != mr->ioeventfd_nb); | |
1272 | memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1], | |
1273 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1))); | |
1274 | --mr->ioeventfd_nb; | |
7267c094 | 1275 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 | 1276 | sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1); |
6bba19ba | 1277 | memory_region_update_topology(mr); |
3e9d69e7 AK |
1278 | } |
1279 | ||
093bc2cd AK |
1280 | static void memory_region_add_subregion_common(MemoryRegion *mr, |
1281 | target_phys_addr_t offset, | |
1282 | MemoryRegion *subregion) | |
1283 | { | |
1284 | MemoryRegion *other; | |
1285 | ||
1286 | assert(!subregion->parent); | |
1287 | subregion->parent = mr; | |
1288 | subregion->addr = offset; | |
1289 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { | |
1290 | if (subregion->may_overlap || other->may_overlap) { | |
1291 | continue; | |
1292 | } | |
08dafab4 AK |
1293 | if (int128_gt(int128_make64(offset), |
1294 | int128_add(int128_make64(other->addr), other->size)) | |
1295 | || int128_le(int128_add(int128_make64(offset), subregion->size), | |
1296 | int128_make64(other->addr))) { | |
093bc2cd AK |
1297 | continue; |
1298 | } | |
a5e1cbc8 | 1299 | #if 0 |
860329b2 MW |
1300 | printf("warning: subregion collision %llx/%llx (%s) " |
1301 | "vs %llx/%llx (%s)\n", | |
093bc2cd | 1302 | (unsigned long long)offset, |
08dafab4 | 1303 | (unsigned long long)int128_get64(subregion->size), |
860329b2 MW |
1304 | subregion->name, |
1305 | (unsigned long long)other->addr, | |
08dafab4 | 1306 | (unsigned long long)int128_get64(other->size), |
860329b2 | 1307 | other->name); |
a5e1cbc8 | 1308 | #endif |
093bc2cd AK |
1309 | } |
1310 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { | |
1311 | if (subregion->priority >= other->priority) { | |
1312 | QTAILQ_INSERT_BEFORE(other, subregion, subregions_link); | |
1313 | goto done; | |
1314 | } | |
1315 | } | |
1316 | QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link); | |
1317 | done: | |
6bba19ba | 1318 | memory_region_update_topology(mr); |
093bc2cd AK |
1319 | } |
1320 | ||
1321 | ||
1322 | void memory_region_add_subregion(MemoryRegion *mr, | |
1323 | target_phys_addr_t offset, | |
1324 | MemoryRegion *subregion) | |
1325 | { | |
1326 | subregion->may_overlap = false; | |
1327 | subregion->priority = 0; | |
1328 | memory_region_add_subregion_common(mr, offset, subregion); | |
1329 | } | |
1330 | ||
1331 | void memory_region_add_subregion_overlap(MemoryRegion *mr, | |
1332 | target_phys_addr_t offset, | |
1333 | MemoryRegion *subregion, | |
1334 | unsigned priority) | |
1335 | { | |
1336 | subregion->may_overlap = true; | |
1337 | subregion->priority = priority; | |
1338 | memory_region_add_subregion_common(mr, offset, subregion); | |
1339 | } | |
1340 | ||
1341 | void memory_region_del_subregion(MemoryRegion *mr, | |
1342 | MemoryRegion *subregion) | |
1343 | { | |
1344 | assert(subregion->parent == mr); | |
1345 | subregion->parent = NULL; | |
1346 | QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link); | |
6bba19ba AK |
1347 | memory_region_update_topology(mr); |
1348 | } | |
1349 | ||
1350 | void memory_region_set_enabled(MemoryRegion *mr, bool enabled) | |
1351 | { | |
1352 | if (enabled == mr->enabled) { | |
1353 | return; | |
1354 | } | |
1355 | mr->enabled = enabled; | |
1356 | memory_region_update_topology(NULL); | |
093bc2cd | 1357 | } |
1c0ffa58 | 1358 | |
2282e1af AK |
1359 | void memory_region_set_address(MemoryRegion *mr, target_phys_addr_t addr) |
1360 | { | |
1361 | MemoryRegion *parent = mr->parent; | |
1362 | unsigned priority = mr->priority; | |
1363 | bool may_overlap = mr->may_overlap; | |
1364 | ||
1365 | if (addr == mr->addr || !parent) { | |
1366 | mr->addr = addr; | |
1367 | return; | |
1368 | } | |
1369 | ||
1370 | memory_region_transaction_begin(); | |
1371 | memory_region_del_subregion(parent, mr); | |
1372 | if (may_overlap) { | |
1373 | memory_region_add_subregion_overlap(parent, addr, mr, priority); | |
1374 | } else { | |
1375 | memory_region_add_subregion(parent, addr, mr); | |
1376 | } | |
1377 | memory_region_transaction_commit(); | |
1378 | } | |
1379 | ||
4703359e AK |
1380 | void memory_region_set_alias_offset(MemoryRegion *mr, target_phys_addr_t offset) |
1381 | { | |
1382 | target_phys_addr_t old_offset = mr->alias_offset; | |
1383 | ||
1384 | assert(mr->alias); | |
1385 | mr->alias_offset = offset; | |
1386 | ||
1387 | if (offset == old_offset || !mr->parent) { | |
1388 | return; | |
1389 | } | |
1390 | ||
1391 | memory_region_update_topology(mr); | |
1392 | } | |
1393 | ||
e34911c4 AK |
1394 | ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr) |
1395 | { | |
e34911c4 AK |
1396 | return mr->ram_addr; |
1397 | } | |
1398 | ||
e2177955 AK |
1399 | static int cmp_flatrange_addr(const void *addr_, const void *fr_) |
1400 | { | |
1401 | const AddrRange *addr = addr_; | |
1402 | const FlatRange *fr = fr_; | |
1403 | ||
1404 | if (int128_le(addrrange_end(*addr), fr->addr.start)) { | |
1405 | return -1; | |
1406 | } else if (int128_ge(addr->start, addrrange_end(fr->addr))) { | |
1407 | return 1; | |
1408 | } | |
1409 | return 0; | |
1410 | } | |
1411 | ||
1412 | static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr) | |
1413 | { | |
1414 | return bsearch(&addr, as->current_map.ranges, as->current_map.nr, | |
1415 | sizeof(FlatRange), cmp_flatrange_addr); | |
1416 | } | |
1417 | ||
1418 | MemoryRegionSection memory_region_find(MemoryRegion *address_space, | |
1419 | target_phys_addr_t addr, uint64_t size) | |
1420 | { | |
1421 | AddressSpace *as = memory_region_to_address_space(address_space); | |
1422 | AddrRange range = addrrange_make(int128_make64(addr), | |
1423 | int128_make64(size)); | |
1424 | FlatRange *fr = address_space_lookup(as, range); | |
1425 | MemoryRegionSection ret = { .mr = NULL, .size = 0 }; | |
1426 | ||
1427 | if (!fr) { | |
1428 | return ret; | |
1429 | } | |
1430 | ||
1431 | while (fr > as->current_map.ranges | |
1432 | && addrrange_intersects(fr[-1].addr, range)) { | |
1433 | --fr; | |
1434 | } | |
1435 | ||
1436 | ret.mr = fr->mr; | |
1437 | range = addrrange_intersection(range, fr->addr); | |
1438 | ret.offset_within_region = fr->offset_in_region; | |
1439 | ret.offset_within_region += int128_get64(int128_sub(range.start, | |
1440 | fr->addr.start)); | |
1441 | ret.size = int128_get64(range.size); | |
1442 | ret.offset_within_address_space = int128_get64(range.start); | |
7a8499e8 | 1443 | ret.readonly = fr->readonly; |
e2177955 AK |
1444 | return ret; |
1445 | } | |
1446 | ||
86e775c6 AK |
1447 | void memory_global_sync_dirty_bitmap(MemoryRegion *address_space) |
1448 | { | |
7664e80c AK |
1449 | AddressSpace *as = memory_region_to_address_space(address_space); |
1450 | FlatRange *fr; | |
1451 | ||
7664e80c | 1452 | FOR_EACH_FLAT_RANGE(fr, &as->current_map) { |
72e22d2f | 1453 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); |
7664e80c AK |
1454 | } |
1455 | } | |
1456 | ||
1457 | void memory_global_dirty_log_start(void) | |
1458 | { | |
8f77558f | 1459 | cpu_physical_memory_set_dirty_tracking(1); |
7664e80c | 1460 | global_dirty_log = true; |
72e22d2f | 1461 | MEMORY_LISTENER_CALL(log_global_start, Forward); |
7664e80c AK |
1462 | } |
1463 | ||
1464 | void memory_global_dirty_log_stop(void) | |
1465 | { | |
7664e80c | 1466 | global_dirty_log = false; |
72e22d2f | 1467 | MEMORY_LISTENER_CALL(log_global_stop, Reverse); |
8f77558f | 1468 | cpu_physical_memory_set_dirty_tracking(0); |
7664e80c AK |
1469 | } |
1470 | ||
1471 | static void listener_add_address_space(MemoryListener *listener, | |
1472 | AddressSpace *as) | |
1473 | { | |
1474 | FlatRange *fr; | |
1475 | ||
1476 | if (global_dirty_log) { | |
1477 | listener->log_global_start(listener); | |
1478 | } | |
1479 | FOR_EACH_FLAT_RANGE(fr, &as->current_map) { | |
1480 | MemoryRegionSection section = { | |
1481 | .mr = fr->mr, | |
1482 | .address_space = as->root, | |
1483 | .offset_within_region = fr->offset_in_region, | |
1484 | .size = int128_get64(fr->addr.size), | |
1485 | .offset_within_address_space = int128_get64(fr->addr.start), | |
7a8499e8 | 1486 | .readonly = fr->readonly, |
7664e80c AK |
1487 | }; |
1488 | listener->region_add(listener, §ion); | |
1489 | } | |
1490 | } | |
1491 | ||
1492 | void memory_listener_register(MemoryListener *listener) | |
1493 | { | |
72e22d2f AK |
1494 | MemoryListener *other = NULL; |
1495 | ||
1496 | if (QTAILQ_EMPTY(&memory_listeners) | |
1497 | || listener->priority >= QTAILQ_LAST(&memory_listeners, | |
1498 | memory_listeners)->priority) { | |
1499 | QTAILQ_INSERT_TAIL(&memory_listeners, listener, link); | |
1500 | } else { | |
1501 | QTAILQ_FOREACH(other, &memory_listeners, link) { | |
1502 | if (listener->priority < other->priority) { | |
1503 | break; | |
1504 | } | |
1505 | } | |
1506 | QTAILQ_INSERT_BEFORE(other, listener, link); | |
1507 | } | |
7664e80c AK |
1508 | listener_add_address_space(listener, &address_space_memory); |
1509 | listener_add_address_space(listener, &address_space_io); | |
1510 | } | |
1511 | ||
1512 | void memory_listener_unregister(MemoryListener *listener) | |
1513 | { | |
72e22d2f | 1514 | QTAILQ_REMOVE(&memory_listeners, listener, link); |
86e775c6 | 1515 | } |
e2177955 | 1516 | |
1c0ffa58 AK |
1517 | void set_system_memory_map(MemoryRegion *mr) |
1518 | { | |
cc31e6e7 | 1519 | address_space_memory.root = mr; |
6bba19ba | 1520 | memory_region_update_topology(NULL); |
1c0ffa58 | 1521 | } |
658b2224 AK |
1522 | |
1523 | void set_system_io_map(MemoryRegion *mr) | |
1524 | { | |
1525 | address_space_io.root = mr; | |
6bba19ba | 1526 | memory_region_update_topology(NULL); |
658b2224 | 1527 | } |
314e2987 | 1528 | |
acbbec5d AK |
1529 | uint64_t io_mem_read(int io_index, target_phys_addr_t addr, unsigned size) |
1530 | { | |
a621f38d | 1531 | return memory_region_dispatch_read(io_mem_region[io_index], addr, size); |
acbbec5d AK |
1532 | } |
1533 | ||
1534 | void io_mem_write(int io_index, target_phys_addr_t addr, | |
1535 | uint64_t val, unsigned size) | |
1536 | { | |
a621f38d | 1537 | memory_region_dispatch_write(io_mem_region[io_index], addr, val, size); |
acbbec5d AK |
1538 | } |
1539 | ||
314e2987 BS |
1540 | typedef struct MemoryRegionList MemoryRegionList; |
1541 | ||
1542 | struct MemoryRegionList { | |
1543 | const MemoryRegion *mr; | |
1544 | bool printed; | |
1545 | QTAILQ_ENTRY(MemoryRegionList) queue; | |
1546 | }; | |
1547 | ||
1548 | typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead; | |
1549 | ||
1550 | static void mtree_print_mr(fprintf_function mon_printf, void *f, | |
1551 | const MemoryRegion *mr, unsigned int level, | |
1552 | target_phys_addr_t base, | |
9479c57a | 1553 | MemoryRegionListHead *alias_print_queue) |
314e2987 | 1554 | { |
9479c57a JK |
1555 | MemoryRegionList *new_ml, *ml, *next_ml; |
1556 | MemoryRegionListHead submr_print_queue; | |
314e2987 BS |
1557 | const MemoryRegion *submr; |
1558 | unsigned int i; | |
1559 | ||
314e2987 BS |
1560 | if (!mr) { |
1561 | return; | |
1562 | } | |
1563 | ||
1564 | for (i = 0; i < level; i++) { | |
1565 | mon_printf(f, " "); | |
1566 | } | |
1567 | ||
1568 | if (mr->alias) { | |
1569 | MemoryRegionList *ml; | |
1570 | bool found = false; | |
1571 | ||
1572 | /* check if the alias is already in the queue */ | |
9479c57a | 1573 | QTAILQ_FOREACH(ml, alias_print_queue, queue) { |
314e2987 BS |
1574 | if (ml->mr == mr->alias && !ml->printed) { |
1575 | found = true; | |
1576 | } | |
1577 | } | |
1578 | ||
1579 | if (!found) { | |
1580 | ml = g_new(MemoryRegionList, 1); | |
1581 | ml->mr = mr->alias; | |
1582 | ml->printed = false; | |
9479c57a | 1583 | QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue); |
314e2987 | 1584 | } |
4896d74b JK |
1585 | mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx |
1586 | " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx | |
1587 | "-" TARGET_FMT_plx "\n", | |
314e2987 | 1588 | base + mr->addr, |
08dafab4 AK |
1589 | base + mr->addr |
1590 | + (target_phys_addr_t)int128_get64(mr->size) - 1, | |
4b474ba7 | 1591 | mr->priority, |
4896d74b JK |
1592 | mr->readable ? 'R' : '-', |
1593 | !mr->readonly && !(mr->rom_device && mr->readable) ? 'W' | |
1594 | : '-', | |
314e2987 BS |
1595 | mr->name, |
1596 | mr->alias->name, | |
1597 | mr->alias_offset, | |
08dafab4 AK |
1598 | mr->alias_offset |
1599 | + (target_phys_addr_t)int128_get64(mr->size) - 1); | |
314e2987 | 1600 | } else { |
4896d74b JK |
1601 | mon_printf(f, |
1602 | TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n", | |
314e2987 | 1603 | base + mr->addr, |
08dafab4 AK |
1604 | base + mr->addr |
1605 | + (target_phys_addr_t)int128_get64(mr->size) - 1, | |
4b474ba7 | 1606 | mr->priority, |
4896d74b JK |
1607 | mr->readable ? 'R' : '-', |
1608 | !mr->readonly && !(mr->rom_device && mr->readable) ? 'W' | |
1609 | : '-', | |
314e2987 BS |
1610 | mr->name); |
1611 | } | |
9479c57a JK |
1612 | |
1613 | QTAILQ_INIT(&submr_print_queue); | |
1614 | ||
314e2987 | 1615 | QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) { |
9479c57a JK |
1616 | new_ml = g_new(MemoryRegionList, 1); |
1617 | new_ml->mr = submr; | |
1618 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
1619 | if (new_ml->mr->addr < ml->mr->addr || | |
1620 | (new_ml->mr->addr == ml->mr->addr && | |
1621 | new_ml->mr->priority > ml->mr->priority)) { | |
1622 | QTAILQ_INSERT_BEFORE(ml, new_ml, queue); | |
1623 | new_ml = NULL; | |
1624 | break; | |
1625 | } | |
1626 | } | |
1627 | if (new_ml) { | |
1628 | QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue); | |
1629 | } | |
1630 | } | |
1631 | ||
1632 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
1633 | mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr, | |
1634 | alias_print_queue); | |
1635 | } | |
1636 | ||
88365e47 | 1637 | QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) { |
9479c57a | 1638 | g_free(ml); |
314e2987 BS |
1639 | } |
1640 | } | |
1641 | ||
1642 | void mtree_info(fprintf_function mon_printf, void *f) | |
1643 | { | |
1644 | MemoryRegionListHead ml_head; | |
1645 | MemoryRegionList *ml, *ml2; | |
1646 | ||
1647 | QTAILQ_INIT(&ml_head); | |
1648 | ||
1649 | mon_printf(f, "memory\n"); | |
1650 | mtree_print_mr(mon_printf, f, address_space_memory.root, 0, 0, &ml_head); | |
1651 | ||
1652 | /* print aliased regions */ | |
1653 | QTAILQ_FOREACH(ml, &ml_head, queue) { | |
1654 | if (!ml->printed) { | |
1655 | mon_printf(f, "%s\n", ml->mr->name); | |
1656 | mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head); | |
1657 | } | |
1658 | } | |
1659 | ||
1660 | QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) { | |
88365e47 | 1661 | g_free(ml); |
314e2987 BS |
1662 | } |
1663 | ||
06631810 JK |
1664 | if (address_space_io.root && |
1665 | !QTAILQ_EMPTY(&address_space_io.root->subregions)) { | |
1666 | QTAILQ_INIT(&ml_head); | |
1667 | mon_printf(f, "I/O\n"); | |
1668 | mtree_print_mr(mon_printf, f, address_space_io.root, 0, 0, &ml_head); | |
1669 | } | |
314e2987 | 1670 | } |