]> git.proxmox.com Git - mirror_qemu.git/blob - dma-helpers.c
exec.c: Make address_space_rw take transaction attributes
[mirror_qemu.git] / dma-helpers.c
1 /*
2 * DMA helper functions
3 *
4 * Copyright (c) 2009 Red Hat
5 *
6 * This work is licensed under the terms of the GNU General Public License
7 * (GNU GPL), version 2 or later.
8 */
9
10 #include "sysemu/block-backend.h"
11 #include "sysemu/dma.h"
12 #include "trace.h"
13 #include "qemu/range.h"
14 #include "qemu/thread.h"
15 #include "qemu/main-loop.h"
16
17 /* #define DEBUG_IOMMU */
18
19 int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len)
20 {
21 dma_barrier(as, DMA_DIRECTION_FROM_DEVICE);
22
23 #define FILLBUF_SIZE 512
24 uint8_t fillbuf[FILLBUF_SIZE];
25 int l;
26 bool error = false;
27
28 memset(fillbuf, c, FILLBUF_SIZE);
29 while (len > 0) {
30 l = len < FILLBUF_SIZE ? len : FILLBUF_SIZE;
31 error |= address_space_rw(as, addr, MEMTXATTRS_UNSPECIFIED,
32 fillbuf, l, true);
33 len -= l;
34 addr += l;
35 }
36
37 return error;
38 }
39
40 void qemu_sglist_init(QEMUSGList *qsg, DeviceState *dev, int alloc_hint,
41 AddressSpace *as)
42 {
43 qsg->sg = g_malloc(alloc_hint * sizeof(ScatterGatherEntry));
44 qsg->nsg = 0;
45 qsg->nalloc = alloc_hint;
46 qsg->size = 0;
47 qsg->as = as;
48 qsg->dev = dev;
49 object_ref(OBJECT(dev));
50 }
51
52 void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len)
53 {
54 if (qsg->nsg == qsg->nalloc) {
55 qsg->nalloc = 2 * qsg->nalloc + 1;
56 qsg->sg = g_realloc(qsg->sg, qsg->nalloc * sizeof(ScatterGatherEntry));
57 }
58 qsg->sg[qsg->nsg].base = base;
59 qsg->sg[qsg->nsg].len = len;
60 qsg->size += len;
61 ++qsg->nsg;
62 }
63
64 void qemu_sglist_destroy(QEMUSGList *qsg)
65 {
66 object_unref(OBJECT(qsg->dev));
67 g_free(qsg->sg);
68 memset(qsg, 0, sizeof(*qsg));
69 }
70
71 typedef struct {
72 BlockAIOCB common;
73 BlockBackend *blk;
74 BlockAIOCB *acb;
75 QEMUSGList *sg;
76 uint64_t sector_num;
77 DMADirection dir;
78 int sg_cur_index;
79 dma_addr_t sg_cur_byte;
80 QEMUIOVector iov;
81 QEMUBH *bh;
82 DMAIOFunc *io_func;
83 } DMAAIOCB;
84
85 static void dma_blk_cb(void *opaque, int ret);
86
87 static void reschedule_dma(void *opaque)
88 {
89 DMAAIOCB *dbs = (DMAAIOCB *)opaque;
90
91 qemu_bh_delete(dbs->bh);
92 dbs->bh = NULL;
93 dma_blk_cb(dbs, 0);
94 }
95
96 static void continue_after_map_failure(void *opaque)
97 {
98 DMAAIOCB *dbs = (DMAAIOCB *)opaque;
99
100 dbs->bh = qemu_bh_new(reschedule_dma, dbs);
101 qemu_bh_schedule(dbs->bh);
102 }
103
104 static void dma_blk_unmap(DMAAIOCB *dbs)
105 {
106 int i;
107
108 for (i = 0; i < dbs->iov.niov; ++i) {
109 dma_memory_unmap(dbs->sg->as, dbs->iov.iov[i].iov_base,
110 dbs->iov.iov[i].iov_len, dbs->dir,
111 dbs->iov.iov[i].iov_len);
112 }
113 qemu_iovec_reset(&dbs->iov);
114 }
115
116 static void dma_complete(DMAAIOCB *dbs, int ret)
117 {
118 trace_dma_complete(dbs, ret, dbs->common.cb);
119
120 dma_blk_unmap(dbs);
121 if (dbs->common.cb) {
122 dbs->common.cb(dbs->common.opaque, ret);
123 }
124 qemu_iovec_destroy(&dbs->iov);
125 if (dbs->bh) {
126 qemu_bh_delete(dbs->bh);
127 dbs->bh = NULL;
128 }
129 qemu_aio_unref(dbs);
130 }
131
132 static void dma_blk_cb(void *opaque, int ret)
133 {
134 DMAAIOCB *dbs = (DMAAIOCB *)opaque;
135 dma_addr_t cur_addr, cur_len;
136 void *mem;
137
138 trace_dma_blk_cb(dbs, ret);
139
140 dbs->acb = NULL;
141 dbs->sector_num += dbs->iov.size / 512;
142
143 if (dbs->sg_cur_index == dbs->sg->nsg || ret < 0) {
144 dma_complete(dbs, ret);
145 return;
146 }
147 dma_blk_unmap(dbs);
148
149 while (dbs->sg_cur_index < dbs->sg->nsg) {
150 cur_addr = dbs->sg->sg[dbs->sg_cur_index].base + dbs->sg_cur_byte;
151 cur_len = dbs->sg->sg[dbs->sg_cur_index].len - dbs->sg_cur_byte;
152 mem = dma_memory_map(dbs->sg->as, cur_addr, &cur_len, dbs->dir);
153 if (!mem)
154 break;
155 qemu_iovec_add(&dbs->iov, mem, cur_len);
156 dbs->sg_cur_byte += cur_len;
157 if (dbs->sg_cur_byte == dbs->sg->sg[dbs->sg_cur_index].len) {
158 dbs->sg_cur_byte = 0;
159 ++dbs->sg_cur_index;
160 }
161 }
162
163 if (dbs->iov.size == 0) {
164 trace_dma_map_wait(dbs);
165 cpu_register_map_client(dbs, continue_after_map_failure);
166 return;
167 }
168
169 if (dbs->iov.size & ~BDRV_SECTOR_MASK) {
170 qemu_iovec_discard_back(&dbs->iov, dbs->iov.size & ~BDRV_SECTOR_MASK);
171 }
172
173 dbs->acb = dbs->io_func(dbs->blk, dbs->sector_num, &dbs->iov,
174 dbs->iov.size / 512, dma_blk_cb, dbs);
175 assert(dbs->acb);
176 }
177
178 static void dma_aio_cancel(BlockAIOCB *acb)
179 {
180 DMAAIOCB *dbs = container_of(acb, DMAAIOCB, common);
181
182 trace_dma_aio_cancel(dbs);
183
184 if (dbs->acb) {
185 blk_aio_cancel_async(dbs->acb);
186 }
187 }
188
189
190 static const AIOCBInfo dma_aiocb_info = {
191 .aiocb_size = sizeof(DMAAIOCB),
192 .cancel_async = dma_aio_cancel,
193 };
194
195 BlockAIOCB *dma_blk_io(
196 BlockBackend *blk, QEMUSGList *sg, uint64_t sector_num,
197 DMAIOFunc *io_func, BlockCompletionFunc *cb,
198 void *opaque, DMADirection dir)
199 {
200 DMAAIOCB *dbs = blk_aio_get(&dma_aiocb_info, blk, cb, opaque);
201
202 trace_dma_blk_io(dbs, blk, sector_num, (dir == DMA_DIRECTION_TO_DEVICE));
203
204 dbs->acb = NULL;
205 dbs->blk = blk;
206 dbs->sg = sg;
207 dbs->sector_num = sector_num;
208 dbs->sg_cur_index = 0;
209 dbs->sg_cur_byte = 0;
210 dbs->dir = dir;
211 dbs->io_func = io_func;
212 dbs->bh = NULL;
213 qemu_iovec_init(&dbs->iov, sg->nsg);
214 dma_blk_cb(dbs, 0);
215 return &dbs->common;
216 }
217
218
219 BlockAIOCB *dma_blk_read(BlockBackend *blk,
220 QEMUSGList *sg, uint64_t sector,
221 void (*cb)(void *opaque, int ret), void *opaque)
222 {
223 return dma_blk_io(blk, sg, sector, blk_aio_readv, cb, opaque,
224 DMA_DIRECTION_FROM_DEVICE);
225 }
226
227 BlockAIOCB *dma_blk_write(BlockBackend *blk,
228 QEMUSGList *sg, uint64_t sector,
229 void (*cb)(void *opaque, int ret), void *opaque)
230 {
231 return dma_blk_io(blk, sg, sector, blk_aio_writev, cb, opaque,
232 DMA_DIRECTION_TO_DEVICE);
233 }
234
235
236 static uint64_t dma_buf_rw(uint8_t *ptr, int32_t len, QEMUSGList *sg,
237 DMADirection dir)
238 {
239 uint64_t resid;
240 int sg_cur_index;
241
242 resid = sg->size;
243 sg_cur_index = 0;
244 len = MIN(len, resid);
245 while (len > 0) {
246 ScatterGatherEntry entry = sg->sg[sg_cur_index++];
247 int32_t xfer = MIN(len, entry.len);
248 dma_memory_rw(sg->as, entry.base, ptr, xfer, dir);
249 ptr += xfer;
250 len -= xfer;
251 resid -= xfer;
252 }
253
254 return resid;
255 }
256
257 uint64_t dma_buf_read(uint8_t *ptr, int32_t len, QEMUSGList *sg)
258 {
259 return dma_buf_rw(ptr, len, sg, DMA_DIRECTION_FROM_DEVICE);
260 }
261
262 uint64_t dma_buf_write(uint8_t *ptr, int32_t len, QEMUSGList *sg)
263 {
264 return dma_buf_rw(ptr, len, sg, DMA_DIRECTION_TO_DEVICE);
265 }
266
267 void dma_acct_start(BlockBackend *blk, BlockAcctCookie *cookie,
268 QEMUSGList *sg, enum BlockAcctType type)
269 {
270 block_acct_start(blk_get_stats(blk), cookie, sg->size, type);
271 }