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1 @c man begin SYNOPSIS
2 QEMU / KVM CPU model configuration
3 @c man end
4
5 @c man begin DESCRIPTION
6
7 @menu
8 * recommendations_cpu_models_x86:: Recommendations for KVM CPU model configuration on x86 hosts
9 * recommendations_cpu_models_MIPS:: Supported CPU model configurations on MIPS hosts
10 * cpu_model_syntax_apps:: Syntax for configuring CPU models
11 @end menu
12
13 QEMU / KVM virtualization supports two ways to configure CPU models
14
15 @table @option
16
17 @item Host passthrough
18
19 This passes the host CPU model features, model, stepping, exactly to the
20 guest. Note that KVM may filter out some host CPU model features if they
21 cannot be supported with virtualization. Live migration is unsafe when
22 this mode is used as libvirt / QEMU cannot guarantee a stable CPU is
23 exposed to the guest across hosts. This is the recommended CPU to use,
24 provided live migration is not required.
25
26 @item Named model
27
28 QEMU comes with a number of predefined named CPU models, that typically
29 refer to specific generations of hardware released by Intel and AMD.
30 These allow the guest VMs to have a degree of isolation from the host CPU,
31 allowing greater flexibility in live migrating between hosts with differing
32 hardware.
33 @end table
34
35 In both cases, it is possible to optionally add or remove individual CPU
36 features, to alter what is presented to the guest by default.
37
38 Libvirt supports a third way to configure CPU models known as "Host model".
39 This uses the QEMU "Named model" feature, automatically picking a CPU model
40 that is similar the host CPU, and then adding extra features to approximate
41 the host model as closely as possible. This does not guarantee the CPU family,
42 stepping, etc will precisely match the host CPU, as they would with "Host
43 passthrough", but gives much of the benefit of passthrough, while making
44 live migration safe.
45
46 @node recommendations_cpu_models_x86
47 @subsection Recommendations for KVM CPU model configuration on x86 hosts
48
49 The information that follows provides recommendations for configuring
50 CPU models on x86 hosts. The goals are to maximise performance, while
51 protecting guest OS against various CPU hardware flaws, and optionally
52 enabling live migration between hosts with hetergeneous CPU models.
53
54 @menu
55 * preferred_cpu_models_intel_x86:: Preferred CPU models for Intel x86 hosts
56 * important_cpu_features_intel_x86:: Important CPU features for Intel x86 hosts
57 * preferred_cpu_models_amd_x86:: Preferred CPU models for AMD x86 hosts
58 * important_cpu_features_amd_x86:: Important CPU features for AMD x86 hosts
59 * default_cpu_models_x86:: Default x86 CPU models
60 * other_non_recommended_cpu_models_x86:: Other non-recommended x86 CPUs
61 @end menu
62
63 @node preferred_cpu_models_intel_x86
64 @subsubsection Preferred CPU models for Intel x86 hosts
65
66 The following CPU models are preferred for use on Intel hosts. Administrators /
67 applications are recommended to use the CPU model that matches the generation
68 of the host CPUs in use. In a deployment with a mixture of host CPU models
69 between machines, if live migration compatibility is required, use the newest
70 CPU model that is compatible across all desired hosts.
71
72 @table @option
73 @item @code{Skylake-Server}
74 @item @code{Skylake-Server-IBRS}
75
76 Intel Xeon Processor (Skylake, 2016)
77
78
79 @item @code{Skylake-Client}
80 @item @code{Skylake-Client-IBRS}
81
82 Intel Core Processor (Skylake, 2015)
83
84
85 @item @code{Broadwell}
86 @item @code{Broadwell-IBRS}
87 @item @code{Broadwell-noTSX}
88 @item @code{Broadwell-noTSX-IBRS}
89
90 Intel Core Processor (Broadwell, 2014)
91
92
93 @item @code{Haswell}
94 @item @code{Haswell-IBRS}
95 @item @code{Haswell-noTSX}
96 @item @code{Haswell-noTSX-IBRS}
97
98 Intel Core Processor (Haswell, 2013)
99
100
101 @item @code{IvyBridge}
102 @item @code{IvyBridge-IBRS}
103
104 Intel Xeon E3-12xx v2 (Ivy Bridge, 2012)
105
106
107 @item @code{SandyBridge}
108 @item @code{SandyBridge-IBRS}
109
110 Intel Xeon E312xx (Sandy Bridge, 2011)
111
112
113 @item @code{Westmere}
114 @item @code{Westmere-IBRS}
115
116 Westmere E56xx/L56xx/X56xx (Nehalem-C, 2010)
117
118
119 @item @code{Nehalem}
120 @item @code{Nehalem-IBRS}
121
122 Intel Core i7 9xx (Nehalem Class Core i7, 2008)
123
124
125 @item @code{Penryn}
126
127 Intel Core 2 Duo P9xxx (Penryn Class Core 2, 2007)
128
129
130 @item @code{Conroe}
131
132 Intel Celeron_4x0 (Conroe/Merom Class Core 2, 2006)
133
134 @end table
135
136 @node important_cpu_features_intel_x86
137 @subsubsection Important CPU features for Intel x86 hosts
138
139 The following are important CPU features that should be used on Intel x86
140 hosts, when available in the host CPU. Some of them require explicit
141 configuration to enable, as they are not included by default in some, or all,
142 of the named CPU models listed above. In general all of these features are
143 included if using "Host passthrough" or "Host model".
144
145
146 @table @option
147
148 @item @code{pcid}
149
150 Recommended to mitigate the cost of the Meltdown (CVE-2017-5754) fix
151
152 Included by default in Haswell, Broadwell & Skylake Intel CPU models.
153
154 Should be explicitly turned on for Westmere, SandyBridge, and IvyBridge
155 Intel CPU models. Note that some desktop/mobile Westmere CPUs cannot
156 support this feature.
157
158
159 @item @code{spec-ctrl}
160
161 Required to enable the Spectre (CVE-2017-5753 and CVE-2017-5715) fix,
162 in cases where retpolines are not sufficient.
163
164 Included by default in Intel CPU models with -IBRS suffix.
165
166 Must be explicitly turned on for Intel CPU models without -IBRS suffix.
167
168 Requires the host CPU microcode to support this feature before it
169 can be used for guest CPUs.
170
171
172 @item @code{ssbd}
173
174 Required to enable the CVE-2018-3639 fix
175
176 Not included by default in any Intel CPU model.
177
178 Must be explicitly turned on for all Intel CPU models.
179
180 Requires the host CPU microcode to support this feature before it
181 can be used for guest CPUs.
182
183
184 @item @code{pdpe1gb}
185
186 Recommended to allow guest OS to use 1GB size pages
187
188 Not included by default in any Intel CPU model.
189
190 Should be explicitly turned on for all Intel CPU models.
191
192 Note that not all CPU hardware will support this feature.
193 @end table
194
195
196 @node preferred_cpu_models_amd_x86
197 @subsubsection Preferred CPU models for AMD x86 hosts
198
199 The following CPU models are preferred for use on Intel hosts. Administrators /
200 applications are recommended to use the CPU model that matches the generation
201 of the host CPUs in use. In a deployment with a mixture of host CPU models
202 between machines, if live migration compatibility is required, use the newest
203 CPU model that is compatible across all desired hosts.
204
205 @table @option
206
207 @item @code{EPYC}
208 @item @code{EPYC-IBPB}
209
210 AMD EPYC Processor (2017)
211
212
213 @item @code{Opteron_G5}
214
215 AMD Opteron 63xx class CPU (2012)
216
217
218 @item @code{Opteron_G4}
219
220 AMD Opteron 62xx class CPU (2011)
221
222
223 @item @code{Opteron_G3}
224
225 AMD Opteron 23xx (Gen 3 Class Opteron, 2009)
226
227
228 @item @code{Opteron_G2}
229
230 AMD Opteron 22xx (Gen 2 Class Opteron, 2006)
231
232
233 @item @code{Opteron_G1}
234
235 AMD Opteron 240 (Gen 1 Class Opteron, 2004)
236 @end table
237
238 @node important_cpu_features_amd_x86
239 @subsubsection Important CPU features for AMD x86 hosts
240
241 The following are important CPU features that should be used on AMD x86
242 hosts, when available in the host CPU. Some of them require explicit
243 configuration to enable, as they are not included by default in some, or all,
244 of the named CPU models listed above. In general all of these features are
245 included if using "Host passthrough" or "Host model".
246
247
248 @table @option
249
250 @item @code{ibpb}
251
252 Required to enable the Spectre (CVE-2017-5753 and CVE-2017-5715) fix,
253 in cases where retpolines are not sufficient.
254
255 Included by default in AMD CPU models with -IBPB suffix.
256
257 Must be explicitly turned on for AMD CPU models without -IBPB suffix.
258
259 Requires the host CPU microcode to support this feature before it
260 can be used for guest CPUs.
261
262
263 @item @code{virt-ssbd}
264
265 Required to enable the CVE-2018-3639 fix
266
267 Not included by default in any AMD CPU model.
268
269 Must be explicitly turned on for all AMD CPU models.
270
271 This should be provided to guests, even if amd-ssbd is also
272 provided, for maximum guest compatibility.
273
274 Note for some QEMU / libvirt versions, this must be force enabled
275 when when using "Host model", because this is a virtual feature
276 that doesn't exist in the physical host CPUs.
277
278
279 @item @code{amd-ssbd}
280
281 Required to enable the CVE-2018-3639 fix
282
283 Not included by default in any AMD CPU model.
284
285 Must be explicitly turned on for all AMD CPU models.
286
287 This provides higher performance than virt-ssbd so should be
288 exposed to guests whenever available in the host. virt-ssbd
289 should none the less also be exposed for maximum guest
290 compatability as some kernels only know about virt-ssbd.
291
292
293 @item @code{amd-no-ssb}
294
295 Recommended to indicate the host is not vulnerable CVE-2018-3639
296
297 Not included by default in any AMD CPU model.
298
299 Future hardware genarations of CPU will not be vulnerable to
300 CVE-2018-3639, and thus the guest should be told not to enable
301 its mitigations, by exposing amd-no-ssb. This is mutually
302 exclusive with virt-ssbd and amd-ssbd.
303
304
305 @item @code{pdpe1gb}
306
307 Recommended to allow guest OS to use 1GB size pages
308
309 Not included by default in any AMD CPU model.
310
311 Should be explicitly turned on for all AMD CPU models.
312
313 Note that not all CPU hardware will support this feature.
314 @end table
315
316
317 @node default_cpu_models_x86
318 @subsubsection Default x86 CPU models
319
320 The default QEMU CPU models are designed such that they can run on all hosts.
321 If an application does not wish to do perform any host compatibility checks
322 before launching guests, the default is guaranteed to work.
323
324 The default CPU models will, however, leave the guest OS vulnerable to various
325 CPU hardware flaws, so their use is strongly discouraged. Applications should
326 follow the earlier guidance to setup a better CPU configuration, with host
327 passthrough recommended if live migration is not needed.
328
329 @table @option
330 @item @code{qemu32}
331 @item @code{qemu64}
332
333 QEMU Virtual CPU version 2.5+ (32 & 64 bit variants)
334
335 qemu64 is used for x86_64 guests and qemu32 is used for i686 guests, when no
336 -cpu argument is given to QEMU, or no <cpu> is provided in libvirt XML.
337 @end table
338
339
340 @node other_non_recommended_cpu_models_x86
341 @subsubsection Other non-recommended x86 CPUs
342
343 The following CPUs models are compatible with most AMD and Intel x86 hosts, but
344 their usage is discouraged, as they expose a very limited featureset, which
345 prevents guests having optimal performance.
346
347 @table @option
348
349 @item @code{kvm32}
350 @item @code{kvm64}
351
352 Common KVM processor (32 & 64 bit variants)
353
354 Legacy models just for historical compatibility with ancient QEMU versions.
355
356
357 @item @code{486}
358 @item @code{athlon}
359 @item @code{phenom}
360 @item @code{coreduo}
361 @item @code{core2duo}
362 @item @code{n270}
363 @item @code{pentium}
364 @item @code{pentium2}
365 @item @code{pentium3}
366
367 Various very old x86 CPU models, mostly predating the introduction of
368 hardware assisted virtualization, that should thus not be required for
369 running virtual machines.
370 @end table
371
372 @node recommendations_cpu_models_MIPS
373 @subsection Supported CPU model configurations on MIPS hosts
374
375 QEMU supports variety of MIPS CPU models:
376
377 @menu
378 * cpu_models_MIPS32:: Supported CPU models for MIPS32 hosts
379 * cpu_models_MIPS64:: Supported CPU models for MIPS64 hosts
380 * cpu_models_nanoMIPS:: Supported CPU models for nanoMIPS hosts
381 * preferred_cpu_models_MIPS:: Preferred CPU models for MIPS hosts
382 @end menu
383
384 @node cpu_models_MIPS32
385 @subsubsection Supported CPU models for MIPS32 hosts
386
387 The following CPU models are supported for use on MIPS32 hosts. Administrators /
388 applications are recommended to use the CPU model that matches the generation
389 of the host CPUs in use. In a deployment with a mixture of host CPU models
390 between machines, if live migration compatibility is required, use the newest
391 CPU model that is compatible across all desired hosts.
392
393 @table @option
394 @item @code{mips32r6-generic}
395
396 MIPS32 Processor (Release 6, 2015)
397
398
399 @item @code{P5600}
400
401 MIPS32 Processor (P5600, 2014)
402
403
404 @item @code{M14K}
405 @item @code{M14Kc}
406
407 MIPS32 Processor (M14K, 2009)
408
409
410 @item @code{74Kf}
411
412 MIPS32 Processor (74K, 2007)
413
414
415 @item @code{34Kf}
416
417 MIPS32 Processor (34K, 2006)
418
419
420 @item @code{24Kc}
421 @item @code{24KEc}
422 @item @code{24Kf}
423
424 MIPS32 Processor (24K, 2003)
425
426
427 @item @code{4Kc}
428 @item @code{4Km}
429 @item @code{4KEcR1}
430 @item @code{4KEmR1}
431 @item @code{4KEc}
432 @item @code{4KEm}
433
434 MIPS32 Processor (4K, 1999)
435 @end table
436
437 @node cpu_models_MIPS64
438 @subsubsection Supported CPU models for MIPS64 hosts
439
440 The following CPU models are supported for use on MIPS64 hosts. Administrators /
441 applications are recommended to use the CPU model that matches the generation
442 of the host CPUs in use. In a deployment with a mixture of host CPU models
443 between machines, if live migration compatibility is required, use the newest
444 CPU model that is compatible across all desired hosts.
445
446 @table @option
447 @item @code{I6400}
448
449 MIPS64 Processor (Release 6, 2014)
450
451
452 @item @code{Loongson-2F}
453
454 MIPS64 Processor (Longsoon 2, 2008)
455
456
457 @item @code{Loongson-2E}
458
459 MIPS64 Processor (Loongson 2, 2006)
460
461
462 @item @code{mips64dspr2}
463
464 MIPS64 Processor (Release 2, 2006)
465
466
467 @item @code{MIPS64R2-generic}
468 @item @code{5KEc}
469 @item @code{5KEf}
470
471 MIPS64 Processor (Release 2, 2002)
472
473
474 @item @code{20Kc}
475
476 MIPS64 Processor (20K, 2000)
477
478
479 @item @code{5Kc}
480 @item @code{5Kf}
481
482 MIPS64 Processor (5K, 1999)
483
484
485 @item @code{VR5432}
486
487 MIPS64 Processor (VR, 1998)
488
489
490 @item @code{R4000}
491
492 MIPS64 Processor (MIPS III, 1991)
493 @end table
494
495 @node cpu_models_nanoMIPS
496 @subsubsection Supported CPU models for nanoMIPS hosts
497
498 The following CPU models are supported for use on nanoMIPS hosts. Administrators /
499 applications are recommended to use the CPU model that matches the generation
500 of the host CPUs in use. In a deployment with a mixture of host CPU models
501 between machines, if live migration compatibility is required, use the newest
502 CPU model that is compatible across all desired hosts.
503
504 @table @option
505 @item @code{I7200}
506
507 MIPS I7200 (nanoMIPS, 2018)
508
509 @end table
510
511 @node preferred_cpu_models_MIPS
512 @subsubsection Preferred CPU models for MIPS hosts
513
514 The following CPU models are preferred for use on different MIPS hosts:
515
516 @table @option
517 @item @code{MIPS III}
518 R4000
519
520 @item @code{MIPS32R2}
521 34Kf
522
523 @item @code{MIPS64R6}
524 I6400
525
526 @item @code{nanoMIPS}
527 I7200
528 @end table
529
530 @node cpu_model_syntax_apps
531 @subsection Syntax for configuring CPU models
532
533 The example below illustrate the approach to configuring the various
534 CPU models / features in QEMU and libvirt
535
536 @menu
537 * cpu_model_syntax_qemu:: QEMU command line
538 * cpu_model_syntax_libvirt:: Libvirt guest XML
539 @end menu
540
541 @node cpu_model_syntax_qemu
542 @subsubsection QEMU command line
543
544 @table @option
545
546 @item Host passthrough
547
548 @example
549 $ qemu-system-x86_64 -cpu host
550 @end example
551
552 With feature customization:
553
554 @example
555 $ qemu-system-x86_64 -cpu host,-vmx,...
556 @end example
557
558 @item Named CPU models
559
560 @example
561 $ qemu-system-x86_64 -cpu Westmere
562 @end example
563
564 With feature customization:
565
566 @example
567 $ qemu-system-x86_64 -cpu Westmere,+pcid,...
568 @end example
569
570 @end table
571
572 @node cpu_model_syntax_libvirt
573 @subsubsection Libvirt guest XML
574
575 @table @option
576
577 @item Host passthrough
578
579 @example
580 <cpu mode='host-passthrough'/>
581 @end example
582
583 With feature customization:
584
585 @example
586 <cpu mode='host-passthrough'>
587 <feature name="vmx" policy="disable"/>
588 ...
589 </cpu>
590 @end example
591
592 @item Host model
593
594 @example
595 <cpu mode='host-model'/>
596 @end example
597
598 With feature customization:
599
600 @example
601 <cpu mode='host-model'>
602 <feature name="vmx" policy="disable"/>
603 ...
604 </cpu>
605 @end example
606
607 @item Named model
608
609 @example
610 <cpu mode='custom'>
611 <model name="Westmere"/>
612 </cpu>
613 @end example
614
615 With feature customization:
616
617 @example
618 <cpu mode='custom'>
619 <model name="Westmere"/>
620 <feature name="pcid" policy="require"/>
621 ...
622 </cpu>
623 @end example
624
625 @end table
626
627 @c man end
628
629 @ignore
630
631 @setfilename qemu-cpu-models
632 @settitle QEMU / KVM CPU model configuration
633
634 @c man begin SEEALSO
635 The HTML documentation of QEMU for more precise information and Linux
636 user mode emulator invocation.
637 @c man end
638
639 @c man begin AUTHOR
640 Daniel P. Berrange
641 @c man end
642
643 @end ignore