4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "qemu-common.h"
22 #include "qapi/error.h"
24 #include "qemu/cutils.h"
26 #include "exec/exec-all.h"
27 #include "exec/target_page.h"
29 #include "hw/qdev-core.h"
30 #include "hw/qdev-properties.h"
31 #if !defined(CONFIG_USER_ONLY)
32 #include "hw/boards.h"
33 #include "hw/xen/xen.h"
35 #include "sysemu/kvm.h"
36 #include "sysemu/sysemu.h"
37 #include "sysemu/tcg.h"
38 #include "qemu/timer.h"
39 #include "qemu/config-file.h"
40 #include "qemu/error-report.h"
41 #include "qemu/qemu-print.h"
42 #if defined(CONFIG_USER_ONLY)
44 #else /* !CONFIG_USER_ONLY */
45 #include "exec/memory.h"
46 #include "exec/ioport.h"
47 #include "sysemu/dma.h"
48 #include "sysemu/hostmem.h"
49 #include "sysemu/hw_accel.h"
50 #include "exec/address-spaces.h"
51 #include "sysemu/xen-mapcache.h"
52 #include "trace-root.h"
54 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
55 #include <linux/falloc.h>
59 #include "qemu/rcu_queue.h"
60 #include "qemu/main-loop.h"
61 #include "translate-all.h"
62 #include "sysemu/replay.h"
64 #include "exec/memory-internal.h"
65 #include "exec/ram_addr.h"
68 #include "migration/vmstate.h"
70 #include "qemu/range.h"
72 #include "qemu/mmap-alloc.h"
75 #include "monitor/monitor.h"
77 //#define DEBUG_SUBPAGE
79 #if !defined(CONFIG_USER_ONLY)
80 /* ram_list is read under rcu_read_lock()/rcu_read_unlock(). Writes
81 * are protected by the ramlist lock.
83 RAMList ram_list
= { .blocks
= QLIST_HEAD_INITIALIZER(ram_list
.blocks
) };
85 static MemoryRegion
*system_memory
;
86 static MemoryRegion
*system_io
;
88 AddressSpace address_space_io
;
89 AddressSpace address_space_memory
;
91 static MemoryRegion io_mem_unassigned
;
94 #ifdef TARGET_PAGE_BITS_VARY
96 bool target_page_bits_decided
;
99 CPUTailQ cpus
= QTAILQ_HEAD_INITIALIZER(cpus
);
101 /* current CPU in the current thread. It is only valid inside
103 __thread CPUState
*current_cpu
;
104 /* 0 = Do not count executed instructions.
105 1 = Precise instruction counting.
106 2 = Adaptive rate instruction counting. */
109 uintptr_t qemu_host_page_size
;
110 intptr_t qemu_host_page_mask
;
112 bool set_preferred_target_page_bits(int bits
)
114 /* The target page size is the lowest common denominator for all
115 * the CPUs in the system, so we can only make it smaller, never
116 * larger. And we can't make it smaller once we've committed to
119 #ifdef TARGET_PAGE_BITS_VARY
120 assert(bits
>= TARGET_PAGE_BITS_MIN
);
121 if (target_page_bits
== 0 || target_page_bits
> bits
) {
122 if (target_page_bits_decided
) {
125 target_page_bits
= bits
;
131 #if !defined(CONFIG_USER_ONLY)
133 static void finalize_target_page_bits(void)
135 #ifdef TARGET_PAGE_BITS_VARY
136 if (target_page_bits
== 0) {
137 target_page_bits
= TARGET_PAGE_BITS_MIN
;
139 target_page_bits_decided
= true;
143 typedef struct PhysPageEntry PhysPageEntry
;
145 struct PhysPageEntry
{
146 /* How many bits skip to next level (in units of L2_SIZE). 0 for a leaf. */
148 /* index into phys_sections (!skip) or phys_map_nodes (skip) */
152 #define PHYS_MAP_NODE_NIL (((uint32_t)~0) >> 6)
154 /* Size of the L2 (and L3, etc) page tables. */
155 #define ADDR_SPACE_BITS 64
158 #define P_L2_SIZE (1 << P_L2_BITS)
160 #define P_L2_LEVELS (((ADDR_SPACE_BITS - TARGET_PAGE_BITS - 1) / P_L2_BITS) + 1)
162 typedef PhysPageEntry Node
[P_L2_SIZE
];
164 typedef struct PhysPageMap
{
167 unsigned sections_nb
;
168 unsigned sections_nb_alloc
;
170 unsigned nodes_nb_alloc
;
172 MemoryRegionSection
*sections
;
175 struct AddressSpaceDispatch
{
176 MemoryRegionSection
*mru_section
;
177 /* This is a multi-level map on the physical address space.
178 * The bottom level has pointers to MemoryRegionSections.
180 PhysPageEntry phys_map
;
184 #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
185 typedef struct subpage_t
{
189 uint16_t sub_section
[];
192 #define PHYS_SECTION_UNASSIGNED 0
194 static void io_mem_init(void);
195 static void memory_map_init(void);
196 static void tcg_log_global_after_sync(MemoryListener
*listener
);
197 static void tcg_commit(MemoryListener
*listener
);
200 * CPUAddressSpace: all the information a CPU needs about an AddressSpace
201 * @cpu: the CPU whose AddressSpace this is
202 * @as: the AddressSpace itself
203 * @memory_dispatch: its dispatch pointer (cached, RCU protected)
204 * @tcg_as_listener: listener for tracking changes to the AddressSpace
206 struct CPUAddressSpace
{
209 struct AddressSpaceDispatch
*memory_dispatch
;
210 MemoryListener tcg_as_listener
;
213 struct DirtyBitmapSnapshot
{
216 unsigned long dirty
[];
221 #if !defined(CONFIG_USER_ONLY)
223 static void phys_map_node_reserve(PhysPageMap
*map
, unsigned nodes
)
225 static unsigned alloc_hint
= 16;
226 if (map
->nodes_nb
+ nodes
> map
->nodes_nb_alloc
) {
227 map
->nodes_nb_alloc
= MAX(alloc_hint
, map
->nodes_nb
+ nodes
);
228 map
->nodes
= g_renew(Node
, map
->nodes
, map
->nodes_nb_alloc
);
229 alloc_hint
= map
->nodes_nb_alloc
;
233 static uint32_t phys_map_node_alloc(PhysPageMap
*map
, bool leaf
)
240 ret
= map
->nodes_nb
++;
242 assert(ret
!= PHYS_MAP_NODE_NIL
);
243 assert(ret
!= map
->nodes_nb_alloc
);
245 e
.skip
= leaf
? 0 : 1;
246 e
.ptr
= leaf
? PHYS_SECTION_UNASSIGNED
: PHYS_MAP_NODE_NIL
;
247 for (i
= 0; i
< P_L2_SIZE
; ++i
) {
248 memcpy(&p
[i
], &e
, sizeof(e
));
253 static void phys_page_set_level(PhysPageMap
*map
, PhysPageEntry
*lp
,
254 hwaddr
*index
, uint64_t *nb
, uint16_t leaf
,
258 hwaddr step
= (hwaddr
)1 << (level
* P_L2_BITS
);
260 if (lp
->skip
&& lp
->ptr
== PHYS_MAP_NODE_NIL
) {
261 lp
->ptr
= phys_map_node_alloc(map
, level
== 0);
263 p
= map
->nodes
[lp
->ptr
];
264 lp
= &p
[(*index
>> (level
* P_L2_BITS
)) & (P_L2_SIZE
- 1)];
266 while (*nb
&& lp
< &p
[P_L2_SIZE
]) {
267 if ((*index
& (step
- 1)) == 0 && *nb
>= step
) {
273 phys_page_set_level(map
, lp
, index
, nb
, leaf
, level
- 1);
279 static void phys_page_set(AddressSpaceDispatch
*d
,
280 hwaddr index
, uint64_t nb
,
283 /* Wildly overreserve - it doesn't matter much. */
284 phys_map_node_reserve(&d
->map
, 3 * P_L2_LEVELS
);
286 phys_page_set_level(&d
->map
, &d
->phys_map
, &index
, &nb
, leaf
, P_L2_LEVELS
- 1);
289 /* Compact a non leaf page entry. Simply detect that the entry has a single child,
290 * and update our entry so we can skip it and go directly to the destination.
292 static void phys_page_compact(PhysPageEntry
*lp
, Node
*nodes
)
294 unsigned valid_ptr
= P_L2_SIZE
;
299 if (lp
->ptr
== PHYS_MAP_NODE_NIL
) {
304 for (i
= 0; i
< P_L2_SIZE
; i
++) {
305 if (p
[i
].ptr
== PHYS_MAP_NODE_NIL
) {
312 phys_page_compact(&p
[i
], nodes
);
316 /* We can only compress if there's only one child. */
321 assert(valid_ptr
< P_L2_SIZE
);
323 /* Don't compress if it won't fit in the # of bits we have. */
324 if (P_L2_LEVELS
>= (1 << 6) &&
325 lp
->skip
+ p
[valid_ptr
].skip
>= (1 << 6)) {
329 lp
->ptr
= p
[valid_ptr
].ptr
;
330 if (!p
[valid_ptr
].skip
) {
331 /* If our only child is a leaf, make this a leaf. */
332 /* By design, we should have made this node a leaf to begin with so we
333 * should never reach here.
334 * But since it's so simple to handle this, let's do it just in case we
339 lp
->skip
+= p
[valid_ptr
].skip
;
343 void address_space_dispatch_compact(AddressSpaceDispatch
*d
)
345 if (d
->phys_map
.skip
) {
346 phys_page_compact(&d
->phys_map
, d
->map
.nodes
);
350 static inline bool section_covers_addr(const MemoryRegionSection
*section
,
353 /* Memory topology clips a memory region to [0, 2^64); size.hi > 0 means
354 * the section must cover the entire address space.
356 return int128_gethi(section
->size
) ||
357 range_covers_byte(section
->offset_within_address_space
,
358 int128_getlo(section
->size
), addr
);
361 static MemoryRegionSection
*phys_page_find(AddressSpaceDispatch
*d
, hwaddr addr
)
363 PhysPageEntry lp
= d
->phys_map
, *p
;
364 Node
*nodes
= d
->map
.nodes
;
365 MemoryRegionSection
*sections
= d
->map
.sections
;
366 hwaddr index
= addr
>> TARGET_PAGE_BITS
;
369 for (i
= P_L2_LEVELS
; lp
.skip
&& (i
-= lp
.skip
) >= 0;) {
370 if (lp
.ptr
== PHYS_MAP_NODE_NIL
) {
371 return §ions
[PHYS_SECTION_UNASSIGNED
];
374 lp
= p
[(index
>> (i
* P_L2_BITS
)) & (P_L2_SIZE
- 1)];
377 if (section_covers_addr(§ions
[lp
.ptr
], addr
)) {
378 return §ions
[lp
.ptr
];
380 return §ions
[PHYS_SECTION_UNASSIGNED
];
384 /* Called from RCU critical section */
385 static MemoryRegionSection
*address_space_lookup_region(AddressSpaceDispatch
*d
,
387 bool resolve_subpage
)
389 MemoryRegionSection
*section
= atomic_read(&d
->mru_section
);
392 if (!section
|| section
== &d
->map
.sections
[PHYS_SECTION_UNASSIGNED
] ||
393 !section_covers_addr(section
, addr
)) {
394 section
= phys_page_find(d
, addr
);
395 atomic_set(&d
->mru_section
, section
);
397 if (resolve_subpage
&& section
->mr
->subpage
) {
398 subpage
= container_of(section
->mr
, subpage_t
, iomem
);
399 section
= &d
->map
.sections
[subpage
->sub_section
[SUBPAGE_IDX(addr
)]];
404 /* Called from RCU critical section */
405 static MemoryRegionSection
*
406 address_space_translate_internal(AddressSpaceDispatch
*d
, hwaddr addr
, hwaddr
*xlat
,
407 hwaddr
*plen
, bool resolve_subpage
)
409 MemoryRegionSection
*section
;
413 section
= address_space_lookup_region(d
, addr
, resolve_subpage
);
414 /* Compute offset within MemoryRegionSection */
415 addr
-= section
->offset_within_address_space
;
417 /* Compute offset within MemoryRegion */
418 *xlat
= addr
+ section
->offset_within_region
;
422 /* MMIO registers can be expected to perform full-width accesses based only
423 * on their address, without considering adjacent registers that could
424 * decode to completely different MemoryRegions. When such registers
425 * exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO
426 * regions overlap wildly. For this reason we cannot clamp the accesses
429 * If the length is small (as is the case for address_space_ldl/stl),
430 * everything works fine. If the incoming length is large, however,
431 * the caller really has to do the clamping through memory_access_size.
433 if (memory_region_is_ram(mr
)) {
434 diff
= int128_sub(section
->size
, int128_make64(addr
));
435 *plen
= int128_get64(int128_min(diff
, int128_make64(*plen
)));
441 * address_space_translate_iommu - translate an address through an IOMMU
442 * memory region and then through the target address space.
444 * @iommu_mr: the IOMMU memory region that we start the translation from
445 * @addr: the address to be translated through the MMU
446 * @xlat: the translated address offset within the destination memory region.
447 * It cannot be %NULL.
448 * @plen_out: valid read/write length of the translated address. It
450 * @page_mask_out: page mask for the translated address. This
451 * should only be meaningful for IOMMU translated
452 * addresses, since there may be huge pages that this bit
453 * would tell. It can be %NULL if we don't care about it.
454 * @is_write: whether the translation operation is for write
455 * @is_mmio: whether this can be MMIO, set true if it can
456 * @target_as: the address space targeted by the IOMMU
457 * @attrs: transaction attributes
459 * This function is called from RCU critical section. It is the common
460 * part of flatview_do_translate and address_space_translate_cached.
462 static MemoryRegionSection
address_space_translate_iommu(IOMMUMemoryRegion
*iommu_mr
,
465 hwaddr
*page_mask_out
,
468 AddressSpace
**target_as
,
471 MemoryRegionSection
*section
;
472 hwaddr page_mask
= (hwaddr
)-1;
476 IOMMUMemoryRegionClass
*imrc
= memory_region_get_iommu_class_nocheck(iommu_mr
);
480 if (imrc
->attrs_to_index
) {
481 iommu_idx
= imrc
->attrs_to_index(iommu_mr
, attrs
);
484 iotlb
= imrc
->translate(iommu_mr
, addr
, is_write
?
485 IOMMU_WO
: IOMMU_RO
, iommu_idx
);
487 if (!(iotlb
.perm
& (1 << is_write
))) {
491 addr
= ((iotlb
.translated_addr
& ~iotlb
.addr_mask
)
492 | (addr
& iotlb
.addr_mask
));
493 page_mask
&= iotlb
.addr_mask
;
494 *plen_out
= MIN(*plen_out
, (addr
| iotlb
.addr_mask
) - addr
+ 1);
495 *target_as
= iotlb
.target_as
;
497 section
= address_space_translate_internal(
498 address_space_to_dispatch(iotlb
.target_as
), addr
, xlat
,
501 iommu_mr
= memory_region_get_iommu(section
->mr
);
502 } while (unlikely(iommu_mr
));
505 *page_mask_out
= page_mask
;
510 return (MemoryRegionSection
) { .mr
= &io_mem_unassigned
};
514 * flatview_do_translate - translate an address in FlatView
516 * @fv: the flat view that we want to translate on
517 * @addr: the address to be translated in above address space
518 * @xlat: the translated address offset within memory region. It
520 * @plen_out: valid read/write length of the translated address. It
521 * can be @NULL when we don't care about it.
522 * @page_mask_out: page mask for the translated address. This
523 * should only be meaningful for IOMMU translated
524 * addresses, since there may be huge pages that this bit
525 * would tell. It can be @NULL if we don't care about it.
526 * @is_write: whether the translation operation is for write
527 * @is_mmio: whether this can be MMIO, set true if it can
528 * @target_as: the address space targeted by the IOMMU
529 * @attrs: memory transaction attributes
531 * This function is called from RCU critical section
533 static MemoryRegionSection
flatview_do_translate(FlatView
*fv
,
537 hwaddr
*page_mask_out
,
540 AddressSpace
**target_as
,
543 MemoryRegionSection
*section
;
544 IOMMUMemoryRegion
*iommu_mr
;
545 hwaddr plen
= (hwaddr
)(-1);
551 section
= address_space_translate_internal(
552 flatview_to_dispatch(fv
), addr
, xlat
,
555 iommu_mr
= memory_region_get_iommu(section
->mr
);
556 if (unlikely(iommu_mr
)) {
557 return address_space_translate_iommu(iommu_mr
, xlat
,
558 plen_out
, page_mask_out
,
563 /* Not behind an IOMMU, use default page size. */
564 *page_mask_out
= ~TARGET_PAGE_MASK
;
570 /* Called from RCU critical section */
571 IOMMUTLBEntry
address_space_get_iotlb_entry(AddressSpace
*as
, hwaddr addr
,
572 bool is_write
, MemTxAttrs attrs
)
574 MemoryRegionSection section
;
575 hwaddr xlat
, page_mask
;
578 * This can never be MMIO, and we don't really care about plen,
581 section
= flatview_do_translate(address_space_to_flatview(as
), addr
, &xlat
,
582 NULL
, &page_mask
, is_write
, false, &as
,
585 /* Illegal translation */
586 if (section
.mr
== &io_mem_unassigned
) {
590 /* Convert memory region offset into address space offset */
591 xlat
+= section
.offset_within_address_space
-
592 section
.offset_within_region
;
594 return (IOMMUTLBEntry
) {
596 .iova
= addr
& ~page_mask
,
597 .translated_addr
= xlat
& ~page_mask
,
598 .addr_mask
= page_mask
,
599 /* IOTLBs are for DMAs, and DMA only allows on RAMs. */
604 return (IOMMUTLBEntry
) {0};
607 /* Called from RCU critical section */
608 MemoryRegion
*flatview_translate(FlatView
*fv
, hwaddr addr
, hwaddr
*xlat
,
609 hwaddr
*plen
, bool is_write
,
613 MemoryRegionSection section
;
614 AddressSpace
*as
= NULL
;
616 /* This can be MMIO, so setup MMIO bit. */
617 section
= flatview_do_translate(fv
, addr
, xlat
, plen
, NULL
,
618 is_write
, true, &as
, attrs
);
621 if (xen_enabled() && memory_access_is_direct(mr
, is_write
)) {
622 hwaddr page
= ((addr
& TARGET_PAGE_MASK
) + TARGET_PAGE_SIZE
) - addr
;
623 *plen
= MIN(page
, *plen
);
629 typedef struct TCGIOMMUNotifier
{
637 static void tcg_iommu_unmap_notify(IOMMUNotifier
*n
, IOMMUTLBEntry
*iotlb
)
639 TCGIOMMUNotifier
*notifier
= container_of(n
, TCGIOMMUNotifier
, n
);
641 if (!notifier
->active
) {
644 tlb_flush(notifier
->cpu
);
645 notifier
->active
= false;
646 /* We leave the notifier struct on the list to avoid reallocating it later.
647 * Generally the number of IOMMUs a CPU deals with will be small.
648 * In any case we can't unregister the iommu notifier from a notify
653 static void tcg_register_iommu_notifier(CPUState
*cpu
,
654 IOMMUMemoryRegion
*iommu_mr
,
657 /* Make sure this CPU has an IOMMU notifier registered for this
658 * IOMMU/IOMMU index combination, so that we can flush its TLB
659 * when the IOMMU tells us the mappings we've cached have changed.
661 MemoryRegion
*mr
= MEMORY_REGION(iommu_mr
);
662 TCGIOMMUNotifier
*notifier
;
665 for (i
= 0; i
< cpu
->iommu_notifiers
->len
; i
++) {
666 notifier
= g_array_index(cpu
->iommu_notifiers
, TCGIOMMUNotifier
*, i
);
667 if (notifier
->mr
== mr
&& notifier
->iommu_idx
== iommu_idx
) {
671 if (i
== cpu
->iommu_notifiers
->len
) {
672 /* Not found, add a new entry at the end of the array */
673 cpu
->iommu_notifiers
= g_array_set_size(cpu
->iommu_notifiers
, i
+ 1);
674 notifier
= g_new0(TCGIOMMUNotifier
, 1);
675 g_array_index(cpu
->iommu_notifiers
, TCGIOMMUNotifier
*, i
) = notifier
;
678 notifier
->iommu_idx
= iommu_idx
;
680 /* Rather than trying to register interest in the specific part
681 * of the iommu's address space that we've accessed and then
682 * expand it later as subsequent accesses touch more of it, we
683 * just register interest in the whole thing, on the assumption
684 * that iommu reconfiguration will be rare.
686 iommu_notifier_init(¬ifier
->n
,
687 tcg_iommu_unmap_notify
,
688 IOMMU_NOTIFIER_UNMAP
,
692 memory_region_register_iommu_notifier(notifier
->mr
, ¬ifier
->n
);
695 if (!notifier
->active
) {
696 notifier
->active
= true;
700 static void tcg_iommu_free_notifier_list(CPUState
*cpu
)
702 /* Destroy the CPU's notifier list */
704 TCGIOMMUNotifier
*notifier
;
706 for (i
= 0; i
< cpu
->iommu_notifiers
->len
; i
++) {
707 notifier
= g_array_index(cpu
->iommu_notifiers
, TCGIOMMUNotifier
*, i
);
708 memory_region_unregister_iommu_notifier(notifier
->mr
, ¬ifier
->n
);
711 g_array_free(cpu
->iommu_notifiers
, true);
714 /* Called from RCU critical section */
715 MemoryRegionSection
*
716 address_space_translate_for_iotlb(CPUState
*cpu
, int asidx
, hwaddr addr
,
717 hwaddr
*xlat
, hwaddr
*plen
,
718 MemTxAttrs attrs
, int *prot
)
720 MemoryRegionSection
*section
;
721 IOMMUMemoryRegion
*iommu_mr
;
722 IOMMUMemoryRegionClass
*imrc
;
725 AddressSpaceDispatch
*d
= atomic_rcu_read(&cpu
->cpu_ases
[asidx
].memory_dispatch
);
728 section
= address_space_translate_internal(d
, addr
, &addr
, plen
, false);
730 iommu_mr
= memory_region_get_iommu(section
->mr
);
735 imrc
= memory_region_get_iommu_class_nocheck(iommu_mr
);
737 iommu_idx
= imrc
->attrs_to_index(iommu_mr
, attrs
);
738 tcg_register_iommu_notifier(cpu
, iommu_mr
, iommu_idx
);
739 /* We need all the permissions, so pass IOMMU_NONE so the IOMMU
740 * doesn't short-cut its translation table walk.
742 iotlb
= imrc
->translate(iommu_mr
, addr
, IOMMU_NONE
, iommu_idx
);
743 addr
= ((iotlb
.translated_addr
& ~iotlb
.addr_mask
)
744 | (addr
& iotlb
.addr_mask
));
745 /* Update the caller's prot bits to remove permissions the IOMMU
746 * is giving us a failure response for. If we get down to no
747 * permissions left at all we can give up now.
749 if (!(iotlb
.perm
& IOMMU_RO
)) {
750 *prot
&= ~(PAGE_READ
| PAGE_EXEC
);
752 if (!(iotlb
.perm
& IOMMU_WO
)) {
753 *prot
&= ~PAGE_WRITE
;
760 d
= flatview_to_dispatch(address_space_to_flatview(iotlb
.target_as
));
763 assert(!memory_region_is_iommu(section
->mr
));
768 return &d
->map
.sections
[PHYS_SECTION_UNASSIGNED
];
772 #if !defined(CONFIG_USER_ONLY)
774 static int cpu_common_post_load(void *opaque
, int version_id
)
776 CPUState
*cpu
= opaque
;
778 /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
779 version_id is increased. */
780 cpu
->interrupt_request
&= ~0x01;
783 /* loadvm has just updated the content of RAM, bypassing the
784 * usual mechanisms that ensure we flush TBs for writes to
785 * memory we've translated code from. So we must flush all TBs,
786 * which will now be stale.
793 static int cpu_common_pre_load(void *opaque
)
795 CPUState
*cpu
= opaque
;
797 cpu
->exception_index
= -1;
802 static bool cpu_common_exception_index_needed(void *opaque
)
804 CPUState
*cpu
= opaque
;
806 return tcg_enabled() && cpu
->exception_index
!= -1;
809 static const VMStateDescription vmstate_cpu_common_exception_index
= {
810 .name
= "cpu_common/exception_index",
812 .minimum_version_id
= 1,
813 .needed
= cpu_common_exception_index_needed
,
814 .fields
= (VMStateField
[]) {
815 VMSTATE_INT32(exception_index
, CPUState
),
816 VMSTATE_END_OF_LIST()
820 static bool cpu_common_crash_occurred_needed(void *opaque
)
822 CPUState
*cpu
= opaque
;
824 return cpu
->crash_occurred
;
827 static const VMStateDescription vmstate_cpu_common_crash_occurred
= {
828 .name
= "cpu_common/crash_occurred",
830 .minimum_version_id
= 1,
831 .needed
= cpu_common_crash_occurred_needed
,
832 .fields
= (VMStateField
[]) {
833 VMSTATE_BOOL(crash_occurred
, CPUState
),
834 VMSTATE_END_OF_LIST()
838 const VMStateDescription vmstate_cpu_common
= {
839 .name
= "cpu_common",
841 .minimum_version_id
= 1,
842 .pre_load
= cpu_common_pre_load
,
843 .post_load
= cpu_common_post_load
,
844 .fields
= (VMStateField
[]) {
845 VMSTATE_UINT32(halted
, CPUState
),
846 VMSTATE_UINT32(interrupt_request
, CPUState
),
847 VMSTATE_END_OF_LIST()
849 .subsections
= (const VMStateDescription
*[]) {
850 &vmstate_cpu_common_exception_index
,
851 &vmstate_cpu_common_crash_occurred
,
858 CPUState
*qemu_get_cpu(int index
)
863 if (cpu
->cpu_index
== index
) {
871 #if !defined(CONFIG_USER_ONLY)
872 void cpu_address_space_init(CPUState
*cpu
, int asidx
,
873 const char *prefix
, MemoryRegion
*mr
)
875 CPUAddressSpace
*newas
;
876 AddressSpace
*as
= g_new0(AddressSpace
, 1);
880 as_name
= g_strdup_printf("%s-%d", prefix
, cpu
->cpu_index
);
881 address_space_init(as
, mr
, as_name
);
884 /* Target code should have set num_ases before calling us */
885 assert(asidx
< cpu
->num_ases
);
888 /* address space 0 gets the convenience alias */
892 /* KVM cannot currently support multiple address spaces. */
893 assert(asidx
== 0 || !kvm_enabled());
895 if (!cpu
->cpu_ases
) {
896 cpu
->cpu_ases
= g_new0(CPUAddressSpace
, cpu
->num_ases
);
899 newas
= &cpu
->cpu_ases
[asidx
];
903 newas
->tcg_as_listener
.log_global_after_sync
= tcg_log_global_after_sync
;
904 newas
->tcg_as_listener
.commit
= tcg_commit
;
905 memory_listener_register(&newas
->tcg_as_listener
, as
);
909 AddressSpace
*cpu_get_address_space(CPUState
*cpu
, int asidx
)
911 /* Return the AddressSpace corresponding to the specified index */
912 return cpu
->cpu_ases
[asidx
].as
;
916 void cpu_exec_unrealizefn(CPUState
*cpu
)
918 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
920 cpu_list_remove(cpu
);
922 if (cc
->vmsd
!= NULL
) {
923 vmstate_unregister(NULL
, cc
->vmsd
, cpu
);
925 if (qdev_get_vmsd(DEVICE(cpu
)) == NULL
) {
926 vmstate_unregister(NULL
, &vmstate_cpu_common
, cpu
);
928 #ifndef CONFIG_USER_ONLY
929 tcg_iommu_free_notifier_list(cpu
);
933 Property cpu_common_props
[] = {
934 #ifndef CONFIG_USER_ONLY
935 /* Create a memory property for softmmu CPU object,
936 * so users can wire up its memory. (This can't go in hw/core/cpu.c
937 * because that file is compiled only once for both user-mode
938 * and system builds.) The default if no link is set up is to use
939 * the system address space.
941 DEFINE_PROP_LINK("memory", CPUState
, memory
, TYPE_MEMORY_REGION
,
944 DEFINE_PROP_END_OF_LIST(),
947 void cpu_exec_initfn(CPUState
*cpu
)
952 #ifndef CONFIG_USER_ONLY
953 cpu
->thread_id
= qemu_get_thread_id();
954 cpu
->memory
= system_memory
;
955 object_ref(OBJECT(cpu
->memory
));
959 void cpu_exec_realizefn(CPUState
*cpu
, Error
**errp
)
961 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
962 static bool tcg_target_initialized
;
966 if (tcg_enabled() && !tcg_target_initialized
) {
967 tcg_target_initialized
= true;
968 cc
->tcg_initialize();
972 #ifndef CONFIG_USER_ONLY
973 if (qdev_get_vmsd(DEVICE(cpu
)) == NULL
) {
974 vmstate_register(NULL
, cpu
->cpu_index
, &vmstate_cpu_common
, cpu
);
976 if (cc
->vmsd
!= NULL
) {
977 vmstate_register(NULL
, cpu
->cpu_index
, cc
->vmsd
, cpu
);
980 cpu
->iommu_notifiers
= g_array_new(false, true, sizeof(TCGIOMMUNotifier
*));
984 const char *parse_cpu_option(const char *cpu_option
)
988 gchar
**model_pieces
;
989 const char *cpu_type
;
991 model_pieces
= g_strsplit(cpu_option
, ",", 2);
992 if (!model_pieces
[0]) {
993 error_report("-cpu option cannot be empty");
997 oc
= cpu_class_by_name(CPU_RESOLVING_TYPE
, model_pieces
[0]);
999 error_report("unable to find CPU model '%s'", model_pieces
[0]);
1000 g_strfreev(model_pieces
);
1004 cpu_type
= object_class_get_name(oc
);
1006 cc
->parse_features(cpu_type
, model_pieces
[1], &error_fatal
);
1007 g_strfreev(model_pieces
);
1011 #if defined(CONFIG_USER_ONLY)
1012 void tb_invalidate_phys_addr(target_ulong addr
)
1015 tb_invalidate_phys_page_range(addr
, addr
+ 1, 0);
1019 static void breakpoint_invalidate(CPUState
*cpu
, target_ulong pc
)
1021 tb_invalidate_phys_addr(pc
);
1024 void tb_invalidate_phys_addr(AddressSpace
*as
, hwaddr addr
, MemTxAttrs attrs
)
1026 ram_addr_t ram_addr
;
1030 if (!tcg_enabled()) {
1035 mr
= address_space_translate(as
, addr
, &addr
, &l
, false, attrs
);
1036 if (!(memory_region_is_ram(mr
)
1037 || memory_region_is_romd(mr
))) {
1041 ram_addr
= memory_region_get_ram_addr(mr
) + addr
;
1042 tb_invalidate_phys_page_range(ram_addr
, ram_addr
+ 1, 0);
1046 static void breakpoint_invalidate(CPUState
*cpu
, target_ulong pc
)
1049 hwaddr phys
= cpu_get_phys_page_attrs_debug(cpu
, pc
, &attrs
);
1050 int asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
1052 /* Locks grabbed by tb_invalidate_phys_addr */
1053 tb_invalidate_phys_addr(cpu
->cpu_ases
[asidx
].as
,
1054 phys
| (pc
& ~TARGET_PAGE_MASK
), attrs
);
1059 #ifndef CONFIG_USER_ONLY
1060 /* Add a watchpoint. */
1061 int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
1062 int flags
, CPUWatchpoint
**watchpoint
)
1066 /* forbid ranges which are empty or run off the end of the address space */
1067 if (len
== 0 || (addr
+ len
- 1) < addr
) {
1068 error_report("tried to set invalid watchpoint at %"
1069 VADDR_PRIx
", len=%" VADDR_PRIu
, addr
, len
);
1072 wp
= g_malloc(sizeof(*wp
));
1078 /* keep all GDB-injected watchpoints in front */
1079 if (flags
& BP_GDB
) {
1080 QTAILQ_INSERT_HEAD(&cpu
->watchpoints
, wp
, entry
);
1082 QTAILQ_INSERT_TAIL(&cpu
->watchpoints
, wp
, entry
);
1085 tlb_flush_page(cpu
, addr
);
1092 /* Remove a specific watchpoint. */
1093 int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
, vaddr len
,
1098 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
1099 if (addr
== wp
->vaddr
&& len
== wp
->len
1100 && flags
== (wp
->flags
& ~BP_WATCHPOINT_HIT
)) {
1101 cpu_watchpoint_remove_by_ref(cpu
, wp
);
1108 /* Remove a specific watchpoint by reference. */
1109 void cpu_watchpoint_remove_by_ref(CPUState
*cpu
, CPUWatchpoint
*watchpoint
)
1111 QTAILQ_REMOVE(&cpu
->watchpoints
, watchpoint
, entry
);
1113 tlb_flush_page(cpu
, watchpoint
->vaddr
);
1118 /* Remove all matching watchpoints. */
1119 void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
)
1121 CPUWatchpoint
*wp
, *next
;
1123 QTAILQ_FOREACH_SAFE(wp
, &cpu
->watchpoints
, entry
, next
) {
1124 if (wp
->flags
& mask
) {
1125 cpu_watchpoint_remove_by_ref(cpu
, wp
);
1130 /* Return true if this watchpoint address matches the specified
1131 * access (ie the address range covered by the watchpoint overlaps
1132 * partially or completely with the address range covered by the
1135 static inline bool watchpoint_address_matches(CPUWatchpoint
*wp
,
1136 vaddr addr
, vaddr len
)
1138 /* We know the lengths are non-zero, but a little caution is
1139 * required to avoid errors in the case where the range ends
1140 * exactly at the top of the address space and so addr + len
1141 * wraps round to zero.
1143 vaddr wpend
= wp
->vaddr
+ wp
->len
- 1;
1144 vaddr addrend
= addr
+ len
- 1;
1146 return !(addr
> wpend
|| wp
->vaddr
> addrend
);
1149 /* Return flags for watchpoints that match addr + prot. */
1150 int cpu_watchpoint_address_matches(CPUState
*cpu
, vaddr addr
, vaddr len
)
1155 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
1156 if (watchpoint_address_matches(wp
, addr
, TARGET_PAGE_SIZE
)) {
1162 #endif /* !CONFIG_USER_ONLY */
1164 /* Add a breakpoint. */
1165 int cpu_breakpoint_insert(CPUState
*cpu
, vaddr pc
, int flags
,
1166 CPUBreakpoint
**breakpoint
)
1170 bp
= g_malloc(sizeof(*bp
));
1175 /* keep all GDB-injected breakpoints in front */
1176 if (flags
& BP_GDB
) {
1177 QTAILQ_INSERT_HEAD(&cpu
->breakpoints
, bp
, entry
);
1179 QTAILQ_INSERT_TAIL(&cpu
->breakpoints
, bp
, entry
);
1182 breakpoint_invalidate(cpu
, pc
);
1190 /* Remove a specific breakpoint. */
1191 int cpu_breakpoint_remove(CPUState
*cpu
, vaddr pc
, int flags
)
1195 QTAILQ_FOREACH(bp
, &cpu
->breakpoints
, entry
) {
1196 if (bp
->pc
== pc
&& bp
->flags
== flags
) {
1197 cpu_breakpoint_remove_by_ref(cpu
, bp
);
1204 /* Remove a specific breakpoint by reference. */
1205 void cpu_breakpoint_remove_by_ref(CPUState
*cpu
, CPUBreakpoint
*breakpoint
)
1207 QTAILQ_REMOVE(&cpu
->breakpoints
, breakpoint
, entry
);
1209 breakpoint_invalidate(cpu
, breakpoint
->pc
);
1214 /* Remove all matching breakpoints. */
1215 void cpu_breakpoint_remove_all(CPUState
*cpu
, int mask
)
1217 CPUBreakpoint
*bp
, *next
;
1219 QTAILQ_FOREACH_SAFE(bp
, &cpu
->breakpoints
, entry
, next
) {
1220 if (bp
->flags
& mask
) {
1221 cpu_breakpoint_remove_by_ref(cpu
, bp
);
1226 /* enable or disable single step mode. EXCP_DEBUG is returned by the
1227 CPU loop after each instruction */
1228 void cpu_single_step(CPUState
*cpu
, int enabled
)
1230 if (cpu
->singlestep_enabled
!= enabled
) {
1231 cpu
->singlestep_enabled
= enabled
;
1232 if (kvm_enabled()) {
1233 kvm_update_guest_debug(cpu
, 0);
1235 /* must flush all the translated code to avoid inconsistencies */
1236 /* XXX: only flush what is necessary */
1242 void cpu_abort(CPUState
*cpu
, const char *fmt
, ...)
1249 fprintf(stderr
, "qemu: fatal: ");
1250 vfprintf(stderr
, fmt
, ap
);
1251 fprintf(stderr
, "\n");
1252 cpu_dump_state(cpu
, stderr
, CPU_DUMP_FPU
| CPU_DUMP_CCOP
);
1253 if (qemu_log_separate()) {
1255 qemu_log("qemu: fatal: ");
1256 qemu_log_vprintf(fmt
, ap2
);
1258 log_cpu_state(cpu
, CPU_DUMP_FPU
| CPU_DUMP_CCOP
);
1266 #if defined(CONFIG_USER_ONLY)
1268 struct sigaction act
;
1269 sigfillset(&act
.sa_mask
);
1270 act
.sa_handler
= SIG_DFL
;
1272 sigaction(SIGABRT
, &act
, NULL
);
1278 #if !defined(CONFIG_USER_ONLY)
1279 /* Called from RCU critical section */
1280 static RAMBlock
*qemu_get_ram_block(ram_addr_t addr
)
1284 block
= atomic_rcu_read(&ram_list
.mru_block
);
1285 if (block
&& addr
- block
->offset
< block
->max_length
) {
1288 RAMBLOCK_FOREACH(block
) {
1289 if (addr
- block
->offset
< block
->max_length
) {
1294 fprintf(stderr
, "Bad ram offset %" PRIx64
"\n", (uint64_t)addr
);
1298 /* It is safe to write mru_block outside the iothread lock. This
1303 * xxx removed from list
1307 * call_rcu(reclaim_ramblock, xxx);
1310 * atomic_rcu_set is not needed here. The block was already published
1311 * when it was placed into the list. Here we're just making an extra
1312 * copy of the pointer.
1314 ram_list
.mru_block
= block
;
1318 static void tlb_reset_dirty_range_all(ram_addr_t start
, ram_addr_t length
)
1325 assert(tcg_enabled());
1326 end
= TARGET_PAGE_ALIGN(start
+ length
);
1327 start
&= TARGET_PAGE_MASK
;
1330 block
= qemu_get_ram_block(start
);
1331 assert(block
== qemu_get_ram_block(end
- 1));
1332 start1
= (uintptr_t)ramblock_ptr(block
, start
- block
->offset
);
1334 tlb_reset_dirty(cpu
, start1
, length
);
1339 /* Note: start and end must be within the same ram block. */
1340 bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start
,
1344 DirtyMemoryBlocks
*blocks
;
1345 unsigned long end
, page
;
1348 uint64_t mr_offset
, mr_size
;
1354 end
= TARGET_PAGE_ALIGN(start
+ length
) >> TARGET_PAGE_BITS
;
1355 page
= start
>> TARGET_PAGE_BITS
;
1359 blocks
= atomic_rcu_read(&ram_list
.dirty_memory
[client
]);
1360 ramblock
= qemu_get_ram_block(start
);
1361 /* Range sanity check on the ramblock */
1362 assert(start
>= ramblock
->offset
&&
1363 start
+ length
<= ramblock
->offset
+ ramblock
->used_length
);
1365 while (page
< end
) {
1366 unsigned long idx
= page
/ DIRTY_MEMORY_BLOCK_SIZE
;
1367 unsigned long offset
= page
% DIRTY_MEMORY_BLOCK_SIZE
;
1368 unsigned long num
= MIN(end
- page
, DIRTY_MEMORY_BLOCK_SIZE
- offset
);
1370 dirty
|= bitmap_test_and_clear_atomic(blocks
->blocks
[idx
],
1375 mr_offset
= (ram_addr_t
)(page
<< TARGET_PAGE_BITS
) - ramblock
->offset
;
1376 mr_size
= (end
- page
) << TARGET_PAGE_BITS
;
1377 memory_region_clear_dirty_bitmap(ramblock
->mr
, mr_offset
, mr_size
);
1381 if (dirty
&& tcg_enabled()) {
1382 tlb_reset_dirty_range_all(start
, length
);
1388 DirtyBitmapSnapshot
*cpu_physical_memory_snapshot_and_clear_dirty
1389 (MemoryRegion
*mr
, hwaddr offset
, hwaddr length
, unsigned client
)
1391 DirtyMemoryBlocks
*blocks
;
1392 ram_addr_t start
= memory_region_get_ram_addr(mr
) + offset
;
1393 unsigned long align
= 1UL << (TARGET_PAGE_BITS
+ BITS_PER_LEVEL
);
1394 ram_addr_t first
= QEMU_ALIGN_DOWN(start
, align
);
1395 ram_addr_t last
= QEMU_ALIGN_UP(start
+ length
, align
);
1396 DirtyBitmapSnapshot
*snap
;
1397 unsigned long page
, end
, dest
;
1399 snap
= g_malloc0(sizeof(*snap
) +
1400 ((last
- first
) >> (TARGET_PAGE_BITS
+ 3)));
1401 snap
->start
= first
;
1404 page
= first
>> TARGET_PAGE_BITS
;
1405 end
= last
>> TARGET_PAGE_BITS
;
1410 blocks
= atomic_rcu_read(&ram_list
.dirty_memory
[client
]);
1412 while (page
< end
) {
1413 unsigned long idx
= page
/ DIRTY_MEMORY_BLOCK_SIZE
;
1414 unsigned long offset
= page
% DIRTY_MEMORY_BLOCK_SIZE
;
1415 unsigned long num
= MIN(end
- page
, DIRTY_MEMORY_BLOCK_SIZE
- offset
);
1417 assert(QEMU_IS_ALIGNED(offset
, (1 << BITS_PER_LEVEL
)));
1418 assert(QEMU_IS_ALIGNED(num
, (1 << BITS_PER_LEVEL
)));
1419 offset
>>= BITS_PER_LEVEL
;
1421 bitmap_copy_and_clear_atomic(snap
->dirty
+ dest
,
1422 blocks
->blocks
[idx
] + offset
,
1425 dest
+= num
>> BITS_PER_LEVEL
;
1430 if (tcg_enabled()) {
1431 tlb_reset_dirty_range_all(start
, length
);
1434 memory_region_clear_dirty_bitmap(mr
, offset
, length
);
1439 bool cpu_physical_memory_snapshot_get_dirty(DirtyBitmapSnapshot
*snap
,
1443 unsigned long page
, end
;
1445 assert(start
>= snap
->start
);
1446 assert(start
+ length
<= snap
->end
);
1448 end
= TARGET_PAGE_ALIGN(start
+ length
- snap
->start
) >> TARGET_PAGE_BITS
;
1449 page
= (start
- snap
->start
) >> TARGET_PAGE_BITS
;
1451 while (page
< end
) {
1452 if (test_bit(page
, snap
->dirty
)) {
1460 /* Called from RCU critical section */
1461 hwaddr
memory_region_section_get_iotlb(CPUState
*cpu
,
1462 MemoryRegionSection
*section
,
1464 hwaddr paddr
, hwaddr xlat
,
1466 target_ulong
*address
)
1470 if (memory_region_is_ram(section
->mr
)) {
1472 iotlb
= memory_region_get_ram_addr(section
->mr
) + xlat
;
1474 AddressSpaceDispatch
*d
;
1476 d
= flatview_to_dispatch(section
->fv
);
1477 iotlb
= section
- d
->map
.sections
;
1483 #endif /* defined(CONFIG_USER_ONLY) */
1485 #if !defined(CONFIG_USER_ONLY)
1487 static int subpage_register(subpage_t
*mmio
, uint32_t start
, uint32_t end
,
1489 static subpage_t
*subpage_init(FlatView
*fv
, hwaddr base
);
1491 static void *(*phys_mem_alloc
)(size_t size
, uint64_t *align
, bool shared
) =
1492 qemu_anon_ram_alloc
;
1495 * Set a custom physical guest memory alloator.
1496 * Accelerators with unusual needs may need this. Hopefully, we can
1497 * get rid of it eventually.
1499 void phys_mem_set_alloc(void *(*alloc
)(size_t, uint64_t *align
, bool shared
))
1501 phys_mem_alloc
= alloc
;
1504 static uint16_t phys_section_add(PhysPageMap
*map
,
1505 MemoryRegionSection
*section
)
1507 /* The physical section number is ORed with a page-aligned
1508 * pointer to produce the iotlb entries. Thus it should
1509 * never overflow into the page-aligned value.
1511 assert(map
->sections_nb
< TARGET_PAGE_SIZE
);
1513 if (map
->sections_nb
== map
->sections_nb_alloc
) {
1514 map
->sections_nb_alloc
= MAX(map
->sections_nb_alloc
* 2, 16);
1515 map
->sections
= g_renew(MemoryRegionSection
, map
->sections
,
1516 map
->sections_nb_alloc
);
1518 map
->sections
[map
->sections_nb
] = *section
;
1519 memory_region_ref(section
->mr
);
1520 return map
->sections_nb
++;
1523 static void phys_section_destroy(MemoryRegion
*mr
)
1525 bool have_sub_page
= mr
->subpage
;
1527 memory_region_unref(mr
);
1529 if (have_sub_page
) {
1530 subpage_t
*subpage
= container_of(mr
, subpage_t
, iomem
);
1531 object_unref(OBJECT(&subpage
->iomem
));
1536 static void phys_sections_free(PhysPageMap
*map
)
1538 while (map
->sections_nb
> 0) {
1539 MemoryRegionSection
*section
= &map
->sections
[--map
->sections_nb
];
1540 phys_section_destroy(section
->mr
);
1542 g_free(map
->sections
);
1546 static void register_subpage(FlatView
*fv
, MemoryRegionSection
*section
)
1548 AddressSpaceDispatch
*d
= flatview_to_dispatch(fv
);
1550 hwaddr base
= section
->offset_within_address_space
1552 MemoryRegionSection
*existing
= phys_page_find(d
, base
);
1553 MemoryRegionSection subsection
= {
1554 .offset_within_address_space
= base
,
1555 .size
= int128_make64(TARGET_PAGE_SIZE
),
1559 assert(existing
->mr
->subpage
|| existing
->mr
== &io_mem_unassigned
);
1561 if (!(existing
->mr
->subpage
)) {
1562 subpage
= subpage_init(fv
, base
);
1564 subsection
.mr
= &subpage
->iomem
;
1565 phys_page_set(d
, base
>> TARGET_PAGE_BITS
, 1,
1566 phys_section_add(&d
->map
, &subsection
));
1568 subpage
= container_of(existing
->mr
, subpage_t
, iomem
);
1570 start
= section
->offset_within_address_space
& ~TARGET_PAGE_MASK
;
1571 end
= start
+ int128_get64(section
->size
) - 1;
1572 subpage_register(subpage
, start
, end
,
1573 phys_section_add(&d
->map
, section
));
1577 static void register_multipage(FlatView
*fv
,
1578 MemoryRegionSection
*section
)
1580 AddressSpaceDispatch
*d
= flatview_to_dispatch(fv
);
1581 hwaddr start_addr
= section
->offset_within_address_space
;
1582 uint16_t section_index
= phys_section_add(&d
->map
, section
);
1583 uint64_t num_pages
= int128_get64(int128_rshift(section
->size
,
1587 phys_page_set(d
, start_addr
>> TARGET_PAGE_BITS
, num_pages
, section_index
);
1591 * The range in *section* may look like this:
1595 * where s stands for subpage and P for page.
1597 void flatview_add_to_dispatch(FlatView
*fv
, MemoryRegionSection
*section
)
1599 MemoryRegionSection remain
= *section
;
1600 Int128 page_size
= int128_make64(TARGET_PAGE_SIZE
);
1602 /* register first subpage */
1603 if (remain
.offset_within_address_space
& ~TARGET_PAGE_MASK
) {
1604 uint64_t left
= TARGET_PAGE_ALIGN(remain
.offset_within_address_space
)
1605 - remain
.offset_within_address_space
;
1607 MemoryRegionSection now
= remain
;
1608 now
.size
= int128_min(int128_make64(left
), now
.size
);
1609 register_subpage(fv
, &now
);
1610 if (int128_eq(remain
.size
, now
.size
)) {
1613 remain
.size
= int128_sub(remain
.size
, now
.size
);
1614 remain
.offset_within_address_space
+= int128_get64(now
.size
);
1615 remain
.offset_within_region
+= int128_get64(now
.size
);
1618 /* register whole pages */
1619 if (int128_ge(remain
.size
, page_size
)) {
1620 MemoryRegionSection now
= remain
;
1621 now
.size
= int128_and(now
.size
, int128_neg(page_size
));
1622 register_multipage(fv
, &now
);
1623 if (int128_eq(remain
.size
, now
.size
)) {
1626 remain
.size
= int128_sub(remain
.size
, now
.size
);
1627 remain
.offset_within_address_space
+= int128_get64(now
.size
);
1628 remain
.offset_within_region
+= int128_get64(now
.size
);
1631 /* register last subpage */
1632 register_subpage(fv
, &remain
);
1635 void qemu_flush_coalesced_mmio_buffer(void)
1638 kvm_flush_coalesced_mmio_buffer();
1641 void qemu_mutex_lock_ramlist(void)
1643 qemu_mutex_lock(&ram_list
.mutex
);
1646 void qemu_mutex_unlock_ramlist(void)
1648 qemu_mutex_unlock(&ram_list
.mutex
);
1651 void ram_block_dump(Monitor
*mon
)
1657 monitor_printf(mon
, "%24s %8s %18s %18s %18s\n",
1658 "Block Name", "PSize", "Offset", "Used", "Total");
1659 RAMBLOCK_FOREACH(block
) {
1660 psize
= size_to_str(block
->page_size
);
1661 monitor_printf(mon
, "%24s %8s 0x%016" PRIx64
" 0x%016" PRIx64
1662 " 0x%016" PRIx64
"\n", block
->idstr
, psize
,
1663 (uint64_t)block
->offset
,
1664 (uint64_t)block
->used_length
,
1665 (uint64_t)block
->max_length
);
1673 * FIXME TOCTTOU: this iterates over memory backends' mem-path, which
1674 * may or may not name the same files / on the same filesystem now as
1675 * when we actually open and map them. Iterate over the file
1676 * descriptors instead, and use qemu_fd_getpagesize().
1678 static int find_min_backend_pagesize(Object
*obj
, void *opaque
)
1680 long *hpsize_min
= opaque
;
1682 if (object_dynamic_cast(obj
, TYPE_MEMORY_BACKEND
)) {
1683 HostMemoryBackend
*backend
= MEMORY_BACKEND(obj
);
1684 long hpsize
= host_memory_backend_pagesize(backend
);
1686 if (host_memory_backend_is_mapped(backend
) && (hpsize
< *hpsize_min
)) {
1687 *hpsize_min
= hpsize
;
1694 static int find_max_backend_pagesize(Object
*obj
, void *opaque
)
1696 long *hpsize_max
= opaque
;
1698 if (object_dynamic_cast(obj
, TYPE_MEMORY_BACKEND
)) {
1699 HostMemoryBackend
*backend
= MEMORY_BACKEND(obj
);
1700 long hpsize
= host_memory_backend_pagesize(backend
);
1702 if (host_memory_backend_is_mapped(backend
) && (hpsize
> *hpsize_max
)) {
1703 *hpsize_max
= hpsize
;
1711 * TODO: We assume right now that all mapped host memory backends are
1712 * used as RAM, however some might be used for different purposes.
1714 long qemu_minrampagesize(void)
1716 long hpsize
= LONG_MAX
;
1717 long mainrampagesize
;
1718 Object
*memdev_root
;
1719 MachineState
*ms
= MACHINE(qdev_get_machine());
1721 mainrampagesize
= qemu_mempath_getpagesize(mem_path
);
1723 /* it's possible we have memory-backend objects with
1724 * hugepage-backed RAM. these may get mapped into system
1725 * address space via -numa parameters or memory hotplug
1726 * hooks. we want to take these into account, but we
1727 * also want to make sure these supported hugepage
1728 * sizes are applicable across the entire range of memory
1729 * we may boot from, so we take the min across all
1730 * backends, and assume normal pages in cases where a
1731 * backend isn't backed by hugepages.
1733 memdev_root
= object_resolve_path("/objects", NULL
);
1735 object_child_foreach(memdev_root
, find_min_backend_pagesize
, &hpsize
);
1737 if (hpsize
== LONG_MAX
) {
1738 /* No additional memory regions found ==> Report main RAM page size */
1739 return mainrampagesize
;
1742 /* If NUMA is disabled or the NUMA nodes are not backed with a
1743 * memory-backend, then there is at least one node using "normal" RAM,
1744 * so if its page size is smaller we have got to report that size instead.
1746 if (hpsize
> mainrampagesize
&&
1747 (ms
->numa_state
== NULL
||
1748 ms
->numa_state
->num_nodes
== 0 ||
1749 ms
->numa_state
->nodes
[0].node_memdev
== NULL
)) {
1752 error_report("Huge page support disabled (n/a for main memory).");
1755 return mainrampagesize
;
1761 long qemu_maxrampagesize(void)
1763 long pagesize
= qemu_mempath_getpagesize(mem_path
);
1764 Object
*memdev_root
= object_resolve_path("/objects", NULL
);
1767 object_child_foreach(memdev_root
, find_max_backend_pagesize
,
1773 long qemu_minrampagesize(void)
1775 return getpagesize();
1777 long qemu_maxrampagesize(void)
1779 return getpagesize();
1784 static int64_t get_file_size(int fd
)
1787 #if defined(__linux__)
1790 if (fstat(fd
, &st
) < 0) {
1794 /* Special handling for devdax character devices */
1795 if (S_ISCHR(st
.st_mode
)) {
1796 g_autofree
char *subsystem_path
= NULL
;
1797 g_autofree
char *subsystem
= NULL
;
1799 subsystem_path
= g_strdup_printf("/sys/dev/char/%d:%d/subsystem",
1800 major(st
.st_rdev
), minor(st
.st_rdev
));
1801 subsystem
= g_file_read_link(subsystem_path
, NULL
);
1803 if (subsystem
&& g_str_has_suffix(subsystem
, "/dax")) {
1804 g_autofree
char *size_path
= NULL
;
1805 g_autofree
char *size_str
= NULL
;
1807 size_path
= g_strdup_printf("/sys/dev/char/%d:%d/size",
1808 major(st
.st_rdev
), minor(st
.st_rdev
));
1810 if (g_file_get_contents(size_path
, &size_str
, NULL
, NULL
)) {
1811 return g_ascii_strtoll(size_str
, NULL
, 0);
1815 #endif /* defined(__linux__) */
1817 /* st.st_size may be zero for special files yet lseek(2) works */
1818 size
= lseek(fd
, 0, SEEK_END
);
1825 static int file_ram_open(const char *path
,
1826 const char *region_name
,
1831 char *sanitized_name
;
1837 fd
= open(path
, O_RDWR
);
1839 /* @path names an existing file, use it */
1842 if (errno
== ENOENT
) {
1843 /* @path names a file that doesn't exist, create it */
1844 fd
= open(path
, O_RDWR
| O_CREAT
| O_EXCL
, 0644);
1849 } else if (errno
== EISDIR
) {
1850 /* @path names a directory, create a file there */
1851 /* Make name safe to use with mkstemp by replacing '/' with '_'. */
1852 sanitized_name
= g_strdup(region_name
);
1853 for (c
= sanitized_name
; *c
!= '\0'; c
++) {
1859 filename
= g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path
,
1861 g_free(sanitized_name
);
1863 fd
= mkstemp(filename
);
1871 if (errno
!= EEXIST
&& errno
!= EINTR
) {
1872 error_setg_errno(errp
, errno
,
1873 "can't open backing store %s for guest RAM",
1878 * Try again on EINTR and EEXIST. The latter happens when
1879 * something else creates the file between our two open().
1886 static void *file_ram_alloc(RAMBlock
*block
,
1892 MachineState
*ms
= MACHINE(qdev_get_machine());
1895 block
->page_size
= qemu_fd_getpagesize(fd
);
1896 if (block
->mr
->align
% block
->page_size
) {
1897 error_setg(errp
, "alignment 0x%" PRIx64
1898 " must be multiples of page size 0x%zx",
1899 block
->mr
->align
, block
->page_size
);
1901 } else if (block
->mr
->align
&& !is_power_of_2(block
->mr
->align
)) {
1902 error_setg(errp
, "alignment 0x%" PRIx64
1903 " must be a power of two", block
->mr
->align
);
1906 block
->mr
->align
= MAX(block
->page_size
, block
->mr
->align
);
1907 #if defined(__s390x__)
1908 if (kvm_enabled()) {
1909 block
->mr
->align
= MAX(block
->mr
->align
, QEMU_VMALLOC_ALIGN
);
1913 if (memory
< block
->page_size
) {
1914 error_setg(errp
, "memory size 0x" RAM_ADDR_FMT
" must be equal to "
1915 "or larger than page size 0x%zx",
1916 memory
, block
->page_size
);
1920 memory
= ROUND_UP(memory
, block
->page_size
);
1923 * ftruncate is not supported by hugetlbfs in older
1924 * hosts, so don't bother bailing out on errors.
1925 * If anything goes wrong with it under other filesystems,
1928 * Do not truncate the non-empty backend file to avoid corrupting
1929 * the existing data in the file. Disabling shrinking is not
1930 * enough. For example, the current vNVDIMM implementation stores
1931 * the guest NVDIMM labels at the end of the backend file. If the
1932 * backend file is later extended, QEMU will not be able to find
1933 * those labels. Therefore, extending the non-empty backend file
1934 * is disabled as well.
1936 if (truncate
&& ftruncate(fd
, memory
)) {
1937 perror("ftruncate");
1940 area
= qemu_ram_mmap(fd
, memory
, block
->mr
->align
,
1941 block
->flags
& RAM_SHARED
, block
->flags
& RAM_PMEM
);
1942 if (area
== MAP_FAILED
) {
1943 error_setg_errno(errp
, errno
,
1944 "unable to map backing store for guest RAM");
1949 os_mem_prealloc(fd
, area
, memory
, ms
->smp
.cpus
, errp
);
1950 if (errp
&& *errp
) {
1951 qemu_ram_munmap(fd
, area
, memory
);
1961 /* Allocate space within the ram_addr_t space that governs the
1963 * Called with the ramlist lock held.
1965 static ram_addr_t
find_ram_offset(ram_addr_t size
)
1967 RAMBlock
*block
, *next_block
;
1968 ram_addr_t offset
= RAM_ADDR_MAX
, mingap
= RAM_ADDR_MAX
;
1970 assert(size
!= 0); /* it would hand out same offset multiple times */
1972 if (QLIST_EMPTY_RCU(&ram_list
.blocks
)) {
1976 RAMBLOCK_FOREACH(block
) {
1977 ram_addr_t candidate
, next
= RAM_ADDR_MAX
;
1979 /* Align blocks to start on a 'long' in the bitmap
1980 * which makes the bitmap sync'ing take the fast path.
1982 candidate
= block
->offset
+ block
->max_length
;
1983 candidate
= ROUND_UP(candidate
, BITS_PER_LONG
<< TARGET_PAGE_BITS
);
1985 /* Search for the closest following block
1988 RAMBLOCK_FOREACH(next_block
) {
1989 if (next_block
->offset
>= candidate
) {
1990 next
= MIN(next
, next_block
->offset
);
1994 /* If it fits remember our place and remember the size
1995 * of gap, but keep going so that we might find a smaller
1996 * gap to fill so avoiding fragmentation.
1998 if (next
- candidate
>= size
&& next
- candidate
< mingap
) {
2000 mingap
= next
- candidate
;
2003 trace_find_ram_offset_loop(size
, candidate
, offset
, next
, mingap
);
2006 if (offset
== RAM_ADDR_MAX
) {
2007 fprintf(stderr
, "Failed to find gap of requested size: %" PRIu64
"\n",
2012 trace_find_ram_offset(size
, offset
);
2017 static unsigned long last_ram_page(void)
2020 ram_addr_t last
= 0;
2023 RAMBLOCK_FOREACH(block
) {
2024 last
= MAX(last
, block
->offset
+ block
->max_length
);
2027 return last
>> TARGET_PAGE_BITS
;
2030 static void qemu_ram_setup_dump(void *addr
, ram_addr_t size
)
2034 /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */
2035 if (!machine_dump_guest_core(current_machine
)) {
2036 ret
= qemu_madvise(addr
, size
, QEMU_MADV_DONTDUMP
);
2038 perror("qemu_madvise");
2039 fprintf(stderr
, "madvise doesn't support MADV_DONTDUMP, "
2040 "but dump_guest_core=off specified\n");
2045 const char *qemu_ram_get_idstr(RAMBlock
*rb
)
2050 void *qemu_ram_get_host_addr(RAMBlock
*rb
)
2055 ram_addr_t
qemu_ram_get_offset(RAMBlock
*rb
)
2060 ram_addr_t
qemu_ram_get_used_length(RAMBlock
*rb
)
2062 return rb
->used_length
;
2065 bool qemu_ram_is_shared(RAMBlock
*rb
)
2067 return rb
->flags
& RAM_SHARED
;
2070 /* Note: Only set at the start of postcopy */
2071 bool qemu_ram_is_uf_zeroable(RAMBlock
*rb
)
2073 return rb
->flags
& RAM_UF_ZEROPAGE
;
2076 void qemu_ram_set_uf_zeroable(RAMBlock
*rb
)
2078 rb
->flags
|= RAM_UF_ZEROPAGE
;
2081 bool qemu_ram_is_migratable(RAMBlock
*rb
)
2083 return rb
->flags
& RAM_MIGRATABLE
;
2086 void qemu_ram_set_migratable(RAMBlock
*rb
)
2088 rb
->flags
|= RAM_MIGRATABLE
;
2091 void qemu_ram_unset_migratable(RAMBlock
*rb
)
2093 rb
->flags
&= ~RAM_MIGRATABLE
;
2096 /* Called with iothread lock held. */
2097 void qemu_ram_set_idstr(RAMBlock
*new_block
, const char *name
, DeviceState
*dev
)
2102 assert(!new_block
->idstr
[0]);
2105 char *id
= qdev_get_dev_path(dev
);
2107 snprintf(new_block
->idstr
, sizeof(new_block
->idstr
), "%s/", id
);
2111 pstrcat(new_block
->idstr
, sizeof(new_block
->idstr
), name
);
2114 RAMBLOCK_FOREACH(block
) {
2115 if (block
!= new_block
&&
2116 !strcmp(block
->idstr
, new_block
->idstr
)) {
2117 fprintf(stderr
, "RAMBlock \"%s\" already registered, abort!\n",
2125 /* Called with iothread lock held. */
2126 void qemu_ram_unset_idstr(RAMBlock
*block
)
2128 /* FIXME: arch_init.c assumes that this is not called throughout
2129 * migration. Ignore the problem since hot-unplug during migration
2130 * does not work anyway.
2133 memset(block
->idstr
, 0, sizeof(block
->idstr
));
2137 size_t qemu_ram_pagesize(RAMBlock
*rb
)
2139 return rb
->page_size
;
2142 /* Returns the largest size of page in use */
2143 size_t qemu_ram_pagesize_largest(void)
2148 RAMBLOCK_FOREACH(block
) {
2149 largest
= MAX(largest
, qemu_ram_pagesize(block
));
2155 static int memory_try_enable_merging(void *addr
, size_t len
)
2157 if (!machine_mem_merge(current_machine
)) {
2158 /* disabled by the user */
2162 return qemu_madvise(addr
, len
, QEMU_MADV_MERGEABLE
);
2165 /* Only legal before guest might have detected the memory size: e.g. on
2166 * incoming migration, or right after reset.
2168 * As memory core doesn't know how is memory accessed, it is up to
2169 * resize callback to update device state and/or add assertions to detect
2170 * misuse, if necessary.
2172 int qemu_ram_resize(RAMBlock
*block
, ram_addr_t newsize
, Error
**errp
)
2176 newsize
= HOST_PAGE_ALIGN(newsize
);
2178 if (block
->used_length
== newsize
) {
2182 if (!(block
->flags
& RAM_RESIZEABLE
)) {
2183 error_setg_errno(errp
, EINVAL
,
2184 "Length mismatch: %s: 0x" RAM_ADDR_FMT
2185 " in != 0x" RAM_ADDR_FMT
, block
->idstr
,
2186 newsize
, block
->used_length
);
2190 if (block
->max_length
< newsize
) {
2191 error_setg_errno(errp
, EINVAL
,
2192 "Length too large: %s: 0x" RAM_ADDR_FMT
2193 " > 0x" RAM_ADDR_FMT
, block
->idstr
,
2194 newsize
, block
->max_length
);
2198 cpu_physical_memory_clear_dirty_range(block
->offset
, block
->used_length
);
2199 block
->used_length
= newsize
;
2200 cpu_physical_memory_set_dirty_range(block
->offset
, block
->used_length
,
2202 memory_region_set_size(block
->mr
, newsize
);
2203 if (block
->resized
) {
2204 block
->resized(block
->idstr
, newsize
, block
->host
);
2209 /* Called with ram_list.mutex held */
2210 static void dirty_memory_extend(ram_addr_t old_ram_size
,
2211 ram_addr_t new_ram_size
)
2213 ram_addr_t old_num_blocks
= DIV_ROUND_UP(old_ram_size
,
2214 DIRTY_MEMORY_BLOCK_SIZE
);
2215 ram_addr_t new_num_blocks
= DIV_ROUND_UP(new_ram_size
,
2216 DIRTY_MEMORY_BLOCK_SIZE
);
2219 /* Only need to extend if block count increased */
2220 if (new_num_blocks
<= old_num_blocks
) {
2224 for (i
= 0; i
< DIRTY_MEMORY_NUM
; i
++) {
2225 DirtyMemoryBlocks
*old_blocks
;
2226 DirtyMemoryBlocks
*new_blocks
;
2229 old_blocks
= atomic_rcu_read(&ram_list
.dirty_memory
[i
]);
2230 new_blocks
= g_malloc(sizeof(*new_blocks
) +
2231 sizeof(new_blocks
->blocks
[0]) * new_num_blocks
);
2233 if (old_num_blocks
) {
2234 memcpy(new_blocks
->blocks
, old_blocks
->blocks
,
2235 old_num_blocks
* sizeof(old_blocks
->blocks
[0]));
2238 for (j
= old_num_blocks
; j
< new_num_blocks
; j
++) {
2239 new_blocks
->blocks
[j
] = bitmap_new(DIRTY_MEMORY_BLOCK_SIZE
);
2242 atomic_rcu_set(&ram_list
.dirty_memory
[i
], new_blocks
);
2245 g_free_rcu(old_blocks
, rcu
);
2250 static void ram_block_add(RAMBlock
*new_block
, Error
**errp
, bool shared
)
2253 RAMBlock
*last_block
= NULL
;
2254 ram_addr_t old_ram_size
, new_ram_size
;
2257 old_ram_size
= last_ram_page();
2259 qemu_mutex_lock_ramlist();
2260 new_block
->offset
= find_ram_offset(new_block
->max_length
);
2262 if (!new_block
->host
) {
2263 if (xen_enabled()) {
2264 xen_ram_alloc(new_block
->offset
, new_block
->max_length
,
2265 new_block
->mr
, &err
);
2267 error_propagate(errp
, err
);
2268 qemu_mutex_unlock_ramlist();
2272 new_block
->host
= phys_mem_alloc(new_block
->max_length
,
2273 &new_block
->mr
->align
, shared
);
2274 if (!new_block
->host
) {
2275 error_setg_errno(errp
, errno
,
2276 "cannot set up guest memory '%s'",
2277 memory_region_name(new_block
->mr
));
2278 qemu_mutex_unlock_ramlist();
2281 memory_try_enable_merging(new_block
->host
, new_block
->max_length
);
2285 new_ram_size
= MAX(old_ram_size
,
2286 (new_block
->offset
+ new_block
->max_length
) >> TARGET_PAGE_BITS
);
2287 if (new_ram_size
> old_ram_size
) {
2288 dirty_memory_extend(old_ram_size
, new_ram_size
);
2290 /* Keep the list sorted from biggest to smallest block. Unlike QTAILQ,
2291 * QLIST (which has an RCU-friendly variant) does not have insertion at
2292 * tail, so save the last element in last_block.
2294 RAMBLOCK_FOREACH(block
) {
2296 if (block
->max_length
< new_block
->max_length
) {
2301 QLIST_INSERT_BEFORE_RCU(block
, new_block
, next
);
2302 } else if (last_block
) {
2303 QLIST_INSERT_AFTER_RCU(last_block
, new_block
, next
);
2304 } else { /* list is empty */
2305 QLIST_INSERT_HEAD_RCU(&ram_list
.blocks
, new_block
, next
);
2307 ram_list
.mru_block
= NULL
;
2309 /* Write list before version */
2312 qemu_mutex_unlock_ramlist();
2314 cpu_physical_memory_set_dirty_range(new_block
->offset
,
2315 new_block
->used_length
,
2318 if (new_block
->host
) {
2319 qemu_ram_setup_dump(new_block
->host
, new_block
->max_length
);
2320 qemu_madvise(new_block
->host
, new_block
->max_length
, QEMU_MADV_HUGEPAGE
);
2321 /* MADV_DONTFORK is also needed by KVM in absence of synchronous MMU */
2322 qemu_madvise(new_block
->host
, new_block
->max_length
, QEMU_MADV_DONTFORK
);
2323 ram_block_notify_add(new_block
->host
, new_block
->max_length
);
2328 RAMBlock
*qemu_ram_alloc_from_fd(ram_addr_t size
, MemoryRegion
*mr
,
2329 uint32_t ram_flags
, int fd
,
2332 RAMBlock
*new_block
;
2333 Error
*local_err
= NULL
;
2336 /* Just support these ram flags by now. */
2337 assert((ram_flags
& ~(RAM_SHARED
| RAM_PMEM
)) == 0);
2339 if (xen_enabled()) {
2340 error_setg(errp
, "-mem-path not supported with Xen");
2344 if (kvm_enabled() && !kvm_has_sync_mmu()) {
2346 "host lacks kvm mmu notifiers, -mem-path unsupported");
2350 if (phys_mem_alloc
!= qemu_anon_ram_alloc
) {
2352 * file_ram_alloc() needs to allocate just like
2353 * phys_mem_alloc, but we haven't bothered to provide
2357 "-mem-path not supported with this accelerator");
2361 size
= HOST_PAGE_ALIGN(size
);
2362 file_size
= get_file_size(fd
);
2363 if (file_size
> 0 && file_size
< size
) {
2364 error_setg(errp
, "backing store %s size 0x%" PRIx64
2365 " does not match 'size' option 0x" RAM_ADDR_FMT
,
2366 mem_path
, file_size
, size
);
2370 new_block
= g_malloc0(sizeof(*new_block
));
2372 new_block
->used_length
= size
;
2373 new_block
->max_length
= size
;
2374 new_block
->flags
= ram_flags
;
2375 new_block
->host
= file_ram_alloc(new_block
, size
, fd
, !file_size
, errp
);
2376 if (!new_block
->host
) {
2381 ram_block_add(new_block
, &local_err
, ram_flags
& RAM_SHARED
);
2384 error_propagate(errp
, local_err
);
2392 RAMBlock
*qemu_ram_alloc_from_file(ram_addr_t size
, MemoryRegion
*mr
,
2393 uint32_t ram_flags
, const char *mem_path
,
2400 fd
= file_ram_open(mem_path
, memory_region_name(mr
), &created
, errp
);
2405 block
= qemu_ram_alloc_from_fd(size
, mr
, ram_flags
, fd
, errp
);
2419 RAMBlock
*qemu_ram_alloc_internal(ram_addr_t size
, ram_addr_t max_size
,
2420 void (*resized
)(const char*,
2423 void *host
, bool resizeable
, bool share
,
2424 MemoryRegion
*mr
, Error
**errp
)
2426 RAMBlock
*new_block
;
2427 Error
*local_err
= NULL
;
2429 size
= HOST_PAGE_ALIGN(size
);
2430 max_size
= HOST_PAGE_ALIGN(max_size
);
2431 new_block
= g_malloc0(sizeof(*new_block
));
2433 new_block
->resized
= resized
;
2434 new_block
->used_length
= size
;
2435 new_block
->max_length
= max_size
;
2436 assert(max_size
>= size
);
2438 new_block
->page_size
= getpagesize();
2439 new_block
->host
= host
;
2441 new_block
->flags
|= RAM_PREALLOC
;
2444 new_block
->flags
|= RAM_RESIZEABLE
;
2446 ram_block_add(new_block
, &local_err
, share
);
2449 error_propagate(errp
, local_err
);
2455 RAMBlock
*qemu_ram_alloc_from_ptr(ram_addr_t size
, void *host
,
2456 MemoryRegion
*mr
, Error
**errp
)
2458 return qemu_ram_alloc_internal(size
, size
, NULL
, host
, false,
2462 RAMBlock
*qemu_ram_alloc(ram_addr_t size
, bool share
,
2463 MemoryRegion
*mr
, Error
**errp
)
2465 return qemu_ram_alloc_internal(size
, size
, NULL
, NULL
, false,
2469 RAMBlock
*qemu_ram_alloc_resizeable(ram_addr_t size
, ram_addr_t maxsz
,
2470 void (*resized
)(const char*,
2473 MemoryRegion
*mr
, Error
**errp
)
2475 return qemu_ram_alloc_internal(size
, maxsz
, resized
, NULL
, true,
2479 static void reclaim_ramblock(RAMBlock
*block
)
2481 if (block
->flags
& RAM_PREALLOC
) {
2483 } else if (xen_enabled()) {
2484 xen_invalidate_map_cache_entry(block
->host
);
2486 } else if (block
->fd
>= 0) {
2487 qemu_ram_munmap(block
->fd
, block
->host
, block
->max_length
);
2491 qemu_anon_ram_free(block
->host
, block
->max_length
);
2496 void qemu_ram_free(RAMBlock
*block
)
2503 ram_block_notify_remove(block
->host
, block
->max_length
);
2506 qemu_mutex_lock_ramlist();
2507 QLIST_REMOVE_RCU(block
, next
);
2508 ram_list
.mru_block
= NULL
;
2509 /* Write list before version */
2512 call_rcu(block
, reclaim_ramblock
, rcu
);
2513 qemu_mutex_unlock_ramlist();
2517 void qemu_ram_remap(ram_addr_t addr
, ram_addr_t length
)
2524 RAMBLOCK_FOREACH(block
) {
2525 offset
= addr
- block
->offset
;
2526 if (offset
< block
->max_length
) {
2527 vaddr
= ramblock_ptr(block
, offset
);
2528 if (block
->flags
& RAM_PREALLOC
) {
2530 } else if (xen_enabled()) {
2534 if (block
->fd
>= 0) {
2535 flags
|= (block
->flags
& RAM_SHARED
?
2536 MAP_SHARED
: MAP_PRIVATE
);
2537 area
= mmap(vaddr
, length
, PROT_READ
| PROT_WRITE
,
2538 flags
, block
->fd
, offset
);
2541 * Remap needs to match alloc. Accelerators that
2542 * set phys_mem_alloc never remap. If they did,
2543 * we'd need a remap hook here.
2545 assert(phys_mem_alloc
== qemu_anon_ram_alloc
);
2547 flags
|= MAP_PRIVATE
| MAP_ANONYMOUS
;
2548 area
= mmap(vaddr
, length
, PROT_READ
| PROT_WRITE
,
2551 if (area
!= vaddr
) {
2552 error_report("Could not remap addr: "
2553 RAM_ADDR_FMT
"@" RAM_ADDR_FMT
"",
2557 memory_try_enable_merging(vaddr
, length
);
2558 qemu_ram_setup_dump(vaddr
, length
);
2563 #endif /* !_WIN32 */
2565 /* Return a host pointer to ram allocated with qemu_ram_alloc.
2566 * This should not be used for general purpose DMA. Use address_space_map
2567 * or address_space_rw instead. For local memory (e.g. video ram) that the
2568 * device owns, use memory_region_get_ram_ptr.
2570 * Called within RCU critical section.
2572 void *qemu_map_ram_ptr(RAMBlock
*ram_block
, ram_addr_t addr
)
2574 RAMBlock
*block
= ram_block
;
2576 if (block
== NULL
) {
2577 block
= qemu_get_ram_block(addr
);
2578 addr
-= block
->offset
;
2581 if (xen_enabled() && block
->host
== NULL
) {
2582 /* We need to check if the requested address is in the RAM
2583 * because we don't want to map the entire memory in QEMU.
2584 * In that case just map until the end of the page.
2586 if (block
->offset
== 0) {
2587 return xen_map_cache(addr
, 0, 0, false);
2590 block
->host
= xen_map_cache(block
->offset
, block
->max_length
, 1, false);
2592 return ramblock_ptr(block
, addr
);
2595 /* Return a host pointer to guest's ram. Similar to qemu_map_ram_ptr
2596 * but takes a size argument.
2598 * Called within RCU critical section.
2600 static void *qemu_ram_ptr_length(RAMBlock
*ram_block
, ram_addr_t addr
,
2601 hwaddr
*size
, bool lock
)
2603 RAMBlock
*block
= ram_block
;
2608 if (block
== NULL
) {
2609 block
= qemu_get_ram_block(addr
);
2610 addr
-= block
->offset
;
2612 *size
= MIN(*size
, block
->max_length
- addr
);
2614 if (xen_enabled() && block
->host
== NULL
) {
2615 /* We need to check if the requested address is in the RAM
2616 * because we don't want to map the entire memory in QEMU.
2617 * In that case just map the requested area.
2619 if (block
->offset
== 0) {
2620 return xen_map_cache(addr
, *size
, lock
, lock
);
2623 block
->host
= xen_map_cache(block
->offset
, block
->max_length
, 1, lock
);
2626 return ramblock_ptr(block
, addr
);
2629 /* Return the offset of a hostpointer within a ramblock */
2630 ram_addr_t
qemu_ram_block_host_offset(RAMBlock
*rb
, void *host
)
2632 ram_addr_t res
= (uint8_t *)host
- (uint8_t *)rb
->host
;
2633 assert((uintptr_t)host
>= (uintptr_t)rb
->host
);
2634 assert(res
< rb
->max_length
);
2640 * Translates a host ptr back to a RAMBlock, a ram_addr and an offset
2643 * ptr: Host pointer to look up
2644 * round_offset: If true round the result offset down to a page boundary
2645 * *ram_addr: set to result ram_addr
2646 * *offset: set to result offset within the RAMBlock
2648 * Returns: RAMBlock (or NULL if not found)
2650 * By the time this function returns, the returned pointer is not protected
2651 * by RCU anymore. If the caller is not within an RCU critical section and
2652 * does not hold the iothread lock, it must have other means of protecting the
2653 * pointer, such as a reference to the region that includes the incoming
2656 RAMBlock
*qemu_ram_block_from_host(void *ptr
, bool round_offset
,
2660 uint8_t *host
= ptr
;
2662 if (xen_enabled()) {
2663 ram_addr_t ram_addr
;
2665 ram_addr
= xen_ram_addr_from_mapcache(ptr
);
2666 block
= qemu_get_ram_block(ram_addr
);
2668 *offset
= ram_addr
- block
->offset
;
2675 block
= atomic_rcu_read(&ram_list
.mru_block
);
2676 if (block
&& block
->host
&& host
- block
->host
< block
->max_length
) {
2680 RAMBLOCK_FOREACH(block
) {
2681 /* This case append when the block is not mapped. */
2682 if (block
->host
== NULL
) {
2685 if (host
- block
->host
< block
->max_length
) {
2694 *offset
= (host
- block
->host
);
2696 *offset
&= TARGET_PAGE_MASK
;
2703 * Finds the named RAMBlock
2705 * name: The name of RAMBlock to find
2707 * Returns: RAMBlock (or NULL if not found)
2709 RAMBlock
*qemu_ram_block_by_name(const char *name
)
2713 RAMBLOCK_FOREACH(block
) {
2714 if (!strcmp(name
, block
->idstr
)) {
2722 /* Some of the softmmu routines need to translate from a host pointer
2723 (typically a TLB entry) back to a ram offset. */
2724 ram_addr_t
qemu_ram_addr_from_host(void *ptr
)
2729 block
= qemu_ram_block_from_host(ptr
, false, &offset
);
2731 return RAM_ADDR_INVALID
;
2734 return block
->offset
+ offset
;
2737 /* Called within RCU critical section. */
2738 void memory_notdirty_write_prepare(NotDirtyInfo
*ndi
,
2741 ram_addr_t ram_addr
,
2745 ndi
->ram_addr
= ram_addr
;
2746 ndi
->mem_vaddr
= mem_vaddr
;
2750 trace_memory_notdirty_write_access(mem_vaddr
, ram_addr
, size
);
2752 assert(tcg_enabled());
2753 if (!cpu_physical_memory_get_dirty_flag(ram_addr
, DIRTY_MEMORY_CODE
)) {
2754 ndi
->pages
= page_collection_lock(ram_addr
, ram_addr
+ size
);
2755 tb_invalidate_phys_page_fast(ndi
->pages
, ram_addr
, size
);
2759 /* Called within RCU critical section. */
2760 void memory_notdirty_write_complete(NotDirtyInfo
*ndi
)
2763 assert(tcg_enabled());
2764 page_collection_unlock(ndi
->pages
);
2768 /* Set both VGA and migration bits for simplicity and to remove
2769 * the notdirty callback faster.
2771 cpu_physical_memory_set_dirty_range(ndi
->ram_addr
, ndi
->size
,
2772 DIRTY_CLIENTS_NOCODE
);
2773 /* we remove the notdirty callback only if the code has been
2775 if (!cpu_physical_memory_is_clean(ndi
->ram_addr
)) {
2776 trace_memory_notdirty_set_dirty(ndi
->mem_vaddr
);
2777 tlb_set_dirty(ndi
->cpu
, ndi
->mem_vaddr
);
2781 /* Generate a debug exception if a watchpoint has been hit. */
2782 void cpu_check_watchpoint(CPUState
*cpu
, vaddr addr
, vaddr len
,
2783 MemTxAttrs attrs
, int flags
, uintptr_t ra
)
2785 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
2788 assert(tcg_enabled());
2789 if (cpu
->watchpoint_hit
) {
2791 * We re-entered the check after replacing the TB.
2792 * Now raise the debug interrupt so that it will
2793 * trigger after the current instruction.
2795 qemu_mutex_lock_iothread();
2796 cpu_interrupt(cpu
, CPU_INTERRUPT_DEBUG
);
2797 qemu_mutex_unlock_iothread();
2801 addr
= cc
->adjust_watchpoint_address(cpu
, addr
, len
);
2802 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
2803 if (watchpoint_address_matches(wp
, addr
, len
)
2804 && (wp
->flags
& flags
)) {
2805 if (flags
== BP_MEM_READ
) {
2806 wp
->flags
|= BP_WATCHPOINT_HIT_READ
;
2808 wp
->flags
|= BP_WATCHPOINT_HIT_WRITE
;
2810 wp
->hitaddr
= MAX(addr
, wp
->vaddr
);
2811 wp
->hitattrs
= attrs
;
2812 if (!cpu
->watchpoint_hit
) {
2813 if (wp
->flags
& BP_CPU
&&
2814 !cc
->debug_check_watchpoint(cpu
, wp
)) {
2815 wp
->flags
&= ~BP_WATCHPOINT_HIT
;
2818 cpu
->watchpoint_hit
= wp
;
2821 tb_check_watchpoint(cpu
);
2822 if (wp
->flags
& BP_STOP_BEFORE_ACCESS
) {
2823 cpu
->exception_index
= EXCP_DEBUG
;
2825 cpu_loop_exit_restore(cpu
, ra
);
2827 /* Force execution of one insn next time. */
2828 cpu
->cflags_next_tb
= 1 | curr_cflags();
2831 cpu_restore_state(cpu
, ra
, true);
2833 cpu_loop_exit_noexc(cpu
);
2837 wp
->flags
&= ~BP_WATCHPOINT_HIT
;
2842 static MemTxResult
flatview_read(FlatView
*fv
, hwaddr addr
,
2843 MemTxAttrs attrs
, uint8_t *buf
, hwaddr len
);
2844 static MemTxResult
flatview_write(FlatView
*fv
, hwaddr addr
, MemTxAttrs attrs
,
2845 const uint8_t *buf
, hwaddr len
);
2846 static bool flatview_access_valid(FlatView
*fv
, hwaddr addr
, hwaddr len
,
2847 bool is_write
, MemTxAttrs attrs
);
2849 static MemTxResult
subpage_read(void *opaque
, hwaddr addr
, uint64_t *data
,
2850 unsigned len
, MemTxAttrs attrs
)
2852 subpage_t
*subpage
= opaque
;
2856 #if defined(DEBUG_SUBPAGE)
2857 printf("%s: subpage %p len %u addr " TARGET_FMT_plx
"\n", __func__
,
2858 subpage
, len
, addr
);
2860 res
= flatview_read(subpage
->fv
, addr
+ subpage
->base
, attrs
, buf
, len
);
2864 *data
= ldn_p(buf
, len
);
2868 static MemTxResult
subpage_write(void *opaque
, hwaddr addr
,
2869 uint64_t value
, unsigned len
, MemTxAttrs attrs
)
2871 subpage_t
*subpage
= opaque
;
2874 #if defined(DEBUG_SUBPAGE)
2875 printf("%s: subpage %p len %u addr " TARGET_FMT_plx
2876 " value %"PRIx64
"\n",
2877 __func__
, subpage
, len
, addr
, value
);
2879 stn_p(buf
, len
, value
);
2880 return flatview_write(subpage
->fv
, addr
+ subpage
->base
, attrs
, buf
, len
);
2883 static bool subpage_accepts(void *opaque
, hwaddr addr
,
2884 unsigned len
, bool is_write
,
2887 subpage_t
*subpage
= opaque
;
2888 #if defined(DEBUG_SUBPAGE)
2889 printf("%s: subpage %p %c len %u addr " TARGET_FMT_plx
"\n",
2890 __func__
, subpage
, is_write
? 'w' : 'r', len
, addr
);
2893 return flatview_access_valid(subpage
->fv
, addr
+ subpage
->base
,
2894 len
, is_write
, attrs
);
2897 static const MemoryRegionOps subpage_ops
= {
2898 .read_with_attrs
= subpage_read
,
2899 .write_with_attrs
= subpage_write
,
2900 .impl
.min_access_size
= 1,
2901 .impl
.max_access_size
= 8,
2902 .valid
.min_access_size
= 1,
2903 .valid
.max_access_size
= 8,
2904 .valid
.accepts
= subpage_accepts
,
2905 .endianness
= DEVICE_NATIVE_ENDIAN
,
2908 static int subpage_register(subpage_t
*mmio
, uint32_t start
, uint32_t end
,
2913 if (start
>= TARGET_PAGE_SIZE
|| end
>= TARGET_PAGE_SIZE
)
2915 idx
= SUBPAGE_IDX(start
);
2916 eidx
= SUBPAGE_IDX(end
);
2917 #if defined(DEBUG_SUBPAGE)
2918 printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n",
2919 __func__
, mmio
, start
, end
, idx
, eidx
, section
);
2921 for (; idx
<= eidx
; idx
++) {
2922 mmio
->sub_section
[idx
] = section
;
2928 static subpage_t
*subpage_init(FlatView
*fv
, hwaddr base
)
2932 /* mmio->sub_section is set to PHYS_SECTION_UNASSIGNED with g_malloc0 */
2933 mmio
= g_malloc0(sizeof(subpage_t
) + TARGET_PAGE_SIZE
* sizeof(uint16_t));
2936 memory_region_init_io(&mmio
->iomem
, NULL
, &subpage_ops
, mmio
,
2937 NULL
, TARGET_PAGE_SIZE
);
2938 mmio
->iomem
.subpage
= true;
2939 #if defined(DEBUG_SUBPAGE)
2940 printf("%s: %p base " TARGET_FMT_plx
" len %08x\n", __func__
,
2941 mmio
, base
, TARGET_PAGE_SIZE
);
2947 static uint16_t dummy_section(PhysPageMap
*map
, FlatView
*fv
, MemoryRegion
*mr
)
2950 MemoryRegionSection section
= {
2953 .offset_within_address_space
= 0,
2954 .offset_within_region
= 0,
2955 .size
= int128_2_64(),
2958 return phys_section_add(map
, §ion
);
2961 MemoryRegionSection
*iotlb_to_section(CPUState
*cpu
,
2962 hwaddr index
, MemTxAttrs attrs
)
2964 int asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
2965 CPUAddressSpace
*cpuas
= &cpu
->cpu_ases
[asidx
];
2966 AddressSpaceDispatch
*d
= atomic_rcu_read(&cpuas
->memory_dispatch
);
2967 MemoryRegionSection
*sections
= d
->map
.sections
;
2969 return §ions
[index
& ~TARGET_PAGE_MASK
];
2972 static void io_mem_init(void)
2974 memory_region_init_io(&io_mem_unassigned
, NULL
, &unassigned_mem_ops
, NULL
,
2978 AddressSpaceDispatch
*address_space_dispatch_new(FlatView
*fv
)
2980 AddressSpaceDispatch
*d
= g_new0(AddressSpaceDispatch
, 1);
2983 n
= dummy_section(&d
->map
, fv
, &io_mem_unassigned
);
2984 assert(n
== PHYS_SECTION_UNASSIGNED
);
2986 d
->phys_map
= (PhysPageEntry
) { .ptr
= PHYS_MAP_NODE_NIL
, .skip
= 1 };
2991 void address_space_dispatch_free(AddressSpaceDispatch
*d
)
2993 phys_sections_free(&d
->map
);
2997 static void do_nothing(CPUState
*cpu
, run_on_cpu_data d
)
3001 static void tcg_log_global_after_sync(MemoryListener
*listener
)
3003 CPUAddressSpace
*cpuas
;
3005 /* Wait for the CPU to end the current TB. This avoids the following
3009 * ---------------------- -------------------------
3010 * TLB check -> slow path
3011 * notdirty_mem_write
3015 * TLB check -> fast path
3019 * by pushing the migration thread's memory read after the vCPU thread has
3020 * written the memory.
3022 cpuas
= container_of(listener
, CPUAddressSpace
, tcg_as_listener
);
3023 run_on_cpu(cpuas
->cpu
, do_nothing
, RUN_ON_CPU_NULL
);
3026 static void tcg_commit(MemoryListener
*listener
)
3028 CPUAddressSpace
*cpuas
;
3029 AddressSpaceDispatch
*d
;
3031 assert(tcg_enabled());
3032 /* since each CPU stores ram addresses in its TLB cache, we must
3033 reset the modified entries */
3034 cpuas
= container_of(listener
, CPUAddressSpace
, tcg_as_listener
);
3035 cpu_reloading_memory_map();
3036 /* The CPU and TLB are protected by the iothread lock.
3037 * We reload the dispatch pointer now because cpu_reloading_memory_map()
3038 * may have split the RCU critical section.
3040 d
= address_space_to_dispatch(cpuas
->as
);
3041 atomic_rcu_set(&cpuas
->memory_dispatch
, d
);
3042 tlb_flush(cpuas
->cpu
);
3045 static void memory_map_init(void)
3047 system_memory
= g_malloc(sizeof(*system_memory
));
3049 memory_region_init(system_memory
, NULL
, "system", UINT64_MAX
);
3050 address_space_init(&address_space_memory
, system_memory
, "memory");
3052 system_io
= g_malloc(sizeof(*system_io
));
3053 memory_region_init_io(system_io
, NULL
, &unassigned_io_ops
, NULL
, "io",
3055 address_space_init(&address_space_io
, system_io
, "I/O");
3058 MemoryRegion
*get_system_memory(void)
3060 return system_memory
;
3063 MemoryRegion
*get_system_io(void)
3068 #endif /* !defined(CONFIG_USER_ONLY) */
3070 /* physical memory access (slow version, mainly for debug) */
3071 #if defined(CONFIG_USER_ONLY)
3072 int cpu_memory_rw_debug(CPUState
*cpu
, target_ulong addr
,
3073 uint8_t *buf
, target_ulong len
, int is_write
)
3076 target_ulong l
, page
;
3080 page
= addr
& TARGET_PAGE_MASK
;
3081 l
= (page
+ TARGET_PAGE_SIZE
) - addr
;
3084 flags
= page_get_flags(page
);
3085 if (!(flags
& PAGE_VALID
))
3088 if (!(flags
& PAGE_WRITE
))
3090 /* XXX: this code should not depend on lock_user */
3091 if (!(p
= lock_user(VERIFY_WRITE
, addr
, l
, 0)))
3094 unlock_user(p
, addr
, l
);
3096 if (!(flags
& PAGE_READ
))
3098 /* XXX: this code should not depend on lock_user */
3099 if (!(p
= lock_user(VERIFY_READ
, addr
, l
, 1)))
3102 unlock_user(p
, addr
, 0);
3113 static void invalidate_and_set_dirty(MemoryRegion
*mr
, hwaddr addr
,
3116 uint8_t dirty_log_mask
= memory_region_get_dirty_log_mask(mr
);
3117 addr
+= memory_region_get_ram_addr(mr
);
3119 /* No early return if dirty_log_mask is or becomes 0, because
3120 * cpu_physical_memory_set_dirty_range will still call
3121 * xen_modified_memory.
3123 if (dirty_log_mask
) {
3125 cpu_physical_memory_range_includes_clean(addr
, length
, dirty_log_mask
);
3127 if (dirty_log_mask
& (1 << DIRTY_MEMORY_CODE
)) {
3128 assert(tcg_enabled());
3129 tb_invalidate_phys_range(addr
, addr
+ length
);
3130 dirty_log_mask
&= ~(1 << DIRTY_MEMORY_CODE
);
3132 cpu_physical_memory_set_dirty_range(addr
, length
, dirty_log_mask
);
3135 void memory_region_flush_rom_device(MemoryRegion
*mr
, hwaddr addr
, hwaddr size
)
3138 * In principle this function would work on other memory region types too,
3139 * but the ROM device use case is the only one where this operation is
3140 * necessary. Other memory regions should use the
3141 * address_space_read/write() APIs.
3143 assert(memory_region_is_romd(mr
));
3145 invalidate_and_set_dirty(mr
, addr
, size
);
3148 static int memory_access_size(MemoryRegion
*mr
, unsigned l
, hwaddr addr
)
3150 unsigned access_size_max
= mr
->ops
->valid
.max_access_size
;
3152 /* Regions are assumed to support 1-4 byte accesses unless
3153 otherwise specified. */
3154 if (access_size_max
== 0) {
3155 access_size_max
= 4;
3158 /* Bound the maximum access by the alignment of the address. */
3159 if (!mr
->ops
->impl
.unaligned
) {
3160 unsigned align_size_max
= addr
& -addr
;
3161 if (align_size_max
!= 0 && align_size_max
< access_size_max
) {
3162 access_size_max
= align_size_max
;
3166 /* Don't attempt accesses larger than the maximum. */
3167 if (l
> access_size_max
) {
3168 l
= access_size_max
;
3175 static bool prepare_mmio_access(MemoryRegion
*mr
)
3177 bool unlocked
= !qemu_mutex_iothread_locked();
3178 bool release_lock
= false;
3180 if (unlocked
&& mr
->global_locking
) {
3181 qemu_mutex_lock_iothread();
3183 release_lock
= true;
3185 if (mr
->flush_coalesced_mmio
) {
3187 qemu_mutex_lock_iothread();
3189 qemu_flush_coalesced_mmio_buffer();
3191 qemu_mutex_unlock_iothread();
3195 return release_lock
;
3198 /* Called within RCU critical section. */
3199 static MemTxResult
flatview_write_continue(FlatView
*fv
, hwaddr addr
,
3202 hwaddr len
, hwaddr addr1
,
3203 hwaddr l
, MemoryRegion
*mr
)
3207 MemTxResult result
= MEMTX_OK
;
3208 bool release_lock
= false;
3211 if (!memory_access_is_direct(mr
, true)) {
3212 release_lock
|= prepare_mmio_access(mr
);
3213 l
= memory_access_size(mr
, l
, addr1
);
3214 /* XXX: could force current_cpu to NULL to avoid
3216 val
= ldn_he_p(buf
, l
);
3217 result
|= memory_region_dispatch_write(mr
, addr1
, val
,
3218 size_memop(l
), attrs
);
3221 ptr
= qemu_ram_ptr_length(mr
->ram_block
, addr1
, &l
, false);
3222 memcpy(ptr
, buf
, l
);
3223 invalidate_and_set_dirty(mr
, addr1
, l
);
3227 qemu_mutex_unlock_iothread();
3228 release_lock
= false;
3240 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, true, attrs
);
3246 /* Called from RCU critical section. */
3247 static MemTxResult
flatview_write(FlatView
*fv
, hwaddr addr
, MemTxAttrs attrs
,
3248 const uint8_t *buf
, hwaddr len
)
3253 MemTxResult result
= MEMTX_OK
;
3256 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, true, attrs
);
3257 result
= flatview_write_continue(fv
, addr
, attrs
, buf
, len
,
3263 /* Called within RCU critical section. */
3264 MemTxResult
flatview_read_continue(FlatView
*fv
, hwaddr addr
,
3265 MemTxAttrs attrs
, uint8_t *buf
,
3266 hwaddr len
, hwaddr addr1
, hwaddr l
,
3271 MemTxResult result
= MEMTX_OK
;
3272 bool release_lock
= false;
3275 if (!memory_access_is_direct(mr
, false)) {
3277 release_lock
|= prepare_mmio_access(mr
);
3278 l
= memory_access_size(mr
, l
, addr1
);
3279 result
|= memory_region_dispatch_read(mr
, addr1
, &val
,
3280 size_memop(l
), attrs
);
3281 stn_he_p(buf
, l
, val
);
3284 ptr
= qemu_ram_ptr_length(mr
->ram_block
, addr1
, &l
, false);
3285 memcpy(buf
, ptr
, l
);
3289 qemu_mutex_unlock_iothread();
3290 release_lock
= false;
3302 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, false, attrs
);
3308 /* Called from RCU critical section. */
3309 static MemTxResult
flatview_read(FlatView
*fv
, hwaddr addr
,
3310 MemTxAttrs attrs
, uint8_t *buf
, hwaddr len
)
3317 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, false, attrs
);
3318 return flatview_read_continue(fv
, addr
, attrs
, buf
, len
,
3322 MemTxResult
address_space_read_full(AddressSpace
*as
, hwaddr addr
,
3323 MemTxAttrs attrs
, uint8_t *buf
, hwaddr len
)
3325 MemTxResult result
= MEMTX_OK
;
3330 fv
= address_space_to_flatview(as
);
3331 result
= flatview_read(fv
, addr
, attrs
, buf
, len
);
3338 MemTxResult
address_space_write(AddressSpace
*as
, hwaddr addr
,
3340 const uint8_t *buf
, hwaddr len
)
3342 MemTxResult result
= MEMTX_OK
;
3347 fv
= address_space_to_flatview(as
);
3348 result
= flatview_write(fv
, addr
, attrs
, buf
, len
);
3355 MemTxResult
address_space_rw(AddressSpace
*as
, hwaddr addr
, MemTxAttrs attrs
,
3356 uint8_t *buf
, hwaddr len
, bool is_write
)
3359 return address_space_write(as
, addr
, attrs
, buf
, len
);
3361 return address_space_read_full(as
, addr
, attrs
, buf
, len
);
3365 void cpu_physical_memory_rw(hwaddr addr
, uint8_t *buf
,
3366 hwaddr len
, int is_write
)
3368 address_space_rw(&address_space_memory
, addr
, MEMTXATTRS_UNSPECIFIED
,
3369 buf
, len
, is_write
);
3372 enum write_rom_type
{
3377 static inline MemTxResult
address_space_write_rom_internal(AddressSpace
*as
,
3382 enum write_rom_type type
)
3392 mr
= address_space_translate(as
, addr
, &addr1
, &l
, true, attrs
);
3394 if (!(memory_region_is_ram(mr
) ||
3395 memory_region_is_romd(mr
))) {
3396 l
= memory_access_size(mr
, l
, addr1
);
3399 ptr
= qemu_map_ram_ptr(mr
->ram_block
, addr1
);
3402 memcpy(ptr
, buf
, l
);
3403 invalidate_and_set_dirty(mr
, addr1
, l
);
3406 flush_icache_range((uintptr_t)ptr
, (uintptr_t)ptr
+ l
);
3418 /* used for ROM loading : can write in RAM and ROM */
3419 MemTxResult
address_space_write_rom(AddressSpace
*as
, hwaddr addr
,
3421 const uint8_t *buf
, hwaddr len
)
3423 return address_space_write_rom_internal(as
, addr
, attrs
,
3424 buf
, len
, WRITE_DATA
);
3427 void cpu_flush_icache_range(hwaddr start
, hwaddr len
)
3430 * This function should do the same thing as an icache flush that was
3431 * triggered from within the guest. For TCG we are always cache coherent,
3432 * so there is no need to flush anything. For KVM / Xen we need to flush
3433 * the host's instruction cache at least.
3435 if (tcg_enabled()) {
3439 address_space_write_rom_internal(&address_space_memory
,
3440 start
, MEMTXATTRS_UNSPECIFIED
,
3441 NULL
, len
, FLUSH_CACHE
);
3452 static BounceBuffer bounce
;
3454 typedef struct MapClient
{
3456 QLIST_ENTRY(MapClient
) link
;
3459 QemuMutex map_client_list_lock
;
3460 static QLIST_HEAD(, MapClient
) map_client_list
3461 = QLIST_HEAD_INITIALIZER(map_client_list
);
3463 static void cpu_unregister_map_client_do(MapClient
*client
)
3465 QLIST_REMOVE(client
, link
);
3469 static void cpu_notify_map_clients_locked(void)
3473 while (!QLIST_EMPTY(&map_client_list
)) {
3474 client
= QLIST_FIRST(&map_client_list
);
3475 qemu_bh_schedule(client
->bh
);
3476 cpu_unregister_map_client_do(client
);
3480 void cpu_register_map_client(QEMUBH
*bh
)
3482 MapClient
*client
= g_malloc(sizeof(*client
));
3484 qemu_mutex_lock(&map_client_list_lock
);
3486 QLIST_INSERT_HEAD(&map_client_list
, client
, link
);
3487 if (!atomic_read(&bounce
.in_use
)) {
3488 cpu_notify_map_clients_locked();
3490 qemu_mutex_unlock(&map_client_list_lock
);
3493 void cpu_exec_init_all(void)
3495 qemu_mutex_init(&ram_list
.mutex
);
3496 /* The data structures we set up here depend on knowing the page size,
3497 * so no more changes can be made after this point.
3498 * In an ideal world, nothing we did before we had finished the
3499 * machine setup would care about the target page size, and we could
3500 * do this much later, rather than requiring board models to state
3501 * up front what their requirements are.
3503 finalize_target_page_bits();
3506 qemu_mutex_init(&map_client_list_lock
);
3509 void cpu_unregister_map_client(QEMUBH
*bh
)
3513 qemu_mutex_lock(&map_client_list_lock
);
3514 QLIST_FOREACH(client
, &map_client_list
, link
) {
3515 if (client
->bh
== bh
) {
3516 cpu_unregister_map_client_do(client
);
3520 qemu_mutex_unlock(&map_client_list_lock
);
3523 static void cpu_notify_map_clients(void)
3525 qemu_mutex_lock(&map_client_list_lock
);
3526 cpu_notify_map_clients_locked();
3527 qemu_mutex_unlock(&map_client_list_lock
);
3530 static bool flatview_access_valid(FlatView
*fv
, hwaddr addr
, hwaddr len
,
3531 bool is_write
, MemTxAttrs attrs
)
3538 mr
= flatview_translate(fv
, addr
, &xlat
, &l
, is_write
, attrs
);
3539 if (!memory_access_is_direct(mr
, is_write
)) {
3540 l
= memory_access_size(mr
, l
, addr
);
3541 if (!memory_region_access_valid(mr
, xlat
, l
, is_write
, attrs
)) {
3552 bool address_space_access_valid(AddressSpace
*as
, hwaddr addr
,
3553 hwaddr len
, bool is_write
,
3560 fv
= address_space_to_flatview(as
);
3561 result
= flatview_access_valid(fv
, addr
, len
, is_write
, attrs
);
3567 flatview_extend_translation(FlatView
*fv
, hwaddr addr
,
3569 MemoryRegion
*mr
, hwaddr base
, hwaddr len
,
3570 bool is_write
, MemTxAttrs attrs
)
3574 MemoryRegion
*this_mr
;
3580 if (target_len
== 0) {
3585 this_mr
= flatview_translate(fv
, addr
, &xlat
,
3586 &len
, is_write
, attrs
);
3587 if (this_mr
!= mr
|| xlat
!= base
+ done
) {
3593 /* Map a physical memory region into a host virtual address.
3594 * May map a subset of the requested range, given by and returned in *plen.
3595 * May return NULL if resources needed to perform the mapping are exhausted.
3596 * Use only for reads OR writes - not for read-modify-write operations.
3597 * Use cpu_register_map_client() to know when retrying the map operation is
3598 * likely to succeed.
3600 void *address_space_map(AddressSpace
*as
,
3618 fv
= address_space_to_flatview(as
);
3619 mr
= flatview_translate(fv
, addr
, &xlat
, &l
, is_write
, attrs
);
3621 if (!memory_access_is_direct(mr
, is_write
)) {
3622 if (atomic_xchg(&bounce
.in_use
, true)) {
3626 /* Avoid unbounded allocations */
3627 l
= MIN(l
, TARGET_PAGE_SIZE
);
3628 bounce
.buffer
= qemu_memalign(TARGET_PAGE_SIZE
, l
);
3632 memory_region_ref(mr
);
3635 flatview_read(fv
, addr
, MEMTXATTRS_UNSPECIFIED
,
3641 return bounce
.buffer
;
3645 memory_region_ref(mr
);
3646 *plen
= flatview_extend_translation(fv
, addr
, len
, mr
, xlat
,
3647 l
, is_write
, attrs
);
3648 ptr
= qemu_ram_ptr_length(mr
->ram_block
, xlat
, plen
, true);
3654 /* Unmaps a memory region previously mapped by address_space_map().
3655 * Will also mark the memory as dirty if is_write == 1. access_len gives
3656 * the amount of memory that was actually read or written by the caller.
3658 void address_space_unmap(AddressSpace
*as
, void *buffer
, hwaddr len
,
3659 int is_write
, hwaddr access_len
)
3661 if (buffer
!= bounce
.buffer
) {
3665 mr
= memory_region_from_host(buffer
, &addr1
);
3668 invalidate_and_set_dirty(mr
, addr1
, access_len
);
3670 if (xen_enabled()) {
3671 xen_invalidate_map_cache_entry(buffer
);
3673 memory_region_unref(mr
);
3677 address_space_write(as
, bounce
.addr
, MEMTXATTRS_UNSPECIFIED
,
3678 bounce
.buffer
, access_len
);
3680 qemu_vfree(bounce
.buffer
);
3681 bounce
.buffer
= NULL
;
3682 memory_region_unref(bounce
.mr
);
3683 atomic_mb_set(&bounce
.in_use
, false);
3684 cpu_notify_map_clients();
3687 void *cpu_physical_memory_map(hwaddr addr
,
3691 return address_space_map(&address_space_memory
, addr
, plen
, is_write
,
3692 MEMTXATTRS_UNSPECIFIED
);
3695 void cpu_physical_memory_unmap(void *buffer
, hwaddr len
,
3696 int is_write
, hwaddr access_len
)
3698 return address_space_unmap(&address_space_memory
, buffer
, len
, is_write
, access_len
);
3701 #define ARG1_DECL AddressSpace *as
3704 #define TRANSLATE(...) address_space_translate(as, __VA_ARGS__)
3705 #define RCU_READ_LOCK(...) rcu_read_lock()
3706 #define RCU_READ_UNLOCK(...) rcu_read_unlock()
3707 #include "memory_ldst.inc.c"
3709 int64_t address_space_cache_init(MemoryRegionCache
*cache
,
3715 AddressSpaceDispatch
*d
;
3722 cache
->fv
= address_space_get_flatview(as
);
3723 d
= flatview_to_dispatch(cache
->fv
);
3724 cache
->mrs
= *address_space_translate_internal(d
, addr
, &cache
->xlat
, &l
, true);
3727 memory_region_ref(mr
);
3728 if (memory_access_is_direct(mr
, is_write
)) {
3729 /* We don't care about the memory attributes here as we're only
3730 * doing this if we found actual RAM, which behaves the same
3731 * regardless of attributes; so UNSPECIFIED is fine.
3733 l
= flatview_extend_translation(cache
->fv
, addr
, len
, mr
,
3734 cache
->xlat
, l
, is_write
,
3735 MEMTXATTRS_UNSPECIFIED
);
3736 cache
->ptr
= qemu_ram_ptr_length(mr
->ram_block
, cache
->xlat
, &l
, true);
3742 cache
->is_write
= is_write
;
3746 void address_space_cache_invalidate(MemoryRegionCache
*cache
,
3750 assert(cache
->is_write
);
3751 if (likely(cache
->ptr
)) {
3752 invalidate_and_set_dirty(cache
->mrs
.mr
, addr
+ cache
->xlat
, access_len
);
3756 void address_space_cache_destroy(MemoryRegionCache
*cache
)
3758 if (!cache
->mrs
.mr
) {
3762 if (xen_enabled()) {
3763 xen_invalidate_map_cache_entry(cache
->ptr
);
3765 memory_region_unref(cache
->mrs
.mr
);
3766 flatview_unref(cache
->fv
);
3767 cache
->mrs
.mr
= NULL
;
3771 /* Called from RCU critical section. This function has the same
3772 * semantics as address_space_translate, but it only works on a
3773 * predefined range of a MemoryRegion that was mapped with
3774 * address_space_cache_init.
3776 static inline MemoryRegion
*address_space_translate_cached(
3777 MemoryRegionCache
*cache
, hwaddr addr
, hwaddr
*xlat
,
3778 hwaddr
*plen
, bool is_write
, MemTxAttrs attrs
)
3780 MemoryRegionSection section
;
3782 IOMMUMemoryRegion
*iommu_mr
;
3783 AddressSpace
*target_as
;
3785 assert(!cache
->ptr
);
3786 *xlat
= addr
+ cache
->xlat
;
3789 iommu_mr
= memory_region_get_iommu(mr
);
3795 section
= address_space_translate_iommu(iommu_mr
, xlat
, plen
,
3796 NULL
, is_write
, true,
3801 /* Called from RCU critical section. address_space_read_cached uses this
3802 * out of line function when the target is an MMIO or IOMMU region.
3805 address_space_read_cached_slow(MemoryRegionCache
*cache
, hwaddr addr
,
3806 void *buf
, hwaddr len
)
3812 mr
= address_space_translate_cached(cache
, addr
, &addr1
, &l
, false,
3813 MEMTXATTRS_UNSPECIFIED
);
3814 flatview_read_continue(cache
->fv
,
3815 addr
, MEMTXATTRS_UNSPECIFIED
, buf
, len
,
3819 /* Called from RCU critical section. address_space_write_cached uses this
3820 * out of line function when the target is an MMIO or IOMMU region.
3823 address_space_write_cached_slow(MemoryRegionCache
*cache
, hwaddr addr
,
3824 const void *buf
, hwaddr len
)
3830 mr
= address_space_translate_cached(cache
, addr
, &addr1
, &l
, true,
3831 MEMTXATTRS_UNSPECIFIED
);
3832 flatview_write_continue(cache
->fv
,
3833 addr
, MEMTXATTRS_UNSPECIFIED
, buf
, len
,
3837 #define ARG1_DECL MemoryRegionCache *cache
3839 #define SUFFIX _cached_slow
3840 #define TRANSLATE(...) address_space_translate_cached(cache, __VA_ARGS__)
3841 #define RCU_READ_LOCK() ((void)0)
3842 #define RCU_READ_UNLOCK() ((void)0)
3843 #include "memory_ldst.inc.c"
3845 /* virtual memory access for debug (includes writing to ROM) */
3846 int cpu_memory_rw_debug(CPUState
*cpu
, target_ulong addr
,
3847 uint8_t *buf
, target_ulong len
, int is_write
)
3850 target_ulong l
, page
;
3852 cpu_synchronize_state(cpu
);
3857 page
= addr
& TARGET_PAGE_MASK
;
3858 phys_addr
= cpu_get_phys_page_attrs_debug(cpu
, page
, &attrs
);
3859 asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
3860 /* if no physical page mapped, return an error */
3861 if (phys_addr
== -1)
3863 l
= (page
+ TARGET_PAGE_SIZE
) - addr
;
3866 phys_addr
+= (addr
& ~TARGET_PAGE_MASK
);
3868 address_space_write_rom(cpu
->cpu_ases
[asidx
].as
, phys_addr
,
3871 address_space_rw(cpu
->cpu_ases
[asidx
].as
, phys_addr
,
3882 * Allows code that needs to deal with migration bitmaps etc to still be built
3883 * target independent.
3885 size_t qemu_target_page_size(void)
3887 return TARGET_PAGE_SIZE
;
3890 int qemu_target_page_bits(void)
3892 return TARGET_PAGE_BITS
;
3895 int qemu_target_page_bits_min(void)
3897 return TARGET_PAGE_BITS_MIN
;
3901 bool target_words_bigendian(void)
3903 #if defined(TARGET_WORDS_BIGENDIAN)
3910 #ifndef CONFIG_USER_ONLY
3911 bool cpu_physical_memory_is_io(hwaddr phys_addr
)
3918 mr
= address_space_translate(&address_space_memory
,
3919 phys_addr
, &phys_addr
, &l
, false,
3920 MEMTXATTRS_UNSPECIFIED
);
3922 res
= !(memory_region_is_ram(mr
) || memory_region_is_romd(mr
));
3927 int qemu_ram_foreach_block(RAMBlockIterFunc func
, void *opaque
)
3933 RAMBLOCK_FOREACH(block
) {
3934 ret
= func(block
, opaque
);
3944 * Unmap pages of memory from start to start+length such that
3945 * they a) read as 0, b) Trigger whatever fault mechanism
3946 * the OS provides for postcopy.
3947 * The pages must be unmapped by the end of the function.
3948 * Returns: 0 on success, none-0 on failure
3951 int ram_block_discard_range(RAMBlock
*rb
, uint64_t start
, size_t length
)
3955 uint8_t *host_startaddr
= rb
->host
+ start
;
3957 if ((uintptr_t)host_startaddr
& (rb
->page_size
- 1)) {
3958 error_report("ram_block_discard_range: Unaligned start address: %p",
3963 if ((start
+ length
) <= rb
->used_length
) {
3964 bool need_madvise
, need_fallocate
;
3965 uint8_t *host_endaddr
= host_startaddr
+ length
;
3966 if ((uintptr_t)host_endaddr
& (rb
->page_size
- 1)) {
3967 error_report("ram_block_discard_range: Unaligned end address: %p",
3972 errno
= ENOTSUP
; /* If we are missing MADVISE etc */
3974 /* The logic here is messy;
3975 * madvise DONTNEED fails for hugepages
3976 * fallocate works on hugepages and shmem
3978 need_madvise
= (rb
->page_size
== qemu_host_page_size
);
3979 need_fallocate
= rb
->fd
!= -1;
3980 if (need_fallocate
) {
3981 /* For a file, this causes the area of the file to be zero'd
3982 * if read, and for hugetlbfs also causes it to be unmapped
3983 * so a userfault will trigger.
3985 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
3986 ret
= fallocate(rb
->fd
, FALLOC_FL_PUNCH_HOLE
| FALLOC_FL_KEEP_SIZE
,
3990 error_report("ram_block_discard_range: Failed to fallocate "
3991 "%s:%" PRIx64
" +%zx (%d)",
3992 rb
->idstr
, start
, length
, ret
);
3997 error_report("ram_block_discard_range: fallocate not available/file"
3998 "%s:%" PRIx64
" +%zx (%d)",
3999 rb
->idstr
, start
, length
, ret
);
4004 /* For normal RAM this causes it to be unmapped,
4005 * for shared memory it causes the local mapping to disappear
4006 * and to fall back on the file contents (which we just
4007 * fallocate'd away).
4009 #if defined(CONFIG_MADVISE)
4010 ret
= madvise(host_startaddr
, length
, MADV_DONTNEED
);
4013 error_report("ram_block_discard_range: Failed to discard range "
4014 "%s:%" PRIx64
" +%zx (%d)",
4015 rb
->idstr
, start
, length
, ret
);
4020 error_report("ram_block_discard_range: MADVISE not available"
4021 "%s:%" PRIx64
" +%zx (%d)",
4022 rb
->idstr
, start
, length
, ret
);
4026 trace_ram_block_discard_range(rb
->idstr
, host_startaddr
, length
,
4027 need_madvise
, need_fallocate
, ret
);
4029 error_report("ram_block_discard_range: Overrun block '%s' (%" PRIu64
4030 "/%zx/" RAM_ADDR_FMT
")",
4031 rb
->idstr
, start
, length
, rb
->used_length
);
4038 bool ramblock_is_pmem(RAMBlock
*rb
)
4040 return rb
->flags
& RAM_PMEM
;
4045 void page_size_init(void)
4047 /* NOTE: we can always suppose that qemu_host_page_size >=
4049 if (qemu_host_page_size
== 0) {
4050 qemu_host_page_size
= qemu_real_host_page_size
;
4052 if (qemu_host_page_size
< TARGET_PAGE_SIZE
) {
4053 qemu_host_page_size
= TARGET_PAGE_SIZE
;
4055 qemu_host_page_mask
= -(intptr_t)qemu_host_page_size
;
4058 #if !defined(CONFIG_USER_ONLY)
4060 static void mtree_print_phys_entries(int start
, int end
, int skip
, int ptr
)
4062 if (start
== end
- 1) {
4063 qemu_printf("\t%3d ", start
);
4065 qemu_printf("\t%3d..%-3d ", start
, end
- 1);
4067 qemu_printf(" skip=%d ", skip
);
4068 if (ptr
== PHYS_MAP_NODE_NIL
) {
4069 qemu_printf(" ptr=NIL");
4071 qemu_printf(" ptr=#%d", ptr
);
4073 qemu_printf(" ptr=[%d]", ptr
);
4078 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
4079 int128_sub((size), int128_one())) : 0)
4081 void mtree_print_dispatch(AddressSpaceDispatch
*d
, MemoryRegion
*root
)
4085 qemu_printf(" Dispatch\n");
4086 qemu_printf(" Physical sections\n");
4088 for (i
= 0; i
< d
->map
.sections_nb
; ++i
) {
4089 MemoryRegionSection
*s
= d
->map
.sections
+ i
;
4090 const char *names
[] = { " [unassigned]", " [not dirty]",
4091 " [ROM]", " [watch]" };
4093 qemu_printf(" #%d @" TARGET_FMT_plx
".." TARGET_FMT_plx
4096 s
->offset_within_address_space
,
4097 s
->offset_within_address_space
+ MR_SIZE(s
->mr
->size
),
4098 s
->mr
->name
? s
->mr
->name
: "(noname)",
4099 i
< ARRAY_SIZE(names
) ? names
[i
] : "",
4100 s
->mr
== root
? " [ROOT]" : "",
4101 s
== d
->mru_section
? " [MRU]" : "",
4102 s
->mr
->is_iommu
? " [iommu]" : "");
4105 qemu_printf(" alias=%s", s
->mr
->alias
->name
?
4106 s
->mr
->alias
->name
: "noname");
4111 qemu_printf(" Nodes (%d bits per level, %d levels) ptr=[%d] skip=%d\n",
4112 P_L2_BITS
, P_L2_LEVELS
, d
->phys_map
.ptr
, d
->phys_map
.skip
);
4113 for (i
= 0; i
< d
->map
.nodes_nb
; ++i
) {
4116 Node
*n
= d
->map
.nodes
+ i
;
4118 qemu_printf(" [%d]\n", i
);
4120 for (j
= 0, jprev
= 0, prev
= *n
[0]; j
< ARRAY_SIZE(*n
); ++j
) {
4121 PhysPageEntry
*pe
= *n
+ j
;
4123 if (pe
->ptr
== prev
.ptr
&& pe
->skip
== prev
.skip
) {
4127 mtree_print_phys_entries(jprev
, j
, prev
.skip
, prev
.ptr
);
4133 if (jprev
!= ARRAY_SIZE(*n
)) {
4134 mtree_print_phys_entries(jprev
, j
, prev
.skip
, prev
.ptr
);