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1 /*
2 * gdb server stub
3 *
4 * Copyright (c) 2003-2005 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20 #include "config.h"
21 #ifdef CONFIG_USER_ONLY
22 #include <stdlib.h>
23 #include <stdio.h>
24 #include <stdarg.h>
25 #include <string.h>
26 #include <errno.h>
27 #include <unistd.h>
28 #include <fcntl.h>
29
30 #include "qemu.h"
31 #else
32 #include "vl.h"
33 #endif
34
35 #include "qemu_socket.h"
36 #ifdef _WIN32
37 /* XXX: these constants may be independent of the host ones even for Unix */
38 #ifndef SIGTRAP
39 #define SIGTRAP 5
40 #endif
41 #ifndef SIGINT
42 #define SIGINT 2
43 #endif
44 #else
45 #include <signal.h>
46 #endif
47
48 //#define DEBUG_GDB
49
50 enum RSState {
51 RS_IDLE,
52 RS_GETLINE,
53 RS_CHKSUM1,
54 RS_CHKSUM2,
55 RS_SYSCALL,
56 };
57 typedef struct GDBState {
58 CPUState *env; /* current CPU */
59 enum RSState state; /* parsing state */
60 char line_buf[4096];
61 int line_buf_index;
62 int line_csum;
63 char last_packet[4100];
64 int last_packet_len;
65 #ifdef CONFIG_USER_ONLY
66 int fd;
67 int running_state;
68 #else
69 CharDriverState *chr;
70 #endif
71 } GDBState;
72
73 #ifdef CONFIG_USER_ONLY
74 /* XXX: This is not thread safe. Do we care? */
75 static int gdbserver_fd = -1;
76
77 /* XXX: remove this hack. */
78 static GDBState gdbserver_state;
79
80 static int get_char(GDBState *s)
81 {
82 uint8_t ch;
83 int ret;
84
85 for(;;) {
86 ret = recv(s->fd, &ch, 1, 0);
87 if (ret < 0) {
88 if (errno != EINTR && errno != EAGAIN)
89 return -1;
90 } else if (ret == 0) {
91 return -1;
92 } else {
93 break;
94 }
95 }
96 return ch;
97 }
98 #endif
99
100 /* GDB stub state for use by semihosting syscalls. */
101 static GDBState *gdb_syscall_state;
102 static gdb_syscall_complete_cb gdb_current_syscall_cb;
103
104 enum {
105 GDB_SYS_UNKNOWN,
106 GDB_SYS_ENABLED,
107 GDB_SYS_DISABLED,
108 } gdb_syscall_mode;
109
110 /* If gdb is connected when the first semihosting syscall occurs then use
111 remote gdb syscalls. Otherwise use native file IO. */
112 int use_gdb_syscalls(void)
113 {
114 if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
115 gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED
116 : GDB_SYS_DISABLED);
117 }
118 return gdb_syscall_mode == GDB_SYS_ENABLED;
119 }
120
121 static void put_buffer(GDBState *s, const uint8_t *buf, int len)
122 {
123 #ifdef CONFIG_USER_ONLY
124 int ret;
125
126 while (len > 0) {
127 ret = send(s->fd, buf, len, 0);
128 if (ret < 0) {
129 if (errno != EINTR && errno != EAGAIN)
130 return;
131 } else {
132 buf += ret;
133 len -= ret;
134 }
135 }
136 #else
137 qemu_chr_write(s->chr, buf, len);
138 #endif
139 }
140
141 static inline int fromhex(int v)
142 {
143 if (v >= '0' && v <= '9')
144 return v - '0';
145 else if (v >= 'A' && v <= 'F')
146 return v - 'A' + 10;
147 else if (v >= 'a' && v <= 'f')
148 return v - 'a' + 10;
149 else
150 return 0;
151 }
152
153 static inline int tohex(int v)
154 {
155 if (v < 10)
156 return v + '0';
157 else
158 return v - 10 + 'a';
159 }
160
161 static void memtohex(char *buf, const uint8_t *mem, int len)
162 {
163 int i, c;
164 char *q;
165 q = buf;
166 for(i = 0; i < len; i++) {
167 c = mem[i];
168 *q++ = tohex(c >> 4);
169 *q++ = tohex(c & 0xf);
170 }
171 *q = '\0';
172 }
173
174 static void hextomem(uint8_t *mem, const char *buf, int len)
175 {
176 int i;
177
178 for(i = 0; i < len; i++) {
179 mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
180 buf += 2;
181 }
182 }
183
184 /* return -1 if error, 0 if OK */
185 static int put_packet(GDBState *s, char *buf)
186 {
187 int len, csum, i;
188 char *p;
189
190 #ifdef DEBUG_GDB
191 printf("reply='%s'\n", buf);
192 #endif
193
194 for(;;) {
195 p = s->last_packet;
196 *(p++) = '$';
197 len = strlen(buf);
198 memcpy(p, buf, len);
199 p += len;
200 csum = 0;
201 for(i = 0; i < len; i++) {
202 csum += buf[i];
203 }
204 *(p++) = '#';
205 *(p++) = tohex((csum >> 4) & 0xf);
206 *(p++) = tohex((csum) & 0xf);
207
208 s->last_packet_len = p - s->last_packet;
209 put_buffer(s, s->last_packet, s->last_packet_len);
210
211 #ifdef CONFIG_USER_ONLY
212 i = get_char(s);
213 if (i < 0)
214 return -1;
215 if (i == '+')
216 break;
217 #else
218 break;
219 #endif
220 }
221 return 0;
222 }
223
224 #if defined(TARGET_I386)
225
226 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
227 {
228 uint32_t *registers = (uint32_t *)mem_buf;
229 int i, fpus;
230
231 for(i = 0; i < 8; i++) {
232 registers[i] = env->regs[i];
233 }
234 registers[8] = env->eip;
235 registers[9] = env->eflags;
236 registers[10] = env->segs[R_CS].selector;
237 registers[11] = env->segs[R_SS].selector;
238 registers[12] = env->segs[R_DS].selector;
239 registers[13] = env->segs[R_ES].selector;
240 registers[14] = env->segs[R_FS].selector;
241 registers[15] = env->segs[R_GS].selector;
242 /* XXX: convert floats */
243 for(i = 0; i < 8; i++) {
244 memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
245 }
246 registers[36] = env->fpuc;
247 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
248 registers[37] = fpus;
249 registers[38] = 0; /* XXX: convert tags */
250 registers[39] = 0; /* fiseg */
251 registers[40] = 0; /* fioff */
252 registers[41] = 0; /* foseg */
253 registers[42] = 0; /* fooff */
254 registers[43] = 0; /* fop */
255
256 for(i = 0; i < 16; i++)
257 tswapls(&registers[i]);
258 for(i = 36; i < 44; i++)
259 tswapls(&registers[i]);
260 return 44 * 4;
261 }
262
263 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
264 {
265 uint32_t *registers = (uint32_t *)mem_buf;
266 int i;
267
268 for(i = 0; i < 8; i++) {
269 env->regs[i] = tswapl(registers[i]);
270 }
271 env->eip = tswapl(registers[8]);
272 env->eflags = tswapl(registers[9]);
273 #if defined(CONFIG_USER_ONLY)
274 #define LOAD_SEG(index, sreg)\
275 if (tswapl(registers[index]) != env->segs[sreg].selector)\
276 cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
277 LOAD_SEG(10, R_CS);
278 LOAD_SEG(11, R_SS);
279 LOAD_SEG(12, R_DS);
280 LOAD_SEG(13, R_ES);
281 LOAD_SEG(14, R_FS);
282 LOAD_SEG(15, R_GS);
283 #endif
284 }
285
286 #elif defined (TARGET_PPC)
287 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
288 {
289 uint32_t *registers = (uint32_t *)mem_buf, tmp;
290 int i;
291
292 /* fill in gprs */
293 for(i = 0; i < 32; i++) {
294 registers[i] = tswapl(env->gpr[i]);
295 }
296 /* fill in fprs */
297 for (i = 0; i < 32; i++) {
298 registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
299 registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
300 }
301 /* nip, msr, ccr, lnk, ctr, xer, mq */
302 registers[96] = tswapl(env->nip);
303 registers[97] = tswapl(do_load_msr(env));
304 tmp = 0;
305 for (i = 0; i < 8; i++)
306 tmp |= env->crf[i] << (32 - ((i + 1) * 4));
307 registers[98] = tswapl(tmp);
308 registers[99] = tswapl(env->lr);
309 registers[100] = tswapl(env->ctr);
310 registers[101] = tswapl(ppc_load_xer(env));
311 registers[102] = 0;
312
313 return 103 * 4;
314 }
315
316 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
317 {
318 uint32_t *registers = (uint32_t *)mem_buf;
319 int i;
320
321 /* fill in gprs */
322 for (i = 0; i < 32; i++) {
323 env->gpr[i] = tswapl(registers[i]);
324 }
325 /* fill in fprs */
326 for (i = 0; i < 32; i++) {
327 *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
328 *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
329 }
330 /* nip, msr, ccr, lnk, ctr, xer, mq */
331 env->nip = tswapl(registers[96]);
332 do_store_msr(env, tswapl(registers[97]));
333 registers[98] = tswapl(registers[98]);
334 for (i = 0; i < 8; i++)
335 env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
336 env->lr = tswapl(registers[99]);
337 env->ctr = tswapl(registers[100]);
338 ppc_store_xer(env, tswapl(registers[101]));
339 }
340 #elif defined (TARGET_SPARC)
341 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
342 {
343 target_ulong *registers = (target_ulong *)mem_buf;
344 int i;
345
346 /* fill in g0..g7 */
347 for(i = 0; i < 8; i++) {
348 registers[i] = tswapl(env->gregs[i]);
349 }
350 /* fill in register window */
351 for(i = 0; i < 24; i++) {
352 registers[i + 8] = tswapl(env->regwptr[i]);
353 }
354 #ifndef TARGET_SPARC64
355 /* fill in fprs */
356 for (i = 0; i < 32; i++) {
357 registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
358 }
359 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
360 registers[64] = tswapl(env->y);
361 {
362 target_ulong tmp;
363
364 tmp = GET_PSR(env);
365 registers[65] = tswapl(tmp);
366 }
367 registers[66] = tswapl(env->wim);
368 registers[67] = tswapl(env->tbr);
369 registers[68] = tswapl(env->pc);
370 registers[69] = tswapl(env->npc);
371 registers[70] = tswapl(env->fsr);
372 registers[71] = 0; /* csr */
373 registers[72] = 0;
374 return 73 * sizeof(target_ulong);
375 #else
376 /* fill in fprs */
377 for (i = 0; i < 64; i += 2) {
378 uint64_t tmp;
379
380 tmp = ((uint64_t)*(uint32_t *)&env->fpr[i]) << 32;
381 tmp |= *(uint32_t *)&env->fpr[i + 1];
382 registers[i / 2 + 32] = tswap64(tmp);
383 }
384 registers[64] = tswapl(env->pc);
385 registers[65] = tswapl(env->npc);
386 registers[66] = tswapl(((uint64_t)GET_CCR(env) << 32) |
387 ((env->asi & 0xff) << 24) |
388 ((env->pstate & 0xfff) << 8) |
389 GET_CWP64(env));
390 registers[67] = tswapl(env->fsr);
391 registers[68] = tswapl(env->fprs);
392 registers[69] = tswapl(env->y);
393 return 70 * sizeof(target_ulong);
394 #endif
395 }
396
397 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
398 {
399 target_ulong *registers = (target_ulong *)mem_buf;
400 int i;
401
402 /* fill in g0..g7 */
403 for(i = 0; i < 7; i++) {
404 env->gregs[i] = tswapl(registers[i]);
405 }
406 /* fill in register window */
407 for(i = 0; i < 24; i++) {
408 env->regwptr[i] = tswapl(registers[i + 8]);
409 }
410 #ifndef TARGET_SPARC64
411 /* fill in fprs */
412 for (i = 0; i < 32; i++) {
413 *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
414 }
415 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
416 env->y = tswapl(registers[64]);
417 PUT_PSR(env, tswapl(registers[65]));
418 env->wim = tswapl(registers[66]);
419 env->tbr = tswapl(registers[67]);
420 env->pc = tswapl(registers[68]);
421 env->npc = tswapl(registers[69]);
422 env->fsr = tswapl(registers[70]);
423 #else
424 for (i = 0; i < 64; i += 2) {
425 uint64_t tmp;
426
427 tmp = tswap64(registers[i / 2 + 32]);
428 *((uint32_t *)&env->fpr[i]) = tmp >> 32;
429 *((uint32_t *)&env->fpr[i + 1]) = tmp & 0xffffffff;
430 }
431 env->pc = tswapl(registers[64]);
432 env->npc = tswapl(registers[65]);
433 {
434 uint64_t tmp = tswapl(registers[66]);
435
436 PUT_CCR(env, tmp >> 32);
437 env->asi = (tmp >> 24) & 0xff;
438 env->pstate = (tmp >> 8) & 0xfff;
439 PUT_CWP64(env, tmp & 0xff);
440 }
441 env->fsr = tswapl(registers[67]);
442 env->fprs = tswapl(registers[68]);
443 env->y = tswapl(registers[69]);
444 #endif
445 }
446 #elif defined (TARGET_ARM)
447 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
448 {
449 int i;
450 uint8_t *ptr;
451
452 ptr = mem_buf;
453 /* 16 core integer registers (4 bytes each). */
454 for (i = 0; i < 16; i++)
455 {
456 *(uint32_t *)ptr = tswapl(env->regs[i]);
457 ptr += 4;
458 }
459 /* 8 FPA registers (12 bytes each), FPS (4 bytes).
460 Not yet implemented. */
461 memset (ptr, 0, 8 * 12 + 4);
462 ptr += 8 * 12 + 4;
463 /* CPSR (4 bytes). */
464 *(uint32_t *)ptr = tswapl (cpsr_read(env));
465 ptr += 4;
466
467 return ptr - mem_buf;
468 }
469
470 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
471 {
472 int i;
473 uint8_t *ptr;
474
475 ptr = mem_buf;
476 /* Core integer registers. */
477 for (i = 0; i < 16; i++)
478 {
479 env->regs[i] = tswapl(*(uint32_t *)ptr);
480 ptr += 4;
481 }
482 /* Ignore FPA regs and scr. */
483 ptr += 8 * 12 + 4;
484 cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
485 }
486 #elif defined (TARGET_M68K)
487 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
488 {
489 int i;
490 uint8_t *ptr;
491 CPU_DoubleU u;
492
493 ptr = mem_buf;
494 /* D0-D7 */
495 for (i = 0; i < 8; i++) {
496 *(uint32_t *)ptr = tswapl(env->dregs[i]);
497 ptr += 4;
498 }
499 /* A0-A7 */
500 for (i = 0; i < 8; i++) {
501 *(uint32_t *)ptr = tswapl(env->aregs[i]);
502 ptr += 4;
503 }
504 *(uint32_t *)ptr = tswapl(env->sr);
505 ptr += 4;
506 *(uint32_t *)ptr = tswapl(env->pc);
507 ptr += 4;
508 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
509 ColdFire has 8-bit double precision registers. */
510 for (i = 0; i < 8; i++) {
511 u.d = env->fregs[i];
512 *(uint32_t *)ptr = tswap32(u.l.upper);
513 *(uint32_t *)ptr = tswap32(u.l.lower);
514 }
515 /* FP control regs (not implemented). */
516 memset (ptr, 0, 3 * 4);
517 ptr += 3 * 4;
518
519 return ptr - mem_buf;
520 }
521
522 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
523 {
524 int i;
525 uint8_t *ptr;
526 CPU_DoubleU u;
527
528 ptr = mem_buf;
529 /* D0-D7 */
530 for (i = 0; i < 8; i++) {
531 env->dregs[i] = tswapl(*(uint32_t *)ptr);
532 ptr += 4;
533 }
534 /* A0-A7 */
535 for (i = 0; i < 8; i++) {
536 env->aregs[i] = tswapl(*(uint32_t *)ptr);
537 ptr += 4;
538 }
539 env->sr = tswapl(*(uint32_t *)ptr);
540 ptr += 4;
541 env->pc = tswapl(*(uint32_t *)ptr);
542 ptr += 4;
543 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
544 ColdFire has 8-bit double precision registers. */
545 for (i = 0; i < 8; i++) {
546 u.l.upper = tswap32(*(uint32_t *)ptr);
547 u.l.lower = tswap32(*(uint32_t *)ptr);
548 env->fregs[i] = u.d;
549 }
550 /* FP control regs (not implemented). */
551 ptr += 3 * 4;
552 }
553 #elif defined (TARGET_MIPS)
554 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
555 {
556 int i;
557 uint8_t *ptr;
558
559 ptr = mem_buf;
560 for (i = 0; i < 32; i++)
561 {
562 *(target_ulong *)ptr = tswapl(env->gpr[i][env->current_tc]);
563 ptr += sizeof(target_ulong);
564 }
565
566 *(target_ulong *)ptr = tswapl(env->CP0_Status);
567 ptr += sizeof(target_ulong);
568
569 *(target_ulong *)ptr = tswapl(env->LO[0][env->current_tc]);
570 ptr += sizeof(target_ulong);
571
572 *(target_ulong *)ptr = tswapl(env->HI[0][env->current_tc]);
573 ptr += sizeof(target_ulong);
574
575 *(target_ulong *)ptr = tswapl(env->CP0_BadVAddr);
576 ptr += sizeof(target_ulong);
577
578 *(target_ulong *)ptr = tswapl(env->CP0_Cause);
579 ptr += sizeof(target_ulong);
580
581 *(target_ulong *)ptr = tswapl(env->PC[env->current_tc]);
582 ptr += sizeof(target_ulong);
583
584 if (env->CP0_Config1 & (1 << CP0C1_FP))
585 {
586 for (i = 0; i < 32; i++)
587 {
588 *(target_ulong *)ptr = tswapl(env->fpu->fpr[i].fs[FP_ENDIAN_IDX]);
589 ptr += sizeof(target_ulong);
590 }
591
592 *(target_ulong *)ptr = tswapl(env->fpu->fcr31);
593 ptr += sizeof(target_ulong);
594
595 *(target_ulong *)ptr = tswapl(env->fpu->fcr0);
596 ptr += sizeof(target_ulong);
597 }
598
599 /* 32 FP registers, fsr, fir, fp. Not yet implemented. */
600 /* what's 'fp' mean here? */
601
602 return ptr - mem_buf;
603 }
604
605 /* convert MIPS rounding mode in FCR31 to IEEE library */
606 static unsigned int ieee_rm[] =
607 {
608 float_round_nearest_even,
609 float_round_to_zero,
610 float_round_up,
611 float_round_down
612 };
613 #define RESTORE_ROUNDING_MODE \
614 set_float_rounding_mode(ieee_rm[env->fpu->fcr31 & 3], &env->fpu->fp_status)
615
616 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
617 {
618 int i;
619 uint8_t *ptr;
620
621 ptr = mem_buf;
622 for (i = 0; i < 32; i++)
623 {
624 env->gpr[i][env->current_tc] = tswapl(*(target_ulong *)ptr);
625 ptr += sizeof(target_ulong);
626 }
627
628 env->CP0_Status = tswapl(*(target_ulong *)ptr);
629 ptr += sizeof(target_ulong);
630
631 env->LO[0][env->current_tc] = tswapl(*(target_ulong *)ptr);
632 ptr += sizeof(target_ulong);
633
634 env->HI[0][env->current_tc] = tswapl(*(target_ulong *)ptr);
635 ptr += sizeof(target_ulong);
636
637 env->CP0_BadVAddr = tswapl(*(target_ulong *)ptr);
638 ptr += sizeof(target_ulong);
639
640 env->CP0_Cause = tswapl(*(target_ulong *)ptr);
641 ptr += sizeof(target_ulong);
642
643 env->PC[env->current_tc] = tswapl(*(target_ulong *)ptr);
644 ptr += sizeof(target_ulong);
645
646 if (env->CP0_Config1 & (1 << CP0C1_FP))
647 {
648 for (i = 0; i < 32; i++)
649 {
650 env->fpu->fpr[i].fs[FP_ENDIAN_IDX] = tswapl(*(target_ulong *)ptr);
651 ptr += sizeof(target_ulong);
652 }
653
654 env->fpu->fcr31 = tswapl(*(target_ulong *)ptr) & 0x0183FFFF;
655 ptr += sizeof(target_ulong);
656
657 env->fpu->fcr0 = tswapl(*(target_ulong *)ptr);
658 ptr += sizeof(target_ulong);
659
660 /* set rounding mode */
661 RESTORE_ROUNDING_MODE;
662
663 #ifndef CONFIG_SOFTFLOAT
664 /* no floating point exception for native float */
665 SET_FP_ENABLE(env->fcr31, 0);
666 #endif
667 }
668 }
669 #elif defined (TARGET_SH4)
670
671 /* Hint: Use "set architecture sh4" in GDB to see fpu registers */
672
673 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
674 {
675 uint32_t *ptr = (uint32_t *)mem_buf;
676 int i;
677
678 #define SAVE(x) *ptr++=tswapl(x)
679 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
680 for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
681 } else {
682 for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
683 }
684 for (i = 8; i < 16; i++) SAVE(env->gregs[i]);
685 SAVE (env->pc);
686 SAVE (env->pr);
687 SAVE (env->gbr);
688 SAVE (env->vbr);
689 SAVE (env->mach);
690 SAVE (env->macl);
691 SAVE (env->sr);
692 SAVE (env->fpul);
693 SAVE (env->fpscr);
694 for (i = 0; i < 16; i++)
695 SAVE(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
696 SAVE (env->ssr);
697 SAVE (env->spc);
698 for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
699 for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
700 return ((uint8_t *)ptr - mem_buf);
701 }
702
703 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
704 {
705 uint32_t *ptr = (uint32_t *)mem_buf;
706 int i;
707
708 #define LOAD(x) (x)=*ptr++;
709 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
710 for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
711 } else {
712 for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
713 }
714 for (i = 8; i < 16; i++) LOAD(env->gregs[i]);
715 LOAD (env->pc);
716 LOAD (env->pr);
717 LOAD (env->gbr);
718 LOAD (env->vbr);
719 LOAD (env->mach);
720 LOAD (env->macl);
721 LOAD (env->sr);
722 LOAD (env->fpul);
723 LOAD (env->fpscr);
724 for (i = 0; i < 16; i++)
725 LOAD(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
726 LOAD (env->ssr);
727 LOAD (env->spc);
728 for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
729 for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
730 }
731 #else
732 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
733 {
734 return 0;
735 }
736
737 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
738 {
739 }
740
741 #endif
742
743 static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
744 {
745 const char *p;
746 int ch, reg_size, type;
747 char buf[4096];
748 uint8_t mem_buf[2000];
749 uint32_t *registers;
750 target_ulong addr, len;
751
752 #ifdef DEBUG_GDB
753 printf("command='%s'\n", line_buf);
754 #endif
755 p = line_buf;
756 ch = *p++;
757 switch(ch) {
758 case '?':
759 /* TODO: Make this return the correct value for user-mode. */
760 snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
761 put_packet(s, buf);
762 break;
763 case 'c':
764 if (*p != '\0') {
765 addr = strtoull(p, (char **)&p, 16);
766 #if defined(TARGET_I386)
767 env->eip = addr;
768 #elif defined (TARGET_PPC)
769 env->nip = addr;
770 #elif defined (TARGET_SPARC)
771 env->pc = addr;
772 env->npc = addr + 4;
773 #elif defined (TARGET_ARM)
774 env->regs[15] = addr;
775 #elif defined (TARGET_SH4)
776 env->pc = addr;
777 #elif defined (TARGET_MIPS)
778 env->PC[env->current_tc] = addr;
779 #endif
780 }
781 #ifdef CONFIG_USER_ONLY
782 s->running_state = 1;
783 #else
784 vm_start();
785 #endif
786 return RS_IDLE;
787 case 's':
788 if (*p != '\0') {
789 addr = strtoull(p, (char **)&p, 16);
790 #if defined(TARGET_I386)
791 env->eip = addr;
792 #elif defined (TARGET_PPC)
793 env->nip = addr;
794 #elif defined (TARGET_SPARC)
795 env->pc = addr;
796 env->npc = addr + 4;
797 #elif defined (TARGET_ARM)
798 env->regs[15] = addr;
799 #elif defined (TARGET_SH4)
800 env->pc = addr;
801 #elif defined (TARGET_MIPS)
802 env->PC[env->current_tc] = addr;
803 #endif
804 }
805 cpu_single_step(env, 1);
806 #ifdef CONFIG_USER_ONLY
807 s->running_state = 1;
808 #else
809 vm_start();
810 #endif
811 return RS_IDLE;
812 case 'F':
813 {
814 target_ulong ret;
815 target_ulong err;
816
817 ret = strtoull(p, (char **)&p, 16);
818 if (*p == ',') {
819 p++;
820 err = strtoull(p, (char **)&p, 16);
821 } else {
822 err = 0;
823 }
824 if (*p == ',')
825 p++;
826 type = *p;
827 if (gdb_current_syscall_cb)
828 gdb_current_syscall_cb(s->env, ret, err);
829 if (type == 'C') {
830 put_packet(s, "T02");
831 } else {
832 #ifdef CONFIG_USER_ONLY
833 s->running_state = 1;
834 #else
835 vm_start();
836 #endif
837 }
838 }
839 break;
840 case 'g':
841 reg_size = cpu_gdb_read_registers(env, mem_buf);
842 memtohex(buf, mem_buf, reg_size);
843 put_packet(s, buf);
844 break;
845 case 'G':
846 registers = (void *)mem_buf;
847 len = strlen(p) / 2;
848 hextomem((uint8_t *)registers, p, len);
849 cpu_gdb_write_registers(env, mem_buf, len);
850 put_packet(s, "OK");
851 break;
852 case 'm':
853 addr = strtoull(p, (char **)&p, 16);
854 if (*p == ',')
855 p++;
856 len = strtoull(p, NULL, 16);
857 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
858 put_packet (s, "E14");
859 } else {
860 memtohex(buf, mem_buf, len);
861 put_packet(s, buf);
862 }
863 break;
864 case 'M':
865 addr = strtoull(p, (char **)&p, 16);
866 if (*p == ',')
867 p++;
868 len = strtoull(p, (char **)&p, 16);
869 if (*p == ':')
870 p++;
871 hextomem(mem_buf, p, len);
872 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
873 put_packet(s, "E14");
874 else
875 put_packet(s, "OK");
876 break;
877 case 'Z':
878 type = strtoul(p, (char **)&p, 16);
879 if (*p == ',')
880 p++;
881 addr = strtoull(p, (char **)&p, 16);
882 if (*p == ',')
883 p++;
884 len = strtoull(p, (char **)&p, 16);
885 if (type == 0 || type == 1) {
886 if (cpu_breakpoint_insert(env, addr) < 0)
887 goto breakpoint_error;
888 put_packet(s, "OK");
889 #ifndef CONFIG_USER_ONLY
890 } else if (type == 2) {
891 if (cpu_watchpoint_insert(env, addr) < 0)
892 goto breakpoint_error;
893 put_packet(s, "OK");
894 #endif
895 } else {
896 breakpoint_error:
897 put_packet(s, "E22");
898 }
899 break;
900 case 'z':
901 type = strtoul(p, (char **)&p, 16);
902 if (*p == ',')
903 p++;
904 addr = strtoull(p, (char **)&p, 16);
905 if (*p == ',')
906 p++;
907 len = strtoull(p, (char **)&p, 16);
908 if (type == 0 || type == 1) {
909 cpu_breakpoint_remove(env, addr);
910 put_packet(s, "OK");
911 #ifndef CONFIG_USER_ONLY
912 } else if (type == 2) {
913 cpu_watchpoint_remove(env, addr);
914 put_packet(s, "OK");
915 #endif
916 } else {
917 goto breakpoint_error;
918 }
919 break;
920 #ifdef CONFIG_LINUX_USER
921 case 'q':
922 if (strncmp(p, "Offsets", 7) == 0) {
923 TaskState *ts = env->opaque;
924
925 sprintf(buf,
926 "Text=" TARGET_FMT_lx ";Data=" TARGET_FMT_lx ";Bss=" TARGET_FMT_lx,
927 ts->info->code_offset,
928 ts->info->data_offset,
929 ts->info->data_offset);
930 put_packet(s, buf);
931 break;
932 }
933 /* Fall through. */
934 #endif
935 default:
936 // unknown_command:
937 /* put empty packet */
938 buf[0] = '\0';
939 put_packet(s, buf);
940 break;
941 }
942 return RS_IDLE;
943 }
944
945 extern void tb_flush(CPUState *env);
946
947 #ifndef CONFIG_USER_ONLY
948 static void gdb_vm_stopped(void *opaque, int reason)
949 {
950 GDBState *s = opaque;
951 char buf[256];
952 int ret;
953
954 if (s->state == RS_SYSCALL)
955 return;
956
957 /* disable single step if it was enable */
958 cpu_single_step(s->env, 0);
959
960 if (reason == EXCP_DEBUG) {
961 if (s->env->watchpoint_hit) {
962 snprintf(buf, sizeof(buf), "T%02xwatch:" TARGET_FMT_lx ";",
963 SIGTRAP,
964 s->env->watchpoint[s->env->watchpoint_hit - 1].vaddr);
965 put_packet(s, buf);
966 s->env->watchpoint_hit = 0;
967 return;
968 }
969 tb_flush(s->env);
970 ret = SIGTRAP;
971 } else if (reason == EXCP_INTERRUPT) {
972 ret = SIGINT;
973 } else {
974 ret = 0;
975 }
976 snprintf(buf, sizeof(buf), "S%02x", ret);
977 put_packet(s, buf);
978 }
979 #endif
980
981 /* Send a gdb syscall request.
982 This accepts limited printf-style format specifiers, specifically:
983 %x - target_ulong argument printed in hex.
984 %lx - 64-bit argument printed in hex.
985 %s - string pointer (target_ulong) and length (int) pair. */
986 void gdb_do_syscall(gdb_syscall_complete_cb cb, char *fmt, ...)
987 {
988 va_list va;
989 char buf[256];
990 char *p;
991 target_ulong addr;
992 uint64_t i64;
993 GDBState *s;
994
995 s = gdb_syscall_state;
996 if (!s)
997 return;
998 gdb_current_syscall_cb = cb;
999 s->state = RS_SYSCALL;
1000 #ifndef CONFIG_USER_ONLY
1001 vm_stop(EXCP_DEBUG);
1002 #endif
1003 s->state = RS_IDLE;
1004 va_start(va, fmt);
1005 p = buf;
1006 *(p++) = 'F';
1007 while (*fmt) {
1008 if (*fmt == '%') {
1009 fmt++;
1010 switch (*fmt++) {
1011 case 'x':
1012 addr = va_arg(va, target_ulong);
1013 p += sprintf(p, TARGET_FMT_lx, addr);
1014 break;
1015 case 'l':
1016 if (*(fmt++) != 'x')
1017 goto bad_format;
1018 i64 = va_arg(va, uint64_t);
1019 p += sprintf(p, "%" PRIx64, i64);
1020 break;
1021 case 's':
1022 addr = va_arg(va, target_ulong);
1023 p += sprintf(p, TARGET_FMT_lx "/%x", addr, va_arg(va, int));
1024 break;
1025 default:
1026 bad_format:
1027 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
1028 fmt - 1);
1029 break;
1030 }
1031 } else {
1032 *(p++) = *(fmt++);
1033 }
1034 }
1035 *p = 0;
1036 va_end(va);
1037 put_packet(s, buf);
1038 #ifdef CONFIG_USER_ONLY
1039 gdb_handlesig(s->env, 0);
1040 #else
1041 cpu_interrupt(s->env, CPU_INTERRUPT_EXIT);
1042 #endif
1043 }
1044
1045 static void gdb_read_byte(GDBState *s, int ch)
1046 {
1047 CPUState *env = s->env;
1048 int i, csum;
1049 char reply[1];
1050
1051 #ifndef CONFIG_USER_ONLY
1052 if (s->last_packet_len) {
1053 /* Waiting for a response to the last packet. If we see the start
1054 of a new command then abandon the previous response. */
1055 if (ch == '-') {
1056 #ifdef DEBUG_GDB
1057 printf("Got NACK, retransmitting\n");
1058 #endif
1059 put_buffer(s, s->last_packet, s->last_packet_len);
1060 }
1061 #ifdef DEBUG_GDB
1062 else if (ch == '+')
1063 printf("Got ACK\n");
1064 else
1065 printf("Got '%c' when expecting ACK/NACK\n", ch);
1066 #endif
1067 if (ch == '+' || ch == '$')
1068 s->last_packet_len = 0;
1069 if (ch != '$')
1070 return;
1071 }
1072 if (vm_running) {
1073 /* when the CPU is running, we cannot do anything except stop
1074 it when receiving a char */
1075 vm_stop(EXCP_INTERRUPT);
1076 } else
1077 #endif
1078 {
1079 switch(s->state) {
1080 case RS_IDLE:
1081 if (ch == '$') {
1082 s->line_buf_index = 0;
1083 s->state = RS_GETLINE;
1084 }
1085 break;
1086 case RS_GETLINE:
1087 if (ch == '#') {
1088 s->state = RS_CHKSUM1;
1089 } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
1090 s->state = RS_IDLE;
1091 } else {
1092 s->line_buf[s->line_buf_index++] = ch;
1093 }
1094 break;
1095 case RS_CHKSUM1:
1096 s->line_buf[s->line_buf_index] = '\0';
1097 s->line_csum = fromhex(ch) << 4;
1098 s->state = RS_CHKSUM2;
1099 break;
1100 case RS_CHKSUM2:
1101 s->line_csum |= fromhex(ch);
1102 csum = 0;
1103 for(i = 0; i < s->line_buf_index; i++) {
1104 csum += s->line_buf[i];
1105 }
1106 if (s->line_csum != (csum & 0xff)) {
1107 reply[0] = '-';
1108 put_buffer(s, reply, 1);
1109 s->state = RS_IDLE;
1110 } else {
1111 reply[0] = '+';
1112 put_buffer(s, reply, 1);
1113 s->state = gdb_handle_packet(s, env, s->line_buf);
1114 }
1115 break;
1116 default:
1117 abort();
1118 }
1119 }
1120 }
1121
1122 #ifdef CONFIG_USER_ONLY
1123 int
1124 gdb_handlesig (CPUState *env, int sig)
1125 {
1126 GDBState *s;
1127 char buf[256];
1128 int n;
1129
1130 if (gdbserver_fd < 0)
1131 return sig;
1132
1133 s = &gdbserver_state;
1134
1135 /* disable single step if it was enabled */
1136 cpu_single_step(env, 0);
1137 tb_flush(env);
1138
1139 if (sig != 0)
1140 {
1141 snprintf(buf, sizeof(buf), "S%02x", sig);
1142 put_packet(s, buf);
1143 }
1144
1145 sig = 0;
1146 s->state = RS_IDLE;
1147 s->running_state = 0;
1148 while (s->running_state == 0) {
1149 n = read (s->fd, buf, 256);
1150 if (n > 0)
1151 {
1152 int i;
1153
1154 for (i = 0; i < n; i++)
1155 gdb_read_byte (s, buf[i]);
1156 }
1157 else if (n == 0 || errno != EAGAIN)
1158 {
1159 /* XXX: Connection closed. Should probably wait for annother
1160 connection before continuing. */
1161 return sig;
1162 }
1163 }
1164 return sig;
1165 }
1166
1167 /* Tell the remote gdb that the process has exited. */
1168 void gdb_exit(CPUState *env, int code)
1169 {
1170 GDBState *s;
1171 char buf[4];
1172
1173 if (gdbserver_fd < 0)
1174 return;
1175
1176 s = &gdbserver_state;
1177
1178 snprintf(buf, sizeof(buf), "W%02x", code);
1179 put_packet(s, buf);
1180 }
1181
1182
1183 static void gdb_accept(void *opaque)
1184 {
1185 GDBState *s;
1186 struct sockaddr_in sockaddr;
1187 socklen_t len;
1188 int val, fd;
1189
1190 for(;;) {
1191 len = sizeof(sockaddr);
1192 fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
1193 if (fd < 0 && errno != EINTR) {
1194 perror("accept");
1195 return;
1196 } else if (fd >= 0) {
1197 break;
1198 }
1199 }
1200
1201 /* set short latency */
1202 val = 1;
1203 setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
1204
1205 s = &gdbserver_state;
1206 memset (s, 0, sizeof (GDBState));
1207 s->env = first_cpu; /* XXX: allow to change CPU */
1208 s->fd = fd;
1209
1210 gdb_syscall_state = s;
1211
1212 fcntl(fd, F_SETFL, O_NONBLOCK);
1213 }
1214
1215 static int gdbserver_open(int port)
1216 {
1217 struct sockaddr_in sockaddr;
1218 int fd, val, ret;
1219
1220 fd = socket(PF_INET, SOCK_STREAM, 0);
1221 if (fd < 0) {
1222 perror("socket");
1223 return -1;
1224 }
1225
1226 /* allow fast reuse */
1227 val = 1;
1228 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
1229
1230 sockaddr.sin_family = AF_INET;
1231 sockaddr.sin_port = htons(port);
1232 sockaddr.sin_addr.s_addr = 0;
1233 ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
1234 if (ret < 0) {
1235 perror("bind");
1236 return -1;
1237 }
1238 ret = listen(fd, 0);
1239 if (ret < 0) {
1240 perror("listen");
1241 return -1;
1242 }
1243 return fd;
1244 }
1245
1246 int gdbserver_start(int port)
1247 {
1248 gdbserver_fd = gdbserver_open(port);
1249 if (gdbserver_fd < 0)
1250 return -1;
1251 /* accept connections */
1252 gdb_accept (NULL);
1253 return 0;
1254 }
1255 #else
1256 static int gdb_chr_can_receive(void *opaque)
1257 {
1258 return 1;
1259 }
1260
1261 static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
1262 {
1263 GDBState *s = opaque;
1264 int i;
1265
1266 for (i = 0; i < size; i++) {
1267 gdb_read_byte(s, buf[i]);
1268 }
1269 }
1270
1271 static void gdb_chr_event(void *opaque, int event)
1272 {
1273 switch (event) {
1274 case CHR_EVENT_RESET:
1275 vm_stop(EXCP_INTERRUPT);
1276 gdb_syscall_state = opaque;
1277 break;
1278 default:
1279 break;
1280 }
1281 }
1282
1283 int gdbserver_start(const char *port)
1284 {
1285 GDBState *s;
1286 char gdbstub_port_name[128];
1287 int port_num;
1288 char *p;
1289 CharDriverState *chr;
1290
1291 if (!port || !*port)
1292 return -1;
1293
1294 port_num = strtol(port, &p, 10);
1295 if (*p == 0) {
1296 /* A numeric value is interpreted as a port number. */
1297 snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
1298 "tcp::%d,nowait,nodelay,server", port_num);
1299 port = gdbstub_port_name;
1300 }
1301
1302 chr = qemu_chr_open(port);
1303 if (!chr)
1304 return -1;
1305
1306 s = qemu_mallocz(sizeof(GDBState));
1307 if (!s) {
1308 return -1;
1309 }
1310 s->env = first_cpu; /* XXX: allow to change CPU */
1311 s->chr = chr;
1312 qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
1313 gdb_chr_event, s);
1314 qemu_add_vm_stop_handler(gdb_vm_stopped, s);
1315 return 0;
1316 }
1317 #endif