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1 /*
2 * QEMU Machine
3 *
4 * Copyright (C) 2014 Red Hat Inc
5 *
6 * Authors:
7 * Marcel Apfelbaum <marcel.a@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
11 */
12
13 #include "qemu/osdep.h"
14 #include "qemu/option.h"
15 #include "qapi/qmp/qerror.h"
16 #include "sysemu/replay.h"
17 #include "qemu/units.h"
18 #include "hw/boards.h"
19 #include "qapi/error.h"
20 #include "qapi/qapi-visit-common.h"
21 #include "qapi/visitor.h"
22 #include "hw/sysbus.h"
23 #include "sysemu/sysemu.h"
24 #include "sysemu/numa.h"
25 #include "qemu/error-report.h"
26 #include "sysemu/qtest.h"
27 #include "hw/pci/pci.h"
28 #include "hw/mem/nvdimm.h"
29 #include "migration/vmstate.h"
30
31 GlobalProperty hw_compat_5_0[] = {};
32 const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0);
33
34 GlobalProperty hw_compat_4_2[] = {
35 { "virtio-blk-device", "queue-size", "128"},
36 { "virtio-scsi-device", "virtqueue_size", "128"},
37 { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" },
38 { "virtio-blk-device", "seg-max-adjust", "off"},
39 { "virtio-scsi-device", "seg_max_adjust", "off"},
40 { "vhost-blk-device", "seg_max_adjust", "off"},
41 { "usb-host", "suppress-remote-wake", "off" },
42 { "usb-redir", "suppress-remote-wake", "off" },
43 { "qxl", "revision", "4" },
44 { "qxl-vga", "revision", "4" },
45 { "fw_cfg", "acpi-mr-restore", "false" },
46 };
47 const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2);
48
49 GlobalProperty hw_compat_4_1[] = {
50 { "virtio-pci", "x-pcie-flr-init", "off" },
51 { "virtio-device", "use-disabled-flag", "false" },
52 };
53 const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1);
54
55 GlobalProperty hw_compat_4_0[] = {
56 { "VGA", "edid", "false" },
57 { "secondary-vga", "edid", "false" },
58 { "bochs-display", "edid", "false" },
59 { "virtio-vga", "edid", "false" },
60 { "virtio-gpu-device", "edid", "false" },
61 { "virtio-device", "use-started", "false" },
62 { "virtio-balloon-device", "qemu-4-0-config-size", "true" },
63 { "pl031", "migrate-tick-offset", "false" },
64 };
65 const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0);
66
67 GlobalProperty hw_compat_3_1[] = {
68 { "pcie-root-port", "x-speed", "2_5" },
69 { "pcie-root-port", "x-width", "1" },
70 { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" },
71 { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" },
72 { "tpm-crb", "ppi", "false" },
73 { "tpm-tis", "ppi", "false" },
74 { "usb-kbd", "serial", "42" },
75 { "usb-mouse", "serial", "42" },
76 { "usb-tablet", "serial", "42" },
77 { "virtio-blk-device", "discard", "false" },
78 { "virtio-blk-device", "write-zeroes", "false" },
79 { "virtio-balloon-device", "qemu-4-0-config-size", "false" },
80 { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */
81 };
82 const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1);
83
84 GlobalProperty hw_compat_3_0[] = {};
85 const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0);
86
87 GlobalProperty hw_compat_2_12[] = {
88 { "migration", "decompress-error-check", "off" },
89 { "hda-audio", "use-timer", "false" },
90 { "cirrus-vga", "global-vmstate", "true" },
91 { "VGA", "global-vmstate", "true" },
92 { "vmware-svga", "global-vmstate", "true" },
93 { "qxl-vga", "global-vmstate", "true" },
94 };
95 const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12);
96
97 GlobalProperty hw_compat_2_11[] = {
98 { "hpet", "hpet-offset-saved", "false" },
99 { "virtio-blk-pci", "vectors", "2" },
100 { "vhost-user-blk-pci", "vectors", "2" },
101 { "e1000", "migrate_tso_props", "off" },
102 };
103 const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11);
104
105 GlobalProperty hw_compat_2_10[] = {
106 { "virtio-mouse-device", "wheel-axis", "false" },
107 { "virtio-tablet-device", "wheel-axis", "false" },
108 };
109 const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10);
110
111 GlobalProperty hw_compat_2_9[] = {
112 { "pci-bridge", "shpc", "off" },
113 { "intel-iommu", "pt", "off" },
114 { "virtio-net-device", "x-mtu-bypass-backend", "off" },
115 { "pcie-root-port", "x-migrate-msix", "false" },
116 };
117 const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9);
118
119 GlobalProperty hw_compat_2_8[] = {
120 { "fw_cfg_mem", "x-file-slots", "0x10" },
121 { "fw_cfg_io", "x-file-slots", "0x10" },
122 { "pflash_cfi01", "old-multiple-chip-handling", "on" },
123 { "pci-bridge", "shpc", "on" },
124 { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" },
125 { "virtio-pci", "x-pcie-deverr-init", "off" },
126 { "virtio-pci", "x-pcie-lnkctl-init", "off" },
127 { "virtio-pci", "x-pcie-pm-init", "off" },
128 { "cirrus-vga", "vgamem_mb", "8" },
129 { "isa-cirrus-vga", "vgamem_mb", "8" },
130 };
131 const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8);
132
133 GlobalProperty hw_compat_2_7[] = {
134 { "virtio-pci", "page-per-vq", "on" },
135 { "virtio-serial-device", "emergency-write", "off" },
136 { "ioapic", "version", "0x11" },
137 { "intel-iommu", "x-buggy-eim", "true" },
138 { "virtio-pci", "x-ignore-backend-features", "on" },
139 };
140 const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7);
141
142 GlobalProperty hw_compat_2_6[] = {
143 { "virtio-mmio", "format_transport_address", "off" },
144 /* Optional because not all virtio-pci devices support legacy mode */
145 { "virtio-pci", "disable-modern", "on", .optional = true },
146 { "virtio-pci", "disable-legacy", "off", .optional = true },
147 };
148 const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6);
149
150 GlobalProperty hw_compat_2_5[] = {
151 { "isa-fdc", "fallback", "144" },
152 { "pvscsi", "x-old-pci-configuration", "on" },
153 { "pvscsi", "x-disable-pcie", "on" },
154 { "vmxnet3", "x-old-msi-offsets", "on" },
155 { "vmxnet3", "x-disable-pcie", "on" },
156 };
157 const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5);
158
159 GlobalProperty hw_compat_2_4[] = {
160 /* Optional because the 'scsi' property is Linux-only */
161 { "virtio-blk-device", "scsi", "true", .optional = true },
162 { "e1000", "extra_mac_registers", "off" },
163 { "virtio-pci", "x-disable-pcie", "on" },
164 { "virtio-pci", "migrate-extra", "off" },
165 { "fw_cfg_mem", "dma_enabled", "off" },
166 { "fw_cfg_io", "dma_enabled", "off" }
167 };
168 const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4);
169
170 GlobalProperty hw_compat_2_3[] = {
171 { "virtio-blk-pci", "any_layout", "off" },
172 { "virtio-balloon-pci", "any_layout", "off" },
173 { "virtio-serial-pci", "any_layout", "off" },
174 { "virtio-9p-pci", "any_layout", "off" },
175 { "virtio-rng-pci", "any_layout", "off" },
176 { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" },
177 { "migration", "send-configuration", "off" },
178 { "migration", "send-section-footer", "off" },
179 { "migration", "store-global-state", "off" },
180 };
181 const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3);
182
183 GlobalProperty hw_compat_2_2[] = {};
184 const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2);
185
186 GlobalProperty hw_compat_2_1[] = {
187 { "intel-hda", "old_msi_addr", "on" },
188 { "VGA", "qemu-extended-regs", "off" },
189 { "secondary-vga", "qemu-extended-regs", "off" },
190 { "virtio-scsi-pci", "any_layout", "off" },
191 { "usb-mouse", "usb_version", "1" },
192 { "usb-kbd", "usb_version", "1" },
193 { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" },
194 };
195 const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1);
196
197 static char *machine_get_kernel(Object *obj, Error **errp)
198 {
199 MachineState *ms = MACHINE(obj);
200
201 return g_strdup(ms->kernel_filename);
202 }
203
204 static void machine_set_kernel(Object *obj, const char *value, Error **errp)
205 {
206 MachineState *ms = MACHINE(obj);
207
208 g_free(ms->kernel_filename);
209 ms->kernel_filename = g_strdup(value);
210 }
211
212 static char *machine_get_initrd(Object *obj, Error **errp)
213 {
214 MachineState *ms = MACHINE(obj);
215
216 return g_strdup(ms->initrd_filename);
217 }
218
219 static void machine_set_initrd(Object *obj, const char *value, Error **errp)
220 {
221 MachineState *ms = MACHINE(obj);
222
223 g_free(ms->initrd_filename);
224 ms->initrd_filename = g_strdup(value);
225 }
226
227 static char *machine_get_append(Object *obj, Error **errp)
228 {
229 MachineState *ms = MACHINE(obj);
230
231 return g_strdup(ms->kernel_cmdline);
232 }
233
234 static void machine_set_append(Object *obj, const char *value, Error **errp)
235 {
236 MachineState *ms = MACHINE(obj);
237
238 g_free(ms->kernel_cmdline);
239 ms->kernel_cmdline = g_strdup(value);
240 }
241
242 static char *machine_get_dtb(Object *obj, Error **errp)
243 {
244 MachineState *ms = MACHINE(obj);
245
246 return g_strdup(ms->dtb);
247 }
248
249 static void machine_set_dtb(Object *obj, const char *value, Error **errp)
250 {
251 MachineState *ms = MACHINE(obj);
252
253 g_free(ms->dtb);
254 ms->dtb = g_strdup(value);
255 }
256
257 static char *machine_get_dumpdtb(Object *obj, Error **errp)
258 {
259 MachineState *ms = MACHINE(obj);
260
261 return g_strdup(ms->dumpdtb);
262 }
263
264 static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp)
265 {
266 MachineState *ms = MACHINE(obj);
267
268 g_free(ms->dumpdtb);
269 ms->dumpdtb = g_strdup(value);
270 }
271
272 static void machine_get_phandle_start(Object *obj, Visitor *v,
273 const char *name, void *opaque,
274 Error **errp)
275 {
276 MachineState *ms = MACHINE(obj);
277 int64_t value = ms->phandle_start;
278
279 visit_type_int(v, name, &value, errp);
280 }
281
282 static void machine_set_phandle_start(Object *obj, Visitor *v,
283 const char *name, void *opaque,
284 Error **errp)
285 {
286 MachineState *ms = MACHINE(obj);
287 Error *error = NULL;
288 int64_t value;
289
290 visit_type_int(v, name, &value, &error);
291 if (error) {
292 error_propagate(errp, error);
293 return;
294 }
295
296 ms->phandle_start = value;
297 }
298
299 static char *machine_get_dt_compatible(Object *obj, Error **errp)
300 {
301 MachineState *ms = MACHINE(obj);
302
303 return g_strdup(ms->dt_compatible);
304 }
305
306 static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp)
307 {
308 MachineState *ms = MACHINE(obj);
309
310 g_free(ms->dt_compatible);
311 ms->dt_compatible = g_strdup(value);
312 }
313
314 static bool machine_get_dump_guest_core(Object *obj, Error **errp)
315 {
316 MachineState *ms = MACHINE(obj);
317
318 return ms->dump_guest_core;
319 }
320
321 static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp)
322 {
323 MachineState *ms = MACHINE(obj);
324
325 ms->dump_guest_core = value;
326 }
327
328 static bool machine_get_mem_merge(Object *obj, Error **errp)
329 {
330 MachineState *ms = MACHINE(obj);
331
332 return ms->mem_merge;
333 }
334
335 static void machine_set_mem_merge(Object *obj, bool value, Error **errp)
336 {
337 MachineState *ms = MACHINE(obj);
338
339 ms->mem_merge = value;
340 }
341
342 static bool machine_get_usb(Object *obj, Error **errp)
343 {
344 MachineState *ms = MACHINE(obj);
345
346 return ms->usb;
347 }
348
349 static void machine_set_usb(Object *obj, bool value, Error **errp)
350 {
351 MachineState *ms = MACHINE(obj);
352
353 ms->usb = value;
354 ms->usb_disabled = !value;
355 }
356
357 static bool machine_get_graphics(Object *obj, Error **errp)
358 {
359 MachineState *ms = MACHINE(obj);
360
361 return ms->enable_graphics;
362 }
363
364 static void machine_set_graphics(Object *obj, bool value, Error **errp)
365 {
366 MachineState *ms = MACHINE(obj);
367
368 ms->enable_graphics = value;
369 }
370
371 static char *machine_get_firmware(Object *obj, Error **errp)
372 {
373 MachineState *ms = MACHINE(obj);
374
375 return g_strdup(ms->firmware);
376 }
377
378 static void machine_set_firmware(Object *obj, const char *value, Error **errp)
379 {
380 MachineState *ms = MACHINE(obj);
381
382 g_free(ms->firmware);
383 ms->firmware = g_strdup(value);
384 }
385
386 static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp)
387 {
388 MachineState *ms = MACHINE(obj);
389
390 ms->suppress_vmdesc = value;
391 }
392
393 static bool machine_get_suppress_vmdesc(Object *obj, Error **errp)
394 {
395 MachineState *ms = MACHINE(obj);
396
397 return ms->suppress_vmdesc;
398 }
399
400 static void machine_set_enforce_config_section(Object *obj, bool value,
401 Error **errp)
402 {
403 MachineState *ms = MACHINE(obj);
404
405 warn_report("enforce-config-section is deprecated, please use "
406 "-global migration.send-configuration=on|off instead");
407
408 ms->enforce_config_section = value;
409 }
410
411 static bool machine_get_enforce_config_section(Object *obj, Error **errp)
412 {
413 MachineState *ms = MACHINE(obj);
414
415 return ms->enforce_config_section;
416 }
417
418 static char *machine_get_memory_encryption(Object *obj, Error **errp)
419 {
420 MachineState *ms = MACHINE(obj);
421
422 return g_strdup(ms->memory_encryption);
423 }
424
425 static void machine_set_memory_encryption(Object *obj, const char *value,
426 Error **errp)
427 {
428 MachineState *ms = MACHINE(obj);
429
430 g_free(ms->memory_encryption);
431 ms->memory_encryption = g_strdup(value);
432
433 /*
434 * With memory encryption, the host can't see the real contents of RAM,
435 * so there's no point in it trying to merge areas.
436 */
437 if (value) {
438 machine_set_mem_merge(obj, false, errp);
439 }
440 }
441
442 static bool machine_get_nvdimm(Object *obj, Error **errp)
443 {
444 MachineState *ms = MACHINE(obj);
445
446 return ms->nvdimms_state->is_enabled;
447 }
448
449 static void machine_set_nvdimm(Object *obj, bool value, Error **errp)
450 {
451 MachineState *ms = MACHINE(obj);
452
453 ms->nvdimms_state->is_enabled = value;
454 }
455
456 static bool machine_get_hmat(Object *obj, Error **errp)
457 {
458 MachineState *ms = MACHINE(obj);
459
460 return ms->numa_state->hmat_enabled;
461 }
462
463 static void machine_set_hmat(Object *obj, bool value, Error **errp)
464 {
465 MachineState *ms = MACHINE(obj);
466
467 ms->numa_state->hmat_enabled = value;
468 }
469
470 static char *machine_get_nvdimm_persistence(Object *obj, Error **errp)
471 {
472 MachineState *ms = MACHINE(obj);
473
474 return g_strdup(ms->nvdimms_state->persistence_string);
475 }
476
477 static void machine_set_nvdimm_persistence(Object *obj, const char *value,
478 Error **errp)
479 {
480 MachineState *ms = MACHINE(obj);
481 NVDIMMState *nvdimms_state = ms->nvdimms_state;
482
483 if (strcmp(value, "cpu") == 0) {
484 nvdimms_state->persistence = 3;
485 } else if (strcmp(value, "mem-ctrl") == 0) {
486 nvdimms_state->persistence = 2;
487 } else {
488 error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option",
489 value);
490 return;
491 }
492
493 g_free(nvdimms_state->persistence_string);
494 nvdimms_state->persistence_string = g_strdup(value);
495 }
496
497 void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type)
498 {
499 strList *item = g_new0(strList, 1);
500
501 item->value = g_strdup(type);
502 item->next = mc->allowed_dynamic_sysbus_devices;
503 mc->allowed_dynamic_sysbus_devices = item;
504 }
505
506 static void validate_sysbus_device(SysBusDevice *sbdev, void *opaque)
507 {
508 MachineState *machine = opaque;
509 MachineClass *mc = MACHINE_GET_CLASS(machine);
510 bool allowed = false;
511 strList *wl;
512
513 for (wl = mc->allowed_dynamic_sysbus_devices;
514 !allowed && wl;
515 wl = wl->next) {
516 allowed |= !!object_dynamic_cast(OBJECT(sbdev), wl->value);
517 }
518
519 if (!allowed) {
520 error_report("Option '-device %s' cannot be handled by this machine",
521 object_class_get_name(object_get_class(OBJECT(sbdev))));
522 exit(1);
523 }
524 }
525
526 static char *machine_get_memdev(Object *obj, Error **errp)
527 {
528 MachineState *ms = MACHINE(obj);
529
530 return g_strdup(ms->ram_memdev_id);
531 }
532
533 static void machine_set_memdev(Object *obj, const char *value, Error **errp)
534 {
535 MachineState *ms = MACHINE(obj);
536
537 g_free(ms->ram_memdev_id);
538 ms->ram_memdev_id = g_strdup(value);
539 }
540
541
542 static void machine_init_notify(Notifier *notifier, void *data)
543 {
544 MachineState *machine = MACHINE(qdev_get_machine());
545
546 /*
547 * Loop through all dynamically created sysbus devices and check if they are
548 * all allowed. If a device is not allowed, error out.
549 */
550 foreach_dynamic_sysbus_device(validate_sysbus_device, machine);
551 }
552
553 HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine)
554 {
555 int i;
556 HotpluggableCPUList *head = NULL;
557 MachineClass *mc = MACHINE_GET_CLASS(machine);
558
559 /* force board to initialize possible_cpus if it hasn't been done yet */
560 mc->possible_cpu_arch_ids(machine);
561
562 for (i = 0; i < machine->possible_cpus->len; i++) {
563 Object *cpu;
564 HotpluggableCPUList *list_item = g_new0(typeof(*list_item), 1);
565 HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1);
566
567 cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type);
568 cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count;
569 cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props,
570 sizeof(*cpu_item->props));
571
572 cpu = machine->possible_cpus->cpus[i].cpu;
573 if (cpu) {
574 cpu_item->has_qom_path = true;
575 cpu_item->qom_path = object_get_canonical_path(cpu);
576 }
577 list_item->value = cpu_item;
578 list_item->next = head;
579 head = list_item;
580 }
581 return head;
582 }
583
584 /**
585 * machine_set_cpu_numa_node:
586 * @machine: machine object to modify
587 * @props: specifies which cpu objects to assign to
588 * numa node specified by @props.node_id
589 * @errp: if an error occurs, a pointer to an area to store the error
590 *
591 * Associate NUMA node specified by @props.node_id with cpu slots that
592 * match socket/core/thread-ids specified by @props. It's recommended to use
593 * query-hotpluggable-cpus.props values to specify affected cpu slots,
594 * which would lead to exact 1:1 mapping of cpu slots to NUMA node.
595 *
596 * However for CLI convenience it's possible to pass in subset of properties,
597 * which would affect all cpu slots that match it.
598 * Ex for pc machine:
599 * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \
600 * -numa cpu,node-id=0,socket_id=0 \
601 * -numa cpu,node-id=1,socket_id=1
602 * will assign all child cores of socket 0 to node 0 and
603 * of socket 1 to node 1.
604 *
605 * On attempt of reassigning (already assigned) cpu slot to another NUMA node,
606 * return error.
607 * Empty subset is disallowed and function will return with error in this case.
608 */
609 void machine_set_cpu_numa_node(MachineState *machine,
610 const CpuInstanceProperties *props, Error **errp)
611 {
612 MachineClass *mc = MACHINE_GET_CLASS(machine);
613 NodeInfo *numa_info = machine->numa_state->nodes;
614 bool match = false;
615 int i;
616
617 if (!mc->possible_cpu_arch_ids) {
618 error_setg(errp, "mapping of CPUs to NUMA node is not supported");
619 return;
620 }
621
622 /* disabling node mapping is not supported, forbid it */
623 assert(props->has_node_id);
624
625 /* force board to initialize possible_cpus if it hasn't been done yet */
626 mc->possible_cpu_arch_ids(machine);
627
628 for (i = 0; i < machine->possible_cpus->len; i++) {
629 CPUArchId *slot = &machine->possible_cpus->cpus[i];
630
631 /* reject unsupported by board properties */
632 if (props->has_thread_id && !slot->props.has_thread_id) {
633 error_setg(errp, "thread-id is not supported");
634 return;
635 }
636
637 if (props->has_core_id && !slot->props.has_core_id) {
638 error_setg(errp, "core-id is not supported");
639 return;
640 }
641
642 if (props->has_socket_id && !slot->props.has_socket_id) {
643 error_setg(errp, "socket-id is not supported");
644 return;
645 }
646
647 if (props->has_die_id && !slot->props.has_die_id) {
648 error_setg(errp, "die-id is not supported");
649 return;
650 }
651
652 /* skip slots with explicit mismatch */
653 if (props->has_thread_id && props->thread_id != slot->props.thread_id) {
654 continue;
655 }
656
657 if (props->has_core_id && props->core_id != slot->props.core_id) {
658 continue;
659 }
660
661 if (props->has_die_id && props->die_id != slot->props.die_id) {
662 continue;
663 }
664
665 if (props->has_socket_id && props->socket_id != slot->props.socket_id) {
666 continue;
667 }
668
669 /* reject assignment if slot is already assigned, for compatibility
670 * of legacy cpu_index mapping with SPAPR core based mapping do not
671 * error out if cpu thread and matched core have the same node-id */
672 if (slot->props.has_node_id &&
673 slot->props.node_id != props->node_id) {
674 error_setg(errp, "CPU is already assigned to node-id: %" PRId64,
675 slot->props.node_id);
676 return;
677 }
678
679 /* assign slot to node as it's matched '-numa cpu' key */
680 match = true;
681 slot->props.node_id = props->node_id;
682 slot->props.has_node_id = props->has_node_id;
683
684 if (machine->numa_state->hmat_enabled) {
685 if ((numa_info[props->node_id].initiator < MAX_NODES) &&
686 (props->node_id != numa_info[props->node_id].initiator)) {
687 error_setg(errp, "The initiator of CPU NUMA node %" PRId64
688 " should be itself", props->node_id);
689 return;
690 }
691 numa_info[props->node_id].has_cpu = true;
692 numa_info[props->node_id].initiator = props->node_id;
693 }
694 }
695
696 if (!match) {
697 error_setg(errp, "no match found");
698 }
699 }
700
701 static void smp_parse(MachineState *ms, QemuOpts *opts)
702 {
703 if (opts) {
704 unsigned cpus = qemu_opt_get_number(opts, "cpus", 0);
705 unsigned sockets = qemu_opt_get_number(opts, "sockets", 0);
706 unsigned cores = qemu_opt_get_number(opts, "cores", 0);
707 unsigned threads = qemu_opt_get_number(opts, "threads", 0);
708
709 /* compute missing values, prefer sockets over cores over threads */
710 if (cpus == 0 || sockets == 0) {
711 cores = cores > 0 ? cores : 1;
712 threads = threads > 0 ? threads : 1;
713 if (cpus == 0) {
714 sockets = sockets > 0 ? sockets : 1;
715 cpus = cores * threads * sockets;
716 } else {
717 ms->smp.max_cpus =
718 qemu_opt_get_number(opts, "maxcpus", cpus);
719 sockets = ms->smp.max_cpus / (cores * threads);
720 }
721 } else if (cores == 0) {
722 threads = threads > 0 ? threads : 1;
723 cores = cpus / (sockets * threads);
724 cores = cores > 0 ? cores : 1;
725 } else if (threads == 0) {
726 threads = cpus / (cores * sockets);
727 threads = threads > 0 ? threads : 1;
728 } else if (sockets * cores * threads < cpus) {
729 error_report("cpu topology: "
730 "sockets (%u) * cores (%u) * threads (%u) < "
731 "smp_cpus (%u)",
732 sockets, cores, threads, cpus);
733 exit(1);
734 }
735
736 ms->smp.max_cpus =
737 qemu_opt_get_number(opts, "maxcpus", cpus);
738
739 if (ms->smp.max_cpus < cpus) {
740 error_report("maxcpus must be equal to or greater than smp");
741 exit(1);
742 }
743
744 if (sockets * cores * threads > ms->smp.max_cpus) {
745 error_report("cpu topology: "
746 "sockets (%u) * cores (%u) * threads (%u) > "
747 "maxcpus (%u)",
748 sockets, cores, threads,
749 ms->smp.max_cpus);
750 exit(1);
751 }
752
753 if (sockets * cores * threads != ms->smp.max_cpus) {
754 warn_report("Invalid CPU topology deprecated: "
755 "sockets (%u) * cores (%u) * threads (%u) "
756 "!= maxcpus (%u)",
757 sockets, cores, threads,
758 ms->smp.max_cpus);
759 }
760
761 ms->smp.cpus = cpus;
762 ms->smp.cores = cores;
763 ms->smp.threads = threads;
764 ms->smp.sockets = sockets;
765 }
766
767 if (ms->smp.cpus > 1) {
768 Error *blocker = NULL;
769 error_setg(&blocker, QERR_REPLAY_NOT_SUPPORTED, "smp");
770 replay_add_blocker(blocker);
771 }
772 }
773
774 static void machine_class_init(ObjectClass *oc, void *data)
775 {
776 MachineClass *mc = MACHINE_CLASS(oc);
777
778 /* Default 128 MB as guest ram size */
779 mc->default_ram_size = 128 * MiB;
780 mc->rom_file_has_mr = true;
781 mc->smp_parse = smp_parse;
782
783 /* numa node memory size aligned on 8MB by default.
784 * On Linux, each node's border has to be 8MB aligned
785 */
786 mc->numa_mem_align_shift = 23;
787 mc->numa_auto_assign_ram = numa_default_auto_assign_ram;
788
789 object_class_property_add_str(oc, "kernel",
790 machine_get_kernel, machine_set_kernel);
791 object_class_property_set_description(oc, "kernel",
792 "Linux kernel image file");
793
794 object_class_property_add_str(oc, "initrd",
795 machine_get_initrd, machine_set_initrd);
796 object_class_property_set_description(oc, "initrd",
797 "Linux initial ramdisk file");
798
799 object_class_property_add_str(oc, "append",
800 machine_get_append, machine_set_append);
801 object_class_property_set_description(oc, "append",
802 "Linux kernel command line");
803
804 object_class_property_add_str(oc, "dtb",
805 machine_get_dtb, machine_set_dtb);
806 object_class_property_set_description(oc, "dtb",
807 "Linux kernel device tree file");
808
809 object_class_property_add_str(oc, "dumpdtb",
810 machine_get_dumpdtb, machine_set_dumpdtb);
811 object_class_property_set_description(oc, "dumpdtb",
812 "Dump current dtb to a file and quit");
813
814 object_class_property_add(oc, "phandle-start", "int",
815 machine_get_phandle_start, machine_set_phandle_start,
816 NULL, NULL);
817 object_class_property_set_description(oc, "phandle-start",
818 "The first phandle ID we may generate dynamically");
819
820 object_class_property_add_str(oc, "dt-compatible",
821 machine_get_dt_compatible, machine_set_dt_compatible);
822 object_class_property_set_description(oc, "dt-compatible",
823 "Overrides the \"compatible\" property of the dt root node");
824
825 object_class_property_add_bool(oc, "dump-guest-core",
826 machine_get_dump_guest_core, machine_set_dump_guest_core);
827 object_class_property_set_description(oc, "dump-guest-core",
828 "Include guest memory in a core dump");
829
830 object_class_property_add_bool(oc, "mem-merge",
831 machine_get_mem_merge, machine_set_mem_merge);
832 object_class_property_set_description(oc, "mem-merge",
833 "Enable/disable memory merge support");
834
835 object_class_property_add_bool(oc, "usb",
836 machine_get_usb, machine_set_usb);
837 object_class_property_set_description(oc, "usb",
838 "Set on/off to enable/disable usb");
839
840 object_class_property_add_bool(oc, "graphics",
841 machine_get_graphics, machine_set_graphics);
842 object_class_property_set_description(oc, "graphics",
843 "Set on/off to enable/disable graphics emulation");
844
845 object_class_property_add_str(oc, "firmware",
846 machine_get_firmware, machine_set_firmware);
847 object_class_property_set_description(oc, "firmware",
848 "Firmware image");
849
850 object_class_property_add_bool(oc, "suppress-vmdesc",
851 machine_get_suppress_vmdesc, machine_set_suppress_vmdesc);
852 object_class_property_set_description(oc, "suppress-vmdesc",
853 "Set on to disable self-describing migration");
854
855 object_class_property_add_bool(oc, "enforce-config-section",
856 machine_get_enforce_config_section, machine_set_enforce_config_section);
857 object_class_property_set_description(oc, "enforce-config-section",
858 "Set on to enforce configuration section migration");
859
860 object_class_property_add_str(oc, "memory-encryption",
861 machine_get_memory_encryption, machine_set_memory_encryption);
862 object_class_property_set_description(oc, "memory-encryption",
863 "Set memory encryption object to use");
864 }
865
866 static void machine_class_base_init(ObjectClass *oc, void *data)
867 {
868 if (!object_class_is_abstract(oc)) {
869 MachineClass *mc = MACHINE_CLASS(oc);
870 const char *cname = object_class_get_name(oc);
871 assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX));
872 mc->name = g_strndup(cname,
873 strlen(cname) - strlen(TYPE_MACHINE_SUFFIX));
874 mc->compat_props = g_ptr_array_new();
875 }
876 }
877
878 static void machine_initfn(Object *obj)
879 {
880 MachineState *ms = MACHINE(obj);
881 MachineClass *mc = MACHINE_GET_CLASS(obj);
882
883 ms->dump_guest_core = true;
884 ms->mem_merge = true;
885 ms->enable_graphics = true;
886
887 if (mc->nvdimm_supported) {
888 Object *obj = OBJECT(ms);
889
890 ms->nvdimms_state = g_new0(NVDIMMState, 1);
891 object_property_add_bool(obj, "nvdimm",
892 machine_get_nvdimm, machine_set_nvdimm);
893 object_property_set_description(obj, "nvdimm",
894 "Set on/off to enable/disable "
895 "NVDIMM instantiation");
896
897 object_property_add_str(obj, "nvdimm-persistence",
898 machine_get_nvdimm_persistence,
899 machine_set_nvdimm_persistence);
900 object_property_set_description(obj, "nvdimm-persistence",
901 "Set NVDIMM persistence"
902 "Valid values are cpu, mem-ctrl");
903 }
904
905 if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) {
906 ms->numa_state = g_new0(NumaState, 1);
907 object_property_add_bool(obj, "hmat",
908 machine_get_hmat, machine_set_hmat);
909 object_property_set_description(obj, "hmat",
910 "Set on/off to enable/disable "
911 "ACPI Heterogeneous Memory Attribute "
912 "Table (HMAT)");
913 }
914
915 object_property_add_str(obj, "memory-backend",
916 machine_get_memdev, machine_set_memdev);
917 object_property_set_description(obj, "memory-backend",
918 "Set RAM backend"
919 "Valid value is ID of hostmem based backend");
920
921 /* Register notifier when init is done for sysbus sanity checks */
922 ms->sysbus_notifier.notify = machine_init_notify;
923 qemu_add_machine_init_done_notifier(&ms->sysbus_notifier);
924 }
925
926 static void machine_finalize(Object *obj)
927 {
928 MachineState *ms = MACHINE(obj);
929
930 g_free(ms->kernel_filename);
931 g_free(ms->initrd_filename);
932 g_free(ms->kernel_cmdline);
933 g_free(ms->dtb);
934 g_free(ms->dumpdtb);
935 g_free(ms->dt_compatible);
936 g_free(ms->firmware);
937 g_free(ms->device_memory);
938 g_free(ms->nvdimms_state);
939 g_free(ms->numa_state);
940 }
941
942 bool machine_usb(MachineState *machine)
943 {
944 return machine->usb;
945 }
946
947 int machine_phandle_start(MachineState *machine)
948 {
949 return machine->phandle_start;
950 }
951
952 bool machine_dump_guest_core(MachineState *machine)
953 {
954 return machine->dump_guest_core;
955 }
956
957 bool machine_mem_merge(MachineState *machine)
958 {
959 return machine->mem_merge;
960 }
961
962 static char *cpu_slot_to_string(const CPUArchId *cpu)
963 {
964 GString *s = g_string_new(NULL);
965 if (cpu->props.has_socket_id) {
966 g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id);
967 }
968 if (cpu->props.has_die_id) {
969 g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id);
970 }
971 if (cpu->props.has_core_id) {
972 if (s->len) {
973 g_string_append_printf(s, ", ");
974 }
975 g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id);
976 }
977 if (cpu->props.has_thread_id) {
978 if (s->len) {
979 g_string_append_printf(s, ", ");
980 }
981 g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id);
982 }
983 return g_string_free(s, false);
984 }
985
986 static void numa_validate_initiator(NumaState *numa_state)
987 {
988 int i;
989 NodeInfo *numa_info = numa_state->nodes;
990
991 for (i = 0; i < numa_state->num_nodes; i++) {
992 if (numa_info[i].initiator == MAX_NODES) {
993 error_report("The initiator of NUMA node %d is missing, use "
994 "'-numa node,initiator' option to declare it", i);
995 exit(1);
996 }
997
998 if (!numa_info[numa_info[i].initiator].present) {
999 error_report("NUMA node %" PRIu16 " is missing, use "
1000 "'-numa node' option to declare it first",
1001 numa_info[i].initiator);
1002 exit(1);
1003 }
1004
1005 if (!numa_info[numa_info[i].initiator].has_cpu) {
1006 error_report("The initiator of NUMA node %d is invalid", i);
1007 exit(1);
1008 }
1009 }
1010 }
1011
1012 static void machine_numa_finish_cpu_init(MachineState *machine)
1013 {
1014 int i;
1015 bool default_mapping;
1016 GString *s = g_string_new(NULL);
1017 MachineClass *mc = MACHINE_GET_CLASS(machine);
1018 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine);
1019
1020 assert(machine->numa_state->num_nodes);
1021 for (i = 0; i < possible_cpus->len; i++) {
1022 if (possible_cpus->cpus[i].props.has_node_id) {
1023 break;
1024 }
1025 }
1026 default_mapping = (i == possible_cpus->len);
1027
1028 for (i = 0; i < possible_cpus->len; i++) {
1029 const CPUArchId *cpu_slot = &possible_cpus->cpus[i];
1030
1031 if (!cpu_slot->props.has_node_id) {
1032 /* fetch default mapping from board and enable it */
1033 CpuInstanceProperties props = cpu_slot->props;
1034
1035 props.node_id = mc->get_default_cpu_node_id(machine, i);
1036 if (!default_mapping) {
1037 /* record slots with not set mapping,
1038 * TODO: make it hard error in future */
1039 char *cpu_str = cpu_slot_to_string(cpu_slot);
1040 g_string_append_printf(s, "%sCPU %d [%s]",
1041 s->len ? ", " : "", i, cpu_str);
1042 g_free(cpu_str);
1043
1044 /* non mapped cpus used to fallback to node 0 */
1045 props.node_id = 0;
1046 }
1047
1048 props.has_node_id = true;
1049 machine_set_cpu_numa_node(machine, &props, &error_fatal);
1050 }
1051 }
1052
1053 if (machine->numa_state->hmat_enabled) {
1054 numa_validate_initiator(machine->numa_state);
1055 }
1056
1057 if (s->len && !qtest_enabled()) {
1058 warn_report("CPU(s) not present in any NUMA nodes: %s",
1059 s->str);
1060 warn_report("All CPU(s) up to maxcpus should be described "
1061 "in NUMA config, ability to start up with partial NUMA "
1062 "mappings is obsoleted and will be removed in future");
1063 }
1064 g_string_free(s, true);
1065 }
1066
1067 MemoryRegion *machine_consume_memdev(MachineState *machine,
1068 HostMemoryBackend *backend)
1069 {
1070 MemoryRegion *ret = host_memory_backend_get_memory(backend);
1071
1072 if (memory_region_is_mapped(ret)) {
1073 char *path = object_get_canonical_path_component(OBJECT(backend));
1074 error_report("memory backend %s can't be used multiple times.", path);
1075 g_free(path);
1076 exit(EXIT_FAILURE);
1077 }
1078 host_memory_backend_set_mapped(backend, true);
1079 vmstate_register_ram_global(ret);
1080 return ret;
1081 }
1082
1083 void machine_run_board_init(MachineState *machine)
1084 {
1085 MachineClass *machine_class = MACHINE_GET_CLASS(machine);
1086
1087 if (machine->ram_memdev_id) {
1088 Object *o;
1089 o = object_resolve_path_type(machine->ram_memdev_id,
1090 TYPE_MEMORY_BACKEND, NULL);
1091 machine->ram = machine_consume_memdev(machine, MEMORY_BACKEND(o));
1092 }
1093
1094 if (machine->numa_state) {
1095 numa_complete_configuration(machine);
1096 if (machine->numa_state->num_nodes) {
1097 machine_numa_finish_cpu_init(machine);
1098 }
1099 }
1100
1101 /* If the machine supports the valid_cpu_types check and the user
1102 * specified a CPU with -cpu check here that the user CPU is supported.
1103 */
1104 if (machine_class->valid_cpu_types && machine->cpu_type) {
1105 ObjectClass *class = object_class_by_name(machine->cpu_type);
1106 int i;
1107
1108 for (i = 0; machine_class->valid_cpu_types[i]; i++) {
1109 if (object_class_dynamic_cast(class,
1110 machine_class->valid_cpu_types[i])) {
1111 /* The user specificed CPU is in the valid field, we are
1112 * good to go.
1113 */
1114 break;
1115 }
1116 }
1117
1118 if (!machine_class->valid_cpu_types[i]) {
1119 /* The user specified CPU is not valid */
1120 error_report("Invalid CPU type: %s", machine->cpu_type);
1121 error_printf("The valid types are: %s",
1122 machine_class->valid_cpu_types[0]);
1123 for (i = 1; machine_class->valid_cpu_types[i]; i++) {
1124 error_printf(", %s", machine_class->valid_cpu_types[i]);
1125 }
1126 error_printf("\n");
1127
1128 exit(1);
1129 }
1130 }
1131
1132 machine_class->init(machine);
1133 }
1134
1135 static const TypeInfo machine_info = {
1136 .name = TYPE_MACHINE,
1137 .parent = TYPE_OBJECT,
1138 .abstract = true,
1139 .class_size = sizeof(MachineClass),
1140 .class_init = machine_class_init,
1141 .class_base_init = machine_class_base_init,
1142 .instance_size = sizeof(MachineState),
1143 .instance_init = machine_initfn,
1144 .instance_finalize = machine_finalize,
1145 };
1146
1147 static void machine_register_types(void)
1148 {
1149 type_register_static(&machine_info);
1150 }
1151
1152 type_init(machine_register_types)