hw/i386/kvm/ioapic.c

   1 /*
   2  * KVM in-kernel IOPIC support
   3  *
   4  * Copyright (c) 2011 Siemens AG
   5  *
   6  * Authors:
   7  *  Jan Kiszka          <jan.kiszka@siemens.com>
   8  *
   9  * This work is licensed under the terms of the GNU GPL version 2.
  10  * See the COPYING file in the top-level directory.
  11  */
  12
  13 #include "qemu/osdep.h"
  14 #include "monitor/monitor.h"
  15 #include "hw/i386/pc.h"
  16 #include "hw/irq.h"
  17 #include "hw/qdev-properties.h"
  18 #include "hw/i386/ioapic_internal.h"
  19 #include "hw/i386/apic_internal.h"
  20 #include "sysemu/kvm.h"
  21
  22 /* PC Utility function */
  23 void kvm_pc_setup_irq_routing(bool pci_enabled)
  24 {
  25     KVMState *s = kvm_state;
  26     int i;
  27
  28     if (kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) {
  29         for (i = 0; i < 8; ++i) {
  30             if (i == 2) {
  31                 continue;
  32             }
  33             kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_MASTER, i);
  34         }
  35         for (i = 8; i < 16; ++i) {
  36             kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_SLAVE, i - 8);
  37         }
  38         if (pci_enabled) {
  39             for (i = 0; i < 24; ++i) {
  40                 if (i == 0) {
  41                     kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, 2);
  42                 } else if (i != 2) {
  43                     kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, i);
  44                 }
  45             }
  46         }
  47         kvm_irqchip_commit_routes(s);
  48     }
  49 }
  50
  51 void kvm_pc_gsi_handler(void *opaque, int n, int level)
  52 {
  53     GSIState *s = opaque;
  54
  55     if (n < ISA_NUM_IRQS) {
  56         /* Kernel will forward to both PIC and IOAPIC */
  57         qemu_set_irq(s->i8259_irq[n], level);
  58     } else {
  59         qemu_set_irq(s->ioapic_irq[n], level);
  60     }
  61 }
  62
  63 typedef struct KVMIOAPICState KVMIOAPICState;
  64
  65 struct KVMIOAPICState {
  66     IOAPICCommonState ioapic;
  67     uint32_t kvm_gsi_base;
  68 };
  69
  70 static void kvm_ioapic_get(IOAPICCommonState *s)
  71 {
  72     struct kvm_irqchip chip;
  73     struct kvm_ioapic_state *kioapic;
  74     int ret, i;
  75
  76     chip.chip_id = KVM_IRQCHIP_IOAPIC;
  77     ret = kvm_vm_ioctl(kvm_state, KVM_GET_IRQCHIP, &chip);
  78     if (ret < 0) {
  79         fprintf(stderr, "KVM_GET_IRQCHIP failed: %s\n", strerror(ret));
  80         abort();
  81     }
  82
  83     kioapic = &chip.chip.ioapic;
  84
  85     s->id = kioapic->id;
  86     s->ioregsel = kioapic->ioregsel;
  87     s->irr = kioapic->irr;
  88     for (i = 0; i < IOAPIC_NUM_PINS; i++) {
  89         s->ioredtbl[i] = kioapic->redirtbl[i].bits;
  90     }
  91 }
  92
  93 static void kvm_ioapic_put(IOAPICCommonState *s)
  94 {
  95     struct kvm_irqchip chip;
  96     struct kvm_ioapic_state *kioapic;
  97     int ret, i;
  98
  99     chip.chip_id = KVM_IRQCHIP_IOAPIC;
 100     kioapic = &chip.chip.ioapic;
 101
 102     kioapic->id = s->id;
 103     kioapic->ioregsel = s->ioregsel;
 104     kioapic->base_address = s->busdev.mmio[0].addr;
 105     kioapic->irr = s->irr;
 106     for (i = 0; i < IOAPIC_NUM_PINS; i++) {
 107         kioapic->redirtbl[i].bits = s->ioredtbl[i];
 108     }
 109
 110     ret = kvm_vm_ioctl(kvm_state, KVM_SET_IRQCHIP, &chip);
 111     if (ret < 0) {
 112         fprintf(stderr, "KVM_GET_IRQCHIP failed: %s\n", strerror(ret));
 113         abort();
 114     }
 115 }
 116
 117 static void kvm_ioapic_reset(DeviceState *dev)
 118 {
 119     IOAPICCommonState *s = IOAPIC_COMMON(dev);
 120
 121     ioapic_reset_common(dev);
 122     kvm_ioapic_put(s);
 123 }
 124
 125 static void kvm_ioapic_set_irq(void *opaque, int irq, int level)
 126 {
 127     KVMIOAPICState *s = opaque;
 128     IOAPICCommonState *common = IOAPIC_COMMON(s);
 129     int delivered;
 130
 131     ioapic_stat_update_irq(common, irq, level);
 132     delivered = kvm_set_irq(kvm_state, s->kvm_gsi_base + irq, level);
 133     apic_report_irq_delivered(delivered);
 134 }
 135
 136 static void kvm_ioapic_realize(DeviceState *dev, Error **errp)
 137 {
 138     IOAPICCommonState *s = IOAPIC_COMMON(dev);
 139
 140     memory_region_init_io(&s->io_memory, OBJECT(dev), NULL, NULL, "kvm-ioapic", 0x1000);
 141     /*
 142      * KVM ioapic only supports 0x11 now. This will only be used when
 143      * we want to dump ioapic version.
 144      */
 145     s->version = 0x11;
 146
 147     qdev_init_gpio_in(dev, kvm_ioapic_set_irq, IOAPIC_NUM_PINS);
 148 }
 149
 150 static Property kvm_ioapic_properties[] = {
 151     DEFINE_PROP_UINT32("gsi_base", KVMIOAPICState, kvm_gsi_base, 0),
 152     DEFINE_PROP_END_OF_LIST()
 153 };
 154
 155 static void kvm_ioapic_class_init(ObjectClass *klass, void *data)
 156 {
 157     IOAPICCommonClass *k = IOAPIC_COMMON_CLASS(klass);
 158     DeviceClass *dc = DEVICE_CLASS(klass);
 159
 160     k->realize   = kvm_ioapic_realize;
 161     k->pre_save  = kvm_ioapic_get;
 162     k->post_load = kvm_ioapic_put;
 163     dc->reset    = kvm_ioapic_reset;
 164     dc->props    = kvm_ioapic_properties;
 165 }
 166
 167 static const TypeInfo kvm_ioapic_info = {
 168     .name  = TYPE_KVM_IOAPIC,
 169     .parent = TYPE_IOAPIC_COMMON,
 170     .instance_size = sizeof(KVMIOAPICState),
 171     .class_init = kvm_ioapic_class_init,
 172 };
 173
 174 static void kvm_ioapic_register_types(void)
 175 {
 176     type_register_static(&kvm_ioapic_info);
 177 }
 178
 179 type_init(kvm_ioapic_register_types)