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[mirror_qemu.git] / hw / i386 / pc_piix.c
1 /*
2 * QEMU PC System Emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25 #include "qemu/osdep.h"
26 #include "config-devices.h"
27
28 #include "qemu/units.h"
29 #include "hw/loader.h"
30 #include "hw/i386/x86.h"
31 #include "hw/i386/pc.h"
32 #include "hw/i386/apic.h"
33 #include "hw/pci-host/i440fx.h"
34 #include "hw/southbridge/piix.h"
35 #include "hw/display/ramfb.h"
36 #include "hw/firmware/smbios.h"
37 #include "hw/pci/pci.h"
38 #include "hw/pci/pci_ids.h"
39 #include "hw/usb.h"
40 #include "net/net.h"
41 #include "hw/ide/pci.h"
42 #include "hw/irq.h"
43 #include "sysemu/kvm.h"
44 #include "hw/kvm/clock.h"
45 #include "sysemu/sysemu.h"
46 #include "hw/sysbus.h"
47 #include "sysemu/arch_init.h"
48 #include "hw/i2c/smbus_eeprom.h"
49 #include "hw/xen/xen.h"
50 #include "exec/memory.h"
51 #include "exec/address-spaces.h"
52 #include "hw/acpi/acpi.h"
53 #include "cpu.h"
54 #include "qapi/error.h"
55 #include "qemu/error-report.h"
56 #include "sysemu/xen.h"
57 #ifdef CONFIG_XEN
58 #include <xen/hvm/hvm_info_table.h>
59 #include "hw/xen/xen_pt.h"
60 #endif
61 #include "migration/global_state.h"
62 #include "migration/misc.h"
63 #include "sysemu/numa.h"
64 #include "hw/hyperv/vmbus-bridge.h"
65 #include "hw/mem/nvdimm.h"
66 #include "hw/i386/acpi-build.h"
67
68 #define MAX_IDE_BUS 2
69
70 #ifdef CONFIG_IDE_ISA
71 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
72 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
73 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
74 #endif
75
76 /* PC hardware initialisation */
77 static void pc_init1(MachineState *machine,
78 const char *host_type, const char *pci_type)
79 {
80 PCMachineState *pcms = PC_MACHINE(machine);
81 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
82 X86MachineState *x86ms = X86_MACHINE(machine);
83 MemoryRegion *system_memory = get_system_memory();
84 MemoryRegion *system_io = get_system_io();
85 PCIBus *pci_bus;
86 ISABus *isa_bus;
87 PCII440FXState *i440fx_state;
88 int piix3_devfn = -1;
89 qemu_irq smi_irq;
90 GSIState *gsi_state;
91 BusState *idebus[MAX_IDE_BUS];
92 ISADevice *rtc_state;
93 MemoryRegion *ram_memory;
94 MemoryRegion *pci_memory;
95 MemoryRegion *rom_memory;
96 ram_addr_t lowmem;
97
98 /*
99 * Calculate ram split, for memory below and above 4G. It's a bit
100 * complicated for backward compatibility reasons ...
101 *
102 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the
103 * default value for max_ram_below_4g now.
104 *
105 * - Then, to gigabyte align the memory, we move the split to 3G
106 * (lowmem = 0xc0000000). But only in case we have to split in
107 * the first place, i.e. ram_size is larger than (traditional)
108 * lowmem. And for new machine types (gigabyte_align = true)
109 * only, for live migration compatibility reasons.
110 *
111 * - Next the max-ram-below-4g option was added, which allowed to
112 * reduce lowmem to a smaller value, to allow a larger PCI I/O
113 * window below 4G. qemu doesn't enforce gigabyte alignment here,
114 * but prints a warning.
115 *
116 * - Finally max-ram-below-4g got updated to also allow raising lowmem,
117 * so legacy non-PAE guests can get as much memory as possible in
118 * the 32bit address space below 4G.
119 *
120 * - Note that Xen has its own ram setp code in xen_ram_init(),
121 * called via xen_hvm_init().
122 *
123 * Examples:
124 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high
125 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high
126 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high
127 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M)
128 */
129 if (xen_enabled()) {
130 xen_hvm_init(pcms, &ram_memory);
131 } else {
132 if (!pcms->max_ram_below_4g) {
133 pcms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */
134 }
135 lowmem = pcms->max_ram_below_4g;
136 if (machine->ram_size >= pcms->max_ram_below_4g) {
137 if (pcmc->gigabyte_align) {
138 if (lowmem > 0xc0000000) {
139 lowmem = 0xc0000000;
140 }
141 if (lowmem & (1 * GiB - 1)) {
142 warn_report("Large machine and max_ram_below_4g "
143 "(%" PRIu64 ") not a multiple of 1G; "
144 "possible bad performance.",
145 pcms->max_ram_below_4g);
146 }
147 }
148 }
149
150 if (machine->ram_size >= lowmem) {
151 x86ms->above_4g_mem_size = machine->ram_size - lowmem;
152 x86ms->below_4g_mem_size = lowmem;
153 } else {
154 x86ms->above_4g_mem_size = 0;
155 x86ms->below_4g_mem_size = machine->ram_size;
156 }
157 }
158
159 x86_cpus_init(x86ms, pcmc->default_cpu_version);
160
161 if (kvm_enabled() && pcmc->kvmclock_enabled) {
162 kvmclock_create();
163 }
164
165 if (pcmc->pci_enabled) {
166 pci_memory = g_new(MemoryRegion, 1);
167 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
168 rom_memory = pci_memory;
169 } else {
170 pci_memory = NULL;
171 rom_memory = system_memory;
172 }
173
174 pc_guest_info_init(pcms);
175
176 if (pcmc->smbios_defaults) {
177 MachineClass *mc = MACHINE_GET_CLASS(machine);
178 /* These values are guest ABI, do not change */
179 smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)",
180 mc->name, pcmc->smbios_legacy_mode,
181 pcmc->smbios_uuid_encoded,
182 SMBIOS_ENTRY_POINT_21);
183 }
184
185 /* allocate ram and load rom/bios */
186 if (!xen_enabled()) {
187 pc_memory_init(pcms, system_memory,
188 rom_memory, &ram_memory);
189 } else if (machine->kernel_filename != NULL) {
190 /* For xen HVM direct kernel boot, load linux here */
191 xen_load_linux(pcms);
192 }
193
194 gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled);
195
196 if (pcmc->pci_enabled) {
197 PIIX3State *piix3;
198
199 pci_bus = i440fx_init(host_type,
200 pci_type,
201 &i440fx_state,
202 system_memory, system_io, machine->ram_size,
203 x86ms->below_4g_mem_size,
204 x86ms->above_4g_mem_size,
205 pci_memory, ram_memory);
206 pcms->bus = pci_bus;
207
208 piix3 = piix3_create(pci_bus, &isa_bus);
209 piix3->pic = x86ms->gsi;
210 piix3_devfn = piix3->dev.devfn;
211 } else {
212 pci_bus = NULL;
213 i440fx_state = NULL;
214 isa_bus = isa_bus_new(NULL, get_system_memory(), system_io,
215 &error_abort);
216 no_hpet = 1;
217 }
218 isa_bus_irqs(isa_bus, x86ms->gsi);
219
220 pc_i8259_create(isa_bus, gsi_state->i8259_irq);
221
222 if (pcmc->pci_enabled) {
223 ioapic_init_gsi(gsi_state, "i440fx");
224 }
225
226 if (tcg_enabled()) {
227 x86_register_ferr_irq(x86ms->gsi[13]);
228 }
229
230 pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL);
231
232 assert(pcms->vmport != ON_OFF_AUTO__MAX);
233 if (pcms->vmport == ON_OFF_AUTO_AUTO) {
234 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON;
235 }
236
237 /* init basic PC hardware */
238 pc_basic_device_init(pcms, isa_bus, x86ms->gsi, &rtc_state, true,
239 0x4);
240
241 pc_nic_init(pcmc, isa_bus, pci_bus);
242
243 if (pcmc->pci_enabled) {
244 PCIDevice *dev;
245
246 dev = pci_create_simple(pci_bus, piix3_devfn + 1,
247 xen_enabled() ? "piix3-ide-xen" : "piix3-ide");
248 pci_ide_create_devs(dev);
249 idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
250 idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
251 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
252 }
253 #ifdef CONFIG_IDE_ISA
254 else {
255 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
256 int i;
257
258 ide_drive_get(hd, ARRAY_SIZE(hd));
259 for (i = 0; i < MAX_IDE_BUS; i++) {
260 ISADevice *dev;
261 char busname[] = "ide.0";
262 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i],
263 ide_irq[i],
264 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
265 /*
266 * The ide bus name is ide.0 for the first bus and ide.1 for the
267 * second one.
268 */
269 busname[4] = '0' + i;
270 idebus[i] = qdev_get_child_bus(DEVICE(dev), busname);
271 }
272 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
273 }
274 #endif
275
276 if (pcmc->pci_enabled && machine_usb(machine)) {
277 pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci");
278 }
279
280 if (pcmc->pci_enabled && x86_machine_is_acpi_enabled(X86_MACHINE(pcms))) {
281 DeviceState *piix4_pm;
282
283 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0);
284 /* TODO: Populate SPD eeprom data. */
285 pcms->smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
286 x86ms->gsi[9], smi_irq,
287 x86_machine_is_smm_enabled(x86ms),
288 &piix4_pm);
289 smbus_eeprom_init(pcms->smbus, 8, NULL, 0);
290
291 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
292 TYPE_HOTPLUG_HANDLER,
293 (Object **)&pcms->acpi_dev,
294 object_property_allow_set_link,
295 OBJ_PROP_LINK_STRONG);
296 object_property_set_link(OBJECT(machine), OBJECT(piix4_pm),
297 PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
298 }
299
300 if (machine->nvdimms_state->is_enabled) {
301 nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
302 x86_nvdimm_acpi_dsmio,
303 x86ms->fw_cfg, OBJECT(pcms));
304 }
305 }
306
307 /* Looking for a pc_compat_2_4() function? It doesn't exist.
308 * pc_compat_*() functions that run on machine-init time and
309 * change global QEMU state are deprecated. Please don't create
310 * one, and implement any pc-*-2.4 (and newer) compat code in
311 * hw_compat_*, pc_compat_*, or * pc_*_machine_options().
312 */
313
314 static void pc_compat_2_3_fn(MachineState *machine)
315 {
316 X86MachineState *x86ms = X86_MACHINE(machine);
317 if (kvm_enabled()) {
318 x86ms->smm = ON_OFF_AUTO_OFF;
319 }
320 }
321
322 static void pc_compat_2_2_fn(MachineState *machine)
323 {
324 pc_compat_2_3_fn(machine);
325 }
326
327 static void pc_compat_2_1_fn(MachineState *machine)
328 {
329 pc_compat_2_2_fn(machine);
330 x86_cpu_change_kvm_default("svm", NULL);
331 }
332
333 static void pc_compat_2_0_fn(MachineState *machine)
334 {
335 pc_compat_2_1_fn(machine);
336 }
337
338 static void pc_compat_1_7_fn(MachineState *machine)
339 {
340 pc_compat_2_0_fn(machine);
341 x86_cpu_change_kvm_default("x2apic", NULL);
342 }
343
344 static void pc_compat_1_6_fn(MachineState *machine)
345 {
346 pc_compat_1_7_fn(machine);
347 }
348
349 static void pc_compat_1_5_fn(MachineState *machine)
350 {
351 pc_compat_1_6_fn(machine);
352 }
353
354 static void pc_compat_1_4_fn(MachineState *machine)
355 {
356 pc_compat_1_5_fn(machine);
357 }
358
359 static void pc_compat_1_3(MachineState *machine)
360 {
361 pc_compat_1_4_fn(machine);
362 }
363
364 /* PC compat function for pc-1.0 to pc-1.2 */
365 static void pc_compat_1_2(MachineState *machine)
366 {
367 pc_compat_1_3(machine);
368 x86_cpu_change_kvm_default("kvm-pv-eoi", NULL);
369 }
370
371 static void pc_init_isa(MachineState *machine)
372 {
373 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE);
374 }
375
376 #ifdef CONFIG_XEN
377 static void pc_xen_hvm_init_pci(MachineState *machine)
378 {
379 const char *pci_type = xen_igd_gfx_pt_enabled() ?
380 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE;
381
382 pc_init1(machine,
383 TYPE_I440FX_PCI_HOST_BRIDGE,
384 pci_type);
385 }
386
387 static void pc_xen_hvm_init(MachineState *machine)
388 {
389 PCMachineState *pcms = PC_MACHINE(machine);
390
391 if (!xen_enabled()) {
392 error_report("xenfv machine requires the xen accelerator");
393 exit(1);
394 }
395
396 pc_xen_hvm_init_pci(machine);
397 pci_create_simple(pcms->bus, -1, "xen-platform");
398 }
399 #endif
400
401 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \
402 static void pc_init_##suffix(MachineState *machine) \
403 { \
404 void (*compat)(MachineState *m) = (compatfn); \
405 if (compat) { \
406 compat(machine); \
407 } \
408 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \
409 TYPE_I440FX_PCI_DEVICE); \
410 } \
411 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
412
413 static void pc_i440fx_machine_options(MachineClass *m)
414 {
415 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
416 pcmc->default_nic_model = "e1000";
417
418 m->family = "pc_piix";
419 m->desc = "Standard PC (i440FX + PIIX, 1996)";
420 m->default_machine_opts = "firmware=bios-256k.bin";
421 m->default_display = "std";
422 machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE);
423 machine_class_allow_dynamic_sysbus_dev(m, TYPE_VMBUS_BRIDGE);
424 }
425
426 static void pc_i440fx_5_1_machine_options(MachineClass *m)
427 {
428 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
429 pc_i440fx_machine_options(m);
430 m->alias = "pc";
431 m->is_default = true;
432 pcmc->default_cpu_version = 1;
433 }
434
435 DEFINE_I440FX_MACHINE(v5_1, "pc-i440fx-5.1", NULL,
436 pc_i440fx_5_1_machine_options);
437
438 static void pc_i440fx_5_0_machine_options(MachineClass *m)
439 {
440 pc_i440fx_5_1_machine_options(m);
441 m->alias = NULL;
442 m->is_default = false;
443 m->numa_mem_supported = true;
444 compat_props_add(m->compat_props, hw_compat_5_0, hw_compat_5_0_len);
445 compat_props_add(m->compat_props, pc_compat_5_0, pc_compat_5_0_len);
446 m->auto_enable_numa_with_memdev = false;
447 }
448
449 DEFINE_I440FX_MACHINE(v5_0, "pc-i440fx-5.0", NULL,
450 pc_i440fx_5_0_machine_options);
451
452 static void pc_i440fx_4_2_machine_options(MachineClass *m)
453 {
454 pc_i440fx_5_0_machine_options(m);
455 m->alias = NULL;
456 m->is_default = false;
457 compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len);
458 compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len);
459 }
460
461 DEFINE_I440FX_MACHINE(v4_2, "pc-i440fx-4.2", NULL,
462 pc_i440fx_4_2_machine_options);
463
464 static void pc_i440fx_4_1_machine_options(MachineClass *m)
465 {
466 pc_i440fx_4_2_machine_options(m);
467 m->alias = NULL;
468 m->is_default = false;
469 compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len);
470 compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len);
471 }
472
473 DEFINE_I440FX_MACHINE(v4_1, "pc-i440fx-4.1", NULL,
474 pc_i440fx_4_1_machine_options);
475
476 static void pc_i440fx_4_0_machine_options(MachineClass *m)
477 {
478 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
479 pc_i440fx_4_1_machine_options(m);
480 m->alias = NULL;
481 m->is_default = false;
482 pcmc->default_cpu_version = CPU_VERSION_LEGACY;
483 compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len);
484 compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len);
485 }
486
487 DEFINE_I440FX_MACHINE(v4_0, "pc-i440fx-4.0", NULL,
488 pc_i440fx_4_0_machine_options);
489
490 static void pc_i440fx_3_1_machine_options(MachineClass *m)
491 {
492 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
493
494 pc_i440fx_4_0_machine_options(m);
495 m->is_default = false;
496 pcmc->do_not_add_smb_acpi = true;
497 m->smbus_no_migration_support = true;
498 m->alias = NULL;
499 pcmc->pvh_enabled = false;
500 compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len);
501 compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len);
502 }
503
504 DEFINE_I440FX_MACHINE(v3_1, "pc-i440fx-3.1", NULL,
505 pc_i440fx_3_1_machine_options);
506
507 static void pc_i440fx_3_0_machine_options(MachineClass *m)
508 {
509 pc_i440fx_3_1_machine_options(m);
510 compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len);
511 compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len);
512 }
513
514 DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL,
515 pc_i440fx_3_0_machine_options);
516
517 static void pc_i440fx_2_12_machine_options(MachineClass *m)
518 {
519 pc_i440fx_3_0_machine_options(m);
520 compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len);
521 compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len);
522 }
523
524 DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL,
525 pc_i440fx_2_12_machine_options);
526
527 static void pc_i440fx_2_11_machine_options(MachineClass *m)
528 {
529 pc_i440fx_2_12_machine_options(m);
530 compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len);
531 compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len);
532 }
533
534 DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL,
535 pc_i440fx_2_11_machine_options);
536
537 static void pc_i440fx_2_10_machine_options(MachineClass *m)
538 {
539 pc_i440fx_2_11_machine_options(m);
540 compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len);
541 compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len);
542 m->auto_enable_numa_with_memhp = false;
543 }
544
545 DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL,
546 pc_i440fx_2_10_machine_options);
547
548 static void pc_i440fx_2_9_machine_options(MachineClass *m)
549 {
550 pc_i440fx_2_10_machine_options(m);
551 compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len);
552 compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len);
553 m->numa_auto_assign_ram = numa_legacy_auto_assign_ram;
554 }
555
556 DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL,
557 pc_i440fx_2_9_machine_options);
558
559 static void pc_i440fx_2_8_machine_options(MachineClass *m)
560 {
561 pc_i440fx_2_9_machine_options(m);
562 compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len);
563 compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len);
564 }
565
566 DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL,
567 pc_i440fx_2_8_machine_options);
568
569 static void pc_i440fx_2_7_machine_options(MachineClass *m)
570 {
571 pc_i440fx_2_8_machine_options(m);
572 compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len);
573 compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len);
574 }
575
576 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL,
577 pc_i440fx_2_7_machine_options);
578
579 static void pc_i440fx_2_6_machine_options(MachineClass *m)
580 {
581 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
582
583 pc_i440fx_2_7_machine_options(m);
584 pcmc->legacy_cpu_hotplug = true;
585 pcmc->linuxboot_dma_enabled = false;
586 compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len);
587 compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len);
588 }
589
590 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL,
591 pc_i440fx_2_6_machine_options);
592
593 static void pc_i440fx_2_5_machine_options(MachineClass *m)
594 {
595 X86MachineClass *x86mc = X86_MACHINE_CLASS(m);
596
597 pc_i440fx_2_6_machine_options(m);
598 x86mc->save_tsc_khz = false;
599 m->legacy_fw_cfg_order = 1;
600 compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len);
601 compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len);
602 }
603
604 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL,
605 pc_i440fx_2_5_machine_options);
606
607 static void pc_i440fx_2_4_machine_options(MachineClass *m)
608 {
609 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
610
611 pc_i440fx_2_5_machine_options(m);
612 m->hw_version = "2.4.0";
613 pcmc->broken_reserved_end = true;
614 compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len);
615 compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len);
616 }
617
618 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL,
619 pc_i440fx_2_4_machine_options)
620
621 static void pc_i440fx_2_3_machine_options(MachineClass *m)
622 {
623 pc_i440fx_2_4_machine_options(m);
624 m->hw_version = "2.3.0";
625 compat_props_add(m->compat_props, hw_compat_2_3, hw_compat_2_3_len);
626 compat_props_add(m->compat_props, pc_compat_2_3, pc_compat_2_3_len);
627 }
628
629 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3_fn,
630 pc_i440fx_2_3_machine_options);
631
632 static void pc_i440fx_2_2_machine_options(MachineClass *m)
633 {
634 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
635
636 pc_i440fx_2_3_machine_options(m);
637 m->hw_version = "2.2.0";
638 m->default_machine_opts = "firmware=bios-256k.bin,suppress-vmdesc=on";
639 compat_props_add(m->compat_props, hw_compat_2_2, hw_compat_2_2_len);
640 compat_props_add(m->compat_props, pc_compat_2_2, pc_compat_2_2_len);
641 pcmc->rsdp_in_ram = false;
642 }
643
644 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2_fn,
645 pc_i440fx_2_2_machine_options);
646
647 static void pc_i440fx_2_1_machine_options(MachineClass *m)
648 {
649 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
650
651 pc_i440fx_2_2_machine_options(m);
652 m->hw_version = "2.1.0";
653 m->default_display = NULL;
654 compat_props_add(m->compat_props, hw_compat_2_1, hw_compat_2_1_len);
655 compat_props_add(m->compat_props, pc_compat_2_1, pc_compat_2_1_len);
656 pcmc->smbios_uuid_encoded = false;
657 pcmc->enforce_aligned_dimm = false;
658 }
659
660 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1_fn,
661 pc_i440fx_2_1_machine_options);
662
663 static void pc_i440fx_2_0_machine_options(MachineClass *m)
664 {
665 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
666
667 pc_i440fx_2_1_machine_options(m);
668 m->hw_version = "2.0.0";
669 compat_props_add(m->compat_props, pc_compat_2_0, pc_compat_2_0_len);
670 pcmc->smbios_legacy_mode = true;
671 pcmc->has_reserved_memory = false;
672 /* This value depends on the actual DSDT and SSDT compiled into
673 * the source QEMU; unfortunately it depends on the binary and
674 * not on the machine type, so we cannot make pc-i440fx-1.7 work on
675 * both QEMU 1.7 and QEMU 2.0.
676 *
677 * Large variations cause migration to fail for more than one
678 * consecutive value of the "-smp" maxcpus option.
679 *
680 * For small variations of the kind caused by different iasl versions,
681 * the 4k rounding usually leaves slack. However, there could be still
682 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the
683 * slack is only ~10 bytes before one "-smp maxcpus" value breaks!
684 *
685 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on
686 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418.
687 */
688 pcmc->legacy_acpi_table_size = 6652;
689 pcmc->acpi_data_size = 0x10000;
690 }
691
692 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0_fn,
693 pc_i440fx_2_0_machine_options);
694
695 static void pc_i440fx_1_7_machine_options(MachineClass *m)
696 {
697 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
698
699 pc_i440fx_2_0_machine_options(m);
700 m->hw_version = "1.7.0";
701 m->default_machine_opts = NULL;
702 m->option_rom_has_mr = true;
703 compat_props_add(m->compat_props, pc_compat_1_7, pc_compat_1_7_len);
704 pcmc->smbios_defaults = false;
705 pcmc->gigabyte_align = false;
706 pcmc->legacy_acpi_table_size = 6414;
707 }
708
709 DEFINE_I440FX_MACHINE(v1_7, "pc-i440fx-1.7", pc_compat_1_7_fn,
710 pc_i440fx_1_7_machine_options);
711
712 static void pc_i440fx_1_6_machine_options(MachineClass *m)
713 {
714 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
715
716 pc_i440fx_1_7_machine_options(m);
717 m->hw_version = "1.6.0";
718 m->rom_file_has_mr = false;
719 compat_props_add(m->compat_props, pc_compat_1_6, pc_compat_1_6_len);
720 pcmc->has_acpi_build = false;
721 }
722
723 DEFINE_I440FX_MACHINE(v1_6, "pc-i440fx-1.6", pc_compat_1_6_fn,
724 pc_i440fx_1_6_machine_options);
725
726 static void pc_i440fx_1_5_machine_options(MachineClass *m)
727 {
728 pc_i440fx_1_6_machine_options(m);
729 m->hw_version = "1.5.0";
730 compat_props_add(m->compat_props, pc_compat_1_5, pc_compat_1_5_len);
731 }
732
733 DEFINE_I440FX_MACHINE(v1_5, "pc-i440fx-1.5", pc_compat_1_5_fn,
734 pc_i440fx_1_5_machine_options);
735
736 static void pc_i440fx_1_4_machine_options(MachineClass *m)
737 {
738 pc_i440fx_1_5_machine_options(m);
739 m->hw_version = "1.4.0";
740 m->hot_add_cpu = NULL;
741 compat_props_add(m->compat_props, pc_compat_1_4, pc_compat_1_4_len);
742 }
743
744 DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4_fn,
745 pc_i440fx_1_4_machine_options);
746
747 static void pc_i440fx_1_3_machine_options(MachineClass *m)
748 {
749 X86MachineClass *x86mc = X86_MACHINE_CLASS(m);
750 static GlobalProperty compat[] = {
751 PC_CPU_MODEL_IDS("1.3.0")
752 { "usb-tablet", "usb_version", "1" },
753 { "virtio-net-pci", "ctrl_mac_addr", "off" },
754 { "virtio-net-pci", "mq", "off" },
755 { "e1000", "autonegotiation", "off" },
756 };
757
758 pc_i440fx_1_4_machine_options(m);
759 m->hw_version = "1.3.0";
760 m->deprecation_reason = "use a newer machine type instead";
761 x86mc->compat_apic_id_mode = true;
762 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
763 }
764
765 DEFINE_I440FX_MACHINE(v1_3, "pc-1.3", pc_compat_1_3,
766 pc_i440fx_1_3_machine_options);
767
768
769 static void pc_i440fx_1_2_machine_options(MachineClass *m)
770 {
771 static GlobalProperty compat[] = {
772 PC_CPU_MODEL_IDS("1.2.0")
773 { "nec-usb-xhci", "msi", "off" },
774 { "nec-usb-xhci", "msix", "off" },
775 { "qxl", "revision", "3" },
776 { "qxl-vga", "revision", "3" },
777 { "VGA", "mmio", "off" },
778 };
779
780 pc_i440fx_1_3_machine_options(m);
781 m->hw_version = "1.2.0";
782 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
783 }
784
785 DEFINE_I440FX_MACHINE(v1_2, "pc-1.2", pc_compat_1_2,
786 pc_i440fx_1_2_machine_options);
787
788
789 static void pc_i440fx_1_1_machine_options(MachineClass *m)
790 {
791 static GlobalProperty compat[] = {
792 PC_CPU_MODEL_IDS("1.1.0")
793 { "virtio-scsi-pci", "hotplug", "off" },
794 { "virtio-scsi-pci", "param_change", "off" },
795 { "VGA", "vgamem_mb", "8" },
796 { "vmware-svga", "vgamem_mb", "8" },
797 { "qxl-vga", "vgamem_mb", "8" },
798 { "qxl", "vgamem_mb", "8" },
799 { "virtio-blk-pci", "config-wce", "off" },
800 };
801
802 pc_i440fx_1_2_machine_options(m);
803 m->hw_version = "1.1.0";
804 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
805 }
806
807 DEFINE_I440FX_MACHINE(v1_1, "pc-1.1", pc_compat_1_2,
808 pc_i440fx_1_1_machine_options);
809
810 static void pc_i440fx_1_0_machine_options(MachineClass *m)
811 {
812 static GlobalProperty compat[] = {
813 PC_CPU_MODEL_IDS("1.0")
814 { TYPE_ISA_FDC, "check_media_rate", "off" },
815 { "virtio-balloon-pci", "class", stringify(PCI_CLASS_MEMORY_RAM) },
816 { "apic-common", "vapic", "off" },
817 { TYPE_USB_DEVICE, "full-path", "no" },
818 };
819
820 pc_i440fx_1_1_machine_options(m);
821 m->hw_version = "1.0";
822 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
823 }
824
825 DEFINE_I440FX_MACHINE(v1_0, "pc-1.0", pc_compat_1_2,
826 pc_i440fx_1_0_machine_options);
827
828
829 typedef struct {
830 uint16_t gpu_device_id;
831 uint16_t pch_device_id;
832 uint8_t pch_revision_id;
833 } IGDDeviceIDInfo;
834
835 /* In real world different GPU should have different PCH. But actually
836 * the different PCH DIDs likely map to different PCH SKUs. We do the
837 * same thing for the GPU. For PCH, the different SKUs are going to be
838 * all the same silicon design and implementation, just different
839 * features turn on and off with fuses. The SW interfaces should be
840 * consistent across all SKUs in a given family (eg LPT). But just same
841 * features may not be supported.
842 *
843 * Most of these different PCH features probably don't matter to the
844 * Gfx driver, but obviously any difference in display port connections
845 * will so it should be fine with any PCH in case of passthrough.
846 *
847 * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell)
848 * scenarios, 0x9cc3 for BDW(Broadwell).
849 */
850 static const IGDDeviceIDInfo igd_combo_id_infos[] = {
851 /* HSW Classic */
852 {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */
853 {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */
854 {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */
855 {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */
856 {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */
857 /* HSW ULT */
858 {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */
859 {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */
860 {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */
861 {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */
862 {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */
863 {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */
864 /* HSW CRW */
865 {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */
866 {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */
867 /* HSW Server */
868 {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */
869 /* HSW SRVR */
870 {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */
871 /* BSW */
872 {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */
873 {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */
874 {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */
875 {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */
876 {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */
877 {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */
878 {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */
879 {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */
880 {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */
881 {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */
882 {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */
883 };
884
885 static void isa_bridge_class_init(ObjectClass *klass, void *data)
886 {
887 DeviceClass *dc = DEVICE_CLASS(klass);
888 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
889
890 dc->desc = "ISA bridge faked to support IGD PT";
891 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
892 k->vendor_id = PCI_VENDOR_ID_INTEL;
893 k->class_id = PCI_CLASS_BRIDGE_ISA;
894 };
895
896 static TypeInfo isa_bridge_info = {
897 .name = "igd-passthrough-isa-bridge",
898 .parent = TYPE_PCI_DEVICE,
899 .instance_size = sizeof(PCIDevice),
900 .class_init = isa_bridge_class_init,
901 .interfaces = (InterfaceInfo[]) {
902 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
903 { },
904 },
905 };
906
907 static void pt_graphics_register_types(void)
908 {
909 type_register_static(&isa_bridge_info);
910 }
911 type_init(pt_graphics_register_types)
912
913 void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id)
914 {
915 struct PCIDevice *bridge_dev;
916 int i, num;
917 uint16_t pch_dev_id = 0xffff;
918 uint8_t pch_rev_id;
919
920 num = ARRAY_SIZE(igd_combo_id_infos);
921 for (i = 0; i < num; i++) {
922 if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) {
923 pch_dev_id = igd_combo_id_infos[i].pch_device_id;
924 pch_rev_id = igd_combo_id_infos[i].pch_revision_id;
925 }
926 }
927
928 if (pch_dev_id == 0xffff) {
929 return;
930 }
931
932 /* Currently IGD drivers always need to access PCH by 1f.0. */
933 bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0),
934 "igd-passthrough-isa-bridge");
935
936 /*
937 * Note that vendor id is always PCI_VENDOR_ID_INTEL.
938 */
939 if (!bridge_dev) {
940 fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n");
941 return;
942 }
943 pci_config_set_device_id(bridge_dev->config, pch_dev_id);
944 pci_config_set_revision(bridge_dev->config, pch_rev_id);
945 }
946
947 static void isapc_machine_options(MachineClass *m)
948 {
949 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
950 m->desc = "ISA-only PC";
951 m->max_cpus = 1;
952 m->option_rom_has_mr = true;
953 m->rom_file_has_mr = false;
954 pcmc->pci_enabled = false;
955 pcmc->has_acpi_build = false;
956 pcmc->smbios_defaults = false;
957 pcmc->gigabyte_align = false;
958 pcmc->smbios_legacy_mode = true;
959 pcmc->has_reserved_memory = false;
960 pcmc->default_nic_model = "ne2k_isa";
961 m->default_cpu_type = X86_CPU_TYPE_NAME("486");
962 }
963
964 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa,
965 isapc_machine_options);
966
967
968 #ifdef CONFIG_XEN
969 static void xenfv_4_2_machine_options(MachineClass *m)
970 {
971 pc_i440fx_4_2_machine_options(m);
972 m->desc = "Xen Fully-virtualized PC";
973 m->max_cpus = HVM_MAX_VCPUS;
974 m->default_machine_opts = "accel=xen";
975 }
976
977 DEFINE_PC_MACHINE(xenfv_4_2, "xenfv-4.2", pc_xen_hvm_init,
978 xenfv_4_2_machine_options);
979
980 static void xenfv_3_1_machine_options(MachineClass *m)
981 {
982 pc_i440fx_3_1_machine_options(m);
983 m->desc = "Xen Fully-virtualized PC";
984 m->alias = "xenfv";
985 m->max_cpus = HVM_MAX_VCPUS;
986 m->default_machine_opts = "accel=xen";
987 }
988
989 DEFINE_PC_MACHINE(xenfv, "xenfv-3.1", pc_xen_hvm_init,
990 xenfv_3_1_machine_options);
991 #endif
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