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1 /*
2 * QEMU PC System Emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25 #include "qemu/osdep.h"
26
27 #include "qemu/units.h"
28 #include "hw/hw.h"
29 #include "hw/loader.h"
30 #include "hw/i386/pc.h"
31 #include "hw/i386/apic.h"
32 #include "hw/display/ramfb.h"
33 #include "hw/firmware/smbios.h"
34 #include "hw/pci/pci.h"
35 #include "hw/pci/pci_ids.h"
36 #include "hw/usb.h"
37 #include "net/net.h"
38 #include "hw/boards.h"
39 #include "hw/ide.h"
40 #include "sysemu/kvm.h"
41 #include "hw/kvm/clock.h"
42 #include "sysemu/sysemu.h"
43 #include "hw/sysbus.h"
44 #include "sysemu/arch_init.h"
45 #include "hw/i2c/smbus_eeprom.h"
46 #include "hw/xen/xen.h"
47 #include "exec/memory.h"
48 #include "exec/address-spaces.h"
49 #include "hw/acpi/acpi.h"
50 #include "cpu.h"
51 #include "qapi/error.h"
52 #include "qemu/error-report.h"
53 #ifdef CONFIG_XEN
54 #include <xen/hvm/hvm_info_table.h>
55 #include "hw/xen/xen_pt.h"
56 #endif
57 #include "migration/global_state.h"
58 #include "migration/misc.h"
59 #include "kvm_i386.h"
60 #include "sysemu/numa.h"
61
62 #define MAX_IDE_BUS 2
63
64 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
65 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
66 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
67
68 /* PC hardware initialisation */
69 static void pc_init1(MachineState *machine,
70 const char *host_type, const char *pci_type)
71 {
72 PCMachineState *pcms = PC_MACHINE(machine);
73 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
74 MemoryRegion *system_memory = get_system_memory();
75 MemoryRegion *system_io = get_system_io();
76 int i;
77 PCIBus *pci_bus;
78 ISABus *isa_bus;
79 PCII440FXState *i440fx_state;
80 int piix3_devfn = -1;
81 qemu_irq *i8259;
82 qemu_irq smi_irq;
83 GSIState *gsi_state;
84 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
85 BusState *idebus[MAX_IDE_BUS];
86 ISADevice *rtc_state;
87 MemoryRegion *ram_memory;
88 MemoryRegion *pci_memory;
89 MemoryRegion *rom_memory;
90 ram_addr_t lowmem;
91
92 /*
93 * Calculate ram split, for memory below and above 4G. It's a bit
94 * complicated for backward compatibility reasons ...
95 *
96 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the
97 * default value for max_ram_below_4g now.
98 *
99 * - Then, to gigabyte align the memory, we move the split to 3G
100 * (lowmem = 0xc0000000). But only in case we have to split in
101 * the first place, i.e. ram_size is larger than (traditional)
102 * lowmem. And for new machine types (gigabyte_align = true)
103 * only, for live migration compatibility reasons.
104 *
105 * - Next the max-ram-below-4g option was added, which allowed to
106 * reduce lowmem to a smaller value, to allow a larger PCI I/O
107 * window below 4G. qemu doesn't enforce gigabyte alignment here,
108 * but prints a warning.
109 *
110 * - Finally max-ram-below-4g got updated to also allow raising lowmem,
111 * so legacy non-PAE guests can get as much memory as possible in
112 * the 32bit address space below 4G.
113 *
114 * - Note that Xen has its own ram setp code in xen_ram_init(),
115 * called via xen_hvm_init().
116 *
117 * Examples:
118 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high
119 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high
120 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high
121 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M)
122 */
123 if (xen_enabled()) {
124 xen_hvm_init(pcms, &ram_memory);
125 } else {
126 if (!pcms->max_ram_below_4g) {
127 pcms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */
128 }
129 lowmem = pcms->max_ram_below_4g;
130 if (machine->ram_size >= pcms->max_ram_below_4g) {
131 if (pcmc->gigabyte_align) {
132 if (lowmem > 0xc0000000) {
133 lowmem = 0xc0000000;
134 }
135 if (lowmem & (1 * GiB - 1)) {
136 warn_report("Large machine and max_ram_below_4g "
137 "(%" PRIu64 ") not a multiple of 1G; "
138 "possible bad performance.",
139 pcms->max_ram_below_4g);
140 }
141 }
142 }
143
144 if (machine->ram_size >= lowmem) {
145 pcms->above_4g_mem_size = machine->ram_size - lowmem;
146 pcms->below_4g_mem_size = lowmem;
147 } else {
148 pcms->above_4g_mem_size = 0;
149 pcms->below_4g_mem_size = machine->ram_size;
150 }
151 }
152
153 pc_cpus_init(pcms);
154
155 if (kvm_enabled() && pcmc->kvmclock_enabled) {
156 kvmclock_create();
157 }
158
159 if (pcmc->pci_enabled) {
160 pci_memory = g_new(MemoryRegion, 1);
161 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
162 rom_memory = pci_memory;
163 } else {
164 pci_memory = NULL;
165 rom_memory = system_memory;
166 }
167
168 pc_guest_info_init(pcms);
169
170 if (pcmc->smbios_defaults) {
171 MachineClass *mc = MACHINE_GET_CLASS(machine);
172 /* These values are guest ABI, do not change */
173 smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)",
174 mc->name, pcmc->smbios_legacy_mode,
175 pcmc->smbios_uuid_encoded,
176 SMBIOS_ENTRY_POINT_21);
177 }
178
179 /* allocate ram and load rom/bios */
180 if (!xen_enabled()) {
181 pc_memory_init(pcms, system_memory,
182 rom_memory, &ram_memory);
183 } else if (machine->kernel_filename != NULL) {
184 /* For xen HVM direct kernel boot, load linux here */
185 xen_load_linux(pcms);
186 }
187
188 gsi_state = g_malloc0(sizeof(*gsi_state));
189 if (kvm_ioapic_in_kernel()) {
190 kvm_pc_setup_irq_routing(pcmc->pci_enabled);
191 pcms->gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state,
192 GSI_NUM_PINS);
193 } else {
194 pcms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
195 }
196
197 if (pcmc->pci_enabled) {
198 pci_bus = i440fx_init(host_type,
199 pci_type,
200 &i440fx_state, &piix3_devfn, &isa_bus, pcms->gsi,
201 system_memory, system_io, machine->ram_size,
202 pcms->below_4g_mem_size,
203 pcms->above_4g_mem_size,
204 pci_memory, ram_memory);
205 pcms->bus = pci_bus;
206 } else {
207 pci_bus = NULL;
208 i440fx_state = NULL;
209 isa_bus = isa_bus_new(NULL, get_system_memory(), system_io,
210 &error_abort);
211 no_hpet = 1;
212 }
213 isa_bus_irqs(isa_bus, pcms->gsi);
214
215 if (kvm_pic_in_kernel()) {
216 i8259 = kvm_i8259_init(isa_bus);
217 } else if (xen_enabled()) {
218 i8259 = xen_interrupt_controller_init();
219 } else {
220 i8259 = i8259_init(isa_bus, pc_allocate_cpu_irq());
221 }
222
223 for (i = 0; i < ISA_NUM_IRQS; i++) {
224 gsi_state->i8259_irq[i] = i8259[i];
225 }
226 g_free(i8259);
227 if (pcmc->pci_enabled) {
228 ioapic_init_gsi(gsi_state, "i440fx");
229 }
230
231 pc_register_ferr_irq(pcms->gsi[13]);
232
233 pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL);
234
235 assert(pcms->vmport != ON_OFF_AUTO__MAX);
236 if (pcms->vmport == ON_OFF_AUTO_AUTO) {
237 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON;
238 }
239
240 /* init basic PC hardware */
241 pc_basic_device_init(isa_bus, pcms->gsi, &rtc_state, true,
242 (pcms->vmport != ON_OFF_AUTO_ON), pcms->pit_enabled,
243 0x4);
244
245 pc_nic_init(pcmc, isa_bus, pci_bus);
246
247 ide_drive_get(hd, ARRAY_SIZE(hd));
248 if (pcmc->pci_enabled) {
249 PCIDevice *dev;
250 if (xen_enabled()) {
251 dev = pci_piix3_xen_ide_init(pci_bus, hd, piix3_devfn + 1);
252 } else {
253 dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
254 }
255 idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
256 idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
257 } else {
258 for(i = 0; i < MAX_IDE_BUS; i++) {
259 ISADevice *dev;
260 char busname[] = "ide.0";
261 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i],
262 ide_irq[i],
263 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
264 /*
265 * The ide bus name is ide.0 for the first bus and ide.1 for the
266 * second one.
267 */
268 busname[4] = '0' + i;
269 idebus[i] = qdev_get_child_bus(DEVICE(dev), busname);
270 }
271 }
272
273 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
274
275 if (pcmc->pci_enabled && machine_usb(machine)) {
276 pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci");
277 }
278
279 if (pcmc->pci_enabled && acpi_enabled) {
280 DeviceState *piix4_pm;
281 I2CBus *smbus;
282
283 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0);
284 /* TODO: Populate SPD eeprom data. */
285 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
286 pcms->gsi[9], smi_irq,
287 pc_machine_is_smm_enabled(pcms),
288 &piix4_pm);
289 smbus_eeprom_init(smbus, 8, NULL, 0);
290
291 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
292 TYPE_HOTPLUG_HANDLER,
293 (Object **)&pcms->acpi_dev,
294 object_property_allow_set_link,
295 OBJ_PROP_LINK_STRONG, &error_abort);
296 object_property_set_link(OBJECT(machine), OBJECT(piix4_pm),
297 PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
298 }
299
300 if (machine->nvdimms_state->is_enabled) {
301 nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
302 pcms->fw_cfg, OBJECT(pcms));
303 }
304 }
305
306 /* Looking for a pc_compat_2_4() function? It doesn't exist.
307 * pc_compat_*() functions that run on machine-init time and
308 * change global QEMU state are deprecated. Please don't create
309 * one, and implement any pc-*-2.4 (and newer) compat code in
310 * HW_COMPAT_*, PC_COMPAT_*, or * pc_*_machine_options().
311 */
312
313 static void pc_compat_2_3_fn(MachineState *machine)
314 {
315 PCMachineState *pcms = PC_MACHINE(machine);
316 if (kvm_enabled()) {
317 pcms->smm = ON_OFF_AUTO_OFF;
318 }
319 }
320
321 static void pc_compat_2_2_fn(MachineState *machine)
322 {
323 pc_compat_2_3_fn(machine);
324 }
325
326 static void pc_compat_2_1_fn(MachineState *machine)
327 {
328 pc_compat_2_2_fn(machine);
329 x86_cpu_change_kvm_default("svm", NULL);
330 }
331
332 static void pc_compat_2_0_fn(MachineState *machine)
333 {
334 pc_compat_2_1_fn(machine);
335 }
336
337 static void pc_compat_1_7_fn(MachineState *machine)
338 {
339 pc_compat_2_0_fn(machine);
340 x86_cpu_change_kvm_default("x2apic", NULL);
341 }
342
343 static void pc_compat_1_6_fn(MachineState *machine)
344 {
345 pc_compat_1_7_fn(machine);
346 }
347
348 static void pc_compat_1_5_fn(MachineState *machine)
349 {
350 pc_compat_1_6_fn(machine);
351 }
352
353 static void pc_compat_1_4_fn(MachineState *machine)
354 {
355 pc_compat_1_5_fn(machine);
356 }
357
358 static void pc_compat_1_3(MachineState *machine)
359 {
360 pc_compat_1_4_fn(machine);
361 enable_compat_apic_id_mode();
362 }
363
364 /* PC compat function for pc-0.14 to pc-1.2 */
365 static void pc_compat_1_2(MachineState *machine)
366 {
367 pc_compat_1_3(machine);
368 x86_cpu_change_kvm_default("kvm-pv-eoi", NULL);
369 }
370
371 /* PC compat function for pc-0.12 and pc-0.13 */
372 static void pc_compat_0_13(MachineState *machine)
373 {
374 pc_compat_1_2(machine);
375 }
376
377 static void pc_init_isa(MachineState *machine)
378 {
379 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE);
380 }
381
382 #ifdef CONFIG_XEN
383 static void pc_xen_hvm_init_pci(MachineState *machine)
384 {
385 const char *pci_type = has_igd_gfx_passthru ?
386 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE;
387
388 pc_init1(machine,
389 TYPE_I440FX_PCI_HOST_BRIDGE,
390 pci_type);
391 }
392
393 static void pc_xen_hvm_init(MachineState *machine)
394 {
395 PCMachineState *pcms = PC_MACHINE(machine);
396
397 if (!xen_enabled()) {
398 error_report("xenfv machine requires the xen accelerator");
399 exit(1);
400 }
401
402 pc_xen_hvm_init_pci(machine);
403 pci_create_simple(pcms->bus, -1, "xen-platform");
404 }
405 #endif
406
407 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \
408 static void pc_init_##suffix(MachineState *machine) \
409 { \
410 void (*compat)(MachineState *m) = (compatfn); \
411 if (compat) { \
412 compat(machine); \
413 } \
414 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \
415 TYPE_I440FX_PCI_DEVICE); \
416 } \
417 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
418
419 static void pc_i440fx_machine_options(MachineClass *m)
420 {
421 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
422 pcmc->default_nic_model = "e1000";
423
424 m->family = "pc_piix";
425 m->desc = "Standard PC (i440FX + PIIX, 1996)";
426 m->default_machine_opts = "firmware=bios-256k.bin";
427 m->default_display = "std";
428 machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE);
429 }
430
431 static void pc_i440fx_4_0_machine_options(MachineClass *m)
432 {
433 pc_i440fx_machine_options(m);
434 m->alias = "pc";
435 m->is_default = 1;
436 }
437
438 DEFINE_I440FX_MACHINE(v4_0, "pc-i440fx-4.0", NULL,
439 pc_i440fx_4_0_machine_options);
440
441 static void pc_i440fx_3_1_machine_options(MachineClass *m)
442 {
443 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
444
445 pc_i440fx_4_0_machine_options(m);
446 m->is_default = 0;
447 m->smbus_no_migration_support = true;
448 m->alias = NULL;
449 pcmc->pvh_enabled = false;
450 compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len);
451 compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len);
452 }
453
454 DEFINE_I440FX_MACHINE(v3_1, "pc-i440fx-3.1", NULL,
455 pc_i440fx_3_1_machine_options);
456
457 static void pc_i440fx_3_0_machine_options(MachineClass *m)
458 {
459 pc_i440fx_3_1_machine_options(m);
460 compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len);
461 compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len);
462 }
463
464 DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL,
465 pc_i440fx_3_0_machine_options);
466
467 static void pc_i440fx_2_12_machine_options(MachineClass *m)
468 {
469 pc_i440fx_3_0_machine_options(m);
470 compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len);
471 compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len);
472 }
473
474 DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL,
475 pc_i440fx_2_12_machine_options);
476
477 static void pc_i440fx_2_11_machine_options(MachineClass *m)
478 {
479 pc_i440fx_2_12_machine_options(m);
480 compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len);
481 compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len);
482 }
483
484 DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL,
485 pc_i440fx_2_11_machine_options);
486
487 static void pc_i440fx_2_10_machine_options(MachineClass *m)
488 {
489 pc_i440fx_2_11_machine_options(m);
490 compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len);
491 compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len);
492 m->auto_enable_numa_with_memhp = false;
493 }
494
495 DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL,
496 pc_i440fx_2_10_machine_options);
497
498 static void pc_i440fx_2_9_machine_options(MachineClass *m)
499 {
500 pc_i440fx_2_10_machine_options(m);
501 compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len);
502 compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len);
503 m->numa_auto_assign_ram = numa_legacy_auto_assign_ram;
504 }
505
506 DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL,
507 pc_i440fx_2_9_machine_options);
508
509 static void pc_i440fx_2_8_machine_options(MachineClass *m)
510 {
511 pc_i440fx_2_9_machine_options(m);
512 compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len);
513 compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len);
514 }
515
516 DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL,
517 pc_i440fx_2_8_machine_options);
518
519 static void pc_i440fx_2_7_machine_options(MachineClass *m)
520 {
521 pc_i440fx_2_8_machine_options(m);
522 compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len);
523 compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len);
524 }
525
526 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL,
527 pc_i440fx_2_7_machine_options);
528
529 static void pc_i440fx_2_6_machine_options(MachineClass *m)
530 {
531 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
532
533 pc_i440fx_2_7_machine_options(m);
534 pcmc->legacy_cpu_hotplug = true;
535 pcmc->linuxboot_dma_enabled = false;
536 compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len);
537 compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len);
538 }
539
540 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL,
541 pc_i440fx_2_6_machine_options);
542
543 static void pc_i440fx_2_5_machine_options(MachineClass *m)
544 {
545 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
546
547 pc_i440fx_2_6_machine_options(m);
548 pcmc->save_tsc_khz = false;
549 m->legacy_fw_cfg_order = 1;
550 compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len);
551 compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len);
552 }
553
554 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL,
555 pc_i440fx_2_5_machine_options);
556
557 static void pc_i440fx_2_4_machine_options(MachineClass *m)
558 {
559 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
560
561 pc_i440fx_2_5_machine_options(m);
562 m->hw_version = "2.4.0";
563 pcmc->broken_reserved_end = true;
564 compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len);
565 compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len);
566 }
567
568 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL,
569 pc_i440fx_2_4_machine_options)
570
571 static void pc_i440fx_2_3_machine_options(MachineClass *m)
572 {
573 pc_i440fx_2_4_machine_options(m);
574 m->hw_version = "2.3.0";
575 compat_props_add(m->compat_props, hw_compat_2_3, hw_compat_2_3_len);
576 compat_props_add(m->compat_props, pc_compat_2_3, pc_compat_2_3_len);
577 }
578
579 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3_fn,
580 pc_i440fx_2_3_machine_options);
581
582 static void pc_i440fx_2_2_machine_options(MachineClass *m)
583 {
584 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
585
586 pc_i440fx_2_3_machine_options(m);
587 m->hw_version = "2.2.0";
588 m->default_machine_opts = "firmware=bios-256k.bin,suppress-vmdesc=on";
589 compat_props_add(m->compat_props, hw_compat_2_2, hw_compat_2_2_len);
590 compat_props_add(m->compat_props, pc_compat_2_2, pc_compat_2_2_len);
591 pcmc->rsdp_in_ram = false;
592 }
593
594 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2_fn,
595 pc_i440fx_2_2_machine_options);
596
597 static void pc_i440fx_2_1_machine_options(MachineClass *m)
598 {
599 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
600
601 pc_i440fx_2_2_machine_options(m);
602 m->hw_version = "2.1.0";
603 m->default_display = NULL;
604 compat_props_add(m->compat_props, hw_compat_2_1, hw_compat_2_1_len);
605 compat_props_add(m->compat_props, pc_compat_2_1, pc_compat_2_1_len);
606 pcmc->smbios_uuid_encoded = false;
607 pcmc->enforce_aligned_dimm = false;
608 }
609
610 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1_fn,
611 pc_i440fx_2_1_machine_options);
612
613 static void pc_i440fx_2_0_machine_options(MachineClass *m)
614 {
615 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
616
617 pc_i440fx_2_1_machine_options(m);
618 m->hw_version = "2.0.0";
619 compat_props_add(m->compat_props, pc_compat_2_0, pc_compat_2_0_len);
620 pcmc->smbios_legacy_mode = true;
621 pcmc->has_reserved_memory = false;
622 /* This value depends on the actual DSDT and SSDT compiled into
623 * the source QEMU; unfortunately it depends on the binary and
624 * not on the machine type, so we cannot make pc-i440fx-1.7 work on
625 * both QEMU 1.7 and QEMU 2.0.
626 *
627 * Large variations cause migration to fail for more than one
628 * consecutive value of the "-smp" maxcpus option.
629 *
630 * For small variations of the kind caused by different iasl versions,
631 * the 4k rounding usually leaves slack. However, there could be still
632 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the
633 * slack is only ~10 bytes before one "-smp maxcpus" value breaks!
634 *
635 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on
636 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418.
637 */
638 pcmc->legacy_acpi_table_size = 6652;
639 pcmc->acpi_data_size = 0x10000;
640 }
641
642 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0_fn,
643 pc_i440fx_2_0_machine_options);
644
645 static void pc_i440fx_1_7_machine_options(MachineClass *m)
646 {
647 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
648
649 pc_i440fx_2_0_machine_options(m);
650 m->hw_version = "1.7.0";
651 m->default_machine_opts = NULL;
652 m->option_rom_has_mr = true;
653 compat_props_add(m->compat_props, pc_compat_1_7, pc_compat_1_7_len);
654 pcmc->smbios_defaults = false;
655 pcmc->gigabyte_align = false;
656 pcmc->legacy_acpi_table_size = 6414;
657 }
658
659 DEFINE_I440FX_MACHINE(v1_7, "pc-i440fx-1.7", pc_compat_1_7_fn,
660 pc_i440fx_1_7_machine_options);
661
662 static void pc_i440fx_1_6_machine_options(MachineClass *m)
663 {
664 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
665
666 pc_i440fx_1_7_machine_options(m);
667 m->hw_version = "1.6.0";
668 m->rom_file_has_mr = false;
669 compat_props_add(m->compat_props, pc_compat_1_6, pc_compat_1_6_len);
670 pcmc->has_acpi_build = false;
671 }
672
673 DEFINE_I440FX_MACHINE(v1_6, "pc-i440fx-1.6", pc_compat_1_6_fn,
674 pc_i440fx_1_6_machine_options);
675
676 static void pc_i440fx_1_5_machine_options(MachineClass *m)
677 {
678 pc_i440fx_1_6_machine_options(m);
679 m->hw_version = "1.5.0";
680 compat_props_add(m->compat_props, pc_compat_1_5, pc_compat_1_5_len);
681 }
682
683 DEFINE_I440FX_MACHINE(v1_5, "pc-i440fx-1.5", pc_compat_1_5_fn,
684 pc_i440fx_1_5_machine_options);
685
686 static void pc_i440fx_1_4_machine_options(MachineClass *m)
687 {
688 pc_i440fx_1_5_machine_options(m);
689 m->hw_version = "1.4.0";
690 m->hot_add_cpu = NULL;
691 compat_props_add(m->compat_props, pc_compat_1_4, pc_compat_1_4_len);
692 }
693
694 DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4_fn,
695 pc_i440fx_1_4_machine_options);
696
697 static void pc_i440fx_1_3_machine_options(MachineClass *m)
698 {
699 static GlobalProperty compat[] = {
700 PC_CPU_MODEL_IDS("1.3.0")
701 { "usb-tablet", "usb_version", "1" },
702 { "virtio-net-pci", "ctrl_mac_addr", "off" },
703 { "virtio-net-pci", "mq", "off" },
704 { "e1000", "autonegotiation", "off" },
705 };
706
707 pc_i440fx_1_4_machine_options(m);
708 m->hw_version = "1.3.0";
709 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
710 }
711
712 DEFINE_I440FX_MACHINE(v1_3, "pc-1.3", pc_compat_1_3,
713 pc_i440fx_1_3_machine_options);
714
715
716 static void pc_i440fx_1_2_machine_options(MachineClass *m)
717 {
718 static GlobalProperty compat[] = {
719 PC_CPU_MODEL_IDS("1.2.0")
720 { "nec-usb-xhci", "msi", "off" },
721 { "nec-usb-xhci", "msix", "off" },
722 { "qxl", "revision", "3" },
723 { "qxl-vga", "revision", "3" },
724 { "VGA", "mmio", "off" },
725 };
726
727 pc_i440fx_1_3_machine_options(m);
728 m->hw_version = "1.2.0";
729 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
730 }
731
732 DEFINE_I440FX_MACHINE(v1_2, "pc-1.2", pc_compat_1_2,
733 pc_i440fx_1_2_machine_options);
734
735
736 static void pc_i440fx_1_1_machine_options(MachineClass *m)
737 {
738 static GlobalProperty compat[] = {
739 PC_CPU_MODEL_IDS("1.1.0")
740 { "virtio-scsi-pci", "hotplug", "off" },
741 { "virtio-scsi-pci", "param_change", "off" },
742 { "VGA", "vgamem_mb", "8" },
743 { "vmware-svga", "vgamem_mb", "8" },
744 { "qxl-vga", "vgamem_mb", "8" },
745 { "qxl", "vgamem_mb", "8" },
746 { "virtio-blk-pci", "config-wce", "off" },
747 };
748
749 pc_i440fx_1_2_machine_options(m);
750 m->hw_version = "1.1.0";
751 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
752 }
753
754 DEFINE_I440FX_MACHINE(v1_1, "pc-1.1", pc_compat_1_2,
755 pc_i440fx_1_1_machine_options);
756
757 static void pc_i440fx_1_0_machine_options(MachineClass *m)
758 {
759 static GlobalProperty compat[] = {
760 PC_CPU_MODEL_IDS("1.0")
761 { TYPE_ISA_FDC, "check_media_rate", "off" },
762 { "virtio-balloon-pci", "class", stringify(PCI_CLASS_MEMORY_RAM) },
763 { "apic-common", "vapic", "off" },
764 { TYPE_USB_DEVICE, "full-path", "no" },
765 };
766
767 pc_i440fx_1_1_machine_options(m);
768 m->hw_version = "1.0";
769 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
770 }
771
772 DEFINE_I440FX_MACHINE(v1_0, "pc-1.0", pc_compat_1_2,
773 pc_i440fx_1_0_machine_options);
774
775
776 static void pc_i440fx_0_15_machine_options(MachineClass *m)
777 {
778 static GlobalProperty compat[] = {
779 PC_CPU_MODEL_IDS("0.15")
780 };
781
782 pc_i440fx_1_0_machine_options(m);
783 m->hw_version = "0.15";
784 m->deprecation_reason = "use a newer machine type instead";
785 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
786 }
787
788 DEFINE_I440FX_MACHINE(v0_15, "pc-0.15", pc_compat_1_2,
789 pc_i440fx_0_15_machine_options);
790
791
792 static void pc_i440fx_0_14_machine_options(MachineClass *m)
793 {
794 static GlobalProperty compat[] = {
795 PC_CPU_MODEL_IDS("0.14")
796 { "virtio-blk-pci", "event_idx", "off" },
797 { "virtio-serial-pci", "event_idx", "off" },
798 { "virtio-net-pci", "event_idx", "off" },
799 { "virtio-balloon-pci", "event_idx", "off" },
800 { "qxl", "revision", "2" },
801 { "qxl-vga", "revision", "2" },
802 };
803
804 pc_i440fx_0_15_machine_options(m);
805 m->hw_version = "0.14";
806 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
807 }
808
809 DEFINE_I440FX_MACHINE(v0_14, "pc-0.14", pc_compat_1_2,
810 pc_i440fx_0_14_machine_options);
811
812 static void pc_i440fx_0_13_machine_options(MachineClass *m)
813 {
814 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
815 static GlobalProperty compat[] = {
816 PC_CPU_MODEL_IDS("0.13")
817 { TYPE_PCI_DEVICE, "command_serr_enable", "off" },
818 { "AC97", "use_broken_id", "1" },
819 { "virtio-9p-pci", "vectors", "0" },
820 { "VGA", "rombar", "0" },
821 { "vmware-svga", "rombar", "0" },
822 };
823
824 pc_i440fx_0_14_machine_options(m);
825 m->hw_version = "0.13";
826 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
827 pcmc->kvmclock_enabled = false;
828 }
829
830 DEFINE_I440FX_MACHINE(v0_13, "pc-0.13", pc_compat_0_13,
831 pc_i440fx_0_13_machine_options);
832
833 static void pc_i440fx_0_12_machine_options(MachineClass *m)
834 {
835 static GlobalProperty compat[] = {
836 PC_CPU_MODEL_IDS("0.12")
837 { "virtio-serial-pci", "max_ports", "1" },
838 { "virtio-serial-pci", "vectors", "0" },
839 { "usb-mouse", "serial", "1" },
840 { "usb-tablet", "serial", "1" },
841 { "usb-kbd", "serial", "1" },
842 };
843
844 pc_i440fx_0_13_machine_options(m);
845 m->hw_version = "0.12";
846 compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
847 }
848
849 DEFINE_I440FX_MACHINE(v0_12, "pc-0.12", pc_compat_0_13,
850 pc_i440fx_0_12_machine_options);
851
852 typedef struct {
853 uint16_t gpu_device_id;
854 uint16_t pch_device_id;
855 uint8_t pch_revision_id;
856 } IGDDeviceIDInfo;
857
858 /* In real world different GPU should have different PCH. But actually
859 * the different PCH DIDs likely map to different PCH SKUs. We do the
860 * same thing for the GPU. For PCH, the different SKUs are going to be
861 * all the same silicon design and implementation, just different
862 * features turn on and off with fuses. The SW interfaces should be
863 * consistent across all SKUs in a given family (eg LPT). But just same
864 * features may not be supported.
865 *
866 * Most of these different PCH features probably don't matter to the
867 * Gfx driver, but obviously any difference in display port connections
868 * will so it should be fine with any PCH in case of passthrough.
869 *
870 * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell)
871 * scenarios, 0x9cc3 for BDW(Broadwell).
872 */
873 static const IGDDeviceIDInfo igd_combo_id_infos[] = {
874 /* HSW Classic */
875 {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */
876 {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */
877 {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */
878 {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */
879 {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */
880 /* HSW ULT */
881 {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */
882 {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */
883 {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */
884 {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */
885 {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */
886 {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */
887 /* HSW CRW */
888 {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */
889 {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */
890 /* HSW Server */
891 {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */
892 /* HSW SRVR */
893 {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */
894 /* BSW */
895 {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */
896 {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */
897 {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */
898 {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */
899 {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */
900 {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */
901 {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */
902 {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */
903 {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */
904 {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */
905 {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */
906 };
907
908 static void isa_bridge_class_init(ObjectClass *klass, void *data)
909 {
910 DeviceClass *dc = DEVICE_CLASS(klass);
911 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
912
913 dc->desc = "ISA bridge faked to support IGD PT";
914 k->vendor_id = PCI_VENDOR_ID_INTEL;
915 k->class_id = PCI_CLASS_BRIDGE_ISA;
916 };
917
918 static TypeInfo isa_bridge_info = {
919 .name = "igd-passthrough-isa-bridge",
920 .parent = TYPE_PCI_DEVICE,
921 .instance_size = sizeof(PCIDevice),
922 .class_init = isa_bridge_class_init,
923 .interfaces = (InterfaceInfo[]) {
924 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
925 { },
926 },
927 };
928
929 static void pt_graphics_register_types(void)
930 {
931 type_register_static(&isa_bridge_info);
932 }
933 type_init(pt_graphics_register_types)
934
935 void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id)
936 {
937 struct PCIDevice *bridge_dev;
938 int i, num;
939 uint16_t pch_dev_id = 0xffff;
940 uint8_t pch_rev_id;
941
942 num = ARRAY_SIZE(igd_combo_id_infos);
943 for (i = 0; i < num; i++) {
944 if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) {
945 pch_dev_id = igd_combo_id_infos[i].pch_device_id;
946 pch_rev_id = igd_combo_id_infos[i].pch_revision_id;
947 }
948 }
949
950 if (pch_dev_id == 0xffff) {
951 return;
952 }
953
954 /* Currently IGD drivers always need to access PCH by 1f.0. */
955 bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0),
956 "igd-passthrough-isa-bridge");
957
958 /*
959 * Note that vendor id is always PCI_VENDOR_ID_INTEL.
960 */
961 if (!bridge_dev) {
962 fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n");
963 return;
964 }
965 pci_config_set_device_id(bridge_dev->config, pch_dev_id);
966 pci_config_set_revision(bridge_dev->config, pch_rev_id);
967 }
968
969 static void isapc_machine_options(MachineClass *m)
970 {
971 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
972 m->desc = "ISA-only PC";
973 m->max_cpus = 1;
974 m->option_rom_has_mr = true;
975 m->rom_file_has_mr = false;
976 pcmc->pci_enabled = false;
977 pcmc->has_acpi_build = false;
978 pcmc->smbios_defaults = false;
979 pcmc->gigabyte_align = false;
980 pcmc->smbios_legacy_mode = true;
981 pcmc->has_reserved_memory = false;
982 pcmc->default_nic_model = "ne2k_isa";
983 m->default_cpu_type = X86_CPU_TYPE_NAME("486");
984 }
985
986 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa,
987 isapc_machine_options);
988
989
990 #ifdef CONFIG_XEN
991 static void xenfv_machine_options(MachineClass *m)
992 {
993 m->desc = "Xen Fully-virtualized PC";
994 m->max_cpus = HVM_MAX_VCPUS;
995 m->default_machine_opts = "accel=xen";
996 }
997
998 DEFINE_PC_MACHINE(xenfv, "xenfv", pc_xen_hvm_init,
999 xenfv_machine_options);
1000 #endif