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1 /*
2 * QEMU PowerPC sPAPR XIVE interrupt controller model
3 *
4 * Copyright (c) 2017-2019, IBM Corporation.
5 *
6 * This code is licensed under the GPL version 2 or later. See the
7 * COPYING file in the top-level directory.
8 */
9
10 #include "qemu/osdep.h"
11 #include "qemu/log.h"
12 #include "qemu/error-report.h"
13 #include "qapi/error.h"
14 #include "target/ppc/cpu.h"
15 #include "sysemu/cpus.h"
16 #include "sysemu/kvm.h"
17 #include "hw/ppc/spapr.h"
18 #include "hw/ppc/spapr_cpu_core.h"
19 #include "hw/ppc/spapr_xive.h"
20 #include "hw/ppc/xive.h"
21 #include "kvm_ppc.h"
22
23 #include <sys/ioctl.h>
24
25 /*
26 * Helpers for CPU hotplug
27 *
28 * TODO: make a common KVMEnabledCPU layer for XICS and XIVE
29 */
30 typedef struct KVMEnabledCPU {
31 unsigned long vcpu_id;
32 QLIST_ENTRY(KVMEnabledCPU) node;
33 } KVMEnabledCPU;
34
35 static QLIST_HEAD(, KVMEnabledCPU)
36 kvm_enabled_cpus = QLIST_HEAD_INITIALIZER(&kvm_enabled_cpus);
37
38 static bool kvm_cpu_is_enabled(CPUState *cs)
39 {
40 KVMEnabledCPU *enabled_cpu;
41 unsigned long vcpu_id = kvm_arch_vcpu_id(cs);
42
43 QLIST_FOREACH(enabled_cpu, &kvm_enabled_cpus, node) {
44 if (enabled_cpu->vcpu_id == vcpu_id) {
45 return true;
46 }
47 }
48 return false;
49 }
50
51 static void kvm_cpu_enable(CPUState *cs)
52 {
53 KVMEnabledCPU *enabled_cpu;
54 unsigned long vcpu_id = kvm_arch_vcpu_id(cs);
55
56 enabled_cpu = g_malloc(sizeof(*enabled_cpu));
57 enabled_cpu->vcpu_id = vcpu_id;
58 QLIST_INSERT_HEAD(&kvm_enabled_cpus, enabled_cpu, node);
59 }
60
61 static void kvm_cpu_disable_all(void)
62 {
63 KVMEnabledCPU *enabled_cpu, *next;
64
65 QLIST_FOREACH_SAFE(enabled_cpu, &kvm_enabled_cpus, node, next) {
66 QLIST_REMOVE(enabled_cpu, node);
67 g_free(enabled_cpu);
68 }
69 }
70
71 /*
72 * XIVE Thread Interrupt Management context (KVM)
73 */
74
75 static void kvmppc_xive_cpu_set_state(XiveTCTX *tctx, Error **errp)
76 {
77 uint64_t state[2];
78 int ret;
79
80 /* word0 and word1 of the OS ring. */
81 state[0] = *((uint64_t *) &tctx->regs[TM_QW1_OS]);
82
83 ret = kvm_set_one_reg(tctx->cs, KVM_REG_PPC_VP_STATE, state);
84 if (ret != 0) {
85 error_setg_errno(errp, errno,
86 "XIVE: could not restore KVM state of CPU %ld",
87 kvm_arch_vcpu_id(tctx->cs));
88 }
89 }
90
91 void kvmppc_xive_cpu_get_state(XiveTCTX *tctx, Error **errp)
92 {
93 SpaprXive *xive = SPAPR_MACHINE(qdev_get_machine())->xive;
94 uint64_t state[2] = { 0 };
95 int ret;
96
97 /* The KVM XIVE device is not in use */
98 if (xive->fd == -1) {
99 return;
100 }
101
102 ret = kvm_get_one_reg(tctx->cs, KVM_REG_PPC_VP_STATE, state);
103 if (ret != 0) {
104 error_setg_errno(errp, errno,
105 "XIVE: could not capture KVM state of CPU %ld",
106 kvm_arch_vcpu_id(tctx->cs));
107 return;
108 }
109
110 /* word0 and word1 of the OS ring. */
111 *((uint64_t *) &tctx->regs[TM_QW1_OS]) = state[0];
112 }
113
114 typedef struct {
115 XiveTCTX *tctx;
116 Error *err;
117 } XiveCpuGetState;
118
119 static void kvmppc_xive_cpu_do_synchronize_state(CPUState *cpu,
120 run_on_cpu_data arg)
121 {
122 XiveCpuGetState *s = arg.host_ptr;
123
124 kvmppc_xive_cpu_get_state(s->tctx, &s->err);
125 }
126
127 void kvmppc_xive_cpu_synchronize_state(XiveTCTX *tctx, Error **errp)
128 {
129 XiveCpuGetState s = {
130 .tctx = tctx,
131 .err = NULL,
132 };
133
134 /*
135 * Kick the vCPU to make sure they are available for the KVM ioctl.
136 */
137 run_on_cpu(tctx->cs, kvmppc_xive_cpu_do_synchronize_state,
138 RUN_ON_CPU_HOST_PTR(&s));
139
140 if (s.err) {
141 error_propagate(errp, s.err);
142 return;
143 }
144 }
145
146 void kvmppc_xive_cpu_connect(XiveTCTX *tctx, Error **errp)
147 {
148 SpaprXive *xive = SPAPR_MACHINE(qdev_get_machine())->xive;
149 unsigned long vcpu_id;
150 int ret;
151
152 /* The KVM XIVE device is not in use */
153 if (xive->fd == -1) {
154 return;
155 }
156
157 /* Check if CPU was hot unplugged and replugged. */
158 if (kvm_cpu_is_enabled(tctx->cs)) {
159 return;
160 }
161
162 vcpu_id = kvm_arch_vcpu_id(tctx->cs);
163
164 ret = kvm_vcpu_enable_cap(tctx->cs, KVM_CAP_PPC_IRQ_XIVE, 0, xive->fd,
165 vcpu_id, 0);
166 if (ret < 0) {
167 error_setg(errp, "XIVE: unable to connect CPU%ld to KVM device: %s",
168 vcpu_id, strerror(errno));
169 return;
170 }
171
172 kvm_cpu_enable(tctx->cs);
173 }
174
175 /*
176 * XIVE Interrupt Source (KVM)
177 */
178
179 void kvmppc_xive_set_source_config(SpaprXive *xive, uint32_t lisn, XiveEAS *eas,
180 Error **errp)
181 {
182 uint32_t end_idx;
183 uint32_t end_blk;
184 uint8_t priority;
185 uint32_t server;
186 bool masked;
187 uint32_t eisn;
188 uint64_t kvm_src;
189 Error *local_err = NULL;
190
191 assert(xive_eas_is_valid(eas));
192
193 end_idx = xive_get_field64(EAS_END_INDEX, eas->w);
194 end_blk = xive_get_field64(EAS_END_BLOCK, eas->w);
195 eisn = xive_get_field64(EAS_END_DATA, eas->w);
196 masked = xive_eas_is_masked(eas);
197
198 spapr_xive_end_to_target(end_blk, end_idx, &server, &priority);
199
200 kvm_src = priority << KVM_XIVE_SOURCE_PRIORITY_SHIFT &
201 KVM_XIVE_SOURCE_PRIORITY_MASK;
202 kvm_src |= server << KVM_XIVE_SOURCE_SERVER_SHIFT &
203 KVM_XIVE_SOURCE_SERVER_MASK;
204 kvm_src |= ((uint64_t) masked << KVM_XIVE_SOURCE_MASKED_SHIFT) &
205 KVM_XIVE_SOURCE_MASKED_MASK;
206 kvm_src |= ((uint64_t)eisn << KVM_XIVE_SOURCE_EISN_SHIFT) &
207 KVM_XIVE_SOURCE_EISN_MASK;
208
209 kvm_device_access(xive->fd, KVM_DEV_XIVE_GRP_SOURCE_CONFIG, lisn,
210 &kvm_src, true, &local_err);
211 if (local_err) {
212 error_propagate(errp, local_err);
213 return;
214 }
215 }
216
217 void kvmppc_xive_sync_source(SpaprXive *xive, uint32_t lisn, Error **errp)
218 {
219 kvm_device_access(xive->fd, KVM_DEV_XIVE_GRP_SOURCE_SYNC, lisn,
220 NULL, true, errp);
221 }
222
223 /*
224 * At reset, the interrupt sources are simply created and MASKED. We
225 * only need to inform the KVM XIVE device about their type: LSI or
226 * MSI.
227 */
228 void kvmppc_xive_source_reset_one(XiveSource *xsrc, int srcno, Error **errp)
229 {
230 SpaprXive *xive = SPAPR_XIVE(xsrc->xive);
231 uint64_t state = 0;
232
233 /* The KVM XIVE device is not in use */
234 if (xive->fd == -1) {
235 return;
236 }
237
238 if (xive_source_irq_is_lsi(xsrc, srcno)) {
239 state |= KVM_XIVE_LEVEL_SENSITIVE;
240 if (xsrc->status[srcno] & XIVE_STATUS_ASSERTED) {
241 state |= KVM_XIVE_LEVEL_ASSERTED;
242 }
243 }
244
245 kvm_device_access(xive->fd, KVM_DEV_XIVE_GRP_SOURCE, srcno, &state,
246 true, errp);
247 }
248
249 static void kvmppc_xive_source_reset(XiveSource *xsrc, Error **errp)
250 {
251 int i;
252
253 for (i = 0; i < xsrc->nr_irqs; i++) {
254 Error *local_err = NULL;
255
256 kvmppc_xive_source_reset_one(xsrc, i, &local_err);
257 if (local_err) {
258 error_propagate(errp, local_err);
259 return;
260 }
261 }
262 }
263
264 /*
265 * This is used to perform the magic loads on the ESB pages, described
266 * in xive.h.
267 *
268 * Memory barriers should not be needed for loads (no store for now).
269 */
270 static uint64_t xive_esb_rw(XiveSource *xsrc, int srcno, uint32_t offset,
271 uint64_t data, bool write)
272 {
273 uint64_t *addr = xsrc->esb_mmap + xive_source_esb_mgmt(xsrc, srcno) +
274 offset;
275
276 if (write) {
277 *addr = cpu_to_be64(data);
278 return -1;
279 } else {
280 /* Prevent the compiler from optimizing away the load */
281 volatile uint64_t value = be64_to_cpu(*addr);
282 return value;
283 }
284 }
285
286 static uint8_t xive_esb_read(XiveSource *xsrc, int srcno, uint32_t offset)
287 {
288 return xive_esb_rw(xsrc, srcno, offset, 0, 0) & 0x3;
289 }
290
291 static void xive_esb_trigger(XiveSource *xsrc, int srcno)
292 {
293 uint64_t *addr = xsrc->esb_mmap + xive_source_esb_page(xsrc, srcno);
294
295 *addr = 0x0;
296 }
297
298 uint64_t kvmppc_xive_esb_rw(XiveSource *xsrc, int srcno, uint32_t offset,
299 uint64_t data, bool write)
300 {
301 if (write) {
302 return xive_esb_rw(xsrc, srcno, offset, data, 1);
303 }
304
305 /*
306 * Special Load EOI handling for LSI sources. Q bit is never set
307 * and the interrupt should be re-triggered if the level is still
308 * asserted.
309 */
310 if (xive_source_irq_is_lsi(xsrc, srcno) &&
311 offset == XIVE_ESB_LOAD_EOI) {
312 xive_esb_read(xsrc, srcno, XIVE_ESB_SET_PQ_00);
313 if (xsrc->status[srcno] & XIVE_STATUS_ASSERTED) {
314 xive_esb_trigger(xsrc, srcno);
315 }
316 return 0;
317 } else {
318 return xive_esb_rw(xsrc, srcno, offset, 0, 0);
319 }
320 }
321
322 static void kvmppc_xive_source_get_state(XiveSource *xsrc)
323 {
324 int i;
325
326 for (i = 0; i < xsrc->nr_irqs; i++) {
327 /* Perform a load without side effect to retrieve the PQ bits */
328 uint8_t pq = xive_esb_read(xsrc, i, XIVE_ESB_GET);
329
330 /* and save PQ locally */
331 xive_source_esb_set(xsrc, i, pq);
332 }
333 }
334
335 void kvmppc_xive_source_set_irq(void *opaque, int srcno, int val)
336 {
337 XiveSource *xsrc = opaque;
338 SpaprXive *xive = SPAPR_XIVE(xsrc->xive);
339 struct kvm_irq_level args;
340 int rc;
341
342 /* The KVM XIVE device should be in use */
343 assert(xive->fd != -1);
344
345 args.irq = srcno;
346 if (!xive_source_irq_is_lsi(xsrc, srcno)) {
347 if (!val) {
348 return;
349 }
350 args.level = KVM_INTERRUPT_SET;
351 } else {
352 if (val) {
353 xsrc->status[srcno] |= XIVE_STATUS_ASSERTED;
354 args.level = KVM_INTERRUPT_SET_LEVEL;
355 } else {
356 xsrc->status[srcno] &= ~XIVE_STATUS_ASSERTED;
357 args.level = KVM_INTERRUPT_UNSET;
358 }
359 }
360 rc = kvm_vm_ioctl(kvm_state, KVM_IRQ_LINE, &args);
361 if (rc < 0) {
362 error_report("XIVE: kvm_irq_line() failed : %s", strerror(errno));
363 }
364 }
365
366 /*
367 * sPAPR XIVE interrupt controller (KVM)
368 */
369 void kvmppc_xive_get_queue_config(SpaprXive *xive, uint8_t end_blk,
370 uint32_t end_idx, XiveEND *end,
371 Error **errp)
372 {
373 struct kvm_ppc_xive_eq kvm_eq = { 0 };
374 uint64_t kvm_eq_idx;
375 uint8_t priority;
376 uint32_t server;
377 Error *local_err = NULL;
378
379 assert(xive_end_is_valid(end));
380
381 /* Encode the tuple (server, prio) as a KVM EQ index */
382 spapr_xive_end_to_target(end_blk, end_idx, &server, &priority);
383
384 kvm_eq_idx = priority << KVM_XIVE_EQ_PRIORITY_SHIFT &
385 KVM_XIVE_EQ_PRIORITY_MASK;
386 kvm_eq_idx |= server << KVM_XIVE_EQ_SERVER_SHIFT &
387 KVM_XIVE_EQ_SERVER_MASK;
388
389 kvm_device_access(xive->fd, KVM_DEV_XIVE_GRP_EQ_CONFIG, kvm_eq_idx,
390 &kvm_eq, false, &local_err);
391 if (local_err) {
392 error_propagate(errp, local_err);
393 return;
394 }
395
396 /*
397 * The EQ index and toggle bit are updated by HW. These are the
398 * only fields from KVM we want to update QEMU with. The other END
399 * fields should already be in the QEMU END table.
400 */
401 end->w1 = xive_set_field32(END_W1_GENERATION, 0ul, kvm_eq.qtoggle) |
402 xive_set_field32(END_W1_PAGE_OFF, 0ul, kvm_eq.qindex);
403 }
404
405 void kvmppc_xive_set_queue_config(SpaprXive *xive, uint8_t end_blk,
406 uint32_t end_idx, XiveEND *end,
407 Error **errp)
408 {
409 struct kvm_ppc_xive_eq kvm_eq = { 0 };
410 uint64_t kvm_eq_idx;
411 uint8_t priority;
412 uint32_t server;
413 Error *local_err = NULL;
414
415 /*
416 * Build the KVM state from the local END structure.
417 */
418
419 kvm_eq.flags = 0;
420 if (xive_get_field32(END_W0_UCOND_NOTIFY, end->w0)) {
421 kvm_eq.flags |= KVM_XIVE_EQ_ALWAYS_NOTIFY;
422 }
423
424 /*
425 * If the hcall is disabling the EQ, set the size and page address
426 * to zero. When migrating, only valid ENDs are taken into
427 * account.
428 */
429 if (xive_end_is_valid(end)) {
430 kvm_eq.qshift = xive_get_field32(END_W0_QSIZE, end->w0) + 12;
431 kvm_eq.qaddr = xive_end_qaddr(end);
432 /*
433 * The EQ toggle bit and index should only be relevant when
434 * restoring the EQ state
435 */
436 kvm_eq.qtoggle = xive_get_field32(END_W1_GENERATION, end->w1);
437 kvm_eq.qindex = xive_get_field32(END_W1_PAGE_OFF, end->w1);
438 } else {
439 kvm_eq.qshift = 0;
440 kvm_eq.qaddr = 0;
441 }
442
443 /* Encode the tuple (server, prio) as a KVM EQ index */
444 spapr_xive_end_to_target(end_blk, end_idx, &server, &priority);
445
446 kvm_eq_idx = priority << KVM_XIVE_EQ_PRIORITY_SHIFT &
447 KVM_XIVE_EQ_PRIORITY_MASK;
448 kvm_eq_idx |= server << KVM_XIVE_EQ_SERVER_SHIFT &
449 KVM_XIVE_EQ_SERVER_MASK;
450
451 kvm_device_access(xive->fd, KVM_DEV_XIVE_GRP_EQ_CONFIG, kvm_eq_idx,
452 &kvm_eq, true, &local_err);
453 if (local_err) {
454 error_propagate(errp, local_err);
455 return;
456 }
457 }
458
459 void kvmppc_xive_reset(SpaprXive *xive, Error **errp)
460 {
461 kvm_device_access(xive->fd, KVM_DEV_XIVE_GRP_CTRL, KVM_DEV_XIVE_RESET,
462 NULL, true, errp);
463 }
464
465 static void kvmppc_xive_get_queues(SpaprXive *xive, Error **errp)
466 {
467 Error *local_err = NULL;
468 int i;
469
470 for (i = 0; i < xive->nr_ends; i++) {
471 if (!xive_end_is_valid(&xive->endt[i])) {
472 continue;
473 }
474
475 kvmppc_xive_get_queue_config(xive, SPAPR_XIVE_BLOCK_ID, i,
476 &xive->endt[i], &local_err);
477 if (local_err) {
478 error_propagate(errp, local_err);
479 return;
480 }
481 }
482 }
483
484 /*
485 * The primary goal of the XIVE VM change handler is to mark the EQ
486 * pages dirty when all XIVE event notifications have stopped.
487 *
488 * Whenever the VM is stopped, the VM change handler sets the source
489 * PQs to PENDING to stop the flow of events and to possibly catch a
490 * triggered interrupt occuring while the VM is stopped. The previous
491 * state is saved in anticipation of a migration. The XIVE controller
492 * is then synced through KVM to flush any in-flight event
493 * notification and stabilize the EQs.
494 *
495 * At this stage, we can mark the EQ page dirty and let a migration
496 * sequence transfer the EQ pages to the destination, which is done
497 * just after the stop state.
498 *
499 * The previous configuration of the sources is restored when the VM
500 * runs again. If an interrupt was queued while the VM was stopped,
501 * simply generate a trigger.
502 */
503 static void kvmppc_xive_change_state_handler(void *opaque, int running,
504 RunState state)
505 {
506 SpaprXive *xive = opaque;
507 XiveSource *xsrc = &xive->source;
508 Error *local_err = NULL;
509 int i;
510
511 /*
512 * Restore the sources to their initial state. This is called when
513 * the VM resumes after a stop or a migration.
514 */
515 if (running) {
516 for (i = 0; i < xsrc->nr_irqs; i++) {
517 uint8_t pq = xive_source_esb_get(xsrc, i);
518 uint8_t old_pq;
519
520 old_pq = xive_esb_read(xsrc, i, XIVE_ESB_SET_PQ_00 + (pq << 8));
521
522 /*
523 * An interrupt was queued while the VM was stopped,
524 * generate a trigger.
525 */
526 if (pq == XIVE_ESB_RESET && old_pq == XIVE_ESB_QUEUED) {
527 xive_esb_trigger(xsrc, i);
528 }
529 }
530
531 return;
532 }
533
534 /*
535 * Mask the sources, to stop the flow of event notifications, and
536 * save the PQs locally in the XiveSource object. The XiveSource
537 * state will be collected later on by its vmstate handler if a
538 * migration is in progress.
539 */
540 for (i = 0; i < xsrc->nr_irqs; i++) {
541 uint8_t pq = xive_esb_read(xsrc, i, XIVE_ESB_GET);
542
543 /*
544 * PQ is set to PENDING to possibly catch a triggered
545 * interrupt occuring while the VM is stopped (hotplug event
546 * for instance) .
547 */
548 if (pq != XIVE_ESB_OFF) {
549 pq = xive_esb_read(xsrc, i, XIVE_ESB_SET_PQ_10);
550 }
551 xive_source_esb_set(xsrc, i, pq);
552 }
553
554 /*
555 * Sync the XIVE controller in KVM, to flush in-flight event
556 * notification that should be enqueued in the EQs and mark the
557 * XIVE EQ pages dirty to collect all updates.
558 */
559 kvm_device_access(xive->fd, KVM_DEV_XIVE_GRP_CTRL,
560 KVM_DEV_XIVE_EQ_SYNC, NULL, true, &local_err);
561 if (local_err) {
562 error_report_err(local_err);
563 return;
564 }
565 }
566
567 void kvmppc_xive_synchronize_state(SpaprXive *xive, Error **errp)
568 {
569 /* The KVM XIVE device is not in use */
570 if (xive->fd == -1) {
571 return;
572 }
573
574 /*
575 * When the VM is stopped, the sources are masked and the previous
576 * state is saved in anticipation of a migration. We should not
577 * synchronize the source state in that case else we will override
578 * the saved state.
579 */
580 if (runstate_is_running()) {
581 kvmppc_xive_source_get_state(&xive->source);
582 }
583
584 /* EAT: there is no extra state to query from KVM */
585
586 /* ENDT */
587 kvmppc_xive_get_queues(xive, errp);
588 }
589
590 /*
591 * The SpaprXive 'pre_save' method is called by the vmstate handler of
592 * the SpaprXive model, after the XIVE controller is synced in the VM
593 * change handler.
594 */
595 int kvmppc_xive_pre_save(SpaprXive *xive)
596 {
597 Error *local_err = NULL;
598
599 /* The KVM XIVE device is not in use */
600 if (xive->fd == -1) {
601 return 0;
602 }
603
604 /* EAT: there is no extra state to query from KVM */
605
606 /* ENDT */
607 kvmppc_xive_get_queues(xive, &local_err);
608 if (local_err) {
609 error_report_err(local_err);
610 return -1;
611 }
612
613 return 0;
614 }
615
616 /*
617 * The SpaprXive 'post_load' method is not called by a vmstate
618 * handler. It is called at the sPAPR machine level at the end of the
619 * migration sequence by the sPAPR IRQ backend 'post_load' method,
620 * when all XIVE states have been transferred and loaded.
621 */
622 int kvmppc_xive_post_load(SpaprXive *xive, int version_id)
623 {
624 Error *local_err = NULL;
625 CPUState *cs;
626 int i;
627
628 /* The KVM XIVE device should be in use */
629 assert(xive->fd != -1);
630
631 /* Restore the ENDT first. The targetting depends on it. */
632 for (i = 0; i < xive->nr_ends; i++) {
633 if (!xive_end_is_valid(&xive->endt[i])) {
634 continue;
635 }
636
637 kvmppc_xive_set_queue_config(xive, SPAPR_XIVE_BLOCK_ID, i,
638 &xive->endt[i], &local_err);
639 if (local_err) {
640 error_report_err(local_err);
641 return -1;
642 }
643 }
644
645 /* Restore the EAT */
646 for (i = 0; i < xive->nr_irqs; i++) {
647 if (!xive_eas_is_valid(&xive->eat[i])) {
648 continue;
649 }
650
651 kvmppc_xive_set_source_config(xive, i, &xive->eat[i], &local_err);
652 if (local_err) {
653 error_report_err(local_err);
654 return -1;
655 }
656 }
657
658 /* Restore the thread interrupt contexts */
659 CPU_FOREACH(cs) {
660 PowerPCCPU *cpu = POWERPC_CPU(cs);
661
662 kvmppc_xive_cpu_set_state(spapr_cpu_state(cpu)->tctx, &local_err);
663 if (local_err) {
664 error_report_err(local_err);
665 return -1;
666 }
667 }
668
669 /* The source states will be restored when the machine starts running */
670 return 0;
671 }
672
673 static void *kvmppc_xive_mmap(SpaprXive *xive, int pgoff, size_t len,
674 Error **errp)
675 {
676 void *addr;
677 uint32_t page_shift = 16; /* TODO: fix page_shift */
678
679 addr = mmap(NULL, len, PROT_WRITE | PROT_READ, MAP_SHARED, xive->fd,
680 pgoff << page_shift);
681 if (addr == MAP_FAILED) {
682 error_setg_errno(errp, errno, "XIVE: unable to set memory mapping");
683 return NULL;
684 }
685
686 return addr;
687 }
688
689 /*
690 * All the XIVE memory regions are now backed by mappings from the KVM
691 * XIVE device.
692 */
693 void kvmppc_xive_connect(SpaprXive *xive, Error **errp)
694 {
695 XiveSource *xsrc = &xive->source;
696 Error *local_err = NULL;
697 size_t esb_len = (1ull << xsrc->esb_shift) * xsrc->nr_irqs;
698 size_t tima_len = 4ull << TM_SHIFT;
699 CPUState *cs;
700
701 /*
702 * The KVM XIVE device already in use. This is the case when
703 * rebooting under the XIVE-only interrupt mode.
704 */
705 if (xive->fd != -1) {
706 return;
707 }
708
709 if (!kvmppc_has_cap_xive()) {
710 error_setg(errp, "IRQ_XIVE capability must be present for KVM");
711 return;
712 }
713
714 /* First, create the KVM XIVE device */
715 xive->fd = kvm_create_device(kvm_state, KVM_DEV_TYPE_XIVE, false);
716 if (xive->fd < 0) {
717 error_setg_errno(errp, -xive->fd, "XIVE: error creating KVM device");
718 return;
719 }
720
721 /*
722 * 1. Source ESB pages - KVM mapping
723 */
724 xsrc->esb_mmap = kvmppc_xive_mmap(xive, KVM_XIVE_ESB_PAGE_OFFSET, esb_len,
725 &local_err);
726 if (local_err) {
727 error_propagate(errp, local_err);
728 return;
729 }
730
731 memory_region_init_ram_device_ptr(&xsrc->esb_mmio, OBJECT(xsrc),
732 "xive.esb", esb_len, xsrc->esb_mmap);
733
734 /*
735 * 2. END ESB pages (No KVM support yet)
736 */
737
738 /*
739 * 3. TIMA pages - KVM mapping
740 */
741 xive->tm_mmap = kvmppc_xive_mmap(xive, KVM_XIVE_TIMA_PAGE_OFFSET, tima_len,
742 &local_err);
743 if (local_err) {
744 error_propagate(errp, local_err);
745 return;
746 }
747 memory_region_init_ram_device_ptr(&xive->tm_mmio, OBJECT(xive),
748 "xive.tima", tima_len, xive->tm_mmap);
749
750 xive->change = qemu_add_vm_change_state_handler(
751 kvmppc_xive_change_state_handler, xive);
752
753 /* Connect the presenters to the initial VCPUs of the machine */
754 CPU_FOREACH(cs) {
755 PowerPCCPU *cpu = POWERPC_CPU(cs);
756
757 kvmppc_xive_cpu_connect(spapr_cpu_state(cpu)->tctx, &local_err);
758 if (local_err) {
759 error_propagate(errp, local_err);
760 return;
761 }
762 }
763
764 /* Update the KVM sources */
765 kvmppc_xive_source_reset(xsrc, &local_err);
766 if (local_err) {
767 error_propagate(errp, local_err);
768 return;
769 }
770
771 kvm_kernel_irqchip = true;
772 kvm_msi_via_irqfd_allowed = true;
773 kvm_gsi_direct_mapping = true;
774
775 /* Map all regions */
776 spapr_xive_map_mmio(xive);
777 }
778
779 void kvmppc_xive_disconnect(SpaprXive *xive, Error **errp)
780 {
781 XiveSource *xsrc;
782 size_t esb_len;
783
784 /* The KVM XIVE device is not in use */
785 if (!xive || xive->fd == -1) {
786 return;
787 }
788
789 if (!kvmppc_has_cap_xive()) {
790 error_setg(errp, "IRQ_XIVE capability must be present for KVM");
791 return;
792 }
793
794 /* Clear the KVM mapping */
795 xsrc = &xive->source;
796 esb_len = (1ull << xsrc->esb_shift) * xsrc->nr_irqs;
797
798 sysbus_mmio_unmap(SYS_BUS_DEVICE(xive), 0);
799 munmap(xsrc->esb_mmap, esb_len);
800
801 sysbus_mmio_unmap(SYS_BUS_DEVICE(xive), 1);
802
803 sysbus_mmio_unmap(SYS_BUS_DEVICE(xive), 2);
804 munmap(xive->tm_mmap, 4ull << TM_SHIFT);
805
806 /*
807 * When the KVM device fd is closed, the KVM device is destroyed
808 * and removed from the list of devices of the VM. The VCPU
809 * presenters are also detached from the device.
810 */
811 close(xive->fd);
812 xive->fd = -1;
813
814 kvm_kernel_irqchip = false;
815 kvm_msi_via_irqfd_allowed = false;
816 kvm_gsi_direct_mapping = false;
817
818 /* Clear the local list of presenter (hotplug) */
819 kvm_cpu_disable_all();
820
821 /* VM Change state handler is not needed anymore */
822 qemu_del_vm_change_state_handler(xive->change);
823 }