hw/m68k/virt.c

   1 /*
   2  * SPDX-License-Identifier: GPL-2.0-or-later
   3  *
   4  * QEMU Vitual M68K Machine
   5  *
   6  * (c) 2020 Laurent Vivier <laurent@vivier.eu>
   7  *
   8  */
   9
  10 #include "qemu/osdep.h"
  11 #include "qemu/units.h"
  12 #include "qemu-common.h"
  13 #include "sysemu/sysemu.h"
  14 #include "cpu.h"
  15 #include "hw/boards.h"
  16 #include "hw/qdev-properties.h"
  17 #include "elf.h"
  18 #include "hw/loader.h"
  19 #include "ui/console.h"
  20 #include "hw/sysbus.h"
  21 #include "standard-headers/asm-m68k/bootinfo.h"
  22 #include "standard-headers/asm-m68k/bootinfo-virt.h"
  23 #include "bootinfo.h"
  24 #include "net/net.h"
  25 #include "qapi/error.h"
  26 #include "sysemu/qtest.h"
  27 #include "sysemu/runstate.h"
  28 #include "sysemu/reset.h"
  29
  30 #include "hw/intc/m68k_irqc.h"
  31 #include "hw/misc/virt_ctrl.h"
  32 #include "hw/char/goldfish_tty.h"
  33 #include "hw/rtc/goldfish_rtc.h"
  34 #include "hw/intc/goldfish_pic.h"
  35 #include "hw/virtio/virtio-mmio.h"
  36 #include "hw/virtio/virtio-blk.h"
  37
  38 /*
  39  * 6 goldfish-pic for CPU IRQ #1 to IRQ #6
  40  * CPU IRQ #1 -> PIC #1
  41  *               IRQ #1 to IRQ #31 -> unused
  42  *               IRQ #32 -> goldfish-tty
  43  * CPU IRQ #2 -> PIC #2
  44  *               IRQ #1 to IRQ #32 -> virtio-mmio from 1 to 32
  45  * CPU IRQ #3 -> PIC #3
  46  *               IRQ #1 to IRQ #32 -> virtio-mmio from 33 to 64
  47  * CPU IRQ #4 -> PIC #4
  48  *               IRQ #1 to IRQ #32 -> virtio-mmio from 65 to 96
  49  * CPU IRQ #5 -> PIC #5
  50  *               IRQ #1 to IRQ #32 -> virtio-mmio from 97 to 128
  51  * CPU IRQ #6 -> PIC #6
  52  *               IRQ #1 -> goldfish-rtc
  53  *               IRQ #2 to IRQ #32 -> unused
  54  * CPU IRQ #7 -> NMI
  55  */
  56
  57 #define PIC_IRQ_BASE(num)     (8 + (num - 1) * 32)
  58 #define PIC_IRQ(num, irq)     (PIC_IRQ_BASE(num) + irq - 1)
  59 #define PIC_GPIO(pic_irq)     (qdev_get_gpio_in(pic_dev[(pic_irq - 8) / 32], \
  60                                                 (pic_irq - 8) % 32))
  61
  62 #define VIRT_GF_PIC_MMIO_BASE 0xff000000     /* MMIO: 0xff000000 - 0xff005fff */
  63 #define VIRT_GF_PIC_IRQ_BASE  1              /* IRQ: #1 -> #6 */
  64 #define VIRT_GF_PIC_NB        6
  65
  66 /* 2 goldfish-rtc (and timer) */
  67 #define VIRT_GF_RTC_MMIO_BASE 0xff006000     /* MMIO: 0xff006000 - 0xff007fff */
  68 #define VIRT_GF_RTC_IRQ_BASE  PIC_IRQ(6, 1)  /* PIC: #6, IRQ: #1 */
  69 #define VIRT_GF_RTC_NB        2
  70
  71 /* 1 goldfish-tty */
  72 #define VIRT_GF_TTY_MMIO_BASE 0xff008000     /* MMIO: 0xff008000 - 0xff008fff */
  73 #define VIRT_GF_TTY_IRQ_BASE  PIC_IRQ(1, 32) /* PIC: #1, IRQ: #32 */
  74
  75 /* 1 virt-ctrl */
  76 #define VIRT_CTRL_MMIO_BASE 0xff009000    /* MMIO: 0xff009000 - 0xff009fff */
  77 #define VIRT_CTRL_IRQ_BASE  PIC_IRQ(1, 1) /* PIC: #1, IRQ: #1 */
  78
  79 /*
  80  * virtio-mmio size is 0x200 bytes
  81  * we use 4 goldfish-pic to attach them,
  82  * we can attach 32 virtio devices / goldfish-pic
  83  * -> we can manage 32 * 4 = 128 virtio devices
  84  */
  85 #define VIRT_VIRTIO_MMIO_BASE 0xff010000     /* MMIO: 0xff010000 - 0xff01ffff */
  86 #define VIRT_VIRTIO_IRQ_BASE  PIC_IRQ(2, 1)  /* PIC: 2, 3, 4, 5, IRQ: ALL */
  87
  88 typedef struct {
  89     M68kCPU *cpu;
  90     hwaddr initial_pc;
  91     hwaddr initial_stack;
  92 } ResetInfo;
  93
  94 static void main_cpu_reset(void *opaque)
  95 {
  96     ResetInfo *reset_info = opaque;
  97     M68kCPU *cpu = reset_info->cpu;
  98     CPUState *cs = CPU(cpu);
  99
 100     cpu_reset(cs);
 101     cpu->env.aregs[7] = reset_info->initial_stack;
 102     cpu->env.pc = reset_info->initial_pc;
 103 }
 104
 105 static void virt_init(MachineState *machine)
 106 {
 107     M68kCPU *cpu = NULL;
 108     int32_t kernel_size;
 109     uint64_t elf_entry;
 110     ram_addr_t initrd_base;
 111     int32_t initrd_size;
 112     ram_addr_t ram_size = machine->ram_size;
 113     const char *kernel_filename = machine->kernel_filename;
 114     const char *initrd_filename = machine->initrd_filename;
 115     const char *kernel_cmdline = machine->kernel_cmdline;
 116     hwaddr parameters_base;
 117     DeviceState *dev;
 118     DeviceState *irqc_dev;
 119     DeviceState *pic_dev[VIRT_GF_PIC_NB];
 120     SysBusDevice *sysbus;
 121     hwaddr io_base;
 122     int i;
 123     ResetInfo *reset_info;
 124
 125     if (ram_size > 3399672 * KiB) {
 126         /*
 127          * The physical memory can be up to 4 GiB - 16 MiB, but linux
 128          * kernel crashes after this limit (~ 3.2 GiB)
 129          */
 130         error_report("Too much memory for this machine: %" PRId64 " KiB, "
 131                      "maximum 3399672 KiB", ram_size / KiB);
 132         exit(1);
 133     }
 134
 135     reset_info = g_new0(ResetInfo, 1);
 136
 137     /* init CPUs */
 138     cpu = M68K_CPU(cpu_create(machine->cpu_type));
 139
 140     reset_info->cpu = cpu;
 141     qemu_register_reset(main_cpu_reset, reset_info);
 142
 143     /* RAM */
 144     memory_region_add_subregion(get_system_memory(), 0, machine->ram);
 145
 146     /* IRQ Controller */
 147
 148     irqc_dev = qdev_new(TYPE_M68K_IRQC);
 149     sysbus_realize_and_unref(SYS_BUS_DEVICE(irqc_dev), &error_fatal);
 150
 151     /*
 152      * 6 goldfish-pic
 153      *
 154      * map: 0xff000000 - 0xff006fff = 28 KiB
 155      * IRQ: #1 (lower priority) -> #6 (higher priority)
 156      *
 157      */
 158     io_base = VIRT_GF_PIC_MMIO_BASE;
 159     for (i = 0; i < VIRT_GF_PIC_NB; i++) {
 160         pic_dev[i] = qdev_new(TYPE_GOLDFISH_PIC);
 161         sysbus = SYS_BUS_DEVICE(pic_dev[i]);
 162         qdev_prop_set_uint8(pic_dev[i], "index", i);
 163         sysbus_realize_and_unref(sysbus, &error_fatal);
 164
 165         sysbus_mmio_map(sysbus, 0, io_base);
 166         sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(irqc_dev, i));
 167
 168         io_base += 0x1000;
 169     }
 170
 171     /* goldfish-rtc */
 172     io_base = VIRT_GF_RTC_MMIO_BASE;
 173     for (i = 0; i < VIRT_GF_RTC_NB; i++) {
 174         dev = qdev_new(TYPE_GOLDFISH_RTC);
 175         sysbus = SYS_BUS_DEVICE(dev);
 176         sysbus_realize_and_unref(sysbus, &error_fatal);
 177         sysbus_mmio_map(sysbus, 0, io_base);
 178         sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_GF_RTC_IRQ_BASE + i));
 179
 180         io_base += 0x1000;
 181     }
 182
 183     /* goldfish-tty */
 184     dev = qdev_new(TYPE_GOLDFISH_TTY);
 185     sysbus = SYS_BUS_DEVICE(dev);
 186     qdev_prop_set_chr(dev, "chardev", serial_hd(0));
 187     sysbus_realize_and_unref(sysbus, &error_fatal);
 188     sysbus_mmio_map(sysbus, 0, VIRT_GF_TTY_MMIO_BASE);
 189     sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_GF_TTY_IRQ_BASE));
 190
 191     /* virt controller */
 192     dev = qdev_new(TYPE_VIRT_CTRL);
 193     sysbus = SYS_BUS_DEVICE(dev);
 194     sysbus_realize_and_unref(sysbus, &error_fatal);
 195     sysbus_mmio_map(sysbus, 0, VIRT_CTRL_MMIO_BASE);
 196     sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_CTRL_IRQ_BASE));
 197
 198     /* virtio-mmio */
 199     io_base = VIRT_VIRTIO_MMIO_BASE;
 200     for (i = 0; i < 128; i++) {
 201         dev = qdev_new(TYPE_VIRTIO_MMIO);
 202         qdev_prop_set_bit(dev, "force-legacy", false);
 203         sysbus = SYS_BUS_DEVICE(dev);
 204         sysbus_realize_and_unref(sysbus, &error_fatal);
 205         sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_VIRTIO_IRQ_BASE + i));
 206         sysbus_mmio_map(sysbus, 0, io_base);
 207         io_base += 0x200;
 208     }
 209
 210     if (kernel_filename) {
 211         CPUState *cs = CPU(cpu);
 212         uint64_t high;
 213
 214         kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
 215                                &elf_entry, NULL, &high, NULL, 1,
 216                                EM_68K, 0, 0);
 217         if (kernel_size < 0) {
 218             error_report("could not load kernel '%s'", kernel_filename);
 219             exit(1);
 220         }
 221         reset_info->initial_pc = elf_entry;
 222         parameters_base = (high + 1) & ~1;
 223
 224         BOOTINFO1(cs->as, parameters_base, BI_MACHTYPE, MACH_VIRT);
 225         BOOTINFO1(cs->as, parameters_base, BI_FPUTYPE, FPU_68040);
 226         BOOTINFO1(cs->as, parameters_base, BI_MMUTYPE, MMU_68040);
 227         BOOTINFO1(cs->as, parameters_base, BI_CPUTYPE, CPU_68040);
 228         BOOTINFO2(cs->as, parameters_base, BI_MEMCHUNK, 0, ram_size);
 229
 230         BOOTINFO1(cs->as, parameters_base, BI_VIRT_QEMU_VERSION,
 231                   ((QEMU_VERSION_MAJOR << 24) | (QEMU_VERSION_MINOR << 16) |
 232                    (QEMU_VERSION_MICRO << 8)));
 233         BOOTINFO2(cs->as, parameters_base, BI_VIRT_GF_PIC_BASE,
 234                   VIRT_GF_PIC_MMIO_BASE, VIRT_GF_PIC_IRQ_BASE);
 235         BOOTINFO2(cs->as, parameters_base, BI_VIRT_GF_RTC_BASE,
 236                   VIRT_GF_RTC_MMIO_BASE, VIRT_GF_RTC_IRQ_BASE);
 237         BOOTINFO2(cs->as, parameters_base, BI_VIRT_GF_TTY_BASE,
 238                   VIRT_GF_TTY_MMIO_BASE, VIRT_GF_TTY_IRQ_BASE);
 239         BOOTINFO2(cs->as, parameters_base, BI_VIRT_CTRL_BASE,
 240                   VIRT_CTRL_MMIO_BASE, VIRT_CTRL_IRQ_BASE);
 241         BOOTINFO2(cs->as, parameters_base, BI_VIRT_VIRTIO_BASE,
 242                   VIRT_VIRTIO_MMIO_BASE, VIRT_VIRTIO_IRQ_BASE);
 243
 244         if (kernel_cmdline) {
 245             BOOTINFOSTR(cs->as, parameters_base, BI_COMMAND_LINE,
 246                         kernel_cmdline);
 247         }
 248
 249         /* load initrd */
 250         if (initrd_filename) {
 251             initrd_size = get_image_size(initrd_filename);
 252             if (initrd_size < 0) {
 253                 error_report("could not load initial ram disk '%s'",
 254                              initrd_filename);
 255                 exit(1);
 256             }
 257
 258             initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK;
 259             load_image_targphys(initrd_filename, initrd_base,
 260                                 ram_size - initrd_base);
 261             BOOTINFO2(cs->as, parameters_base, BI_RAMDISK, initrd_base,
 262                       initrd_size);
 263         } else {
 264             initrd_base = 0;
 265             initrd_size = 0;
 266         }
 267         BOOTINFO0(cs->as, parameters_base, BI_LAST);
 268     }
 269 }
 270
 271 static void virt_machine_class_init(ObjectClass *oc, void *data)
 272 {
 273     MachineClass *mc = MACHINE_CLASS(oc);
 274     mc->desc = "QEMU M68K Virtual Machine";
 275     mc->init = virt_init;
 276     mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040");
 277     mc->max_cpus = 1;
 278     mc->no_floppy = 1;
 279     mc->no_parallel = 1;
 280     mc->default_ram_id = "m68k_virt.ram";
 281 }
 282
 283 static const TypeInfo virt_machine_info = {
 284     .name       = MACHINE_TYPE_NAME("virt"),
 285     .parent     = TYPE_MACHINE,
 286     .abstract   = true,
 287     .class_init = virt_machine_class_init,
 288 };
 289
 290 static void virt_machine_register_types(void)
 291 {
 292     type_register_static(&virt_machine_info);
 293 }
 294
 295 type_init(virt_machine_register_types)
 296
 297 #define DEFINE_VIRT_MACHINE(major, minor, latest) \
 298     static void virt_##major##_##minor##_class_init(ObjectClass *oc, \
 299                                                     void *data) \
 300     { \
 301         MachineClass *mc = MACHINE_CLASS(oc); \
 302         virt_machine_##major##_##minor##_options(mc); \
 303         mc->desc = "QEMU " # major "." # minor " M68K Virtual Machine"; \
 304         if (latest) { \
 305             mc->alias = "virt"; \
 306         } \
 307     } \
 308     static const TypeInfo machvirt_##major##_##minor##_info = { \
 309         .name = MACHINE_TYPE_NAME("virt-" # major "." # minor), \
 310         .parent = MACHINE_TYPE_NAME("virt"), \
 311         .class_init = virt_##major##_##minor##_class_init, \
 312     }; \
 313     static void machvirt_machine_##major##_##minor##_init(void) \
 314     { \
 315         type_register_static(&machvirt_##major##_##minor##_info); \
 316     } \
 317     type_init(machvirt_machine_##major##_##minor##_init);
 318
 319 static void virt_machine_7_0_options(MachineClass *mc)
 320 {
 321 }
 322 DEFINE_VIRT_MACHINE(7, 0, true)
 323
 324 static void virt_machine_6_2_options(MachineClass *mc)
 325 {
 326     virt_machine_7_0_options(mc);
 327     compat_props_add(mc->compat_props, hw_compat_6_2, hw_compat_6_2_len);
 328 }
 329 DEFINE_VIRT_MACHINE(6, 2, false)
 330
 331 static void virt_machine_6_1_options(MachineClass *mc)
 332 {
 333     virt_machine_6_2_options(mc);
 334     compat_props_add(mc->compat_props, hw_compat_6_1, hw_compat_6_1_len);
 335 }
 336 DEFINE_VIRT_MACHINE(6, 1, false)
 337
 338 static void virt_machine_6_0_options(MachineClass *mc)
 339 {
 340     virt_machine_6_1_options(mc);
 341     compat_props_add(mc->compat_props, hw_compat_6_0, hw_compat_6_0_len);
 342 }
 343 DEFINE_VIRT_MACHINE(6, 0, false)