hw/mips/mips_fulong2e.c

   1 /*
   2  * QEMU fulong 2e mini pc support
   3  *
   4  * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
   5  * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
   6  * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com)
   7  * This code is licensed under the GNU GPL v2.
   8  *
   9  * Contributions after 2012-01-13 are licensed under the terms of the
  10  * GNU GPL, version 2 or (at your option) any later version.
  11  */
  12
  13 /*
  14  * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
  15  * http://www.linux-mips.org/wiki/Fulong
  16  *
  17  * Loongson 2e user manual:
  18  * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
  19  */
  20
  21 #include "qemu/osdep.h"
  22 #include "qemu/units.h"
  23 #include "qapi/error.h"
  24 #include "hw/hw.h"
  25 #include "hw/i386/pc.h"
  26 #include "hw/dma/i8257.h"
  27 #include "hw/isa/superio.h"
  28 #include "net/net.h"
  29 #include "hw/boards.h"
  30 #include "hw/i2c/smbus.h"
  31 #include "hw/block/flash.h"
  32 #include "hw/mips/mips.h"
  33 #include "hw/mips/cpudevs.h"
  34 #include "hw/pci/pci.h"
  35 #include "audio/audio.h"
  36 #include "qemu/log.h"
  37 #include "hw/loader.h"
  38 #include "hw/mips/bios.h"
  39 #include "hw/ide.h"
  40 #include "elf.h"
  41 #include "hw/isa/vt82c686.h"
  42 #include "hw/timer/mc146818rtc.h"
  43 #include "hw/timer/i8254.h"
  44 #include "exec/address-spaces.h"
  45 #include "sysemu/qtest.h"
  46 #include "qemu/error-report.h"
  47
  48 #define DEBUG_FULONG2E_INIT
  49
  50 #define ENVP_ADDR       0x80002000l
  51 #define ENVP_NB_ENTRIES         16
  52 #define ENVP_ENTRY_SIZE         256
  53
  54 #define MAX_IDE_BUS 2
  55
  56 /*
  57  * PMON is not part of qemu and released with BSD license, anyone
  58  * who want to build a pmon binary please first git-clone the source
  59  * from the git repository at:
  60  * http://www.loongson.cn/support/git/pmon
  61  * Then follow the "Compile Guide" available at:
  62  * http://dev.lemote.com/code/pmon
  63  *
  64  * Notes:
  65  * 1, don't use the source at http://dev.lemote.com/http_git/pmon.git
  66  * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
  67  * in the "Compile Guide".
  68  */
  69 #define FULONG_BIOSNAME "pmon_fulong2e.bin"
  70
  71 /* PCI SLOT in fulong 2e */
  72 #define FULONG2E_VIA_SLOT        5
  73 #define FULONG2E_ATI_SLOT        6
  74 #define FULONG2E_RTL8139_SLOT    7
  75
  76 static struct _loaderparams {
  77     int ram_size;
  78     const char *kernel_filename;
  79     const char *kernel_cmdline;
  80     const char *initrd_filename;
  81 } loaderparams;
  82
  83 static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t* prom_buf, int index,
  84                                         const char *string, ...)
  85 {
  86     va_list ap;
  87     int32_t table_addr;
  88
  89     if (index >= ENVP_NB_ENTRIES)
  90         return;
  91
  92     if (string == NULL) {
  93         prom_buf[index] = 0;
  94         return;
  95     }
  96
  97     table_addr = sizeof(int32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE;
  98     prom_buf[index] = tswap32(ENVP_ADDR + table_addr);
  99
 100     va_start(ap, string);
 101     vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap);
 102     va_end(ap);
 103 }
 104
 105 static int64_t load_kernel (CPUMIPSState *env)
 106 {
 107     int64_t kernel_entry, kernel_low, kernel_high, initrd_size;
 108     int index = 0;
 109     long kernel_size;
 110     ram_addr_t initrd_offset;
 111     uint32_t *prom_buf;
 112     long prom_size;
 113
 114     kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys,
 115                            NULL, (uint64_t *)&kernel_entry,
 116                            (uint64_t *)&kernel_low, (uint64_t *)&kernel_high,
 117                            0, EM_MIPS, 1, 0);
 118     if (kernel_size < 0) {
 119         error_report("could not load kernel '%s': %s",
 120                      loaderparams.kernel_filename,
 121                      load_elf_strerror(kernel_size));
 122         exit(1);
 123     }
 124
 125     /* load initrd */
 126     initrd_size = 0;
 127     initrd_offset = 0;
 128     if (loaderparams.initrd_filename) {
 129         initrd_size = get_image_size (loaderparams.initrd_filename);
 130         if (initrd_size > 0) {
 131             initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
 132             if (initrd_offset + initrd_size > ram_size) {
 133                 error_report("memory too small for initial ram disk '%s'",
 134                              loaderparams.initrd_filename);
 135                 exit(1);
 136             }
 137             initrd_size = load_image_targphys(loaderparams.initrd_filename,
 138                                      initrd_offset, ram_size - initrd_offset);
 139         }
 140         if (initrd_size == (target_ulong) -1) {
 141             error_report("could not load initial ram disk '%s'",
 142                          loaderparams.initrd_filename);
 143             exit(1);
 144         }
 145     }
 146
 147     /* Setup prom parameters. */
 148     prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE);
 149     prom_buf = g_malloc(prom_size);
 150
 151     prom_set(prom_buf, index++, "%s", loaderparams.kernel_filename);
 152     if (initrd_size > 0) {
 153         prom_set(prom_buf, index++, "rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s",
 154                  cpu_mips_phys_to_kseg0(NULL, initrd_offset), initrd_size,
 155                  loaderparams.kernel_cmdline);
 156     } else {
 157         prom_set(prom_buf, index++, "%s", loaderparams.kernel_cmdline);
 158     }
 159
 160     /* Setup minimum environment variables */
 161     prom_set(prom_buf, index++, "busclock=33000000");
 162     prom_set(prom_buf, index++, "cpuclock=100000000");
 163     prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB);
 164     prom_set(prom_buf, index++, "modetty0=38400n8r");
 165     prom_set(prom_buf, index++, NULL);
 166
 167     rom_add_blob_fixed("prom", prom_buf, prom_size,
 168                        cpu_mips_kseg0_to_phys(NULL, ENVP_ADDR));
 169
 170     g_free(prom_buf);
 171     return kernel_entry;
 172 }
 173
 174 static void write_bootloader (CPUMIPSState *env, uint8_t *base, int64_t kernel_addr)
 175 {
 176     uint32_t *p;
 177
 178     /* Small bootloader */
 179     p = (uint32_t *) base;
 180
 181     stl_p(p++, 0x0bf00010);                                      /* j 0x1fc00040 */
 182     stl_p(p++, 0x00000000);                                      /* nop */
 183
 184     /* Second part of the bootloader */
 185     p = (uint32_t *) (base + 0x040);
 186
 187     stl_p(p++, 0x3c040000);                                      /* lui a0, 0 */
 188     stl_p(p++, 0x34840002);                                      /* ori a0, a0, 2 */
 189     stl_p(p++, 0x3c050000 | ((ENVP_ADDR >> 16) & 0xffff));       /* lui a1, high(ENVP_ADDR) */
 190     stl_p(p++, 0x34a50000 | (ENVP_ADDR & 0xffff));               /* ori a1, a0, low(ENVP_ADDR) */
 191     stl_p(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff)); /* lui a2, high(ENVP_ADDR + 8) */
 192     stl_p(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff));         /* ori a2, a2, low(ENVP_ADDR + 8) */
 193     stl_p(p++, 0x3c070000 | (loaderparams.ram_size >> 16));      /* lui a3, high(env->ram_size) */
 194     stl_p(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff));   /* ori a3, a3, low(env->ram_size) */
 195     stl_p(p++, 0x3c1f0000 | ((kernel_addr >> 16) & 0xffff));     /* lui ra, high(kernel_addr) */;
 196     stl_p(p++, 0x37ff0000 | (kernel_addr & 0xffff));             /* ori ra, ra, low(kernel_addr) */
 197     stl_p(p++, 0x03e00008);                                      /* jr ra */
 198     stl_p(p++, 0x00000000);                                      /* nop */
 199 }
 200
 201
 202 static void main_cpu_reset(void *opaque)
 203 {
 204     MIPSCPU *cpu = opaque;
 205     CPUMIPSState *env = &cpu->env;
 206
 207     cpu_reset(CPU(cpu));
 208     /* TODO: 2E reset stuff */
 209     if (loaderparams.kernel_filename) {
 210         env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
 211     }
 212 }
 213
 214 static const uint8_t eeprom_spd[0x80] = {
 215     0x80,0x08,0x07,0x0d,0x09,0x02,0x40,0x00,0x04,0x70,
 216     0x70,0x00,0x82,0x10,0x00,0x01,0x0e,0x04,0x0c,0x01,
 217     0x02,0x20,0x80,0x75,0x70,0x00,0x00,0x50,0x3c,0x50,
 218     0x2d,0x20,0xb0,0xb0,0x50,0x50,0x00,0x00,0x00,0x00,
 219     0x00,0x41,0x48,0x3c,0x32,0x75,0x00,0x00,0x00,0x00,
 220     0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 221     0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 222     0x00,0x00,0x00,0x9c,0x7b,0x07,0x00,0x00,0x00,0x00,
 223     0x00,0x00,0x00,0x00,0x48,0x42,0x35,0x34,0x41,0x32,
 224     0x35,0x36,0x38,0x4b,0x4e,0x2d,0x41,0x37,0x35,0x42,
 225     0x20,0x30,0x20
 226 };
 227
 228 static void vt82c686b_southbridge_init(PCIBus *pci_bus, int slot, qemu_irq intc,
 229                                        I2CBus **i2c_bus, ISABus **p_isa_bus)
 230 {
 231     qemu_irq *i8259;
 232     ISABus *isa_bus;
 233     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 234
 235     isa_bus = vt82c686b_isa_init(pci_bus, PCI_DEVFN(slot, 0));
 236     if (!isa_bus) {
 237         fprintf(stderr, "vt82c686b_init error\n");
 238         exit(1);
 239     }
 240     *p_isa_bus = isa_bus;
 241     /* Interrupt controller */
 242     /* The 8259 -> IP5  */
 243     i8259 = i8259_init(isa_bus, intc);
 244     isa_bus_irqs(isa_bus, i8259);
 245     /* init other devices */
 246     i8254_pit_init(isa_bus, 0x40, 0, NULL);
 247     i8257_dma_init(isa_bus, 0);
 248     /* Super I/O */
 249     isa_create_simple(isa_bus, TYPE_VT82C686B_SUPERIO);
 250
 251     ide_drive_get(hd, ARRAY_SIZE(hd));
 252     via_ide_init(pci_bus, hd, PCI_DEVFN(slot, 1));
 253
 254     pci_create_simple(pci_bus, PCI_DEVFN(slot, 2), "vt82c686b-usb-uhci");
 255     pci_create_simple(pci_bus, PCI_DEVFN(slot, 3), "vt82c686b-usb-uhci");
 256
 257     *i2c_bus = vt82c686b_pm_init(pci_bus, PCI_DEVFN(slot, 4), 0xeee1, NULL);
 258
 259     /* Audio support */
 260     vt82c686b_ac97_init(pci_bus, PCI_DEVFN(slot, 5));
 261     vt82c686b_mc97_init(pci_bus, PCI_DEVFN(slot, 6));
 262 }
 263
 264 /* Network support */
 265 static void network_init (PCIBus *pci_bus)
 266 {
 267     int i;
 268
 269     for(i = 0; i < nb_nics; i++) {
 270         NICInfo *nd = &nd_table[i];
 271         const char *default_devaddr = NULL;
 272
 273         if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) {
 274             /* The fulong board has a RTL8139 card using PCI SLOT 7 */
 275             default_devaddr = "07";
 276         }
 277
 278         pci_nic_init_nofail(nd, pci_bus, "rtl8139", default_devaddr);
 279     }
 280 }
 281
 282 static void mips_fulong2e_init(MachineState *machine)
 283 {
 284     ram_addr_t ram_size = machine->ram_size;
 285     const char *kernel_filename = machine->kernel_filename;
 286     const char *kernel_cmdline = machine->kernel_cmdline;
 287     const char *initrd_filename = machine->initrd_filename;
 288     char *filename;
 289     MemoryRegion *address_space_mem = get_system_memory();
 290     MemoryRegion *ram = g_new(MemoryRegion, 1);
 291     MemoryRegion *bios = g_new(MemoryRegion, 1);
 292     long bios_size;
 293     int64_t kernel_entry;
 294     PCIBus *pci_bus;
 295     ISABus *isa_bus;
 296     I2CBus *smbus;
 297     MIPSCPU *cpu;
 298     CPUMIPSState *env;
 299
 300     /* init CPUs */
 301     cpu = MIPS_CPU(cpu_create(machine->cpu_type));
 302     env = &cpu->env;
 303
 304     qemu_register_reset(main_cpu_reset, cpu);
 305
 306     /* fulong 2e has 256M ram. */
 307     ram_size = 256 * MiB;
 308
 309     /* fulong 2e has a 1M flash.Winbond W39L040AP70Z */
 310     bios_size = 1 * MiB;
 311
 312     /* allocate RAM */
 313     memory_region_allocate_system_memory(ram, NULL, "fulong2e.ram", ram_size);
 314     memory_region_init_ram(bios, NULL, "fulong2e.bios", bios_size,
 315                            &error_fatal);
 316     memory_region_set_readonly(bios, true);
 317
 318     memory_region_add_subregion(address_space_mem, 0, ram);
 319     memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
 320
 321     /* We do not support flash operation, just loading pmon.bin as raw BIOS.
 322      * Please use -L to set the BIOS path and -bios to set bios name. */
 323
 324     if (kernel_filename) {
 325         loaderparams.ram_size = ram_size;
 326         loaderparams.kernel_filename = kernel_filename;
 327         loaderparams.kernel_cmdline = kernel_cmdline;
 328         loaderparams.initrd_filename = initrd_filename;
 329         kernel_entry = load_kernel (env);
 330         write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
 331     } else {
 332         if (bios_name == NULL) {
 333                 bios_name = FULONG_BIOSNAME;
 334         }
 335         filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 336         if (filename) {
 337             bios_size = load_image_targphys(filename, 0x1fc00000LL,
 338                                             BIOS_SIZE);
 339             g_free(filename);
 340         } else {
 341             bios_size = -1;
 342         }
 343
 344         if ((bios_size < 0 || bios_size > BIOS_SIZE) &&
 345             !kernel_filename && !qtest_enabled()) {
 346             error_report("Could not load MIPS bios '%s'", bios_name);
 347             exit(1);
 348         }
 349     }
 350
 351     /* Init internal devices */
 352     cpu_mips_irq_init_cpu(cpu);
 353     cpu_mips_clock_init(cpu);
 354
 355     /* North bridge, Bonito --> IP2 */
 356     pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
 357
 358     /* South bridge -> IP5 */
 359     vt82c686b_southbridge_init(pci_bus, FULONG2E_VIA_SLOT, env->irq[5],
 360                                &smbus, &isa_bus);
 361
 362     /* TODO: Populate SPD eeprom data.  */
 363     smbus_eeprom_init(smbus, 1, eeprom_spd, sizeof(eeprom_spd));
 364
 365     mc146818_rtc_init(isa_bus, 2000, NULL);
 366
 367     /* Network card: RTL8139D */
 368     network_init(pci_bus);
 369 }
 370
 371 static void mips_fulong2e_machine_init(MachineClass *mc)
 372 {
 373     mc->desc = "Fulong 2e mini pc";
 374     mc->init = mips_fulong2e_init;
 375     mc->block_default_type = IF_IDE;
 376     mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E");
 377 }
 378
 379 DEFINE_MACHINE("fulong2e", mips_fulong2e_machine_init)