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1 /*
2 * QEMU/MIPS pseudo-board
3 *
4 * emulates a simple machine with ISA-like bus.
5 * ISA IO space mapped to the 0x14000000 (PHYS) and
6 * ISA memory at the 0x10000000 (PHYS, 16Mb in size).
7 * All peripherial devices are attached to this "bus" with
8 * the standard PC ISA addresses.
9 */
10 #include "qemu/osdep.h"
11 #include "qapi/error.h"
12 #include "qemu-common.h"
13 #include "cpu.h"
14 #include "hw/hw.h"
15 #include "hw/mips/mips.h"
16 #include "hw/mips/cpudevs.h"
17 #include "hw/i386/pc.h"
18 #include "hw/char/serial.h"
19 #include "hw/isa/isa.h"
20 #include "net/net.h"
21 #include "sysemu/sysemu.h"
22 #include "hw/boards.h"
23 #include "hw/block/flash.h"
24 #include "qemu/log.h"
25 #include "hw/mips/bios.h"
26 #include "hw/ide.h"
27 #include "hw/loader.h"
28 #include "elf.h"
29 #include "hw/timer/mc146818rtc.h"
30 #include "hw/timer/i8254.h"
31 #include "sysemu/block-backend.h"
32 #include "exec/address-spaces.h"
33 #include "sysemu/qtest.h"
34 #include "qemu/error-report.h"
35
36 #define MAX_IDE_BUS 2
37
38 static const int ide_iobase[2] = { 0x1f0, 0x170 };
39 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
40 static const int ide_irq[2] = { 14, 15 };
41
42 static ISADevice *pit; /* PIT i8254 */
43
44 /* i8254 PIT is attached to the IRQ0 at PIC i8259 */
45
46 static struct _loaderparams {
47 int ram_size;
48 const char *kernel_filename;
49 const char *kernel_cmdline;
50 const char *initrd_filename;
51 } loaderparams;
52
53 static void mips_qemu_write (void *opaque, hwaddr addr,
54 uint64_t val, unsigned size)
55 {
56 if ((addr & 0xffff) == 0 && val == 42)
57 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
58 else if ((addr & 0xffff) == 4 && val == 42)
59 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
60 }
61
62 static uint64_t mips_qemu_read (void *opaque, hwaddr addr,
63 unsigned size)
64 {
65 return 0;
66 }
67
68 static const MemoryRegionOps mips_qemu_ops = {
69 .read = mips_qemu_read,
70 .write = mips_qemu_write,
71 .endianness = DEVICE_NATIVE_ENDIAN,
72 };
73
74 typedef struct ResetData {
75 MIPSCPU *cpu;
76 uint64_t vector;
77 } ResetData;
78
79 static int64_t load_kernel(void)
80 {
81 int64_t entry, kernel_high;
82 long kernel_size, initrd_size, params_size;
83 ram_addr_t initrd_offset;
84 uint32_t *params_buf;
85 int big_endian;
86
87 #ifdef TARGET_WORDS_BIGENDIAN
88 big_endian = 1;
89 #else
90 big_endian = 0;
91 #endif
92 kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys,
93 NULL, (uint64_t *)&entry, NULL,
94 (uint64_t *)&kernel_high, big_endian,
95 EM_MIPS, 1, 0);
96 if (kernel_size >= 0) {
97 if ((entry & ~0x7fffffffULL) == 0x80000000)
98 entry = (int32_t)entry;
99 } else {
100 error_report("qemu: could not load kernel '%s': %s",
101 loaderparams.kernel_filename,
102 load_elf_strerror(kernel_size));
103 exit(1);
104 }
105
106 /* load initrd */
107 initrd_size = 0;
108 initrd_offset = 0;
109 if (loaderparams.initrd_filename) {
110 initrd_size = get_image_size (loaderparams.initrd_filename);
111 if (initrd_size > 0) {
112 initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
113 if (initrd_offset + initrd_size > ram_size) {
114 fprintf(stderr,
115 "qemu: memory too small for initial ram disk '%s'\n",
116 loaderparams.initrd_filename);
117 exit(1);
118 }
119 initrd_size = load_image_targphys(loaderparams.initrd_filename,
120 initrd_offset,
121 ram_size - initrd_offset);
122 }
123 if (initrd_size == (target_ulong) -1) {
124 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
125 loaderparams.initrd_filename);
126 exit(1);
127 }
128 }
129
130 /* Store command line. */
131 params_size = 264;
132 params_buf = g_malloc(params_size);
133
134 params_buf[0] = tswap32(ram_size);
135 params_buf[1] = tswap32(0x12345678);
136
137 if (initrd_size > 0) {
138 snprintf((char *)params_buf + 8, 256, "rd_start=0x%" PRIx64 " rd_size=%li %s",
139 cpu_mips_phys_to_kseg0(NULL, initrd_offset),
140 initrd_size, loaderparams.kernel_cmdline);
141 } else {
142 snprintf((char *)params_buf + 8, 256, "%s", loaderparams.kernel_cmdline);
143 }
144
145 rom_add_blob_fixed("params", params_buf, params_size,
146 (16 << 20) - 264);
147
148 g_free(params_buf);
149 return entry;
150 }
151
152 static void main_cpu_reset(void *opaque)
153 {
154 ResetData *s = (ResetData *)opaque;
155 CPUMIPSState *env = &s->cpu->env;
156
157 cpu_reset(CPU(s->cpu));
158 env->active_tc.PC = s->vector;
159 }
160
161 static const int sector_len = 32 * 1024;
162 static
163 void mips_r4k_init(MachineState *machine)
164 {
165 ram_addr_t ram_size = machine->ram_size;
166 const char *cpu_model = machine->cpu_model;
167 const char *kernel_filename = machine->kernel_filename;
168 const char *kernel_cmdline = machine->kernel_cmdline;
169 const char *initrd_filename = machine->initrd_filename;
170 char *filename;
171 MemoryRegion *address_space_mem = get_system_memory();
172 MemoryRegion *ram = g_new(MemoryRegion, 1);
173 MemoryRegion *bios;
174 MemoryRegion *iomem = g_new(MemoryRegion, 1);
175 MemoryRegion *isa_io = g_new(MemoryRegion, 1);
176 MemoryRegion *isa_mem = g_new(MemoryRegion, 1);
177 int bios_size;
178 MIPSCPU *cpu;
179 CPUMIPSState *env;
180 ResetData *reset_info;
181 int i;
182 qemu_irq *i8259;
183 ISABus *isa_bus;
184 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
185 DriveInfo *dinfo;
186 int be;
187
188 /* init CPUs */
189 if (cpu_model == NULL) {
190 #ifdef TARGET_MIPS64
191 cpu_model = "R4000";
192 #else
193 cpu_model = "24Kf";
194 #endif
195 }
196 cpu = cpu_mips_init(cpu_model);
197 if (cpu == NULL) {
198 fprintf(stderr, "Unable to find CPU definition\n");
199 exit(1);
200 }
201 env = &cpu->env;
202
203 reset_info = g_malloc0(sizeof(ResetData));
204 reset_info->cpu = cpu;
205 reset_info->vector = env->active_tc.PC;
206 qemu_register_reset(main_cpu_reset, reset_info);
207
208 /* allocate RAM */
209 if (ram_size > (256 << 20)) {
210 fprintf(stderr,
211 "qemu: Too much memory for this machine: %d MB, maximum 256 MB\n",
212 ((unsigned int)ram_size / (1 << 20)));
213 exit(1);
214 }
215 memory_region_allocate_system_memory(ram, NULL, "mips_r4k.ram", ram_size);
216
217 memory_region_add_subregion(address_space_mem, 0, ram);
218
219 memory_region_init_io(iomem, NULL, &mips_qemu_ops, NULL, "mips-qemu", 0x10000);
220 memory_region_add_subregion(address_space_mem, 0x1fbf0000, iomem);
221
222 /* Try to load a BIOS image. If this fails, we continue regardless,
223 but initialize the hardware ourselves. When a kernel gets
224 preloaded we also initialize the hardware, since the BIOS wasn't
225 run. */
226 if (bios_name == NULL)
227 bios_name = BIOS_FILENAME;
228 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
229 if (filename) {
230 bios_size = get_image_size(filename);
231 } else {
232 bios_size = -1;
233 }
234 #ifdef TARGET_WORDS_BIGENDIAN
235 be = 1;
236 #else
237 be = 0;
238 #endif
239 if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
240 bios = g_new(MemoryRegion, 1);
241 memory_region_init_ram(bios, NULL, "mips_r4k.bios", BIOS_SIZE,
242 &error_fatal);
243 memory_region_set_readonly(bios, true);
244 memory_region_add_subregion(get_system_memory(), 0x1fc00000, bios);
245
246 load_image_targphys(filename, 0x1fc00000, BIOS_SIZE);
247 } else if ((dinfo = drive_get(IF_PFLASH, 0, 0)) != NULL) {
248 uint32_t mips_rom = 0x00400000;
249 if (!pflash_cfi01_register(0x1fc00000, NULL, "mips_r4k.bios", mips_rom,
250 blk_by_legacy_dinfo(dinfo),
251 sector_len, mips_rom / sector_len,
252 4, 0, 0, 0, 0, be)) {
253 fprintf(stderr, "qemu: Error registering flash memory.\n");
254 }
255 } else if (!qtest_enabled()) {
256 /* not fatal */
257 fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",
258 bios_name);
259 }
260 g_free(filename);
261
262 if (kernel_filename) {
263 loaderparams.ram_size = ram_size;
264 loaderparams.kernel_filename = kernel_filename;
265 loaderparams.kernel_cmdline = kernel_cmdline;
266 loaderparams.initrd_filename = initrd_filename;
267 reset_info->vector = load_kernel();
268 }
269
270 /* Init CPU internal devices */
271 cpu_mips_irq_init_cpu(cpu);
272 cpu_mips_clock_init(cpu);
273
274 /* ISA bus: IO space at 0x14000000, mem space at 0x10000000 */
275 memory_region_init_alias(isa_io, NULL, "isa-io",
276 get_system_io(), 0, 0x00010000);
277 memory_region_init(isa_mem, NULL, "isa-mem", 0x01000000);
278 memory_region_add_subregion(get_system_memory(), 0x14000000, isa_io);
279 memory_region_add_subregion(get_system_memory(), 0x10000000, isa_mem);
280 isa_bus = isa_bus_new(NULL, isa_mem, get_system_io(), &error_abort);
281
282 /* The PIC is attached to the MIPS CPU INT0 pin */
283 i8259 = i8259_init(isa_bus, env->irq[2]);
284 isa_bus_irqs(isa_bus, i8259);
285
286 rtc_init(isa_bus, 2000, NULL);
287
288 pit = pit_init(isa_bus, 0x40, 0, NULL);
289
290 serial_hds_isa_init(isa_bus, 0, MAX_SERIAL_PORTS);
291
292 isa_vga_init(isa_bus);
293
294 if (nd_table[0].used)
295 isa_ne2000_init(isa_bus, 0x300, 9, &nd_table[0]);
296
297 ide_drive_get(hd, ARRAY_SIZE(hd));
298 for(i = 0; i < MAX_IDE_BUS; i++)
299 isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], ide_irq[i],
300 hd[MAX_IDE_DEVS * i],
301 hd[MAX_IDE_DEVS * i + 1]);
302
303 isa_create_simple(isa_bus, "i8042");
304 }
305
306 static void mips_machine_init(MachineClass *mc)
307 {
308 mc->desc = "mips r4k platform";
309 mc->init = mips_r4k_init;
310 mc->block_default_type = IF_IDE;
311 }
312
313 DEFINE_MACHINE("mips", mips_machine_init)