hw/pc.h

   1 #ifndef HW_PC_H
   2 #define HW_PC_H
   3
   4 #include "qemu-common.h"
   5 #include "memory.h"
   6 #include "ioport.h"
   7 #include "isa.h"
   8 #include "fdc.h"
   9 #include "net.h"
  10 #include "memory.h"
  11 #include "ioapic.h"
  12
  13 /* PC-style peripherals (also used by other machines).  */
  14
  15 /* parallel.c */
  16 static inline bool parallel_init(ISABus *bus, int index, CharDriverState *chr)
  17 {
  18     ISADevice *dev;
  19
  20     dev = isa_try_create(bus, "isa-parallel");
  21     if (!dev) {
  22         return false;
  23     }
  24     qdev_prop_set_uint32(&dev->qdev, "index", index);
  25     qdev_prop_set_chr(&dev->qdev, "chardev", chr);
  26     if (qdev_init(&dev->qdev) < 0) {
  27         return false;
  28     }
  29     return true;
  30 }
  31
  32 bool parallel_mm_init(MemoryRegion *address_space,
  33                       target_phys_addr_t base, int it_shift, qemu_irq irq,
  34                       CharDriverState *chr);
  35
  36 /* i8259.c */
  37
  38 extern DeviceState *isa_pic;
  39 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
  40 qemu_irq *kvm_i8259_init(ISABus *bus);
  41 int pic_read_irq(DeviceState *d);
  42 int pic_get_output(DeviceState *d);
  43 void pic_info(Monitor *mon);
  44 void irq_info(Monitor *mon);
  45
  46 /* Global System Interrupts */
  47
  48 #define GSI_NUM_PINS IOAPIC_NUM_PINS
  49
  50 typedef struct GSIState {
  51     qemu_irq i8259_irq[ISA_NUM_IRQS];
  52     qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
  53 } GSIState;
  54
  55 void gsi_handler(void *opaque, int n, int level);
  56
  57 /* vmport.c */
  58 static inline void vmport_init(ISABus *bus)
  59 {
  60     isa_create_simple(bus, "vmport");
  61 }
  62 void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque);
  63 void vmmouse_get_data(uint32_t *data);
  64 void vmmouse_set_data(const uint32_t *data);
  65
  66 /* pckbd.c */
  67
  68 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
  69 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
  70                    MemoryRegion *region, ram_addr_t size,
  71                    target_phys_addr_t mask);
  72 void i8042_isa_mouse_fake_event(void *opaque);
  73 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
  74
  75 /* pc.c */
  76 extern int fd_bootchk;
  77
  78 void pc_register_ferr_irq(qemu_irq irq);
  79 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
  80
  81 void pc_cpus_init(const char *cpu_model);
  82 void *pc_memory_init(MemoryRegion *system_memory,
  83                     const char *kernel_filename,
  84                     const char *kernel_cmdline,
  85                     const char *initrd_filename,
  86                     ram_addr_t below_4g_mem_size,
  87                     ram_addr_t above_4g_mem_size,
  88                     MemoryRegion *rom_memory,
  89                     MemoryRegion **ram_memory);
  90 qemu_irq *pc_allocate_cpu_irq(void);
  91 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
  92 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
  93                           ISADevice **rtc_state,
  94                           ISADevice **floppy,
  95                           bool no_vmport);
  96 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
  97 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
  98                   const char *boot_device,
  99                   ISADevice *floppy, BusState *ide0, BusState *ide1,
 100                   ISADevice *s);
 101 void pc_pci_device_init(PCIBus *pci_bus);
 102
 103 typedef void (*cpu_set_smm_t)(int smm, void *arg);
 104 void cpu_smm_register(cpu_set_smm_t callback, void *arg);
 105
 106 /* acpi.c */
 107 extern int acpi_enabled;
 108 extern char *acpi_tables;
 109 extern size_t acpi_tables_len;
 110
 111 void acpi_bios_init(void);
 112 int acpi_table_add(const char *table_desc);
 113
 114 /* acpi_piix.c */
 115
 116 i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
 117                        qemu_irq sci_irq, qemu_irq smi_irq,
 118                        int kvm_enabled, void *fw_cfg);
 119 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
 120
 121 /* hpet.c */
 122 extern int no_hpet;
 123
 124 /* piix_pci.c */
 125 struct PCII440FXState;
 126 typedef struct PCII440FXState PCII440FXState;
 127
 128 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
 129                     ISABus **isa_bus, qemu_irq *pic,
 130                     MemoryRegion *address_space_mem,
 131                     MemoryRegion *address_space_io,
 132                     ram_addr_t ram_size,
 133                     target_phys_addr_t pci_hole_start,
 134                     target_phys_addr_t pci_hole_size,
 135                     target_phys_addr_t pci_hole64_start,
 136                     target_phys_addr_t pci_hole64_size,
 137                     MemoryRegion *pci_memory,
 138                     MemoryRegion *ram_memory);
 139
 140 /* piix4.c */
 141 extern PCIDevice *piix4_dev;
 142 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn);
 143
 144 /* vga.c */
 145 enum vga_retrace_method {
 146     VGA_RETRACE_DUMB,
 147     VGA_RETRACE_PRECISE
 148 };
 149
 150 extern enum vga_retrace_method vga_retrace_method;
 151
 152 int isa_vga_mm_init(target_phys_addr_t vram_base,
 153                     target_phys_addr_t ctrl_base, int it_shift,
 154                     MemoryRegion *address_space);
 155
 156 /* ne2000.c */
 157 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd)
 158 {
 159     ISADevice *dev;
 160
 161     qemu_check_nic_model(nd, "ne2k_isa");
 162
 163     dev = isa_try_create(bus, "ne2k_isa");
 164     if (!dev) {
 165         return false;
 166     }
 167     qdev_prop_set_uint32(&dev->qdev, "iobase", base);
 168     qdev_prop_set_uint32(&dev->qdev, "irq",    irq);
 169     qdev_set_nic_properties(&dev->qdev, nd);
 170     qdev_init_nofail(&dev->qdev);
 171     return true;
 172 }
 173
 174 /* pc_sysfw.c */
 175 void pc_system_firmware_init(MemoryRegion *rom_memory);
 176
 177 /* e820 types */
 178 #define E820_RAM        1
 179 #define E820_RESERVED   2
 180 #define E820_ACPI       3
 181 #define E820_NVS        4
 182 #define E820_UNUSABLE   5
 183
 184 int e820_add_entry(uint64_t, uint64_t, uint32_t);
 185
 186 #endif