]> git.proxmox.com Git - mirror_qemu.git/blob - include/hw/i386/pc.h
compat: replace PC_COMPAT_2_3 & HW_COMPAT_2_3 macros
[mirror_qemu.git] / include / hw / i386 / pc.h
1 #ifndef HW_PC_H
2 #define HW_PC_H
3
4 #include "qemu-common.h"
5 #include "exec/memory.h"
6 #include "hw/boards.h"
7 #include "hw/isa/isa.h"
8 #include "hw/block/fdc.h"
9 #include "net/net.h"
10 #include "hw/i386/ioapic.h"
11
12 #include "qemu/range.h"
13 #include "qemu/bitmap.h"
14 #include "sysemu/sysemu.h"
15 #include "hw/pci/pci.h"
16 #include "hw/compat.h"
17 #include "hw/mem/pc-dimm.h"
18 #include "hw/mem/nvdimm.h"
19 #include "hw/acpi/acpi_dev_interface.h"
20
21 #define HPET_INTCAP "hpet-intcap"
22
23 /**
24 * PCMachineState:
25 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
26 * @boot_cpus: number of present VCPUs
27 */
28 struct PCMachineState {
29 /*< private >*/
30 MachineState parent_obj;
31
32 /* <public> */
33
34 /* State for other subsystems/APIs: */
35 Notifier machine_done;
36
37 /* Pointers to devices and objects: */
38 HotplugHandler *acpi_dev;
39 ISADevice *rtc;
40 PCIBus *bus;
41 FWCfgState *fw_cfg;
42 qemu_irq *gsi;
43
44 /* Configuration options: */
45 uint64_t max_ram_below_4g;
46 OnOffAuto vmport;
47 OnOffAuto smm;
48
49 AcpiNVDIMMState acpi_nvdimm_state;
50
51 bool acpi_build_enabled;
52 bool smbus_enabled;
53 bool sata_enabled;
54 bool pit_enabled;
55
56 /* RAM information (sizes, addresses, configuration): */
57 ram_addr_t below_4g_mem_size, above_4g_mem_size;
58
59 /* CPU and apic information: */
60 bool apic_xrupt_override;
61 unsigned apic_id_limit;
62 uint16_t boot_cpus;
63
64 /* NUMA information: */
65 uint64_t numa_nodes;
66 uint64_t *node_mem;
67
68 /* Address space used by IOAPIC device. All IOAPIC interrupts
69 * will be translated to MSI messages in the address space. */
70 AddressSpace *ioapic_as;
71 };
72
73 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
74 #define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size"
75 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g"
76 #define PC_MACHINE_VMPORT "vmport"
77 #define PC_MACHINE_SMM "smm"
78 #define PC_MACHINE_NVDIMM "nvdimm"
79 #define PC_MACHINE_NVDIMM_PERSIST "nvdimm-persistence"
80 #define PC_MACHINE_SMBUS "smbus"
81 #define PC_MACHINE_SATA "sata"
82 #define PC_MACHINE_PIT "pit"
83
84 /**
85 * PCMachineClass:
86 *
87 * Compat fields:
88 *
89 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by
90 * backend's alignment value if provided
91 * @acpi_data_size: Size of the chunk of memory at the top of RAM
92 * for the BIOS ACPI tables and other BIOS
93 * datastructures.
94 * @gigabyte_align: Make sure that guest addresses aligned at
95 * 1Gbyte boundaries get mapped to host
96 * addresses aligned at 1Gbyte boundaries. This
97 * way we can use 1GByte pages in the host.
98 *
99 */
100 struct PCMachineClass {
101 /*< private >*/
102 MachineClass parent_class;
103
104 /*< public >*/
105
106 /* Device configuration: */
107 bool pci_enabled;
108 bool kvmclock_enabled;
109 const char *default_nic_model;
110
111 /* Compat options: */
112
113 /* ACPI compat: */
114 bool has_acpi_build;
115 bool rsdp_in_ram;
116 int legacy_acpi_table_size;
117 unsigned acpi_data_size;
118
119 /* SMBIOS compat: */
120 bool smbios_defaults;
121 bool smbios_legacy_mode;
122 bool smbios_uuid_encoded;
123
124 /* RAM / address space compat: */
125 bool gigabyte_align;
126 bool has_reserved_memory;
127 bool enforce_aligned_dimm;
128 bool broken_reserved_end;
129
130 /* TSC rate migration: */
131 bool save_tsc_khz;
132 /* generate legacy CPU hotplug AML */
133 bool legacy_cpu_hotplug;
134
135 /* use DMA capable linuxboot option rom */
136 bool linuxboot_dma_enabled;
137 };
138
139 #define TYPE_PC_MACHINE "generic-pc-machine"
140 #define PC_MACHINE(obj) \
141 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE)
142 #define PC_MACHINE_GET_CLASS(obj) \
143 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE)
144 #define PC_MACHINE_CLASS(klass) \
145 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)
146
147 /* i8259.c */
148
149 extern DeviceState *isa_pic;
150 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
151 qemu_irq *kvm_i8259_init(ISABus *bus);
152 int pic_read_irq(DeviceState *d);
153 int pic_get_output(DeviceState *d);
154
155 /* ioapic.c */
156
157 /* Global System Interrupts */
158
159 #define GSI_NUM_PINS IOAPIC_NUM_PINS
160
161 typedef struct GSIState {
162 qemu_irq i8259_irq[ISA_NUM_IRQS];
163 qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
164 } GSIState;
165
166 void gsi_handler(void *opaque, int n, int level);
167
168 /* vmport.c */
169 #define TYPE_VMPORT "vmport"
170 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address);
171
172 static inline void vmport_init(ISABus *bus)
173 {
174 isa_create_simple(bus, TYPE_VMPORT);
175 }
176
177 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque);
178 void vmmouse_get_data(uint32_t *data);
179 void vmmouse_set_data(const uint32_t *data);
180
181 /* pc.c */
182 extern int fd_bootchk;
183
184 bool pc_machine_is_smm_enabled(PCMachineState *pcms);
185 void pc_register_ferr_irq(qemu_irq irq);
186 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
187
188 void pc_cpus_init(PCMachineState *pcms);
189 void pc_hot_add_cpu(const int64_t id, Error **errp);
190 void pc_acpi_init(const char *default_dsdt);
191
192 void pc_guest_info_init(PCMachineState *pcms);
193
194 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start"
195 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end"
196 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
197 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end"
198 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size"
199 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size"
200 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size"
201
202
203 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
204 MemoryRegion *pci_address_space);
205
206 void xen_load_linux(PCMachineState *pcms);
207 void pc_memory_init(PCMachineState *pcms,
208 MemoryRegion *system_memory,
209 MemoryRegion *rom_memory,
210 MemoryRegion **ram_memory);
211 uint64_t pc_pci_hole64_start(void);
212 qemu_irq pc_allocate_cpu_irq(void);
213 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
214 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
215 ISADevice **rtc_state,
216 bool create_fdctrl,
217 bool no_vmport,
218 bool has_pit,
219 uint32_t hpet_irqs);
220 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
221 void pc_cmos_init(PCMachineState *pcms,
222 BusState *ide0, BusState *ide1,
223 ISADevice *s);
224 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus);
225 void pc_pci_device_init(PCIBus *pci_bus);
226
227 typedef void (*cpu_set_smm_t)(int smm, void *arg);
228
229 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);
230
231 ISADevice *pc_find_fdc0(void);
232 int cmos_get_fd_drive_type(FloppyDriveType fd0);
233
234 #define FW_CFG_IO_BASE 0x510
235
236 #define PORT92_A20_LINE "a20"
237
238 /* acpi_piix.c */
239
240 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
241 qemu_irq sci_irq, qemu_irq smi_irq,
242 int smm_enabled, DeviceState **piix4_pm);
243
244 /* hpet.c */
245 extern int no_hpet;
246
247 /* piix_pci.c */
248 struct PCII440FXState;
249 typedef struct PCII440FXState PCII440FXState;
250
251 #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost"
252 #define TYPE_I440FX_PCI_DEVICE "i440FX"
253
254 #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX"
255
256 /*
257 * Reset Control Register: PCI-accessible ISA-Compatible Register at address
258 * 0xcf9, provided by the PCI/ISA bridge (PIIX3 PCI function 0, 8086:7000).
259 */
260 #define RCR_IOPORT 0xcf9
261
262 PCIBus *i440fx_init(const char *host_type, const char *pci_type,
263 PCII440FXState **pi440fx_state, int *piix_devfn,
264 ISABus **isa_bus, qemu_irq *pic,
265 MemoryRegion *address_space_mem,
266 MemoryRegion *address_space_io,
267 ram_addr_t ram_size,
268 ram_addr_t below_4g_mem_size,
269 ram_addr_t above_4g_mem_size,
270 MemoryRegion *pci_memory,
271 MemoryRegion *ram_memory);
272
273 PCIBus *find_i440fx(void);
274 /* piix4.c */
275 extern PCIDevice *piix4_dev;
276 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn);
277
278 /* pc_sysfw.c */
279 void pc_system_firmware_init(MemoryRegion *rom_memory,
280 bool isapc_ram_fw);
281
282 /* acpi-build.c */
283 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
284 const CPUArchIdList *apic_ids, GArray *entry);
285
286 /* e820 types */
287 #define E820_RAM 1
288 #define E820_RESERVED 2
289 #define E820_ACPI 3
290 #define E820_NVS 4
291 #define E820_UNUSABLE 5
292
293 int e820_add_entry(uint64_t, uint64_t, uint32_t);
294 int e820_get_num_entries(void);
295 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
296
297 extern GlobalProperty pc_compat_3_1[];
298 extern const size_t pc_compat_3_1_len;
299
300 extern GlobalProperty pc_compat_3_0[];
301 extern const size_t pc_compat_3_0_len;
302
303 extern GlobalProperty pc_compat_2_12[];
304 extern const size_t pc_compat_2_12_len;
305
306 extern GlobalProperty pc_compat_2_11[];
307 extern const size_t pc_compat_2_11_len;
308
309 extern GlobalProperty pc_compat_2_10[];
310 extern const size_t pc_compat_2_10_len;
311
312 extern GlobalProperty pc_compat_2_9[];
313 extern const size_t pc_compat_2_9_len;
314
315 extern GlobalProperty pc_compat_2_8[];
316 extern const size_t pc_compat_2_8_len;
317
318 extern GlobalProperty pc_compat_2_7[];
319 extern const size_t pc_compat_2_7_len;
320
321 extern GlobalProperty pc_compat_2_6[];
322 extern const size_t pc_compat_2_6_len;
323
324 extern GlobalProperty pc_compat_2_5[];
325 extern const size_t pc_compat_2_5_len;
326
327 extern GlobalProperty pc_compat_2_4[];
328 extern const size_t pc_compat_2_4_len;
329
330 extern GlobalProperty pc_compat_2_3[];
331 extern const size_t pc_compat_2_3_len;
332
333 /* Helper for setting model-id for CPU models that changed model-id
334 * depending on QEMU versions up to QEMU 2.4.
335 */
336 #define PC_CPU_MODEL_IDS(v) \
337 {\
338 .driver = "qemu32-" TYPE_X86_CPU,\
339 .property = "model-id",\
340 .value = "QEMU Virtual CPU version " v,\
341 },\
342 {\
343 .driver = "qemu64-" TYPE_X86_CPU,\
344 .property = "model-id",\
345 .value = "QEMU Virtual CPU version " v,\
346 },\
347 {\
348 .driver = "athlon-" TYPE_X86_CPU,\
349 .property = "model-id",\
350 .value = "QEMU Virtual CPU version " v,\
351 },
352
353 #define PC_COMPAT_2_2 \
354 HW_COMPAT_2_2 \
355 PC_CPU_MODEL_IDS("2.2.0") \
356 {\
357 .driver = "kvm64" "-" TYPE_X86_CPU,\
358 .property = "vme",\
359 .value = "off",\
360 },\
361 {\
362 .driver = "kvm32" "-" TYPE_X86_CPU,\
363 .property = "vme",\
364 .value = "off",\
365 },\
366 {\
367 .driver = "Conroe" "-" TYPE_X86_CPU,\
368 .property = "vme",\
369 .value = "off",\
370 },\
371 {\
372 .driver = "Penryn" "-" TYPE_X86_CPU,\
373 .property = "vme",\
374 .value = "off",\
375 },\
376 {\
377 .driver = "Nehalem" "-" TYPE_X86_CPU,\
378 .property = "vme",\
379 .value = "off",\
380 },\
381 {\
382 .driver = "Westmere" "-" TYPE_X86_CPU,\
383 .property = "vme",\
384 .value = "off",\
385 },\
386 {\
387 .driver = "SandyBridge" "-" TYPE_X86_CPU,\
388 .property = "vme",\
389 .value = "off",\
390 },\
391 {\
392 .driver = "Haswell" "-" TYPE_X86_CPU,\
393 .property = "vme",\
394 .value = "off",\
395 },\
396 {\
397 .driver = "Broadwell" "-" TYPE_X86_CPU,\
398 .property = "vme",\
399 .value = "off",\
400 },\
401 {\
402 .driver = "Opteron_G1" "-" TYPE_X86_CPU,\
403 .property = "vme",\
404 .value = "off",\
405 },\
406 {\
407 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\
408 .property = "vme",\
409 .value = "off",\
410 },\
411 {\
412 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\
413 .property = "vme",\
414 .value = "off",\
415 },\
416 {\
417 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\
418 .property = "vme",\
419 .value = "off",\
420 },\
421 {\
422 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\
423 .property = "vme",\
424 .value = "off",\
425 },\
426 {\
427 .driver = "Haswell" "-" TYPE_X86_CPU,\
428 .property = "f16c",\
429 .value = "off",\
430 },\
431 {\
432 .driver = "Haswell" "-" TYPE_X86_CPU,\
433 .property = "rdrand",\
434 .value = "off",\
435 },\
436 {\
437 .driver = "Broadwell" "-" TYPE_X86_CPU,\
438 .property = "f16c",\
439 .value = "off",\
440 },\
441 {\
442 .driver = "Broadwell" "-" TYPE_X86_CPU,\
443 .property = "rdrand",\
444 .value = "off",\
445 },
446
447 #define PC_COMPAT_2_1 \
448 HW_COMPAT_2_1 \
449 PC_CPU_MODEL_IDS("2.1.0") \
450 {\
451 .driver = "coreduo" "-" TYPE_X86_CPU,\
452 .property = "vmx",\
453 .value = "on",\
454 },\
455 {\
456 .driver = "core2duo" "-" TYPE_X86_CPU,\
457 .property = "vmx",\
458 .value = "on",\
459 },
460
461 #define PC_COMPAT_2_0 \
462 PC_CPU_MODEL_IDS("2.0.0") \
463 {\
464 .driver = "virtio-scsi-pci",\
465 .property = "any_layout",\
466 .value = "off",\
467 },{\
468 .driver = "PIIX4_PM",\
469 .property = "memory-hotplug-support",\
470 .value = "off",\
471 },\
472 {\
473 .driver = "apic",\
474 .property = "version",\
475 .value = stringify(0x11),\
476 },\
477 {\
478 .driver = "nec-usb-xhci",\
479 .property = "superspeed-ports-first",\
480 .value = "off",\
481 },\
482 {\
483 .driver = "nec-usb-xhci",\
484 .property = "force-pcie-endcap",\
485 .value = "on",\
486 },\
487 {\
488 .driver = "pci-serial",\
489 .property = "prog_if",\
490 .value = stringify(0),\
491 },\
492 {\
493 .driver = "pci-serial-2x",\
494 .property = "prog_if",\
495 .value = stringify(0),\
496 },\
497 {\
498 .driver = "pci-serial-4x",\
499 .property = "prog_if",\
500 .value = stringify(0),\
501 },\
502 {\
503 .driver = "virtio-net-pci",\
504 .property = "guest_announce",\
505 .value = "off",\
506 },\
507 {\
508 .driver = "ICH9-LPC",\
509 .property = "memory-hotplug-support",\
510 .value = "off",\
511 },{\
512 .driver = "xio3130-downstream",\
513 .property = COMPAT_PROP_PCP,\
514 .value = "off",\
515 },{\
516 .driver = "ioh3420",\
517 .property = COMPAT_PROP_PCP,\
518 .value = "off",\
519 },
520
521 #define PC_COMPAT_1_7 \
522 PC_CPU_MODEL_IDS("1.7.0") \
523 {\
524 .driver = TYPE_USB_DEVICE,\
525 .property = "msos-desc",\
526 .value = "no",\
527 },\
528 {\
529 .driver = "PIIX4_PM",\
530 .property = "acpi-pci-hotplug-with-bridge-support",\
531 .value = "off",\
532 },\
533 {\
534 .driver = "hpet",\
535 .property = HPET_INTCAP,\
536 .value = stringify(4),\
537 },
538
539 #define PC_COMPAT_1_6 \
540 PC_CPU_MODEL_IDS("1.6.0") \
541 {\
542 .driver = "e1000",\
543 .property = "mitigation",\
544 .value = "off",\
545 },{\
546 .driver = "qemu64-" TYPE_X86_CPU,\
547 .property = "model",\
548 .value = stringify(2),\
549 },{\
550 .driver = "qemu32-" TYPE_X86_CPU,\
551 .property = "model",\
552 .value = stringify(3),\
553 },{\
554 .driver = "i440FX-pcihost",\
555 .property = "short_root_bus",\
556 .value = stringify(1),\
557 },{\
558 .driver = "q35-pcihost",\
559 .property = "short_root_bus",\
560 .value = stringify(1),\
561 },
562
563 #define PC_COMPAT_1_5 \
564 PC_CPU_MODEL_IDS("1.5.0") \
565 {\
566 .driver = "Conroe-" TYPE_X86_CPU,\
567 .property = "model",\
568 .value = stringify(2),\
569 },{\
570 .driver = "Conroe-" TYPE_X86_CPU,\
571 .property = "min-level",\
572 .value = stringify(2),\
573 },{\
574 .driver = "Penryn-" TYPE_X86_CPU,\
575 .property = "model",\
576 .value = stringify(2),\
577 },{\
578 .driver = "Penryn-" TYPE_X86_CPU,\
579 .property = "min-level",\
580 .value = stringify(2),\
581 },{\
582 .driver = "Nehalem-" TYPE_X86_CPU,\
583 .property = "model",\
584 .value = stringify(2),\
585 },{\
586 .driver = "Nehalem-" TYPE_X86_CPU,\
587 .property = "min-level",\
588 .value = stringify(2),\
589 },{\
590 .driver = "virtio-net-pci",\
591 .property = "any_layout",\
592 .value = "off",\
593 },{\
594 .driver = TYPE_X86_CPU,\
595 .property = "pmu",\
596 .value = "on",\
597 },{\
598 .driver = "i440FX-pcihost",\
599 .property = "short_root_bus",\
600 .value = stringify(0),\
601 },{\
602 .driver = "q35-pcihost",\
603 .property = "short_root_bus",\
604 .value = stringify(0),\
605 },
606
607 #define PC_COMPAT_1_4 \
608 PC_CPU_MODEL_IDS("1.4.0") \
609 {\
610 .driver = "scsi-hd",\
611 .property = "discard_granularity",\
612 .value = stringify(0),\
613 },{\
614 .driver = "scsi-cd",\
615 .property = "discard_granularity",\
616 .value = stringify(0),\
617 },{\
618 .driver = "scsi-disk",\
619 .property = "discard_granularity",\
620 .value = stringify(0),\
621 },{\
622 .driver = "ide-hd",\
623 .property = "discard_granularity",\
624 .value = stringify(0),\
625 },{\
626 .driver = "ide-cd",\
627 .property = "discard_granularity",\
628 .value = stringify(0),\
629 },{\
630 .driver = "ide-drive",\
631 .property = "discard_granularity",\
632 .value = stringify(0),\
633 },{\
634 .driver = "virtio-blk-pci",\
635 .property = "discard_granularity",\
636 .value = stringify(0),\
637 },{\
638 .driver = "virtio-serial-pci",\
639 .property = "vectors",\
640 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\
641 .value = stringify(0xFFFFFFFF),\
642 },{ \
643 .driver = "virtio-net-pci", \
644 .property = "ctrl_guest_offloads", \
645 .value = "off", \
646 },{\
647 .driver = "e1000",\
648 .property = "romfile",\
649 .value = "pxe-e1000.rom",\
650 },{\
651 .driver = "ne2k_pci",\
652 .property = "romfile",\
653 .value = "pxe-ne2k_pci.rom",\
654 },{\
655 .driver = "pcnet",\
656 .property = "romfile",\
657 .value = "pxe-pcnet.rom",\
658 },{\
659 .driver = "rtl8139",\
660 .property = "romfile",\
661 .value = "pxe-rtl8139.rom",\
662 },{\
663 .driver = "virtio-net-pci",\
664 .property = "romfile",\
665 .value = "pxe-virtio.rom",\
666 },{\
667 .driver = "486-" TYPE_X86_CPU,\
668 .property = "model",\
669 .value = stringify(0),\
670 },\
671 {\
672 .driver = "n270" "-" TYPE_X86_CPU,\
673 .property = "movbe",\
674 .value = "off",\
675 },\
676 {\
677 .driver = "Westmere" "-" TYPE_X86_CPU,\
678 .property = "pclmulqdq",\
679 .value = "off",\
680 },
681
682 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \
683 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \
684 { \
685 MachineClass *mc = MACHINE_CLASS(oc); \
686 optsfn(mc); \
687 mc->init = initfn; \
688 } \
689 static const TypeInfo pc_machine_type_##suffix = { \
690 .name = namestr TYPE_MACHINE_SUFFIX, \
691 .parent = TYPE_PC_MACHINE, \
692 .class_init = pc_machine_##suffix##_class_init, \
693 }; \
694 static void pc_machine_init_##suffix(void) \
695 { \
696 type_register(&pc_machine_type_##suffix); \
697 } \
698 type_init(pc_machine_init_##suffix)
699
700 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id);
701 #endif