]> git.proxmox.com Git - mirror_qemu.git/blob - ioport.c
ioport: loosen assertions on emulation of 16-bit ports
[mirror_qemu.git] / ioport.c
1 /*
2 * QEMU System Emulator
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24 /*
25 * splitted out ioport related stuffs from vl.c.
26 */
27
28 #include "exec/ioport.h"
29 #include "trace.h"
30 #include "exec/memory.h"
31 #include "exec/address-spaces.h"
32
33 //#define DEBUG_IOPORT
34
35 #ifdef DEBUG_IOPORT
36 # define LOG_IOPORT(...) qemu_log_mask(CPU_LOG_IOPORT, ## __VA_ARGS__)
37 #else
38 # define LOG_IOPORT(...) do { } while (0)
39 #endif
40
41 typedef struct MemoryRegionPortioList {
42 MemoryRegion mr;
43 void *portio_opaque;
44 MemoryRegionPortio ports[];
45 } MemoryRegionPortioList;
46
47 static uint64_t unassigned_io_read(void *opaque, hwaddr addr, unsigned size)
48 {
49 return -1ULL;
50 }
51
52 static void unassigned_io_write(void *opaque, hwaddr addr, uint64_t val,
53 unsigned size)
54 {
55 }
56
57 const MemoryRegionOps unassigned_io_ops = {
58 .read = unassigned_io_read,
59 .write = unassigned_io_write,
60 .endianness = DEVICE_NATIVE_ENDIAN,
61 };
62
63 void cpu_outb(pio_addr_t addr, uint8_t val)
64 {
65 LOG_IOPORT("outb: %04"FMT_pioaddr" %02"PRIx8"\n", addr, val);
66 trace_cpu_out(addr, val);
67 address_space_write(&address_space_io, addr, &val, 1);
68 }
69
70 void cpu_outw(pio_addr_t addr, uint16_t val)
71 {
72 uint8_t buf[2];
73
74 LOG_IOPORT("outw: %04"FMT_pioaddr" %04"PRIx16"\n", addr, val);
75 trace_cpu_out(addr, val);
76 stw_p(buf, val);
77 address_space_write(&address_space_io, addr, buf, 2);
78 }
79
80 void cpu_outl(pio_addr_t addr, uint32_t val)
81 {
82 uint8_t buf[4];
83
84 LOG_IOPORT("outl: %04"FMT_pioaddr" %08"PRIx32"\n", addr, val);
85 trace_cpu_out(addr, val);
86 stl_p(buf, val);
87 address_space_write(&address_space_io, addr, buf, 4);
88 }
89
90 uint8_t cpu_inb(pio_addr_t addr)
91 {
92 uint8_t val;
93
94 address_space_read(&address_space_io, addr, &val, 1);
95 trace_cpu_in(addr, val);
96 LOG_IOPORT("inb : %04"FMT_pioaddr" %02"PRIx8"\n", addr, val);
97 return val;
98 }
99
100 uint16_t cpu_inw(pio_addr_t addr)
101 {
102 uint8_t buf[2];
103 uint16_t val;
104
105 address_space_read(&address_space_io, addr, buf, 2);
106 val = lduw_p(buf);
107 trace_cpu_in(addr, val);
108 LOG_IOPORT("inw : %04"FMT_pioaddr" %04"PRIx16"\n", addr, val);
109 return val;
110 }
111
112 uint32_t cpu_inl(pio_addr_t addr)
113 {
114 uint8_t buf[4];
115 uint32_t val;
116
117 address_space_read(&address_space_io, addr, buf, 4);
118 val = ldl_p(buf);
119 trace_cpu_in(addr, val);
120 LOG_IOPORT("inl : %04"FMT_pioaddr" %08"PRIx32"\n", addr, val);
121 return val;
122 }
123
124 void portio_list_init(PortioList *piolist,
125 Object *owner,
126 const MemoryRegionPortio *callbacks,
127 void *opaque, const char *name)
128 {
129 unsigned n = 0;
130
131 while (callbacks[n].size) {
132 ++n;
133 }
134
135 piolist->ports = callbacks;
136 piolist->nr = 0;
137 piolist->regions = g_new0(MemoryRegion *, n);
138 piolist->address_space = NULL;
139 piolist->opaque = opaque;
140 piolist->owner = owner;
141 piolist->name = name;
142 piolist->flush_coalesced_mmio = false;
143 }
144
145 void portio_list_set_flush_coalesced(PortioList *piolist)
146 {
147 piolist->flush_coalesced_mmio = true;
148 }
149
150 void portio_list_destroy(PortioList *piolist)
151 {
152 MemoryRegionPortioList *mrpio;
153 unsigned i;
154
155 for (i = 0; i < piolist->nr; ++i) {
156 mrpio = container_of(piolist->regions[i], MemoryRegionPortioList, mr);
157 object_unparent(OBJECT(&mrpio->mr));
158 g_free(mrpio);
159 }
160 g_free(piolist->regions);
161 }
162
163 static const MemoryRegionPortio *find_portio(MemoryRegionPortioList *mrpio,
164 uint64_t offset, unsigned size,
165 bool write)
166 {
167 const MemoryRegionPortio *mrp;
168
169 for (mrp = mrpio->ports; mrp->size; ++mrp) {
170 if (offset >= mrp->offset && offset < mrp->offset + mrp->len &&
171 size == mrp->size &&
172 (write ? (bool)mrp->write : (bool)mrp->read)) {
173 return mrp;
174 }
175 }
176 return NULL;
177 }
178
179 static uint64_t portio_read(void *opaque, hwaddr addr, unsigned size)
180 {
181 MemoryRegionPortioList *mrpio = opaque;
182 const MemoryRegionPortio *mrp = find_portio(mrpio, addr, size, false);
183 uint64_t data;
184
185 data = ((uint64_t)1 << (size * 8)) - 1;
186 if (mrp) {
187 data = mrp->read(mrpio->portio_opaque, mrp->base + addr);
188 } else if (size == 2) {
189 mrp = find_portio(mrpio, addr, 1, false);
190 if (mrp) {
191 data = mrp->read(mrpio->portio_opaque, mrp->base + addr);
192 if (addr + 1 < mrp->offset + mrp->len) {
193 data |= mrp->read(mrpio->portio_opaque, mrp->base + addr + 1) << 8;
194 } else {
195 data |= 0xff00;
196 }
197 }
198 }
199 return data;
200 }
201
202 static void portio_write(void *opaque, hwaddr addr, uint64_t data,
203 unsigned size)
204 {
205 MemoryRegionPortioList *mrpio = opaque;
206 const MemoryRegionPortio *mrp = find_portio(mrpio, addr, size, true);
207
208 if (mrp) {
209 mrp->write(mrpio->portio_opaque, mrp->base + addr, data);
210 } else if (size == 2) {
211 mrp = find_portio(mrpio, addr, 1, true);
212 if (mrp) {
213 mrp->write(mrpio->portio_opaque, mrp->base + addr, data & 0xff);
214 if (addr + 1 < mrp->offset + mrp->len) {
215 mrp->write(mrpio->portio_opaque, mrp->base + addr + 1, data >> 8);
216 }
217 }
218 }
219 }
220
221 static const MemoryRegionOps portio_ops = {
222 .read = portio_read,
223 .write = portio_write,
224 .endianness = DEVICE_LITTLE_ENDIAN,
225 .valid.unaligned = true,
226 .impl.unaligned = true,
227 };
228
229 static void portio_list_add_1(PortioList *piolist,
230 const MemoryRegionPortio *pio_init,
231 unsigned count, unsigned start,
232 unsigned off_low, unsigned off_high)
233 {
234 MemoryRegionPortioList *mrpio;
235 unsigned i;
236
237 /* Copy the sub-list and null-terminate it. */
238 mrpio = g_malloc0(sizeof(MemoryRegionPortioList) +
239 sizeof(MemoryRegionPortio) * (count + 1));
240 mrpio->portio_opaque = piolist->opaque;
241 memcpy(mrpio->ports, pio_init, sizeof(MemoryRegionPortio) * count);
242 memset(mrpio->ports + count, 0, sizeof(MemoryRegionPortio));
243
244 /* Adjust the offsets to all be zero-based for the region. */
245 for (i = 0; i < count; ++i) {
246 mrpio->ports[i].offset -= off_low;
247 mrpio->ports[i].base = start + off_low;
248 }
249
250 memory_region_init_io(&mrpio->mr, piolist->owner, &portio_ops, mrpio,
251 piolist->name, off_high - off_low);
252 if (piolist->flush_coalesced_mmio) {
253 memory_region_set_flush_coalesced(&mrpio->mr);
254 }
255 memory_region_add_subregion(piolist->address_space,
256 start + off_low, &mrpio->mr);
257 piolist->regions[piolist->nr] = &mrpio->mr;
258 ++piolist->nr;
259 }
260
261 void portio_list_add(PortioList *piolist,
262 MemoryRegion *address_space,
263 uint32_t start)
264 {
265 const MemoryRegionPortio *pio, *pio_start = piolist->ports;
266 unsigned int off_low, off_high, off_last, count;
267
268 piolist->address_space = address_space;
269
270 /* Handle the first entry specially. */
271 off_last = off_low = pio_start->offset;
272 off_high = off_low + pio_start->len;
273 count = 1;
274
275 for (pio = pio_start + 1; pio->size != 0; pio++, count++) {
276 /* All entries must be sorted by offset. */
277 assert(pio->offset >= off_last);
278 off_last = pio->offset;
279
280 /* If we see a hole, break the region. */
281 if (off_last > off_high) {
282 portio_list_add_1(piolist, pio_start, count, start, off_low,
283 off_high);
284 /* ... and start collecting anew. */
285 pio_start = pio;
286 off_low = off_last;
287 off_high = off_low + pio->len;
288 count = 0;
289 } else if (off_last + pio->len > off_high) {
290 off_high = off_last + pio->len;
291 }
292 }
293
294 /* There will always be an open sub-list. */
295 portio_list_add_1(piolist, pio_start, count, start, off_low, off_high);
296 }
297
298 void portio_list_del(PortioList *piolist)
299 {
300 MemoryRegionPortioList *mrpio;
301 unsigned i;
302
303 for (i = 0; i < piolist->nr; ++i) {
304 mrpio = container_of(piolist->regions[i], MemoryRegionPortioList, mr);
305 memory_region_del_subregion(piolist->address_space, &mrpio->mr);
306 }
307 }