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ivshmem: Fix 64 bit memory bar configuration
[mirror_qemu.git] / memory.c
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qapi/error.h"
18 #include "qemu-common.h"
19 #include "cpu.h"
20 #include "exec/memory.h"
21 #include "exec/address-spaces.h"
22 #include "exec/ioport.h"
23 #include "qapi/visitor.h"
24 #include "qemu/bitops.h"
25 #include "qemu/error-report.h"
26 #include "qom/object.h"
27 #include "trace.h"
28
29 #include "exec/memory-internal.h"
30 #include "exec/ram_addr.h"
31 #include "sysemu/kvm.h"
32 #include "sysemu/sysemu.h"
33
34 //#define DEBUG_UNASSIGNED
35
36 static unsigned memory_region_transaction_depth;
37 static bool memory_region_update_pending;
38 static bool ioeventfd_update_pending;
39 static bool global_dirty_log = false;
40
41 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
42 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
43
44 static QTAILQ_HEAD(, AddressSpace) address_spaces
45 = QTAILQ_HEAD_INITIALIZER(address_spaces);
46
47 typedef struct AddrRange AddrRange;
48
49 /*
50 * Note that signed integers are needed for negative offsetting in aliases
51 * (large MemoryRegion::alias_offset).
52 */
53 struct AddrRange {
54 Int128 start;
55 Int128 size;
56 };
57
58 static AddrRange addrrange_make(Int128 start, Int128 size)
59 {
60 return (AddrRange) { start, size };
61 }
62
63 static bool addrrange_equal(AddrRange r1, AddrRange r2)
64 {
65 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
66 }
67
68 static Int128 addrrange_end(AddrRange r)
69 {
70 return int128_add(r.start, r.size);
71 }
72
73 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
74 {
75 int128_addto(&range.start, delta);
76 return range;
77 }
78
79 static bool addrrange_contains(AddrRange range, Int128 addr)
80 {
81 return int128_ge(addr, range.start)
82 && int128_lt(addr, addrrange_end(range));
83 }
84
85 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
86 {
87 return addrrange_contains(r1, r2.start)
88 || addrrange_contains(r2, r1.start);
89 }
90
91 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
92 {
93 Int128 start = int128_max(r1.start, r2.start);
94 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
95 return addrrange_make(start, int128_sub(end, start));
96 }
97
98 enum ListenerDirection { Forward, Reverse };
99
100 static bool memory_listener_match(MemoryListener *listener,
101 MemoryRegionSection *section)
102 {
103 return !listener->address_space_filter
104 || listener->address_space_filter == section->address_space;
105 }
106
107 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
108 do { \
109 MemoryListener *_listener; \
110 \
111 switch (_direction) { \
112 case Forward: \
113 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
114 if (_listener->_callback) { \
115 _listener->_callback(_listener, ##_args); \
116 } \
117 } \
118 break; \
119 case Reverse: \
120 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
121 memory_listeners, link) { \
122 if (_listener->_callback) { \
123 _listener->_callback(_listener, ##_args); \
124 } \
125 } \
126 break; \
127 default: \
128 abort(); \
129 } \
130 } while (0)
131
132 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
133 do { \
134 MemoryListener *_listener; \
135 \
136 switch (_direction) { \
137 case Forward: \
138 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
139 if (_listener->_callback \
140 && memory_listener_match(_listener, _section)) { \
141 _listener->_callback(_listener, _section, ##_args); \
142 } \
143 } \
144 break; \
145 case Reverse: \
146 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
147 memory_listeners, link) { \
148 if (_listener->_callback \
149 && memory_listener_match(_listener, _section)) { \
150 _listener->_callback(_listener, _section, ##_args); \
151 } \
152 } \
153 break; \
154 default: \
155 abort(); \
156 } \
157 } while (0)
158
159 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
160 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
161 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
162 .mr = (fr)->mr, \
163 .address_space = (as), \
164 .offset_within_region = (fr)->offset_in_region, \
165 .size = (fr)->addr.size, \
166 .offset_within_address_space = int128_get64((fr)->addr.start), \
167 .readonly = (fr)->readonly, \
168 }), ##_args)
169
170 struct CoalescedMemoryRange {
171 AddrRange addr;
172 QTAILQ_ENTRY(CoalescedMemoryRange) link;
173 };
174
175 struct MemoryRegionIoeventfd {
176 AddrRange addr;
177 bool match_data;
178 uint64_t data;
179 EventNotifier *e;
180 };
181
182 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
183 MemoryRegionIoeventfd b)
184 {
185 if (int128_lt(a.addr.start, b.addr.start)) {
186 return true;
187 } else if (int128_gt(a.addr.start, b.addr.start)) {
188 return false;
189 } else if (int128_lt(a.addr.size, b.addr.size)) {
190 return true;
191 } else if (int128_gt(a.addr.size, b.addr.size)) {
192 return false;
193 } else if (a.match_data < b.match_data) {
194 return true;
195 } else if (a.match_data > b.match_data) {
196 return false;
197 } else if (a.match_data) {
198 if (a.data < b.data) {
199 return true;
200 } else if (a.data > b.data) {
201 return false;
202 }
203 }
204 if (a.e < b.e) {
205 return true;
206 } else if (a.e > b.e) {
207 return false;
208 }
209 return false;
210 }
211
212 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
213 MemoryRegionIoeventfd b)
214 {
215 return !memory_region_ioeventfd_before(a, b)
216 && !memory_region_ioeventfd_before(b, a);
217 }
218
219 typedef struct FlatRange FlatRange;
220 typedef struct FlatView FlatView;
221
222 /* Range of memory in the global map. Addresses are absolute. */
223 struct FlatRange {
224 MemoryRegion *mr;
225 hwaddr offset_in_region;
226 AddrRange addr;
227 uint8_t dirty_log_mask;
228 bool romd_mode;
229 bool readonly;
230 };
231
232 /* Flattened global view of current active memory hierarchy. Kept in sorted
233 * order.
234 */
235 struct FlatView {
236 struct rcu_head rcu;
237 unsigned ref;
238 FlatRange *ranges;
239 unsigned nr;
240 unsigned nr_allocated;
241 };
242
243 typedef struct AddressSpaceOps AddressSpaceOps;
244
245 #define FOR_EACH_FLAT_RANGE(var, view) \
246 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
247
248 static bool flatrange_equal(FlatRange *a, FlatRange *b)
249 {
250 return a->mr == b->mr
251 && addrrange_equal(a->addr, b->addr)
252 && a->offset_in_region == b->offset_in_region
253 && a->romd_mode == b->romd_mode
254 && a->readonly == b->readonly;
255 }
256
257 static void flatview_init(FlatView *view)
258 {
259 view->ref = 1;
260 view->ranges = NULL;
261 view->nr = 0;
262 view->nr_allocated = 0;
263 }
264
265 /* Insert a range into a given position. Caller is responsible for maintaining
266 * sorting order.
267 */
268 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
269 {
270 if (view->nr == view->nr_allocated) {
271 view->nr_allocated = MAX(2 * view->nr, 10);
272 view->ranges = g_realloc(view->ranges,
273 view->nr_allocated * sizeof(*view->ranges));
274 }
275 memmove(view->ranges + pos + 1, view->ranges + pos,
276 (view->nr - pos) * sizeof(FlatRange));
277 view->ranges[pos] = *range;
278 memory_region_ref(range->mr);
279 ++view->nr;
280 }
281
282 static void flatview_destroy(FlatView *view)
283 {
284 int i;
285
286 for (i = 0; i < view->nr; i++) {
287 memory_region_unref(view->ranges[i].mr);
288 }
289 g_free(view->ranges);
290 g_free(view);
291 }
292
293 static void flatview_ref(FlatView *view)
294 {
295 atomic_inc(&view->ref);
296 }
297
298 static void flatview_unref(FlatView *view)
299 {
300 if (atomic_fetch_dec(&view->ref) == 1) {
301 flatview_destroy(view);
302 }
303 }
304
305 static bool can_merge(FlatRange *r1, FlatRange *r2)
306 {
307 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
308 && r1->mr == r2->mr
309 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
310 r1->addr.size),
311 int128_make64(r2->offset_in_region))
312 && r1->dirty_log_mask == r2->dirty_log_mask
313 && r1->romd_mode == r2->romd_mode
314 && r1->readonly == r2->readonly;
315 }
316
317 /* Attempt to simplify a view by merging adjacent ranges */
318 static void flatview_simplify(FlatView *view)
319 {
320 unsigned i, j;
321
322 i = 0;
323 while (i < view->nr) {
324 j = i + 1;
325 while (j < view->nr
326 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
327 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
328 ++j;
329 }
330 ++i;
331 memmove(&view->ranges[i], &view->ranges[j],
332 (view->nr - j) * sizeof(view->ranges[j]));
333 view->nr -= j - i;
334 }
335 }
336
337 static bool memory_region_big_endian(MemoryRegion *mr)
338 {
339 #ifdef TARGET_WORDS_BIGENDIAN
340 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
341 #else
342 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
343 #endif
344 }
345
346 static bool memory_region_wrong_endianness(MemoryRegion *mr)
347 {
348 #ifdef TARGET_WORDS_BIGENDIAN
349 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
350 #else
351 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
352 #endif
353 }
354
355 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
356 {
357 if (memory_region_wrong_endianness(mr)) {
358 switch (size) {
359 case 1:
360 break;
361 case 2:
362 *data = bswap16(*data);
363 break;
364 case 4:
365 *data = bswap32(*data);
366 break;
367 case 8:
368 *data = bswap64(*data);
369 break;
370 default:
371 abort();
372 }
373 }
374 }
375
376 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
377 {
378 MemoryRegion *root;
379 hwaddr abs_addr = offset;
380
381 abs_addr += mr->addr;
382 for (root = mr; root->container; ) {
383 root = root->container;
384 abs_addr += root->addr;
385 }
386
387 return abs_addr;
388 }
389
390 static int get_cpu_index(void)
391 {
392 if (current_cpu) {
393 return current_cpu->cpu_index;
394 }
395 return -1;
396 }
397
398 static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
399 hwaddr addr,
400 uint64_t *value,
401 unsigned size,
402 unsigned shift,
403 uint64_t mask,
404 MemTxAttrs attrs)
405 {
406 uint64_t tmp;
407
408 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
409 if (mr->subpage) {
410 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
411 } else if (mr == &io_mem_notdirty) {
412 /* Accesses to code which has previously been translated into a TB show
413 * up in the MMIO path, as accesses to the io_mem_notdirty
414 * MemoryRegion. */
415 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
416 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
417 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
418 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
419 }
420 *value |= (tmp & mask) << shift;
421 return MEMTX_OK;
422 }
423
424 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
425 hwaddr addr,
426 uint64_t *value,
427 unsigned size,
428 unsigned shift,
429 uint64_t mask,
430 MemTxAttrs attrs)
431 {
432 uint64_t tmp;
433
434 tmp = mr->ops->read(mr->opaque, addr, size);
435 if (mr->subpage) {
436 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
437 } else if (mr == &io_mem_notdirty) {
438 /* Accesses to code which has previously been translated into a TB show
439 * up in the MMIO path, as accesses to the io_mem_notdirty
440 * MemoryRegion. */
441 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
442 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
443 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
444 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
445 }
446 *value |= (tmp & mask) << shift;
447 return MEMTX_OK;
448 }
449
450 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
451 hwaddr addr,
452 uint64_t *value,
453 unsigned size,
454 unsigned shift,
455 uint64_t mask,
456 MemTxAttrs attrs)
457 {
458 uint64_t tmp = 0;
459 MemTxResult r;
460
461 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
462 if (mr->subpage) {
463 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
464 } else if (mr == &io_mem_notdirty) {
465 /* Accesses to code which has previously been translated into a TB show
466 * up in the MMIO path, as accesses to the io_mem_notdirty
467 * MemoryRegion. */
468 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
469 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
470 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
471 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
472 }
473 *value |= (tmp & mask) << shift;
474 return r;
475 }
476
477 static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
478 hwaddr addr,
479 uint64_t *value,
480 unsigned size,
481 unsigned shift,
482 uint64_t mask,
483 MemTxAttrs attrs)
484 {
485 uint64_t tmp;
486
487 tmp = (*value >> shift) & mask;
488 if (mr->subpage) {
489 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
490 } else if (mr == &io_mem_notdirty) {
491 /* Accesses to code which has previously been translated into a TB show
492 * up in the MMIO path, as accesses to the io_mem_notdirty
493 * MemoryRegion. */
494 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
495 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
496 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
497 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
498 }
499 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
500 return MEMTX_OK;
501 }
502
503 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
504 hwaddr addr,
505 uint64_t *value,
506 unsigned size,
507 unsigned shift,
508 uint64_t mask,
509 MemTxAttrs attrs)
510 {
511 uint64_t tmp;
512
513 tmp = (*value >> shift) & mask;
514 if (mr->subpage) {
515 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
516 } else if (mr == &io_mem_notdirty) {
517 /* Accesses to code which has previously been translated into a TB show
518 * up in the MMIO path, as accesses to the io_mem_notdirty
519 * MemoryRegion. */
520 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
521 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
522 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
523 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
524 }
525 mr->ops->write(mr->opaque, addr, tmp, size);
526 return MEMTX_OK;
527 }
528
529 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
530 hwaddr addr,
531 uint64_t *value,
532 unsigned size,
533 unsigned shift,
534 uint64_t mask,
535 MemTxAttrs attrs)
536 {
537 uint64_t tmp;
538
539 tmp = (*value >> shift) & mask;
540 if (mr->subpage) {
541 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
542 } else if (mr == &io_mem_notdirty) {
543 /* Accesses to code which has previously been translated into a TB show
544 * up in the MMIO path, as accesses to the io_mem_notdirty
545 * MemoryRegion. */
546 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
547 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
548 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
549 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
550 }
551 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
552 }
553
554 static MemTxResult access_with_adjusted_size(hwaddr addr,
555 uint64_t *value,
556 unsigned size,
557 unsigned access_size_min,
558 unsigned access_size_max,
559 MemTxResult (*access)(MemoryRegion *mr,
560 hwaddr addr,
561 uint64_t *value,
562 unsigned size,
563 unsigned shift,
564 uint64_t mask,
565 MemTxAttrs attrs),
566 MemoryRegion *mr,
567 MemTxAttrs attrs)
568 {
569 uint64_t access_mask;
570 unsigned access_size;
571 unsigned i;
572 MemTxResult r = MEMTX_OK;
573
574 if (!access_size_min) {
575 access_size_min = 1;
576 }
577 if (!access_size_max) {
578 access_size_max = 4;
579 }
580
581 /* FIXME: support unaligned access? */
582 access_size = MAX(MIN(size, access_size_max), access_size_min);
583 access_mask = -1ULL >> (64 - access_size * 8);
584 if (memory_region_big_endian(mr)) {
585 for (i = 0; i < size; i += access_size) {
586 r |= access(mr, addr + i, value, access_size,
587 (size - access_size - i) * 8, access_mask, attrs);
588 }
589 } else {
590 for (i = 0; i < size; i += access_size) {
591 r |= access(mr, addr + i, value, access_size, i * 8,
592 access_mask, attrs);
593 }
594 }
595 return r;
596 }
597
598 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
599 {
600 AddressSpace *as;
601
602 while (mr->container) {
603 mr = mr->container;
604 }
605 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
606 if (mr == as->root) {
607 return as;
608 }
609 }
610 return NULL;
611 }
612
613 /* Render a memory region into the global view. Ranges in @view obscure
614 * ranges in @mr.
615 */
616 static void render_memory_region(FlatView *view,
617 MemoryRegion *mr,
618 Int128 base,
619 AddrRange clip,
620 bool readonly)
621 {
622 MemoryRegion *subregion;
623 unsigned i;
624 hwaddr offset_in_region;
625 Int128 remain;
626 Int128 now;
627 FlatRange fr;
628 AddrRange tmp;
629
630 if (!mr->enabled) {
631 return;
632 }
633
634 int128_addto(&base, int128_make64(mr->addr));
635 readonly |= mr->readonly;
636
637 tmp = addrrange_make(base, mr->size);
638
639 if (!addrrange_intersects(tmp, clip)) {
640 return;
641 }
642
643 clip = addrrange_intersection(tmp, clip);
644
645 if (mr->alias) {
646 int128_subfrom(&base, int128_make64(mr->alias->addr));
647 int128_subfrom(&base, int128_make64(mr->alias_offset));
648 render_memory_region(view, mr->alias, base, clip, readonly);
649 return;
650 }
651
652 /* Render subregions in priority order. */
653 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
654 render_memory_region(view, subregion, base, clip, readonly);
655 }
656
657 if (!mr->terminates) {
658 return;
659 }
660
661 offset_in_region = int128_get64(int128_sub(clip.start, base));
662 base = clip.start;
663 remain = clip.size;
664
665 fr.mr = mr;
666 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
667 fr.romd_mode = mr->romd_mode;
668 fr.readonly = readonly;
669
670 /* Render the region itself into any gaps left by the current view. */
671 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
672 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
673 continue;
674 }
675 if (int128_lt(base, view->ranges[i].addr.start)) {
676 now = int128_min(remain,
677 int128_sub(view->ranges[i].addr.start, base));
678 fr.offset_in_region = offset_in_region;
679 fr.addr = addrrange_make(base, now);
680 flatview_insert(view, i, &fr);
681 ++i;
682 int128_addto(&base, now);
683 offset_in_region += int128_get64(now);
684 int128_subfrom(&remain, now);
685 }
686 now = int128_sub(int128_min(int128_add(base, remain),
687 addrrange_end(view->ranges[i].addr)),
688 base);
689 int128_addto(&base, now);
690 offset_in_region += int128_get64(now);
691 int128_subfrom(&remain, now);
692 }
693 if (int128_nz(remain)) {
694 fr.offset_in_region = offset_in_region;
695 fr.addr = addrrange_make(base, remain);
696 flatview_insert(view, i, &fr);
697 }
698 }
699
700 /* Render a memory topology into a list of disjoint absolute ranges. */
701 static FlatView *generate_memory_topology(MemoryRegion *mr)
702 {
703 FlatView *view;
704
705 view = g_new(FlatView, 1);
706 flatview_init(view);
707
708 if (mr) {
709 render_memory_region(view, mr, int128_zero(),
710 addrrange_make(int128_zero(), int128_2_64()), false);
711 }
712 flatview_simplify(view);
713
714 return view;
715 }
716
717 static void address_space_add_del_ioeventfds(AddressSpace *as,
718 MemoryRegionIoeventfd *fds_new,
719 unsigned fds_new_nb,
720 MemoryRegionIoeventfd *fds_old,
721 unsigned fds_old_nb)
722 {
723 unsigned iold, inew;
724 MemoryRegionIoeventfd *fd;
725 MemoryRegionSection section;
726
727 /* Generate a symmetric difference of the old and new fd sets, adding
728 * and deleting as necessary.
729 */
730
731 iold = inew = 0;
732 while (iold < fds_old_nb || inew < fds_new_nb) {
733 if (iold < fds_old_nb
734 && (inew == fds_new_nb
735 || memory_region_ioeventfd_before(fds_old[iold],
736 fds_new[inew]))) {
737 fd = &fds_old[iold];
738 section = (MemoryRegionSection) {
739 .address_space = as,
740 .offset_within_address_space = int128_get64(fd->addr.start),
741 .size = fd->addr.size,
742 };
743 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
744 fd->match_data, fd->data, fd->e);
745 ++iold;
746 } else if (inew < fds_new_nb
747 && (iold == fds_old_nb
748 || memory_region_ioeventfd_before(fds_new[inew],
749 fds_old[iold]))) {
750 fd = &fds_new[inew];
751 section = (MemoryRegionSection) {
752 .address_space = as,
753 .offset_within_address_space = int128_get64(fd->addr.start),
754 .size = fd->addr.size,
755 };
756 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
757 fd->match_data, fd->data, fd->e);
758 ++inew;
759 } else {
760 ++iold;
761 ++inew;
762 }
763 }
764 }
765
766 static FlatView *address_space_get_flatview(AddressSpace *as)
767 {
768 FlatView *view;
769
770 rcu_read_lock();
771 view = atomic_rcu_read(&as->current_map);
772 flatview_ref(view);
773 rcu_read_unlock();
774 return view;
775 }
776
777 static void address_space_update_ioeventfds(AddressSpace *as)
778 {
779 FlatView *view;
780 FlatRange *fr;
781 unsigned ioeventfd_nb = 0;
782 MemoryRegionIoeventfd *ioeventfds = NULL;
783 AddrRange tmp;
784 unsigned i;
785
786 view = address_space_get_flatview(as);
787 FOR_EACH_FLAT_RANGE(fr, view) {
788 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
789 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
790 int128_sub(fr->addr.start,
791 int128_make64(fr->offset_in_region)));
792 if (addrrange_intersects(fr->addr, tmp)) {
793 ++ioeventfd_nb;
794 ioeventfds = g_realloc(ioeventfds,
795 ioeventfd_nb * sizeof(*ioeventfds));
796 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
797 ioeventfds[ioeventfd_nb-1].addr = tmp;
798 }
799 }
800 }
801
802 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
803 as->ioeventfds, as->ioeventfd_nb);
804
805 g_free(as->ioeventfds);
806 as->ioeventfds = ioeventfds;
807 as->ioeventfd_nb = ioeventfd_nb;
808 flatview_unref(view);
809 }
810
811 static void address_space_update_topology_pass(AddressSpace *as,
812 const FlatView *old_view,
813 const FlatView *new_view,
814 bool adding)
815 {
816 unsigned iold, inew;
817 FlatRange *frold, *frnew;
818
819 /* Generate a symmetric difference of the old and new memory maps.
820 * Kill ranges in the old map, and instantiate ranges in the new map.
821 */
822 iold = inew = 0;
823 while (iold < old_view->nr || inew < new_view->nr) {
824 if (iold < old_view->nr) {
825 frold = &old_view->ranges[iold];
826 } else {
827 frold = NULL;
828 }
829 if (inew < new_view->nr) {
830 frnew = &new_view->ranges[inew];
831 } else {
832 frnew = NULL;
833 }
834
835 if (frold
836 && (!frnew
837 || int128_lt(frold->addr.start, frnew->addr.start)
838 || (int128_eq(frold->addr.start, frnew->addr.start)
839 && !flatrange_equal(frold, frnew)))) {
840 /* In old but not in new, or in both but attributes changed. */
841
842 if (!adding) {
843 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
844 }
845
846 ++iold;
847 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
848 /* In both and unchanged (except logging may have changed) */
849
850 if (adding) {
851 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
852 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
853 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
854 frold->dirty_log_mask,
855 frnew->dirty_log_mask);
856 }
857 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
858 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
859 frold->dirty_log_mask,
860 frnew->dirty_log_mask);
861 }
862 }
863
864 ++iold;
865 ++inew;
866 } else {
867 /* In new */
868
869 if (adding) {
870 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
871 }
872
873 ++inew;
874 }
875 }
876 }
877
878
879 static void address_space_update_topology(AddressSpace *as)
880 {
881 FlatView *old_view = address_space_get_flatview(as);
882 FlatView *new_view = generate_memory_topology(as->root);
883
884 address_space_update_topology_pass(as, old_view, new_view, false);
885 address_space_update_topology_pass(as, old_view, new_view, true);
886
887 /* Writes are protected by the BQL. */
888 atomic_rcu_set(&as->current_map, new_view);
889 call_rcu(old_view, flatview_unref, rcu);
890
891 /* Note that all the old MemoryRegions are still alive up to this
892 * point. This relieves most MemoryListeners from the need to
893 * ref/unref the MemoryRegions they get---unless they use them
894 * outside the iothread mutex, in which case precise reference
895 * counting is necessary.
896 */
897 flatview_unref(old_view);
898
899 address_space_update_ioeventfds(as);
900 }
901
902 void memory_region_transaction_begin(void)
903 {
904 qemu_flush_coalesced_mmio_buffer();
905 ++memory_region_transaction_depth;
906 }
907
908 static void memory_region_clear_pending(void)
909 {
910 memory_region_update_pending = false;
911 ioeventfd_update_pending = false;
912 }
913
914 void memory_region_transaction_commit(void)
915 {
916 AddressSpace *as;
917
918 assert(memory_region_transaction_depth);
919 --memory_region_transaction_depth;
920 if (!memory_region_transaction_depth) {
921 if (memory_region_update_pending) {
922 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
923
924 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
925 address_space_update_topology(as);
926 }
927
928 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
929 } else if (ioeventfd_update_pending) {
930 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
931 address_space_update_ioeventfds(as);
932 }
933 }
934 memory_region_clear_pending();
935 }
936 }
937
938 static void memory_region_destructor_none(MemoryRegion *mr)
939 {
940 }
941
942 static void memory_region_destructor_ram(MemoryRegion *mr)
943 {
944 qemu_ram_free(mr->ram_block);
945 }
946
947 static void memory_region_destructor_rom_device(MemoryRegion *mr)
948 {
949 qemu_ram_free(mr->ram_block);
950 }
951
952 static bool memory_region_need_escape(char c)
953 {
954 return c == '/' || c == '[' || c == '\\' || c == ']';
955 }
956
957 static char *memory_region_escape_name(const char *name)
958 {
959 const char *p;
960 char *escaped, *q;
961 uint8_t c;
962 size_t bytes = 0;
963
964 for (p = name; *p; p++) {
965 bytes += memory_region_need_escape(*p) ? 4 : 1;
966 }
967 if (bytes == p - name) {
968 return g_memdup(name, bytes + 1);
969 }
970
971 escaped = g_malloc(bytes + 1);
972 for (p = name, q = escaped; *p; p++) {
973 c = *p;
974 if (unlikely(memory_region_need_escape(c))) {
975 *q++ = '\\';
976 *q++ = 'x';
977 *q++ = "0123456789abcdef"[c >> 4];
978 c = "0123456789abcdef"[c & 15];
979 }
980 *q++ = c;
981 }
982 *q = 0;
983 return escaped;
984 }
985
986 void memory_region_init(MemoryRegion *mr,
987 Object *owner,
988 const char *name,
989 uint64_t size)
990 {
991 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
992 mr->size = int128_make64(size);
993 if (size == UINT64_MAX) {
994 mr->size = int128_2_64();
995 }
996 mr->name = g_strdup(name);
997 mr->owner = owner;
998 mr->ram_block = NULL;
999
1000 if (name) {
1001 char *escaped_name = memory_region_escape_name(name);
1002 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1003
1004 if (!owner) {
1005 owner = container_get(qdev_get_machine(), "/unattached");
1006 }
1007
1008 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
1009 object_unref(OBJECT(mr));
1010 g_free(name_array);
1011 g_free(escaped_name);
1012 }
1013 }
1014
1015 static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1016 void *opaque, Error **errp)
1017 {
1018 MemoryRegion *mr = MEMORY_REGION(obj);
1019 uint64_t value = mr->addr;
1020
1021 visit_type_uint64(v, name, &value, errp);
1022 }
1023
1024 static void memory_region_get_container(Object *obj, Visitor *v,
1025 const char *name, void *opaque,
1026 Error **errp)
1027 {
1028 MemoryRegion *mr = MEMORY_REGION(obj);
1029 gchar *path = (gchar *)"";
1030
1031 if (mr->container) {
1032 path = object_get_canonical_path(OBJECT(mr->container));
1033 }
1034 visit_type_str(v, name, &path, errp);
1035 if (mr->container) {
1036 g_free(path);
1037 }
1038 }
1039
1040 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1041 const char *part)
1042 {
1043 MemoryRegion *mr = MEMORY_REGION(obj);
1044
1045 return OBJECT(mr->container);
1046 }
1047
1048 static void memory_region_get_priority(Object *obj, Visitor *v,
1049 const char *name, void *opaque,
1050 Error **errp)
1051 {
1052 MemoryRegion *mr = MEMORY_REGION(obj);
1053 int32_t value = mr->priority;
1054
1055 visit_type_int32(v, name, &value, errp);
1056 }
1057
1058 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1059 void *opaque, Error **errp)
1060 {
1061 MemoryRegion *mr = MEMORY_REGION(obj);
1062 uint64_t value = memory_region_size(mr);
1063
1064 visit_type_uint64(v, name, &value, errp);
1065 }
1066
1067 static void memory_region_initfn(Object *obj)
1068 {
1069 MemoryRegion *mr = MEMORY_REGION(obj);
1070 ObjectProperty *op;
1071
1072 mr->ops = &unassigned_mem_ops;
1073 mr->enabled = true;
1074 mr->romd_mode = true;
1075 mr->global_locking = true;
1076 mr->destructor = memory_region_destructor_none;
1077 QTAILQ_INIT(&mr->subregions);
1078 QTAILQ_INIT(&mr->coalesced);
1079
1080 op = object_property_add(OBJECT(mr), "container",
1081 "link<" TYPE_MEMORY_REGION ">",
1082 memory_region_get_container,
1083 NULL, /* memory_region_set_container */
1084 NULL, NULL, &error_abort);
1085 op->resolve = memory_region_resolve_container;
1086
1087 object_property_add(OBJECT(mr), "addr", "uint64",
1088 memory_region_get_addr,
1089 NULL, /* memory_region_set_addr */
1090 NULL, NULL, &error_abort);
1091 object_property_add(OBJECT(mr), "priority", "uint32",
1092 memory_region_get_priority,
1093 NULL, /* memory_region_set_priority */
1094 NULL, NULL, &error_abort);
1095 object_property_add(OBJECT(mr), "size", "uint64",
1096 memory_region_get_size,
1097 NULL, /* memory_region_set_size, */
1098 NULL, NULL, &error_abort);
1099 }
1100
1101 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1102 unsigned size)
1103 {
1104 #ifdef DEBUG_UNASSIGNED
1105 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1106 #endif
1107 if (current_cpu != NULL) {
1108 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1109 }
1110 return 0;
1111 }
1112
1113 static void unassigned_mem_write(void *opaque, hwaddr addr,
1114 uint64_t val, unsigned size)
1115 {
1116 #ifdef DEBUG_UNASSIGNED
1117 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1118 #endif
1119 if (current_cpu != NULL) {
1120 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1121 }
1122 }
1123
1124 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1125 unsigned size, bool is_write)
1126 {
1127 return false;
1128 }
1129
1130 const MemoryRegionOps unassigned_mem_ops = {
1131 .valid.accepts = unassigned_mem_accepts,
1132 .endianness = DEVICE_NATIVE_ENDIAN,
1133 };
1134
1135 static uint64_t memory_region_ram_device_read(void *opaque,
1136 hwaddr addr, unsigned size)
1137 {
1138 MemoryRegion *mr = opaque;
1139 uint64_t data = (uint64_t)~0;
1140
1141 switch (size) {
1142 case 1:
1143 data = *(uint8_t *)(mr->ram_block->host + addr);
1144 break;
1145 case 2:
1146 data = *(uint16_t *)(mr->ram_block->host + addr);
1147 break;
1148 case 4:
1149 data = *(uint32_t *)(mr->ram_block->host + addr);
1150 break;
1151 case 8:
1152 data = *(uint64_t *)(mr->ram_block->host + addr);
1153 break;
1154 }
1155
1156 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1157
1158 return data;
1159 }
1160
1161 static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1162 uint64_t data, unsigned size)
1163 {
1164 MemoryRegion *mr = opaque;
1165
1166 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1167
1168 switch (size) {
1169 case 1:
1170 *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1171 break;
1172 case 2:
1173 *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1174 break;
1175 case 4:
1176 *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1177 break;
1178 case 8:
1179 *(uint64_t *)(mr->ram_block->host + addr) = data;
1180 break;
1181 }
1182 }
1183
1184 static const MemoryRegionOps ram_device_mem_ops = {
1185 .read = memory_region_ram_device_read,
1186 .write = memory_region_ram_device_write,
1187 .endianness = DEVICE_NATIVE_ENDIAN,
1188 .valid = {
1189 .min_access_size = 1,
1190 .max_access_size = 8,
1191 .unaligned = true,
1192 },
1193 .impl = {
1194 .min_access_size = 1,
1195 .max_access_size = 8,
1196 .unaligned = true,
1197 },
1198 };
1199
1200 bool memory_region_access_valid(MemoryRegion *mr,
1201 hwaddr addr,
1202 unsigned size,
1203 bool is_write)
1204 {
1205 int access_size_min, access_size_max;
1206 int access_size, i;
1207
1208 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1209 return false;
1210 }
1211
1212 if (!mr->ops->valid.accepts) {
1213 return true;
1214 }
1215
1216 access_size_min = mr->ops->valid.min_access_size;
1217 if (!mr->ops->valid.min_access_size) {
1218 access_size_min = 1;
1219 }
1220
1221 access_size_max = mr->ops->valid.max_access_size;
1222 if (!mr->ops->valid.max_access_size) {
1223 access_size_max = 4;
1224 }
1225
1226 access_size = MAX(MIN(size, access_size_max), access_size_min);
1227 for (i = 0; i < size; i += access_size) {
1228 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1229 is_write)) {
1230 return false;
1231 }
1232 }
1233
1234 return true;
1235 }
1236
1237 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1238 hwaddr addr,
1239 uint64_t *pval,
1240 unsigned size,
1241 MemTxAttrs attrs)
1242 {
1243 *pval = 0;
1244
1245 if (mr->ops->read) {
1246 return access_with_adjusted_size(addr, pval, size,
1247 mr->ops->impl.min_access_size,
1248 mr->ops->impl.max_access_size,
1249 memory_region_read_accessor,
1250 mr, attrs);
1251 } else if (mr->ops->read_with_attrs) {
1252 return access_with_adjusted_size(addr, pval, size,
1253 mr->ops->impl.min_access_size,
1254 mr->ops->impl.max_access_size,
1255 memory_region_read_with_attrs_accessor,
1256 mr, attrs);
1257 } else {
1258 return access_with_adjusted_size(addr, pval, size, 1, 4,
1259 memory_region_oldmmio_read_accessor,
1260 mr, attrs);
1261 }
1262 }
1263
1264 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1265 hwaddr addr,
1266 uint64_t *pval,
1267 unsigned size,
1268 MemTxAttrs attrs)
1269 {
1270 MemTxResult r;
1271
1272 if (!memory_region_access_valid(mr, addr, size, false)) {
1273 *pval = unassigned_mem_read(mr, addr, size);
1274 return MEMTX_DECODE_ERROR;
1275 }
1276
1277 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1278 adjust_endianness(mr, pval, size);
1279 return r;
1280 }
1281
1282 /* Return true if an eventfd was signalled */
1283 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1284 hwaddr addr,
1285 uint64_t data,
1286 unsigned size,
1287 MemTxAttrs attrs)
1288 {
1289 MemoryRegionIoeventfd ioeventfd = {
1290 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1291 .data = data,
1292 };
1293 unsigned i;
1294
1295 for (i = 0; i < mr->ioeventfd_nb; i++) {
1296 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1297 ioeventfd.e = mr->ioeventfds[i].e;
1298
1299 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1300 event_notifier_set(ioeventfd.e);
1301 return true;
1302 }
1303 }
1304
1305 return false;
1306 }
1307
1308 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1309 hwaddr addr,
1310 uint64_t data,
1311 unsigned size,
1312 MemTxAttrs attrs)
1313 {
1314 if (!memory_region_access_valid(mr, addr, size, true)) {
1315 unassigned_mem_write(mr, addr, data, size);
1316 return MEMTX_DECODE_ERROR;
1317 }
1318
1319 adjust_endianness(mr, &data, size);
1320
1321 if ((!kvm_eventfds_enabled()) &&
1322 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1323 return MEMTX_OK;
1324 }
1325
1326 if (mr->ops->write) {
1327 return access_with_adjusted_size(addr, &data, size,
1328 mr->ops->impl.min_access_size,
1329 mr->ops->impl.max_access_size,
1330 memory_region_write_accessor, mr,
1331 attrs);
1332 } else if (mr->ops->write_with_attrs) {
1333 return
1334 access_with_adjusted_size(addr, &data, size,
1335 mr->ops->impl.min_access_size,
1336 mr->ops->impl.max_access_size,
1337 memory_region_write_with_attrs_accessor,
1338 mr, attrs);
1339 } else {
1340 return access_with_adjusted_size(addr, &data, size, 1, 4,
1341 memory_region_oldmmio_write_accessor,
1342 mr, attrs);
1343 }
1344 }
1345
1346 void memory_region_init_io(MemoryRegion *mr,
1347 Object *owner,
1348 const MemoryRegionOps *ops,
1349 void *opaque,
1350 const char *name,
1351 uint64_t size)
1352 {
1353 memory_region_init(mr, owner, name, size);
1354 mr->ops = ops ? ops : &unassigned_mem_ops;
1355 mr->opaque = opaque;
1356 mr->terminates = true;
1357 }
1358
1359 void memory_region_init_ram(MemoryRegion *mr,
1360 Object *owner,
1361 const char *name,
1362 uint64_t size,
1363 Error **errp)
1364 {
1365 memory_region_init(mr, owner, name, size);
1366 mr->ram = true;
1367 mr->terminates = true;
1368 mr->destructor = memory_region_destructor_ram;
1369 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1370 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1371 }
1372
1373 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1374 Object *owner,
1375 const char *name,
1376 uint64_t size,
1377 uint64_t max_size,
1378 void (*resized)(const char*,
1379 uint64_t length,
1380 void *host),
1381 Error **errp)
1382 {
1383 memory_region_init(mr, owner, name, size);
1384 mr->ram = true;
1385 mr->terminates = true;
1386 mr->destructor = memory_region_destructor_ram;
1387 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1388 mr, errp);
1389 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1390 }
1391
1392 #ifdef __linux__
1393 void memory_region_init_ram_from_file(MemoryRegion *mr,
1394 struct Object *owner,
1395 const char *name,
1396 uint64_t size,
1397 bool share,
1398 const char *path,
1399 Error **errp)
1400 {
1401 memory_region_init(mr, owner, name, size);
1402 mr->ram = true;
1403 mr->terminates = true;
1404 mr->destructor = memory_region_destructor_ram;
1405 mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1406 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1407 }
1408 #endif
1409
1410 void memory_region_init_ram_ptr(MemoryRegion *mr,
1411 Object *owner,
1412 const char *name,
1413 uint64_t size,
1414 void *ptr)
1415 {
1416 memory_region_init(mr, owner, name, size);
1417 mr->ram = true;
1418 mr->terminates = true;
1419 mr->destructor = memory_region_destructor_ram;
1420 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1421
1422 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1423 assert(ptr != NULL);
1424 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1425 }
1426
1427 void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1428 Object *owner,
1429 const char *name,
1430 uint64_t size,
1431 void *ptr)
1432 {
1433 memory_region_init_ram_ptr(mr, owner, name, size, ptr);
1434 mr->ram_device = true;
1435 mr->ops = &ram_device_mem_ops;
1436 mr->opaque = mr;
1437 }
1438
1439 void memory_region_init_alias(MemoryRegion *mr,
1440 Object *owner,
1441 const char *name,
1442 MemoryRegion *orig,
1443 hwaddr offset,
1444 uint64_t size)
1445 {
1446 memory_region_init(mr, owner, name, size);
1447 mr->alias = orig;
1448 mr->alias_offset = offset;
1449 }
1450
1451 void memory_region_init_rom(MemoryRegion *mr,
1452 struct Object *owner,
1453 const char *name,
1454 uint64_t size,
1455 Error **errp)
1456 {
1457 memory_region_init(mr, owner, name, size);
1458 mr->ram = true;
1459 mr->readonly = true;
1460 mr->terminates = true;
1461 mr->destructor = memory_region_destructor_ram;
1462 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1463 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1464 }
1465
1466 void memory_region_init_rom_device(MemoryRegion *mr,
1467 Object *owner,
1468 const MemoryRegionOps *ops,
1469 void *opaque,
1470 const char *name,
1471 uint64_t size,
1472 Error **errp)
1473 {
1474 assert(ops);
1475 memory_region_init(mr, owner, name, size);
1476 mr->ops = ops;
1477 mr->opaque = opaque;
1478 mr->terminates = true;
1479 mr->rom_device = true;
1480 mr->destructor = memory_region_destructor_rom_device;
1481 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1482 }
1483
1484 void memory_region_init_iommu(MemoryRegion *mr,
1485 Object *owner,
1486 const MemoryRegionIOMMUOps *ops,
1487 const char *name,
1488 uint64_t size)
1489 {
1490 memory_region_init(mr, owner, name, size);
1491 mr->iommu_ops = ops,
1492 mr->terminates = true; /* then re-forwards */
1493 notifier_list_init(&mr->iommu_notify);
1494 }
1495
1496 static void memory_region_finalize(Object *obj)
1497 {
1498 MemoryRegion *mr = MEMORY_REGION(obj);
1499
1500 assert(!mr->container);
1501
1502 /* We know the region is not visible in any address space (it
1503 * does not have a container and cannot be a root either because
1504 * it has no references, so we can blindly clear mr->enabled.
1505 * memory_region_set_enabled instead could trigger a transaction
1506 * and cause an infinite loop.
1507 */
1508 mr->enabled = false;
1509 memory_region_transaction_begin();
1510 while (!QTAILQ_EMPTY(&mr->subregions)) {
1511 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1512 memory_region_del_subregion(mr, subregion);
1513 }
1514 memory_region_transaction_commit();
1515
1516 mr->destructor(mr);
1517 memory_region_clear_coalescing(mr);
1518 g_free((char *)mr->name);
1519 g_free(mr->ioeventfds);
1520 }
1521
1522 Object *memory_region_owner(MemoryRegion *mr)
1523 {
1524 Object *obj = OBJECT(mr);
1525 return obj->parent;
1526 }
1527
1528 void memory_region_ref(MemoryRegion *mr)
1529 {
1530 /* MMIO callbacks most likely will access data that belongs
1531 * to the owner, hence the need to ref/unref the owner whenever
1532 * the memory region is in use.
1533 *
1534 * The memory region is a child of its owner. As long as the
1535 * owner doesn't call unparent itself on the memory region,
1536 * ref-ing the owner will also keep the memory region alive.
1537 * Memory regions without an owner are supposed to never go away;
1538 * we do not ref/unref them because it slows down DMA sensibly.
1539 */
1540 if (mr && mr->owner) {
1541 object_ref(mr->owner);
1542 }
1543 }
1544
1545 void memory_region_unref(MemoryRegion *mr)
1546 {
1547 if (mr && mr->owner) {
1548 object_unref(mr->owner);
1549 }
1550 }
1551
1552 uint64_t memory_region_size(MemoryRegion *mr)
1553 {
1554 if (int128_eq(mr->size, int128_2_64())) {
1555 return UINT64_MAX;
1556 }
1557 return int128_get64(mr->size);
1558 }
1559
1560 const char *memory_region_name(const MemoryRegion *mr)
1561 {
1562 if (!mr->name) {
1563 ((MemoryRegion *)mr)->name =
1564 object_get_canonical_path_component(OBJECT(mr));
1565 }
1566 return mr->name;
1567 }
1568
1569 bool memory_region_is_ram_device(MemoryRegion *mr)
1570 {
1571 return mr->ram_device;
1572 }
1573
1574 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1575 {
1576 uint8_t mask = mr->dirty_log_mask;
1577 if (global_dirty_log) {
1578 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1579 }
1580 return mask;
1581 }
1582
1583 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1584 {
1585 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1586 }
1587
1588 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1589 {
1590 if (mr->iommu_ops->notify_started &&
1591 QLIST_EMPTY(&mr->iommu_notify.notifiers)) {
1592 mr->iommu_ops->notify_started(mr);
1593 }
1594 notifier_list_add(&mr->iommu_notify, n);
1595 }
1596
1597 uint64_t memory_region_iommu_get_min_page_size(MemoryRegion *mr)
1598 {
1599 assert(memory_region_is_iommu(mr));
1600 if (mr->iommu_ops && mr->iommu_ops->get_min_page_size) {
1601 return mr->iommu_ops->get_min_page_size(mr);
1602 }
1603 return TARGET_PAGE_SIZE;
1604 }
1605
1606 void memory_region_iommu_replay(MemoryRegion *mr, Notifier *n, bool is_write)
1607 {
1608 hwaddr addr, granularity;
1609 IOMMUTLBEntry iotlb;
1610
1611 granularity = memory_region_iommu_get_min_page_size(mr);
1612
1613 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1614 iotlb = mr->iommu_ops->translate(mr, addr, is_write);
1615 if (iotlb.perm != IOMMU_NONE) {
1616 n->notify(n, &iotlb);
1617 }
1618
1619 /* if (2^64 - MR size) < granularity, it's possible to get an
1620 * infinite loop here. This should catch such a wraparound */
1621 if ((addr + granularity) < addr) {
1622 break;
1623 }
1624 }
1625 }
1626
1627 void memory_region_unregister_iommu_notifier(MemoryRegion *mr, Notifier *n)
1628 {
1629 notifier_remove(n);
1630 if (mr->iommu_ops->notify_stopped &&
1631 QLIST_EMPTY(&mr->iommu_notify.notifiers)) {
1632 mr->iommu_ops->notify_stopped(mr);
1633 }
1634 }
1635
1636 void memory_region_notify_iommu(MemoryRegion *mr,
1637 IOMMUTLBEntry entry)
1638 {
1639 assert(memory_region_is_iommu(mr));
1640 notifier_list_notify(&mr->iommu_notify, &entry);
1641 }
1642
1643 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1644 {
1645 uint8_t mask = 1 << client;
1646 uint8_t old_logging;
1647
1648 assert(client == DIRTY_MEMORY_VGA);
1649 old_logging = mr->vga_logging_count;
1650 mr->vga_logging_count += log ? 1 : -1;
1651 if (!!old_logging == !!mr->vga_logging_count) {
1652 return;
1653 }
1654
1655 memory_region_transaction_begin();
1656 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1657 memory_region_update_pending |= mr->enabled;
1658 memory_region_transaction_commit();
1659 }
1660
1661 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1662 hwaddr size, unsigned client)
1663 {
1664 assert(mr->ram_block);
1665 return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
1666 size, client);
1667 }
1668
1669 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1670 hwaddr size)
1671 {
1672 assert(mr->ram_block);
1673 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
1674 size,
1675 memory_region_get_dirty_log_mask(mr));
1676 }
1677
1678 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1679 hwaddr size, unsigned client)
1680 {
1681 assert(mr->ram_block);
1682 return cpu_physical_memory_test_and_clear_dirty(
1683 memory_region_get_ram_addr(mr) + addr, size, client);
1684 }
1685
1686
1687 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1688 {
1689 AddressSpace *as;
1690 FlatRange *fr;
1691
1692 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1693 FlatView *view = address_space_get_flatview(as);
1694 FOR_EACH_FLAT_RANGE(fr, view) {
1695 if (fr->mr == mr) {
1696 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1697 }
1698 }
1699 flatview_unref(view);
1700 }
1701 }
1702
1703 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1704 {
1705 if (mr->readonly != readonly) {
1706 memory_region_transaction_begin();
1707 mr->readonly = readonly;
1708 memory_region_update_pending |= mr->enabled;
1709 memory_region_transaction_commit();
1710 }
1711 }
1712
1713 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1714 {
1715 if (mr->romd_mode != romd_mode) {
1716 memory_region_transaction_begin();
1717 mr->romd_mode = romd_mode;
1718 memory_region_update_pending |= mr->enabled;
1719 memory_region_transaction_commit();
1720 }
1721 }
1722
1723 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1724 hwaddr size, unsigned client)
1725 {
1726 assert(mr->ram_block);
1727 cpu_physical_memory_test_and_clear_dirty(
1728 memory_region_get_ram_addr(mr) + addr, size, client);
1729 }
1730
1731 int memory_region_get_fd(MemoryRegion *mr)
1732 {
1733 int fd;
1734
1735 rcu_read_lock();
1736 while (mr->alias) {
1737 mr = mr->alias;
1738 }
1739 fd = mr->ram_block->fd;
1740 rcu_read_unlock();
1741
1742 return fd;
1743 }
1744
1745 void memory_region_set_fd(MemoryRegion *mr, int fd)
1746 {
1747 rcu_read_lock();
1748 while (mr->alias) {
1749 mr = mr->alias;
1750 }
1751 mr->ram_block->fd = fd;
1752 rcu_read_unlock();
1753 }
1754
1755 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1756 {
1757 void *ptr;
1758 uint64_t offset = 0;
1759
1760 rcu_read_lock();
1761 while (mr->alias) {
1762 offset += mr->alias_offset;
1763 mr = mr->alias;
1764 }
1765 assert(mr->ram_block);
1766 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
1767 rcu_read_unlock();
1768
1769 return ptr;
1770 }
1771
1772 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
1773 {
1774 RAMBlock *block;
1775
1776 block = qemu_ram_block_from_host(ptr, false, offset);
1777 if (!block) {
1778 return NULL;
1779 }
1780
1781 return block->mr;
1782 }
1783
1784 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1785 {
1786 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
1787 }
1788
1789 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1790 {
1791 assert(mr->ram_block);
1792
1793 qemu_ram_resize(mr->ram_block, newsize, errp);
1794 }
1795
1796 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1797 {
1798 FlatView *view;
1799 FlatRange *fr;
1800 CoalescedMemoryRange *cmr;
1801 AddrRange tmp;
1802 MemoryRegionSection section;
1803
1804 view = address_space_get_flatview(as);
1805 FOR_EACH_FLAT_RANGE(fr, view) {
1806 if (fr->mr == mr) {
1807 section = (MemoryRegionSection) {
1808 .address_space = as,
1809 .offset_within_address_space = int128_get64(fr->addr.start),
1810 .size = fr->addr.size,
1811 };
1812
1813 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1814 int128_get64(fr->addr.start),
1815 int128_get64(fr->addr.size));
1816 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1817 tmp = addrrange_shift(cmr->addr,
1818 int128_sub(fr->addr.start,
1819 int128_make64(fr->offset_in_region)));
1820 if (!addrrange_intersects(tmp, fr->addr)) {
1821 continue;
1822 }
1823 tmp = addrrange_intersection(tmp, fr->addr);
1824 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1825 int128_get64(tmp.start),
1826 int128_get64(tmp.size));
1827 }
1828 }
1829 }
1830 flatview_unref(view);
1831 }
1832
1833 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1834 {
1835 AddressSpace *as;
1836
1837 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1838 memory_region_update_coalesced_range_as(mr, as);
1839 }
1840 }
1841
1842 void memory_region_set_coalescing(MemoryRegion *mr)
1843 {
1844 memory_region_clear_coalescing(mr);
1845 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1846 }
1847
1848 void memory_region_add_coalescing(MemoryRegion *mr,
1849 hwaddr offset,
1850 uint64_t size)
1851 {
1852 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1853
1854 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1855 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1856 memory_region_update_coalesced_range(mr);
1857 memory_region_set_flush_coalesced(mr);
1858 }
1859
1860 void memory_region_clear_coalescing(MemoryRegion *mr)
1861 {
1862 CoalescedMemoryRange *cmr;
1863 bool updated = false;
1864
1865 qemu_flush_coalesced_mmio_buffer();
1866 mr->flush_coalesced_mmio = false;
1867
1868 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1869 cmr = QTAILQ_FIRST(&mr->coalesced);
1870 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1871 g_free(cmr);
1872 updated = true;
1873 }
1874
1875 if (updated) {
1876 memory_region_update_coalesced_range(mr);
1877 }
1878 }
1879
1880 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1881 {
1882 mr->flush_coalesced_mmio = true;
1883 }
1884
1885 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1886 {
1887 qemu_flush_coalesced_mmio_buffer();
1888 if (QTAILQ_EMPTY(&mr->coalesced)) {
1889 mr->flush_coalesced_mmio = false;
1890 }
1891 }
1892
1893 void memory_region_set_global_locking(MemoryRegion *mr)
1894 {
1895 mr->global_locking = true;
1896 }
1897
1898 void memory_region_clear_global_locking(MemoryRegion *mr)
1899 {
1900 mr->global_locking = false;
1901 }
1902
1903 static bool userspace_eventfd_warning;
1904
1905 void memory_region_add_eventfd(MemoryRegion *mr,
1906 hwaddr addr,
1907 unsigned size,
1908 bool match_data,
1909 uint64_t data,
1910 EventNotifier *e)
1911 {
1912 MemoryRegionIoeventfd mrfd = {
1913 .addr.start = int128_make64(addr),
1914 .addr.size = int128_make64(size),
1915 .match_data = match_data,
1916 .data = data,
1917 .e = e,
1918 };
1919 unsigned i;
1920
1921 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
1922 userspace_eventfd_warning))) {
1923 userspace_eventfd_warning = true;
1924 error_report("Using eventfd without MMIO binding in KVM. "
1925 "Suboptimal performance expected");
1926 }
1927
1928 if (size) {
1929 adjust_endianness(mr, &mrfd.data, size);
1930 }
1931 memory_region_transaction_begin();
1932 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1933 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1934 break;
1935 }
1936 }
1937 ++mr->ioeventfd_nb;
1938 mr->ioeventfds = g_realloc(mr->ioeventfds,
1939 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1940 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1941 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1942 mr->ioeventfds[i] = mrfd;
1943 ioeventfd_update_pending |= mr->enabled;
1944 memory_region_transaction_commit();
1945 }
1946
1947 void memory_region_del_eventfd(MemoryRegion *mr,
1948 hwaddr addr,
1949 unsigned size,
1950 bool match_data,
1951 uint64_t data,
1952 EventNotifier *e)
1953 {
1954 MemoryRegionIoeventfd mrfd = {
1955 .addr.start = int128_make64(addr),
1956 .addr.size = int128_make64(size),
1957 .match_data = match_data,
1958 .data = data,
1959 .e = e,
1960 };
1961 unsigned i;
1962
1963 if (size) {
1964 adjust_endianness(mr, &mrfd.data, size);
1965 }
1966 memory_region_transaction_begin();
1967 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1968 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1969 break;
1970 }
1971 }
1972 assert(i != mr->ioeventfd_nb);
1973 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1974 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1975 --mr->ioeventfd_nb;
1976 mr->ioeventfds = g_realloc(mr->ioeventfds,
1977 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1978 ioeventfd_update_pending |= mr->enabled;
1979 memory_region_transaction_commit();
1980 }
1981
1982 static void memory_region_update_container_subregions(MemoryRegion *subregion)
1983 {
1984 MemoryRegion *mr = subregion->container;
1985 MemoryRegion *other;
1986
1987 memory_region_transaction_begin();
1988
1989 memory_region_ref(subregion);
1990 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1991 if (subregion->priority >= other->priority) {
1992 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1993 goto done;
1994 }
1995 }
1996 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1997 done:
1998 memory_region_update_pending |= mr->enabled && subregion->enabled;
1999 memory_region_transaction_commit();
2000 }
2001
2002 static void memory_region_add_subregion_common(MemoryRegion *mr,
2003 hwaddr offset,
2004 MemoryRegion *subregion)
2005 {
2006 assert(!subregion->container);
2007 subregion->container = mr;
2008 subregion->addr = offset;
2009 memory_region_update_container_subregions(subregion);
2010 }
2011
2012 void memory_region_add_subregion(MemoryRegion *mr,
2013 hwaddr offset,
2014 MemoryRegion *subregion)
2015 {
2016 subregion->priority = 0;
2017 memory_region_add_subregion_common(mr, offset, subregion);
2018 }
2019
2020 void memory_region_add_subregion_overlap(MemoryRegion *mr,
2021 hwaddr offset,
2022 MemoryRegion *subregion,
2023 int priority)
2024 {
2025 subregion->priority = priority;
2026 memory_region_add_subregion_common(mr, offset, subregion);
2027 }
2028
2029 void memory_region_del_subregion(MemoryRegion *mr,
2030 MemoryRegion *subregion)
2031 {
2032 memory_region_transaction_begin();
2033 assert(subregion->container == mr);
2034 subregion->container = NULL;
2035 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2036 memory_region_unref(subregion);
2037 memory_region_update_pending |= mr->enabled && subregion->enabled;
2038 memory_region_transaction_commit();
2039 }
2040
2041 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2042 {
2043 if (enabled == mr->enabled) {
2044 return;
2045 }
2046 memory_region_transaction_begin();
2047 mr->enabled = enabled;
2048 memory_region_update_pending = true;
2049 memory_region_transaction_commit();
2050 }
2051
2052 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2053 {
2054 Int128 s = int128_make64(size);
2055
2056 if (size == UINT64_MAX) {
2057 s = int128_2_64();
2058 }
2059 if (int128_eq(s, mr->size)) {
2060 return;
2061 }
2062 memory_region_transaction_begin();
2063 mr->size = s;
2064 memory_region_update_pending = true;
2065 memory_region_transaction_commit();
2066 }
2067
2068 static void memory_region_readd_subregion(MemoryRegion *mr)
2069 {
2070 MemoryRegion *container = mr->container;
2071
2072 if (container) {
2073 memory_region_transaction_begin();
2074 memory_region_ref(mr);
2075 memory_region_del_subregion(container, mr);
2076 mr->container = container;
2077 memory_region_update_container_subregions(mr);
2078 memory_region_unref(mr);
2079 memory_region_transaction_commit();
2080 }
2081 }
2082
2083 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2084 {
2085 if (addr != mr->addr) {
2086 mr->addr = addr;
2087 memory_region_readd_subregion(mr);
2088 }
2089 }
2090
2091 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2092 {
2093 assert(mr->alias);
2094
2095 if (offset == mr->alias_offset) {
2096 return;
2097 }
2098
2099 memory_region_transaction_begin();
2100 mr->alias_offset = offset;
2101 memory_region_update_pending |= mr->enabled;
2102 memory_region_transaction_commit();
2103 }
2104
2105 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2106 {
2107 return mr->align;
2108 }
2109
2110 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2111 {
2112 const AddrRange *addr = addr_;
2113 const FlatRange *fr = fr_;
2114
2115 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2116 return -1;
2117 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2118 return 1;
2119 }
2120 return 0;
2121 }
2122
2123 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2124 {
2125 return bsearch(&addr, view->ranges, view->nr,
2126 sizeof(FlatRange), cmp_flatrange_addr);
2127 }
2128
2129 bool memory_region_is_mapped(MemoryRegion *mr)
2130 {
2131 return mr->container ? true : false;
2132 }
2133
2134 /* Same as memory_region_find, but it does not add a reference to the
2135 * returned region. It must be called from an RCU critical section.
2136 */
2137 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2138 hwaddr addr, uint64_t size)
2139 {
2140 MemoryRegionSection ret = { .mr = NULL };
2141 MemoryRegion *root;
2142 AddressSpace *as;
2143 AddrRange range;
2144 FlatView *view;
2145 FlatRange *fr;
2146
2147 addr += mr->addr;
2148 for (root = mr; root->container; ) {
2149 root = root->container;
2150 addr += root->addr;
2151 }
2152
2153 as = memory_region_to_address_space(root);
2154 if (!as) {
2155 return ret;
2156 }
2157 range = addrrange_make(int128_make64(addr), int128_make64(size));
2158
2159 view = atomic_rcu_read(&as->current_map);
2160 fr = flatview_lookup(view, range);
2161 if (!fr) {
2162 return ret;
2163 }
2164
2165 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2166 --fr;
2167 }
2168
2169 ret.mr = fr->mr;
2170 ret.address_space = as;
2171 range = addrrange_intersection(range, fr->addr);
2172 ret.offset_within_region = fr->offset_in_region;
2173 ret.offset_within_region += int128_get64(int128_sub(range.start,
2174 fr->addr.start));
2175 ret.size = range.size;
2176 ret.offset_within_address_space = int128_get64(range.start);
2177 ret.readonly = fr->readonly;
2178 return ret;
2179 }
2180
2181 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2182 hwaddr addr, uint64_t size)
2183 {
2184 MemoryRegionSection ret;
2185 rcu_read_lock();
2186 ret = memory_region_find_rcu(mr, addr, size);
2187 if (ret.mr) {
2188 memory_region_ref(ret.mr);
2189 }
2190 rcu_read_unlock();
2191 return ret;
2192 }
2193
2194 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2195 {
2196 MemoryRegion *mr;
2197
2198 rcu_read_lock();
2199 mr = memory_region_find_rcu(container, addr, 1).mr;
2200 rcu_read_unlock();
2201 return mr && mr != container;
2202 }
2203
2204 void address_space_sync_dirty_bitmap(AddressSpace *as)
2205 {
2206 FlatView *view;
2207 FlatRange *fr;
2208
2209 view = address_space_get_flatview(as);
2210 FOR_EACH_FLAT_RANGE(fr, view) {
2211 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
2212 }
2213 flatview_unref(view);
2214 }
2215
2216 void memory_global_dirty_log_start(void)
2217 {
2218 global_dirty_log = true;
2219
2220 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2221
2222 /* Refresh DIRTY_LOG_MIGRATION bit. */
2223 memory_region_transaction_begin();
2224 memory_region_update_pending = true;
2225 memory_region_transaction_commit();
2226 }
2227
2228 void memory_global_dirty_log_stop(void)
2229 {
2230 global_dirty_log = false;
2231
2232 /* Refresh DIRTY_LOG_MIGRATION bit. */
2233 memory_region_transaction_begin();
2234 memory_region_update_pending = true;
2235 memory_region_transaction_commit();
2236
2237 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2238 }
2239
2240 static void listener_add_address_space(MemoryListener *listener,
2241 AddressSpace *as)
2242 {
2243 FlatView *view;
2244 FlatRange *fr;
2245
2246 if (listener->address_space_filter
2247 && listener->address_space_filter != as) {
2248 return;
2249 }
2250
2251 if (listener->begin) {
2252 listener->begin(listener);
2253 }
2254 if (global_dirty_log) {
2255 if (listener->log_global_start) {
2256 listener->log_global_start(listener);
2257 }
2258 }
2259
2260 view = address_space_get_flatview(as);
2261 FOR_EACH_FLAT_RANGE(fr, view) {
2262 MemoryRegionSection section = {
2263 .mr = fr->mr,
2264 .address_space = as,
2265 .offset_within_region = fr->offset_in_region,
2266 .size = fr->addr.size,
2267 .offset_within_address_space = int128_get64(fr->addr.start),
2268 .readonly = fr->readonly,
2269 };
2270 if (fr->dirty_log_mask && listener->log_start) {
2271 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2272 }
2273 if (listener->region_add) {
2274 listener->region_add(listener, &section);
2275 }
2276 }
2277 if (listener->commit) {
2278 listener->commit(listener);
2279 }
2280 flatview_unref(view);
2281 }
2282
2283 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
2284 {
2285 MemoryListener *other = NULL;
2286 AddressSpace *as;
2287
2288 listener->address_space_filter = filter;
2289 if (QTAILQ_EMPTY(&memory_listeners)
2290 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2291 memory_listeners)->priority) {
2292 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2293 } else {
2294 QTAILQ_FOREACH(other, &memory_listeners, link) {
2295 if (listener->priority < other->priority) {
2296 break;
2297 }
2298 }
2299 QTAILQ_INSERT_BEFORE(other, listener, link);
2300 }
2301
2302 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2303 listener_add_address_space(listener, as);
2304 }
2305 }
2306
2307 void memory_listener_unregister(MemoryListener *listener)
2308 {
2309 QTAILQ_REMOVE(&memory_listeners, listener, link);
2310 }
2311
2312 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2313 {
2314 memory_region_ref(root);
2315 memory_region_transaction_begin();
2316 as->ref_count = 1;
2317 as->root = root;
2318 as->malloced = false;
2319 as->current_map = g_new(FlatView, 1);
2320 flatview_init(as->current_map);
2321 as->ioeventfd_nb = 0;
2322 as->ioeventfds = NULL;
2323 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2324 as->name = g_strdup(name ? name : "anonymous");
2325 address_space_init_dispatch(as);
2326 memory_region_update_pending |= root->enabled;
2327 memory_region_transaction_commit();
2328 }
2329
2330 static void do_address_space_destroy(AddressSpace *as)
2331 {
2332 MemoryListener *listener;
2333 bool do_free = as->malloced;
2334
2335 address_space_destroy_dispatch(as);
2336
2337 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2338 assert(listener->address_space_filter != as);
2339 }
2340
2341 flatview_unref(as->current_map);
2342 g_free(as->name);
2343 g_free(as->ioeventfds);
2344 memory_region_unref(as->root);
2345 if (do_free) {
2346 g_free(as);
2347 }
2348 }
2349
2350 AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name)
2351 {
2352 AddressSpace *as;
2353
2354 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2355 if (root == as->root && as->malloced) {
2356 as->ref_count++;
2357 return as;
2358 }
2359 }
2360
2361 as = g_malloc0(sizeof *as);
2362 address_space_init(as, root, name);
2363 as->malloced = true;
2364 return as;
2365 }
2366
2367 void address_space_destroy(AddressSpace *as)
2368 {
2369 MemoryRegion *root = as->root;
2370
2371 as->ref_count--;
2372 if (as->ref_count) {
2373 return;
2374 }
2375 /* Flush out anything from MemoryListeners listening in on this */
2376 memory_region_transaction_begin();
2377 as->root = NULL;
2378 memory_region_transaction_commit();
2379 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2380 address_space_unregister(as);
2381
2382 /* At this point, as->dispatch and as->current_map are dummy
2383 * entries that the guest should never use. Wait for the old
2384 * values to expire before freeing the data.
2385 */
2386 as->root = root;
2387 call_rcu(as, do_address_space_destroy, rcu);
2388 }
2389
2390 typedef struct MemoryRegionList MemoryRegionList;
2391
2392 struct MemoryRegionList {
2393 const MemoryRegion *mr;
2394 QTAILQ_ENTRY(MemoryRegionList) queue;
2395 };
2396
2397 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2398
2399 static void mtree_print_mr(fprintf_function mon_printf, void *f,
2400 const MemoryRegion *mr, unsigned int level,
2401 hwaddr base,
2402 MemoryRegionListHead *alias_print_queue)
2403 {
2404 MemoryRegionList *new_ml, *ml, *next_ml;
2405 MemoryRegionListHead submr_print_queue;
2406 const MemoryRegion *submr;
2407 unsigned int i;
2408
2409 if (!mr) {
2410 return;
2411 }
2412
2413 for (i = 0; i < level; i++) {
2414 mon_printf(f, " ");
2415 }
2416
2417 if (mr->alias) {
2418 MemoryRegionList *ml;
2419 bool found = false;
2420
2421 /* check if the alias is already in the queue */
2422 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
2423 if (ml->mr == mr->alias) {
2424 found = true;
2425 }
2426 }
2427
2428 if (!found) {
2429 ml = g_new(MemoryRegionList, 1);
2430 ml->mr = mr->alias;
2431 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
2432 }
2433 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2434 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
2435 "-" TARGET_FMT_plx "%s\n",
2436 base + mr->addr,
2437 base + mr->addr
2438 + (int128_nz(mr->size) ?
2439 (hwaddr)int128_get64(int128_sub(mr->size,
2440 int128_one())) : 0),
2441 mr->priority,
2442 mr->romd_mode ? 'R' : '-',
2443 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2444 : '-',
2445 memory_region_name(mr),
2446 memory_region_name(mr->alias),
2447 mr->alias_offset,
2448 mr->alias_offset
2449 + (int128_nz(mr->size) ?
2450 (hwaddr)int128_get64(int128_sub(mr->size,
2451 int128_one())) : 0),
2452 mr->enabled ? "" : " [disabled]");
2453 } else {
2454 mon_printf(f,
2455 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n",
2456 base + mr->addr,
2457 base + mr->addr
2458 + (int128_nz(mr->size) ?
2459 (hwaddr)int128_get64(int128_sub(mr->size,
2460 int128_one())) : 0),
2461 mr->priority,
2462 mr->romd_mode ? 'R' : '-',
2463 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2464 : '-',
2465 memory_region_name(mr),
2466 mr->enabled ? "" : " [disabled]");
2467 }
2468
2469 QTAILQ_INIT(&submr_print_queue);
2470
2471 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2472 new_ml = g_new(MemoryRegionList, 1);
2473 new_ml->mr = submr;
2474 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2475 if (new_ml->mr->addr < ml->mr->addr ||
2476 (new_ml->mr->addr == ml->mr->addr &&
2477 new_ml->mr->priority > ml->mr->priority)) {
2478 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2479 new_ml = NULL;
2480 break;
2481 }
2482 }
2483 if (new_ml) {
2484 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2485 }
2486 }
2487
2488 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2489 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2490 alias_print_queue);
2491 }
2492
2493 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
2494 g_free(ml);
2495 }
2496 }
2497
2498 void mtree_info(fprintf_function mon_printf, void *f)
2499 {
2500 MemoryRegionListHead ml_head;
2501 MemoryRegionList *ml, *ml2;
2502 AddressSpace *as;
2503
2504 QTAILQ_INIT(&ml_head);
2505
2506 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2507 mon_printf(f, "address-space: %s\n", as->name);
2508 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2509 mon_printf(f, "\n");
2510 }
2511
2512 /* print aliased regions */
2513 QTAILQ_FOREACH(ml, &ml_head, queue) {
2514 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2515 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2516 mon_printf(f, "\n");
2517 }
2518
2519 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
2520 g_free(ml);
2521 }
2522 }
2523
2524 static const TypeInfo memory_region_info = {
2525 .parent = TYPE_OBJECT,
2526 .name = TYPE_MEMORY_REGION,
2527 .instance_size = sizeof(MemoryRegion),
2528 .instance_init = memory_region_initfn,
2529 .instance_finalize = memory_region_finalize,
2530 };
2531
2532 static void memory_register_types(void)
2533 {
2534 type_register_static(&memory_region_info);
2535 }
2536
2537 type_init(memory_register_types)
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