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memory: Access MemoryRegion with endianness
[mirror_qemu.git] / memory.c
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qapi/error.h"
18 #include "cpu.h"
19 #include "exec/memory.h"
20 #include "exec/address-spaces.h"
21 #include "qapi/visitor.h"
22 #include "qemu/bitops.h"
23 #include "qemu/error-report.h"
24 #include "qemu/main-loop.h"
25 #include "qemu/qemu-print.h"
26 #include "qom/object.h"
27 #include "trace-root.h"
28
29 #include "exec/memory-internal.h"
30 #include "exec/ram_addr.h"
31 #include "sysemu/kvm.h"
32 #include "sysemu/runstate.h"
33 #include "sysemu/tcg.h"
34 #include "sysemu/accel.h"
35 #include "hw/boards.h"
36 #include "migration/vmstate.h"
37
38 //#define DEBUG_UNASSIGNED
39
40 static unsigned memory_region_transaction_depth;
41 static bool memory_region_update_pending;
42 static bool ioeventfd_update_pending;
43 bool global_dirty_log;
44
45 static QTAILQ_HEAD(, MemoryListener) memory_listeners
46 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
47
48 static QTAILQ_HEAD(, AddressSpace) address_spaces
49 = QTAILQ_HEAD_INITIALIZER(address_spaces);
50
51 static GHashTable *flat_views;
52
53 typedef struct AddrRange AddrRange;
54
55 /*
56 * Note that signed integers are needed for negative offsetting in aliases
57 * (large MemoryRegion::alias_offset).
58 */
59 struct AddrRange {
60 Int128 start;
61 Int128 size;
62 };
63
64 static AddrRange addrrange_make(Int128 start, Int128 size)
65 {
66 return (AddrRange) { start, size };
67 }
68
69 static bool addrrange_equal(AddrRange r1, AddrRange r2)
70 {
71 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
72 }
73
74 static Int128 addrrange_end(AddrRange r)
75 {
76 return int128_add(r.start, r.size);
77 }
78
79 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
80 {
81 int128_addto(&range.start, delta);
82 return range;
83 }
84
85 static bool addrrange_contains(AddrRange range, Int128 addr)
86 {
87 return int128_ge(addr, range.start)
88 && int128_lt(addr, addrrange_end(range));
89 }
90
91 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
92 {
93 return addrrange_contains(r1, r2.start)
94 || addrrange_contains(r2, r1.start);
95 }
96
97 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
98 {
99 Int128 start = int128_max(r1.start, r2.start);
100 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
101 return addrrange_make(start, int128_sub(end, start));
102 }
103
104 enum ListenerDirection { Forward, Reverse };
105
106 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
107 do { \
108 MemoryListener *_listener; \
109 \
110 switch (_direction) { \
111 case Forward: \
112 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
116 } \
117 break; \
118 case Reverse: \
119 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, link) { \
120 if (_listener->_callback) { \
121 _listener->_callback(_listener, ##_args); \
122 } \
123 } \
124 break; \
125 default: \
126 abort(); \
127 } \
128 } while (0)
129
130 #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
131 do { \
132 MemoryListener *_listener; \
133 \
134 switch (_direction) { \
135 case Forward: \
136 QTAILQ_FOREACH(_listener, &(_as)->listeners, link_as) { \
137 if (_listener->_callback) { \
138 _listener->_callback(_listener, _section, ##_args); \
139 } \
140 } \
141 break; \
142 case Reverse: \
143 QTAILQ_FOREACH_REVERSE(_listener, &(_as)->listeners, link_as) { \
144 if (_listener->_callback) { \
145 _listener->_callback(_listener, _section, ##_args); \
146 } \
147 } \
148 break; \
149 default: \
150 abort(); \
151 } \
152 } while (0)
153
154 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
155 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
156 do { \
157 MemoryRegionSection mrs = section_from_flat_range(fr, \
158 address_space_to_flatview(as)); \
159 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
160 } while(0)
161
162 struct CoalescedMemoryRange {
163 AddrRange addr;
164 QTAILQ_ENTRY(CoalescedMemoryRange) link;
165 };
166
167 struct MemoryRegionIoeventfd {
168 AddrRange addr;
169 bool match_data;
170 uint64_t data;
171 EventNotifier *e;
172 };
173
174 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a,
175 MemoryRegionIoeventfd *b)
176 {
177 if (int128_lt(a->addr.start, b->addr.start)) {
178 return true;
179 } else if (int128_gt(a->addr.start, b->addr.start)) {
180 return false;
181 } else if (int128_lt(a->addr.size, b->addr.size)) {
182 return true;
183 } else if (int128_gt(a->addr.size, b->addr.size)) {
184 return false;
185 } else if (a->match_data < b->match_data) {
186 return true;
187 } else if (a->match_data > b->match_data) {
188 return false;
189 } else if (a->match_data) {
190 if (a->data < b->data) {
191 return true;
192 } else if (a->data > b->data) {
193 return false;
194 }
195 }
196 if (a->e < b->e) {
197 return true;
198 } else if (a->e > b->e) {
199 return false;
200 }
201 return false;
202 }
203
204 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a,
205 MemoryRegionIoeventfd *b)
206 {
207 return !memory_region_ioeventfd_before(a, b)
208 && !memory_region_ioeventfd_before(b, a);
209 }
210
211 /* Range of memory in the global map. Addresses are absolute. */
212 struct FlatRange {
213 MemoryRegion *mr;
214 hwaddr offset_in_region;
215 AddrRange addr;
216 uint8_t dirty_log_mask;
217 bool romd_mode;
218 bool readonly;
219 bool nonvolatile;
220 };
221
222 #define FOR_EACH_FLAT_RANGE(var, view) \
223 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
224
225 static inline MemoryRegionSection
226 section_from_flat_range(FlatRange *fr, FlatView *fv)
227 {
228 return (MemoryRegionSection) {
229 .mr = fr->mr,
230 .fv = fv,
231 .offset_within_region = fr->offset_in_region,
232 .size = fr->addr.size,
233 .offset_within_address_space = int128_get64(fr->addr.start),
234 .readonly = fr->readonly,
235 .nonvolatile = fr->nonvolatile,
236 };
237 }
238
239 static bool flatrange_equal(FlatRange *a, FlatRange *b)
240 {
241 return a->mr == b->mr
242 && addrrange_equal(a->addr, b->addr)
243 && a->offset_in_region == b->offset_in_region
244 && a->romd_mode == b->romd_mode
245 && a->readonly == b->readonly
246 && a->nonvolatile == b->nonvolatile;
247 }
248
249 static FlatView *flatview_new(MemoryRegion *mr_root)
250 {
251 FlatView *view;
252
253 view = g_new0(FlatView, 1);
254 view->ref = 1;
255 view->root = mr_root;
256 memory_region_ref(mr_root);
257 trace_flatview_new(view, mr_root);
258
259 return view;
260 }
261
262 /* Insert a range into a given position. Caller is responsible for maintaining
263 * sorting order.
264 */
265 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
266 {
267 if (view->nr == view->nr_allocated) {
268 view->nr_allocated = MAX(2 * view->nr, 10);
269 view->ranges = g_realloc(view->ranges,
270 view->nr_allocated * sizeof(*view->ranges));
271 }
272 memmove(view->ranges + pos + 1, view->ranges + pos,
273 (view->nr - pos) * sizeof(FlatRange));
274 view->ranges[pos] = *range;
275 memory_region_ref(range->mr);
276 ++view->nr;
277 }
278
279 static void flatview_destroy(FlatView *view)
280 {
281 int i;
282
283 trace_flatview_destroy(view, view->root);
284 if (view->dispatch) {
285 address_space_dispatch_free(view->dispatch);
286 }
287 for (i = 0; i < view->nr; i++) {
288 memory_region_unref(view->ranges[i].mr);
289 }
290 g_free(view->ranges);
291 memory_region_unref(view->root);
292 g_free(view);
293 }
294
295 static bool flatview_ref(FlatView *view)
296 {
297 return atomic_fetch_inc_nonzero(&view->ref) > 0;
298 }
299
300 void flatview_unref(FlatView *view)
301 {
302 if (atomic_fetch_dec(&view->ref) == 1) {
303 trace_flatview_destroy_rcu(view, view->root);
304 assert(view->root);
305 call_rcu(view, flatview_destroy, rcu);
306 }
307 }
308
309 static bool can_merge(FlatRange *r1, FlatRange *r2)
310 {
311 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
312 && r1->mr == r2->mr
313 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
314 r1->addr.size),
315 int128_make64(r2->offset_in_region))
316 && r1->dirty_log_mask == r2->dirty_log_mask
317 && r1->romd_mode == r2->romd_mode
318 && r1->readonly == r2->readonly
319 && r1->nonvolatile == r2->nonvolatile;
320 }
321
322 /* Attempt to simplify a view by merging adjacent ranges */
323 static void flatview_simplify(FlatView *view)
324 {
325 unsigned i, j, k;
326
327 i = 0;
328 while (i < view->nr) {
329 j = i + 1;
330 while (j < view->nr
331 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
332 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
333 ++j;
334 }
335 ++i;
336 for (k = i; k < j; k++) {
337 memory_region_unref(view->ranges[k].mr);
338 }
339 memmove(&view->ranges[i], &view->ranges[j],
340 (view->nr - j) * sizeof(view->ranges[j]));
341 view->nr -= j - i;
342 }
343 }
344
345 static bool memory_region_big_endian(MemoryRegion *mr)
346 {
347 #ifdef TARGET_WORDS_BIGENDIAN
348 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
349 #else
350 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
351 #endif
352 }
353
354 static bool memory_region_wrong_endianness(MemoryRegion *mr)
355 {
356 #ifdef TARGET_WORDS_BIGENDIAN
357 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
358 #else
359 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
360 #endif
361 }
362
363 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
364 {
365 if (memory_region_wrong_endianness(mr)) {
366 switch (size) {
367 case 1:
368 break;
369 case 2:
370 *data = bswap16(*data);
371 break;
372 case 4:
373 *data = bswap32(*data);
374 break;
375 case 8:
376 *data = bswap64(*data);
377 break;
378 default:
379 abort();
380 }
381 }
382 }
383
384 static inline void memory_region_shift_read_access(uint64_t *value,
385 signed shift,
386 uint64_t mask,
387 uint64_t tmp)
388 {
389 if (shift >= 0) {
390 *value |= (tmp & mask) << shift;
391 } else {
392 *value |= (tmp & mask) >> -shift;
393 }
394 }
395
396 static inline uint64_t memory_region_shift_write_access(uint64_t *value,
397 signed shift,
398 uint64_t mask)
399 {
400 uint64_t tmp;
401
402 if (shift >= 0) {
403 tmp = (*value >> shift) & mask;
404 } else {
405 tmp = (*value << -shift) & mask;
406 }
407
408 return tmp;
409 }
410
411 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
412 {
413 MemoryRegion *root;
414 hwaddr abs_addr = offset;
415
416 abs_addr += mr->addr;
417 for (root = mr; root->container; ) {
418 root = root->container;
419 abs_addr += root->addr;
420 }
421
422 return abs_addr;
423 }
424
425 static int get_cpu_index(void)
426 {
427 if (current_cpu) {
428 return current_cpu->cpu_index;
429 }
430 return -1;
431 }
432
433 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
434 hwaddr addr,
435 uint64_t *value,
436 unsigned size,
437 signed shift,
438 uint64_t mask,
439 MemTxAttrs attrs)
440 {
441 uint64_t tmp;
442
443 tmp = mr->ops->read(mr->opaque, addr, size);
444 if (mr->subpage) {
445 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
446 } else if (mr == &io_mem_notdirty) {
447 /* Accesses to code which has previously been translated into a TB show
448 * up in the MMIO path, as accesses to the io_mem_notdirty
449 * MemoryRegion. */
450 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
451 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
452 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
453 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
454 }
455 memory_region_shift_read_access(value, shift, mask, tmp);
456 return MEMTX_OK;
457 }
458
459 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
460 hwaddr addr,
461 uint64_t *value,
462 unsigned size,
463 signed shift,
464 uint64_t mask,
465 MemTxAttrs attrs)
466 {
467 uint64_t tmp = 0;
468 MemTxResult r;
469
470 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
471 if (mr->subpage) {
472 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
473 } else if (mr == &io_mem_notdirty) {
474 /* Accesses to code which has previously been translated into a TB show
475 * up in the MMIO path, as accesses to the io_mem_notdirty
476 * MemoryRegion. */
477 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
478 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
479 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
480 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
481 }
482 memory_region_shift_read_access(value, shift, mask, tmp);
483 return r;
484 }
485
486 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
487 hwaddr addr,
488 uint64_t *value,
489 unsigned size,
490 signed shift,
491 uint64_t mask,
492 MemTxAttrs attrs)
493 {
494 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
495
496 if (mr->subpage) {
497 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
498 } else if (mr == &io_mem_notdirty) {
499 /* Accesses to code which has previously been translated into a TB show
500 * up in the MMIO path, as accesses to the io_mem_notdirty
501 * MemoryRegion. */
502 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
503 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
504 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
505 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
506 }
507 mr->ops->write(mr->opaque, addr, tmp, size);
508 return MEMTX_OK;
509 }
510
511 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
512 hwaddr addr,
513 uint64_t *value,
514 unsigned size,
515 signed shift,
516 uint64_t mask,
517 MemTxAttrs attrs)
518 {
519 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
520
521 if (mr->subpage) {
522 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
523 } else if (mr == &io_mem_notdirty) {
524 /* Accesses to code which has previously been translated into a TB show
525 * up in the MMIO path, as accesses to the io_mem_notdirty
526 * MemoryRegion. */
527 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
528 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
529 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
530 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
531 }
532 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
533 }
534
535 static MemTxResult access_with_adjusted_size(hwaddr addr,
536 uint64_t *value,
537 unsigned size,
538 unsigned access_size_min,
539 unsigned access_size_max,
540 MemTxResult (*access_fn)
541 (MemoryRegion *mr,
542 hwaddr addr,
543 uint64_t *value,
544 unsigned size,
545 signed shift,
546 uint64_t mask,
547 MemTxAttrs attrs),
548 MemoryRegion *mr,
549 MemTxAttrs attrs)
550 {
551 uint64_t access_mask;
552 unsigned access_size;
553 unsigned i;
554 MemTxResult r = MEMTX_OK;
555
556 if (!access_size_min) {
557 access_size_min = 1;
558 }
559 if (!access_size_max) {
560 access_size_max = 4;
561 }
562
563 /* FIXME: support unaligned access? */
564 access_size = MAX(MIN(size, access_size_max), access_size_min);
565 access_mask = MAKE_64BIT_MASK(0, access_size * 8);
566 if (memory_region_big_endian(mr)) {
567 for (i = 0; i < size; i += access_size) {
568 r |= access_fn(mr, addr + i, value, access_size,
569 (size - access_size - i) * 8, access_mask, attrs);
570 }
571 } else {
572 for (i = 0; i < size; i += access_size) {
573 r |= access_fn(mr, addr + i, value, access_size, i * 8,
574 access_mask, attrs);
575 }
576 }
577 return r;
578 }
579
580 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
581 {
582 AddressSpace *as;
583
584 while (mr->container) {
585 mr = mr->container;
586 }
587 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
588 if (mr == as->root) {
589 return as;
590 }
591 }
592 return NULL;
593 }
594
595 /* Render a memory region into the global view. Ranges in @view obscure
596 * ranges in @mr.
597 */
598 static void render_memory_region(FlatView *view,
599 MemoryRegion *mr,
600 Int128 base,
601 AddrRange clip,
602 bool readonly,
603 bool nonvolatile)
604 {
605 MemoryRegion *subregion;
606 unsigned i;
607 hwaddr offset_in_region;
608 Int128 remain;
609 Int128 now;
610 FlatRange fr;
611 AddrRange tmp;
612
613 if (!mr->enabled) {
614 return;
615 }
616
617 int128_addto(&base, int128_make64(mr->addr));
618 readonly |= mr->readonly;
619 nonvolatile |= mr->nonvolatile;
620
621 tmp = addrrange_make(base, mr->size);
622
623 if (!addrrange_intersects(tmp, clip)) {
624 return;
625 }
626
627 clip = addrrange_intersection(tmp, clip);
628
629 if (mr->alias) {
630 int128_subfrom(&base, int128_make64(mr->alias->addr));
631 int128_subfrom(&base, int128_make64(mr->alias_offset));
632 render_memory_region(view, mr->alias, base, clip,
633 readonly, nonvolatile);
634 return;
635 }
636
637 /* Render subregions in priority order. */
638 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
639 render_memory_region(view, subregion, base, clip,
640 readonly, nonvolatile);
641 }
642
643 if (!mr->terminates) {
644 return;
645 }
646
647 offset_in_region = int128_get64(int128_sub(clip.start, base));
648 base = clip.start;
649 remain = clip.size;
650
651 fr.mr = mr;
652 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
653 fr.romd_mode = mr->romd_mode;
654 fr.readonly = readonly;
655 fr.nonvolatile = nonvolatile;
656
657 /* Render the region itself into any gaps left by the current view. */
658 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
659 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
660 continue;
661 }
662 if (int128_lt(base, view->ranges[i].addr.start)) {
663 now = int128_min(remain,
664 int128_sub(view->ranges[i].addr.start, base));
665 fr.offset_in_region = offset_in_region;
666 fr.addr = addrrange_make(base, now);
667 flatview_insert(view, i, &fr);
668 ++i;
669 int128_addto(&base, now);
670 offset_in_region += int128_get64(now);
671 int128_subfrom(&remain, now);
672 }
673 now = int128_sub(int128_min(int128_add(base, remain),
674 addrrange_end(view->ranges[i].addr)),
675 base);
676 int128_addto(&base, now);
677 offset_in_region += int128_get64(now);
678 int128_subfrom(&remain, now);
679 }
680 if (int128_nz(remain)) {
681 fr.offset_in_region = offset_in_region;
682 fr.addr = addrrange_make(base, remain);
683 flatview_insert(view, i, &fr);
684 }
685 }
686
687 static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
688 {
689 while (mr->enabled) {
690 if (mr->alias) {
691 if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
692 /* The alias is included in its entirety. Use it as
693 * the "real" root, so that we can share more FlatViews.
694 */
695 mr = mr->alias;
696 continue;
697 }
698 } else if (!mr->terminates) {
699 unsigned int found = 0;
700 MemoryRegion *child, *next = NULL;
701 QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
702 if (child->enabled) {
703 if (++found > 1) {
704 next = NULL;
705 break;
706 }
707 if (!child->addr && int128_ge(mr->size, child->size)) {
708 /* A child is included in its entirety. If it's the only
709 * enabled one, use it in the hope of finding an alias down the
710 * way. This will also let us share FlatViews.
711 */
712 next = child;
713 }
714 }
715 }
716 if (found == 0) {
717 return NULL;
718 }
719 if (next) {
720 mr = next;
721 continue;
722 }
723 }
724
725 return mr;
726 }
727
728 return NULL;
729 }
730
731 /* Render a memory topology into a list of disjoint absolute ranges. */
732 static FlatView *generate_memory_topology(MemoryRegion *mr)
733 {
734 int i;
735 FlatView *view;
736
737 view = flatview_new(mr);
738
739 if (mr) {
740 render_memory_region(view, mr, int128_zero(),
741 addrrange_make(int128_zero(), int128_2_64()),
742 false, false);
743 }
744 flatview_simplify(view);
745
746 view->dispatch = address_space_dispatch_new(view);
747 for (i = 0; i < view->nr; i++) {
748 MemoryRegionSection mrs =
749 section_from_flat_range(&view->ranges[i], view);
750 flatview_add_to_dispatch(view, &mrs);
751 }
752 address_space_dispatch_compact(view->dispatch);
753 g_hash_table_replace(flat_views, mr, view);
754
755 return view;
756 }
757
758 static void address_space_add_del_ioeventfds(AddressSpace *as,
759 MemoryRegionIoeventfd *fds_new,
760 unsigned fds_new_nb,
761 MemoryRegionIoeventfd *fds_old,
762 unsigned fds_old_nb)
763 {
764 unsigned iold, inew;
765 MemoryRegionIoeventfd *fd;
766 MemoryRegionSection section;
767
768 /* Generate a symmetric difference of the old and new fd sets, adding
769 * and deleting as necessary.
770 */
771
772 iold = inew = 0;
773 while (iold < fds_old_nb || inew < fds_new_nb) {
774 if (iold < fds_old_nb
775 && (inew == fds_new_nb
776 || memory_region_ioeventfd_before(&fds_old[iold],
777 &fds_new[inew]))) {
778 fd = &fds_old[iold];
779 section = (MemoryRegionSection) {
780 .fv = address_space_to_flatview(as),
781 .offset_within_address_space = int128_get64(fd->addr.start),
782 .size = fd->addr.size,
783 };
784 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
785 fd->match_data, fd->data, fd->e);
786 ++iold;
787 } else if (inew < fds_new_nb
788 && (iold == fds_old_nb
789 || memory_region_ioeventfd_before(&fds_new[inew],
790 &fds_old[iold]))) {
791 fd = &fds_new[inew];
792 section = (MemoryRegionSection) {
793 .fv = address_space_to_flatview(as),
794 .offset_within_address_space = int128_get64(fd->addr.start),
795 .size = fd->addr.size,
796 };
797 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
798 fd->match_data, fd->data, fd->e);
799 ++inew;
800 } else {
801 ++iold;
802 ++inew;
803 }
804 }
805 }
806
807 FlatView *address_space_get_flatview(AddressSpace *as)
808 {
809 FlatView *view;
810
811 rcu_read_lock();
812 do {
813 view = address_space_to_flatview(as);
814 /* If somebody has replaced as->current_map concurrently,
815 * flatview_ref returns false.
816 */
817 } while (!flatview_ref(view));
818 rcu_read_unlock();
819 return view;
820 }
821
822 static void address_space_update_ioeventfds(AddressSpace *as)
823 {
824 FlatView *view;
825 FlatRange *fr;
826 unsigned ioeventfd_nb = 0;
827 MemoryRegionIoeventfd *ioeventfds = NULL;
828 AddrRange tmp;
829 unsigned i;
830
831 view = address_space_get_flatview(as);
832 FOR_EACH_FLAT_RANGE(fr, view) {
833 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
834 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
835 int128_sub(fr->addr.start,
836 int128_make64(fr->offset_in_region)));
837 if (addrrange_intersects(fr->addr, tmp)) {
838 ++ioeventfd_nb;
839 ioeventfds = g_realloc(ioeventfds,
840 ioeventfd_nb * sizeof(*ioeventfds));
841 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
842 ioeventfds[ioeventfd_nb-1].addr = tmp;
843 }
844 }
845 }
846
847 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
848 as->ioeventfds, as->ioeventfd_nb);
849
850 g_free(as->ioeventfds);
851 as->ioeventfds = ioeventfds;
852 as->ioeventfd_nb = ioeventfd_nb;
853 flatview_unref(view);
854 }
855
856 /*
857 * Notify the memory listeners about the coalesced IO change events of
858 * range `cmr'. Only the part that has intersection of the specified
859 * FlatRange will be sent.
860 */
861 static void flat_range_coalesced_io_notify(FlatRange *fr, AddressSpace *as,
862 CoalescedMemoryRange *cmr, bool add)
863 {
864 AddrRange tmp;
865
866 tmp = addrrange_shift(cmr->addr,
867 int128_sub(fr->addr.start,
868 int128_make64(fr->offset_in_region)));
869 if (!addrrange_intersects(tmp, fr->addr)) {
870 return;
871 }
872 tmp = addrrange_intersection(tmp, fr->addr);
873
874 if (add) {
875 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, coalesced_io_add,
876 int128_get64(tmp.start),
877 int128_get64(tmp.size));
878 } else {
879 MEMORY_LISTENER_UPDATE_REGION(fr, as, Reverse, coalesced_io_del,
880 int128_get64(tmp.start),
881 int128_get64(tmp.size));
882 }
883 }
884
885 static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as)
886 {
887 CoalescedMemoryRange *cmr;
888
889 QTAILQ_FOREACH(cmr, &fr->mr->coalesced, link) {
890 flat_range_coalesced_io_notify(fr, as, cmr, false);
891 }
892 }
893
894 static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as)
895 {
896 MemoryRegion *mr = fr->mr;
897 CoalescedMemoryRange *cmr;
898
899 if (QTAILQ_EMPTY(&mr->coalesced)) {
900 return;
901 }
902
903 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
904 flat_range_coalesced_io_notify(fr, as, cmr, true);
905 }
906 }
907
908 static void address_space_update_topology_pass(AddressSpace *as,
909 const FlatView *old_view,
910 const FlatView *new_view,
911 bool adding)
912 {
913 unsigned iold, inew;
914 FlatRange *frold, *frnew;
915
916 /* Generate a symmetric difference of the old and new memory maps.
917 * Kill ranges in the old map, and instantiate ranges in the new map.
918 */
919 iold = inew = 0;
920 while (iold < old_view->nr || inew < new_view->nr) {
921 if (iold < old_view->nr) {
922 frold = &old_view->ranges[iold];
923 } else {
924 frold = NULL;
925 }
926 if (inew < new_view->nr) {
927 frnew = &new_view->ranges[inew];
928 } else {
929 frnew = NULL;
930 }
931
932 if (frold
933 && (!frnew
934 || int128_lt(frold->addr.start, frnew->addr.start)
935 || (int128_eq(frold->addr.start, frnew->addr.start)
936 && !flatrange_equal(frold, frnew)))) {
937 /* In old but not in new, or in both but attributes changed. */
938
939 if (!adding) {
940 flat_range_coalesced_io_del(frold, as);
941 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
942 }
943
944 ++iold;
945 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
946 /* In both and unchanged (except logging may have changed) */
947
948 if (adding) {
949 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
950 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
951 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
952 frold->dirty_log_mask,
953 frnew->dirty_log_mask);
954 }
955 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
956 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
957 frold->dirty_log_mask,
958 frnew->dirty_log_mask);
959 }
960 }
961
962 ++iold;
963 ++inew;
964 } else {
965 /* In new */
966
967 if (adding) {
968 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
969 flat_range_coalesced_io_add(frnew, as);
970 }
971
972 ++inew;
973 }
974 }
975 }
976
977 static void flatviews_init(void)
978 {
979 static FlatView *empty_view;
980
981 if (flat_views) {
982 return;
983 }
984
985 flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
986 (GDestroyNotify) flatview_unref);
987 if (!empty_view) {
988 empty_view = generate_memory_topology(NULL);
989 /* We keep it alive forever in the global variable. */
990 flatview_ref(empty_view);
991 } else {
992 g_hash_table_replace(flat_views, NULL, empty_view);
993 flatview_ref(empty_view);
994 }
995 }
996
997 static void flatviews_reset(void)
998 {
999 AddressSpace *as;
1000
1001 if (flat_views) {
1002 g_hash_table_unref(flat_views);
1003 flat_views = NULL;
1004 }
1005 flatviews_init();
1006
1007 /* Render unique FVs */
1008 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1009 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1010
1011 if (g_hash_table_lookup(flat_views, physmr)) {
1012 continue;
1013 }
1014
1015 generate_memory_topology(physmr);
1016 }
1017 }
1018
1019 static void address_space_set_flatview(AddressSpace *as)
1020 {
1021 FlatView *old_view = address_space_to_flatview(as);
1022 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1023 FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
1024
1025 assert(new_view);
1026
1027 if (old_view == new_view) {
1028 return;
1029 }
1030
1031 if (old_view) {
1032 flatview_ref(old_view);
1033 }
1034
1035 flatview_ref(new_view);
1036
1037 if (!QTAILQ_EMPTY(&as->listeners)) {
1038 FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
1039
1040 if (!old_view2) {
1041 old_view2 = &tmpview;
1042 }
1043 address_space_update_topology_pass(as, old_view2, new_view, false);
1044 address_space_update_topology_pass(as, old_view2, new_view, true);
1045 }
1046
1047 /* Writes are protected by the BQL. */
1048 atomic_rcu_set(&as->current_map, new_view);
1049 if (old_view) {
1050 flatview_unref(old_view);
1051 }
1052
1053 /* Note that all the old MemoryRegions are still alive up to this
1054 * point. This relieves most MemoryListeners from the need to
1055 * ref/unref the MemoryRegions they get---unless they use them
1056 * outside the iothread mutex, in which case precise reference
1057 * counting is necessary.
1058 */
1059 if (old_view) {
1060 flatview_unref(old_view);
1061 }
1062 }
1063
1064 static void address_space_update_topology(AddressSpace *as)
1065 {
1066 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1067
1068 flatviews_init();
1069 if (!g_hash_table_lookup(flat_views, physmr)) {
1070 generate_memory_topology(physmr);
1071 }
1072 address_space_set_flatview(as);
1073 }
1074
1075 void memory_region_transaction_begin(void)
1076 {
1077 qemu_flush_coalesced_mmio_buffer();
1078 ++memory_region_transaction_depth;
1079 }
1080
1081 void memory_region_transaction_commit(void)
1082 {
1083 AddressSpace *as;
1084
1085 assert(memory_region_transaction_depth);
1086 assert(qemu_mutex_iothread_locked());
1087
1088 --memory_region_transaction_depth;
1089 if (!memory_region_transaction_depth) {
1090 if (memory_region_update_pending) {
1091 flatviews_reset();
1092
1093 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
1094
1095 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1096 address_space_set_flatview(as);
1097 address_space_update_ioeventfds(as);
1098 }
1099 memory_region_update_pending = false;
1100 ioeventfd_update_pending = false;
1101 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
1102 } else if (ioeventfd_update_pending) {
1103 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1104 address_space_update_ioeventfds(as);
1105 }
1106 ioeventfd_update_pending = false;
1107 }
1108 }
1109 }
1110
1111 static void memory_region_destructor_none(MemoryRegion *mr)
1112 {
1113 }
1114
1115 static void memory_region_destructor_ram(MemoryRegion *mr)
1116 {
1117 qemu_ram_free(mr->ram_block);
1118 }
1119
1120 static bool memory_region_need_escape(char c)
1121 {
1122 return c == '/' || c == '[' || c == '\\' || c == ']';
1123 }
1124
1125 static char *memory_region_escape_name(const char *name)
1126 {
1127 const char *p;
1128 char *escaped, *q;
1129 uint8_t c;
1130 size_t bytes = 0;
1131
1132 for (p = name; *p; p++) {
1133 bytes += memory_region_need_escape(*p) ? 4 : 1;
1134 }
1135 if (bytes == p - name) {
1136 return g_memdup(name, bytes + 1);
1137 }
1138
1139 escaped = g_malloc(bytes + 1);
1140 for (p = name, q = escaped; *p; p++) {
1141 c = *p;
1142 if (unlikely(memory_region_need_escape(c))) {
1143 *q++ = '\\';
1144 *q++ = 'x';
1145 *q++ = "0123456789abcdef"[c >> 4];
1146 c = "0123456789abcdef"[c & 15];
1147 }
1148 *q++ = c;
1149 }
1150 *q = 0;
1151 return escaped;
1152 }
1153
1154 static void memory_region_do_init(MemoryRegion *mr,
1155 Object *owner,
1156 const char *name,
1157 uint64_t size)
1158 {
1159 mr->size = int128_make64(size);
1160 if (size == UINT64_MAX) {
1161 mr->size = int128_2_64();
1162 }
1163 mr->name = g_strdup(name);
1164 mr->owner = owner;
1165 mr->ram_block = NULL;
1166
1167 if (name) {
1168 char *escaped_name = memory_region_escape_name(name);
1169 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1170
1171 if (!owner) {
1172 owner = container_get(qdev_get_machine(), "/unattached");
1173 }
1174
1175 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
1176 object_unref(OBJECT(mr));
1177 g_free(name_array);
1178 g_free(escaped_name);
1179 }
1180 }
1181
1182 void memory_region_init(MemoryRegion *mr,
1183 Object *owner,
1184 const char *name,
1185 uint64_t size)
1186 {
1187 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1188 memory_region_do_init(mr, owner, name, size);
1189 }
1190
1191 static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1192 void *opaque, Error **errp)
1193 {
1194 MemoryRegion *mr = MEMORY_REGION(obj);
1195 uint64_t value = mr->addr;
1196
1197 visit_type_uint64(v, name, &value, errp);
1198 }
1199
1200 static void memory_region_get_container(Object *obj, Visitor *v,
1201 const char *name, void *opaque,
1202 Error **errp)
1203 {
1204 MemoryRegion *mr = MEMORY_REGION(obj);
1205 gchar *path = (gchar *)"";
1206
1207 if (mr->container) {
1208 path = object_get_canonical_path(OBJECT(mr->container));
1209 }
1210 visit_type_str(v, name, &path, errp);
1211 if (mr->container) {
1212 g_free(path);
1213 }
1214 }
1215
1216 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1217 const char *part)
1218 {
1219 MemoryRegion *mr = MEMORY_REGION(obj);
1220
1221 return OBJECT(mr->container);
1222 }
1223
1224 static void memory_region_get_priority(Object *obj, Visitor *v,
1225 const char *name, void *opaque,
1226 Error **errp)
1227 {
1228 MemoryRegion *mr = MEMORY_REGION(obj);
1229 int32_t value = mr->priority;
1230
1231 visit_type_int32(v, name, &value, errp);
1232 }
1233
1234 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1235 void *opaque, Error **errp)
1236 {
1237 MemoryRegion *mr = MEMORY_REGION(obj);
1238 uint64_t value = memory_region_size(mr);
1239
1240 visit_type_uint64(v, name, &value, errp);
1241 }
1242
1243 static void memory_region_initfn(Object *obj)
1244 {
1245 MemoryRegion *mr = MEMORY_REGION(obj);
1246 ObjectProperty *op;
1247
1248 mr->ops = &unassigned_mem_ops;
1249 mr->enabled = true;
1250 mr->romd_mode = true;
1251 mr->global_locking = true;
1252 mr->destructor = memory_region_destructor_none;
1253 QTAILQ_INIT(&mr->subregions);
1254 QTAILQ_INIT(&mr->coalesced);
1255
1256 op = object_property_add(OBJECT(mr), "container",
1257 "link<" TYPE_MEMORY_REGION ">",
1258 memory_region_get_container,
1259 NULL, /* memory_region_set_container */
1260 NULL, NULL, &error_abort);
1261 op->resolve = memory_region_resolve_container;
1262
1263 object_property_add(OBJECT(mr), "addr", "uint64",
1264 memory_region_get_addr,
1265 NULL, /* memory_region_set_addr */
1266 NULL, NULL, &error_abort);
1267 object_property_add(OBJECT(mr), "priority", "uint32",
1268 memory_region_get_priority,
1269 NULL, /* memory_region_set_priority */
1270 NULL, NULL, &error_abort);
1271 object_property_add(OBJECT(mr), "size", "uint64",
1272 memory_region_get_size,
1273 NULL, /* memory_region_set_size, */
1274 NULL, NULL, &error_abort);
1275 }
1276
1277 static void iommu_memory_region_initfn(Object *obj)
1278 {
1279 MemoryRegion *mr = MEMORY_REGION(obj);
1280
1281 mr->is_iommu = true;
1282 }
1283
1284 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1285 unsigned size)
1286 {
1287 #ifdef DEBUG_UNASSIGNED
1288 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1289 #endif
1290 if (current_cpu != NULL) {
1291 bool is_exec = current_cpu->mem_io_access_type == MMU_INST_FETCH;
1292 cpu_unassigned_access(current_cpu, addr, false, is_exec, 0, size);
1293 }
1294 return 0;
1295 }
1296
1297 static void unassigned_mem_write(void *opaque, hwaddr addr,
1298 uint64_t val, unsigned size)
1299 {
1300 #ifdef DEBUG_UNASSIGNED
1301 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1302 #endif
1303 if (current_cpu != NULL) {
1304 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1305 }
1306 }
1307
1308 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1309 unsigned size, bool is_write,
1310 MemTxAttrs attrs)
1311 {
1312 return false;
1313 }
1314
1315 const MemoryRegionOps unassigned_mem_ops = {
1316 .valid.accepts = unassigned_mem_accepts,
1317 .endianness = DEVICE_NATIVE_ENDIAN,
1318 };
1319
1320 static uint64_t memory_region_ram_device_read(void *opaque,
1321 hwaddr addr, unsigned size)
1322 {
1323 MemoryRegion *mr = opaque;
1324 uint64_t data = (uint64_t)~0;
1325
1326 switch (size) {
1327 case 1:
1328 data = *(uint8_t *)(mr->ram_block->host + addr);
1329 break;
1330 case 2:
1331 data = *(uint16_t *)(mr->ram_block->host + addr);
1332 break;
1333 case 4:
1334 data = *(uint32_t *)(mr->ram_block->host + addr);
1335 break;
1336 case 8:
1337 data = *(uint64_t *)(mr->ram_block->host + addr);
1338 break;
1339 }
1340
1341 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1342
1343 return data;
1344 }
1345
1346 static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1347 uint64_t data, unsigned size)
1348 {
1349 MemoryRegion *mr = opaque;
1350
1351 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1352
1353 switch (size) {
1354 case 1:
1355 *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1356 break;
1357 case 2:
1358 *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1359 break;
1360 case 4:
1361 *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1362 break;
1363 case 8:
1364 *(uint64_t *)(mr->ram_block->host + addr) = data;
1365 break;
1366 }
1367 }
1368
1369 static const MemoryRegionOps ram_device_mem_ops = {
1370 .read = memory_region_ram_device_read,
1371 .write = memory_region_ram_device_write,
1372 .endianness = DEVICE_HOST_ENDIAN,
1373 .valid = {
1374 .min_access_size = 1,
1375 .max_access_size = 8,
1376 .unaligned = true,
1377 },
1378 .impl = {
1379 .min_access_size = 1,
1380 .max_access_size = 8,
1381 .unaligned = true,
1382 },
1383 };
1384
1385 bool memory_region_access_valid(MemoryRegion *mr,
1386 hwaddr addr,
1387 unsigned size,
1388 bool is_write,
1389 MemTxAttrs attrs)
1390 {
1391 int access_size_min, access_size_max;
1392 int access_size, i;
1393
1394 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1395 return false;
1396 }
1397
1398 if (!mr->ops->valid.accepts) {
1399 return true;
1400 }
1401
1402 access_size_min = mr->ops->valid.min_access_size;
1403 if (!mr->ops->valid.min_access_size) {
1404 access_size_min = 1;
1405 }
1406
1407 access_size_max = mr->ops->valid.max_access_size;
1408 if (!mr->ops->valid.max_access_size) {
1409 access_size_max = 4;
1410 }
1411
1412 access_size = MAX(MIN(size, access_size_max), access_size_min);
1413 for (i = 0; i < size; i += access_size) {
1414 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1415 is_write, attrs)) {
1416 return false;
1417 }
1418 }
1419
1420 return true;
1421 }
1422
1423 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1424 hwaddr addr,
1425 uint64_t *pval,
1426 unsigned size,
1427 MemTxAttrs attrs)
1428 {
1429 *pval = 0;
1430
1431 if (mr->ops->read) {
1432 return access_with_adjusted_size(addr, pval, size,
1433 mr->ops->impl.min_access_size,
1434 mr->ops->impl.max_access_size,
1435 memory_region_read_accessor,
1436 mr, attrs);
1437 } else {
1438 return access_with_adjusted_size(addr, pval, size,
1439 mr->ops->impl.min_access_size,
1440 mr->ops->impl.max_access_size,
1441 memory_region_read_with_attrs_accessor,
1442 mr, attrs);
1443 }
1444 }
1445
1446 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1447 hwaddr addr,
1448 uint64_t *pval,
1449 MemOp op,
1450 MemTxAttrs attrs)
1451 {
1452 unsigned size = memop_size(op);
1453 MemTxResult r;
1454
1455 if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
1456 *pval = unassigned_mem_read(mr, addr, size);
1457 return MEMTX_DECODE_ERROR;
1458 }
1459
1460 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1461 adjust_endianness(mr, pval, size);
1462 return r;
1463 }
1464
1465 /* Return true if an eventfd was signalled */
1466 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1467 hwaddr addr,
1468 uint64_t data,
1469 unsigned size,
1470 MemTxAttrs attrs)
1471 {
1472 MemoryRegionIoeventfd ioeventfd = {
1473 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1474 .data = data,
1475 };
1476 unsigned i;
1477
1478 for (i = 0; i < mr->ioeventfd_nb; i++) {
1479 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1480 ioeventfd.e = mr->ioeventfds[i].e;
1481
1482 if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) {
1483 event_notifier_set(ioeventfd.e);
1484 return true;
1485 }
1486 }
1487
1488 return false;
1489 }
1490
1491 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1492 hwaddr addr,
1493 uint64_t data,
1494 MemOp op,
1495 MemTxAttrs attrs)
1496 {
1497 unsigned size = memop_size(op);
1498
1499 if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
1500 unassigned_mem_write(mr, addr, data, size);
1501 return MEMTX_DECODE_ERROR;
1502 }
1503
1504 adjust_endianness(mr, &data, size);
1505
1506 if ((!kvm_eventfds_enabled()) &&
1507 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1508 return MEMTX_OK;
1509 }
1510
1511 if (mr->ops->write) {
1512 return access_with_adjusted_size(addr, &data, size,
1513 mr->ops->impl.min_access_size,
1514 mr->ops->impl.max_access_size,
1515 memory_region_write_accessor, mr,
1516 attrs);
1517 } else {
1518 return
1519 access_with_adjusted_size(addr, &data, size,
1520 mr->ops->impl.min_access_size,
1521 mr->ops->impl.max_access_size,
1522 memory_region_write_with_attrs_accessor,
1523 mr, attrs);
1524 }
1525 }
1526
1527 void memory_region_init_io(MemoryRegion *mr,
1528 Object *owner,
1529 const MemoryRegionOps *ops,
1530 void *opaque,
1531 const char *name,
1532 uint64_t size)
1533 {
1534 memory_region_init(mr, owner, name, size);
1535 mr->ops = ops ? ops : &unassigned_mem_ops;
1536 mr->opaque = opaque;
1537 mr->terminates = true;
1538 }
1539
1540 void memory_region_init_ram_nomigrate(MemoryRegion *mr,
1541 Object *owner,
1542 const char *name,
1543 uint64_t size,
1544 Error **errp)
1545 {
1546 memory_region_init_ram_shared_nomigrate(mr, owner, name, size, false, errp);
1547 }
1548
1549 void memory_region_init_ram_shared_nomigrate(MemoryRegion *mr,
1550 Object *owner,
1551 const char *name,
1552 uint64_t size,
1553 bool share,
1554 Error **errp)
1555 {
1556 Error *err = NULL;
1557 memory_region_init(mr, owner, name, size);
1558 mr->ram = true;
1559 mr->terminates = true;
1560 mr->destructor = memory_region_destructor_ram;
1561 mr->ram_block = qemu_ram_alloc(size, share, mr, &err);
1562 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1563 if (err) {
1564 mr->size = int128_zero();
1565 object_unparent(OBJECT(mr));
1566 error_propagate(errp, err);
1567 }
1568 }
1569
1570 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1571 Object *owner,
1572 const char *name,
1573 uint64_t size,
1574 uint64_t max_size,
1575 void (*resized)(const char*,
1576 uint64_t length,
1577 void *host),
1578 Error **errp)
1579 {
1580 Error *err = NULL;
1581 memory_region_init(mr, owner, name, size);
1582 mr->ram = true;
1583 mr->terminates = true;
1584 mr->destructor = memory_region_destructor_ram;
1585 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1586 mr, &err);
1587 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1588 if (err) {
1589 mr->size = int128_zero();
1590 object_unparent(OBJECT(mr));
1591 error_propagate(errp, err);
1592 }
1593 }
1594
1595 #ifdef CONFIG_POSIX
1596 void memory_region_init_ram_from_file(MemoryRegion *mr,
1597 struct Object *owner,
1598 const char *name,
1599 uint64_t size,
1600 uint64_t align,
1601 uint32_t ram_flags,
1602 const char *path,
1603 Error **errp)
1604 {
1605 Error *err = NULL;
1606 memory_region_init(mr, owner, name, size);
1607 mr->ram = true;
1608 mr->terminates = true;
1609 mr->destructor = memory_region_destructor_ram;
1610 mr->align = align;
1611 mr->ram_block = qemu_ram_alloc_from_file(size, mr, ram_flags, path, &err);
1612 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1613 if (err) {
1614 mr->size = int128_zero();
1615 object_unparent(OBJECT(mr));
1616 error_propagate(errp, err);
1617 }
1618 }
1619
1620 void memory_region_init_ram_from_fd(MemoryRegion *mr,
1621 struct Object *owner,
1622 const char *name,
1623 uint64_t size,
1624 bool share,
1625 int fd,
1626 Error **errp)
1627 {
1628 Error *err = NULL;
1629 memory_region_init(mr, owner, name, size);
1630 mr->ram = true;
1631 mr->terminates = true;
1632 mr->destructor = memory_region_destructor_ram;
1633 mr->ram_block = qemu_ram_alloc_from_fd(size, mr,
1634 share ? RAM_SHARED : 0,
1635 fd, &err);
1636 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1637 if (err) {
1638 mr->size = int128_zero();
1639 object_unparent(OBJECT(mr));
1640 error_propagate(errp, err);
1641 }
1642 }
1643 #endif
1644
1645 void memory_region_init_ram_ptr(MemoryRegion *mr,
1646 Object *owner,
1647 const char *name,
1648 uint64_t size,
1649 void *ptr)
1650 {
1651 memory_region_init(mr, owner, name, size);
1652 mr->ram = true;
1653 mr->terminates = true;
1654 mr->destructor = memory_region_destructor_ram;
1655 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1656
1657 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1658 assert(ptr != NULL);
1659 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1660 }
1661
1662 void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1663 Object *owner,
1664 const char *name,
1665 uint64_t size,
1666 void *ptr)
1667 {
1668 memory_region_init(mr, owner, name, size);
1669 mr->ram = true;
1670 mr->terminates = true;
1671 mr->ram_device = true;
1672 mr->ops = &ram_device_mem_ops;
1673 mr->opaque = mr;
1674 mr->destructor = memory_region_destructor_ram;
1675 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1676 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1677 assert(ptr != NULL);
1678 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1679 }
1680
1681 void memory_region_init_alias(MemoryRegion *mr,
1682 Object *owner,
1683 const char *name,
1684 MemoryRegion *orig,
1685 hwaddr offset,
1686 uint64_t size)
1687 {
1688 memory_region_init(mr, owner, name, size);
1689 mr->alias = orig;
1690 mr->alias_offset = offset;
1691 }
1692
1693 void memory_region_init_rom_nomigrate(MemoryRegion *mr,
1694 struct Object *owner,
1695 const char *name,
1696 uint64_t size,
1697 Error **errp)
1698 {
1699 Error *err = NULL;
1700 memory_region_init(mr, owner, name, size);
1701 mr->ram = true;
1702 mr->readonly = true;
1703 mr->terminates = true;
1704 mr->destructor = memory_region_destructor_ram;
1705 mr->ram_block = qemu_ram_alloc(size, false, mr, &err);
1706 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1707 if (err) {
1708 mr->size = int128_zero();
1709 object_unparent(OBJECT(mr));
1710 error_propagate(errp, err);
1711 }
1712 }
1713
1714 void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1715 Object *owner,
1716 const MemoryRegionOps *ops,
1717 void *opaque,
1718 const char *name,
1719 uint64_t size,
1720 Error **errp)
1721 {
1722 Error *err = NULL;
1723 assert(ops);
1724 memory_region_init(mr, owner, name, size);
1725 mr->ops = ops;
1726 mr->opaque = opaque;
1727 mr->terminates = true;
1728 mr->rom_device = true;
1729 mr->destructor = memory_region_destructor_ram;
1730 mr->ram_block = qemu_ram_alloc(size, false, mr, &err);
1731 if (err) {
1732 mr->size = int128_zero();
1733 object_unparent(OBJECT(mr));
1734 error_propagate(errp, err);
1735 }
1736 }
1737
1738 void memory_region_init_iommu(void *_iommu_mr,
1739 size_t instance_size,
1740 const char *mrtypename,
1741 Object *owner,
1742 const char *name,
1743 uint64_t size)
1744 {
1745 struct IOMMUMemoryRegion *iommu_mr;
1746 struct MemoryRegion *mr;
1747
1748 object_initialize(_iommu_mr, instance_size, mrtypename);
1749 mr = MEMORY_REGION(_iommu_mr);
1750 memory_region_do_init(mr, owner, name, size);
1751 iommu_mr = IOMMU_MEMORY_REGION(mr);
1752 mr->terminates = true; /* then re-forwards */
1753 QLIST_INIT(&iommu_mr->iommu_notify);
1754 iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1755 }
1756
1757 static void memory_region_finalize(Object *obj)
1758 {
1759 MemoryRegion *mr = MEMORY_REGION(obj);
1760
1761 assert(!mr->container);
1762
1763 /* We know the region is not visible in any address space (it
1764 * does not have a container and cannot be a root either because
1765 * it has no references, so we can blindly clear mr->enabled.
1766 * memory_region_set_enabled instead could trigger a transaction
1767 * and cause an infinite loop.
1768 */
1769 mr->enabled = false;
1770 memory_region_transaction_begin();
1771 while (!QTAILQ_EMPTY(&mr->subregions)) {
1772 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1773 memory_region_del_subregion(mr, subregion);
1774 }
1775 memory_region_transaction_commit();
1776
1777 mr->destructor(mr);
1778 memory_region_clear_coalescing(mr);
1779 g_free((char *)mr->name);
1780 g_free(mr->ioeventfds);
1781 }
1782
1783 Object *memory_region_owner(MemoryRegion *mr)
1784 {
1785 Object *obj = OBJECT(mr);
1786 return obj->parent;
1787 }
1788
1789 void memory_region_ref(MemoryRegion *mr)
1790 {
1791 /* MMIO callbacks most likely will access data that belongs
1792 * to the owner, hence the need to ref/unref the owner whenever
1793 * the memory region is in use.
1794 *
1795 * The memory region is a child of its owner. As long as the
1796 * owner doesn't call unparent itself on the memory region,
1797 * ref-ing the owner will also keep the memory region alive.
1798 * Memory regions without an owner are supposed to never go away;
1799 * we do not ref/unref them because it slows down DMA sensibly.
1800 */
1801 if (mr && mr->owner) {
1802 object_ref(mr->owner);
1803 }
1804 }
1805
1806 void memory_region_unref(MemoryRegion *mr)
1807 {
1808 if (mr && mr->owner) {
1809 object_unref(mr->owner);
1810 }
1811 }
1812
1813 uint64_t memory_region_size(MemoryRegion *mr)
1814 {
1815 if (int128_eq(mr->size, int128_2_64())) {
1816 return UINT64_MAX;
1817 }
1818 return int128_get64(mr->size);
1819 }
1820
1821 const char *memory_region_name(const MemoryRegion *mr)
1822 {
1823 if (!mr->name) {
1824 ((MemoryRegion *)mr)->name =
1825 object_get_canonical_path_component(OBJECT(mr));
1826 }
1827 return mr->name;
1828 }
1829
1830 bool memory_region_is_ram_device(MemoryRegion *mr)
1831 {
1832 return mr->ram_device;
1833 }
1834
1835 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1836 {
1837 uint8_t mask = mr->dirty_log_mask;
1838 if (global_dirty_log && mr->ram_block) {
1839 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1840 }
1841 return mask;
1842 }
1843
1844 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1845 {
1846 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1847 }
1848
1849 static void memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr)
1850 {
1851 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1852 IOMMUNotifier *iommu_notifier;
1853 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1854
1855 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1856 flags |= iommu_notifier->notifier_flags;
1857 }
1858
1859 if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
1860 imrc->notify_flag_changed(iommu_mr,
1861 iommu_mr->iommu_notify_flags,
1862 flags);
1863 }
1864
1865 iommu_mr->iommu_notify_flags = flags;
1866 }
1867
1868 void memory_region_register_iommu_notifier(MemoryRegion *mr,
1869 IOMMUNotifier *n)
1870 {
1871 IOMMUMemoryRegion *iommu_mr;
1872
1873 if (mr->alias) {
1874 memory_region_register_iommu_notifier(mr->alias, n);
1875 return;
1876 }
1877
1878 /* We need to register for at least one bitfield */
1879 iommu_mr = IOMMU_MEMORY_REGION(mr);
1880 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1881 assert(n->start <= n->end);
1882 assert(n->iommu_idx >= 0 &&
1883 n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr));
1884
1885 QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
1886 memory_region_update_iommu_notify_flags(iommu_mr);
1887 }
1888
1889 uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
1890 {
1891 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1892
1893 if (imrc->get_min_page_size) {
1894 return imrc->get_min_page_size(iommu_mr);
1895 }
1896 return TARGET_PAGE_SIZE;
1897 }
1898
1899 void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
1900 {
1901 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1902 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1903 hwaddr addr, granularity;
1904 IOMMUTLBEntry iotlb;
1905
1906 /* If the IOMMU has its own replay callback, override */
1907 if (imrc->replay) {
1908 imrc->replay(iommu_mr, n);
1909 return;
1910 }
1911
1912 granularity = memory_region_iommu_get_min_page_size(iommu_mr);
1913
1914 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1915 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
1916 if (iotlb.perm != IOMMU_NONE) {
1917 n->notify(n, &iotlb);
1918 }
1919
1920 /* if (2^64 - MR size) < granularity, it's possible to get an
1921 * infinite loop here. This should catch such a wraparound */
1922 if ((addr + granularity) < addr) {
1923 break;
1924 }
1925 }
1926 }
1927
1928 void memory_region_iommu_replay_all(IOMMUMemoryRegion *iommu_mr)
1929 {
1930 IOMMUNotifier *notifier;
1931
1932 IOMMU_NOTIFIER_FOREACH(notifier, iommu_mr) {
1933 memory_region_iommu_replay(iommu_mr, notifier);
1934 }
1935 }
1936
1937 void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1938 IOMMUNotifier *n)
1939 {
1940 IOMMUMemoryRegion *iommu_mr;
1941
1942 if (mr->alias) {
1943 memory_region_unregister_iommu_notifier(mr->alias, n);
1944 return;
1945 }
1946 QLIST_REMOVE(n, node);
1947 iommu_mr = IOMMU_MEMORY_REGION(mr);
1948 memory_region_update_iommu_notify_flags(iommu_mr);
1949 }
1950
1951 void memory_region_notify_one(IOMMUNotifier *notifier,
1952 IOMMUTLBEntry *entry)
1953 {
1954 IOMMUNotifierFlag request_flags;
1955 hwaddr entry_end = entry->iova + entry->addr_mask;
1956
1957 /*
1958 * Skip the notification if the notification does not overlap
1959 * with registered range.
1960 */
1961 if (notifier->start > entry_end || notifier->end < entry->iova) {
1962 return;
1963 }
1964
1965 assert(entry->iova >= notifier->start && entry_end <= notifier->end);
1966
1967 if (entry->perm & IOMMU_RW) {
1968 request_flags = IOMMU_NOTIFIER_MAP;
1969 } else {
1970 request_flags = IOMMU_NOTIFIER_UNMAP;
1971 }
1972
1973 if (notifier->notifier_flags & request_flags) {
1974 notifier->notify(notifier, entry);
1975 }
1976 }
1977
1978 void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
1979 int iommu_idx,
1980 IOMMUTLBEntry entry)
1981 {
1982 IOMMUNotifier *iommu_notifier;
1983
1984 assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
1985
1986 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1987 if (iommu_notifier->iommu_idx == iommu_idx) {
1988 memory_region_notify_one(iommu_notifier, &entry);
1989 }
1990 }
1991 }
1992
1993 int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
1994 enum IOMMUMemoryRegionAttr attr,
1995 void *data)
1996 {
1997 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1998
1999 if (!imrc->get_attr) {
2000 return -EINVAL;
2001 }
2002
2003 return imrc->get_attr(iommu_mr, attr, data);
2004 }
2005
2006 int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr,
2007 MemTxAttrs attrs)
2008 {
2009 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2010
2011 if (!imrc->attrs_to_index) {
2012 return 0;
2013 }
2014
2015 return imrc->attrs_to_index(iommu_mr, attrs);
2016 }
2017
2018 int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr)
2019 {
2020 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2021
2022 if (!imrc->num_indexes) {
2023 return 1;
2024 }
2025
2026 return imrc->num_indexes(iommu_mr);
2027 }
2028
2029 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
2030 {
2031 uint8_t mask = 1 << client;
2032 uint8_t old_logging;
2033
2034 assert(client == DIRTY_MEMORY_VGA);
2035 old_logging = mr->vga_logging_count;
2036 mr->vga_logging_count += log ? 1 : -1;
2037 if (!!old_logging == !!mr->vga_logging_count) {
2038 return;
2039 }
2040
2041 memory_region_transaction_begin();
2042 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
2043 memory_region_update_pending |= mr->enabled;
2044 memory_region_transaction_commit();
2045 }
2046
2047 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
2048 hwaddr size)
2049 {
2050 assert(mr->ram_block);
2051 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
2052 size,
2053 memory_region_get_dirty_log_mask(mr));
2054 }
2055
2056 static void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
2057 {
2058 MemoryListener *listener;
2059 AddressSpace *as;
2060 FlatView *view;
2061 FlatRange *fr;
2062
2063 /* If the same address space has multiple log_sync listeners, we
2064 * visit that address space's FlatView multiple times. But because
2065 * log_sync listeners are rare, it's still cheaper than walking each
2066 * address space once.
2067 */
2068 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2069 if (!listener->log_sync) {
2070 continue;
2071 }
2072 as = listener->address_space;
2073 view = address_space_get_flatview(as);
2074 FOR_EACH_FLAT_RANGE(fr, view) {
2075 if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
2076 MemoryRegionSection mrs = section_from_flat_range(fr, view);
2077 listener->log_sync(listener, &mrs);
2078 }
2079 }
2080 flatview_unref(view);
2081 }
2082 }
2083
2084 void memory_region_clear_dirty_bitmap(MemoryRegion *mr, hwaddr start,
2085 hwaddr len)
2086 {
2087 MemoryRegionSection mrs;
2088 MemoryListener *listener;
2089 AddressSpace *as;
2090 FlatView *view;
2091 FlatRange *fr;
2092 hwaddr sec_start, sec_end, sec_size;
2093
2094 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2095 if (!listener->log_clear) {
2096 continue;
2097 }
2098 as = listener->address_space;
2099 view = address_space_get_flatview(as);
2100 FOR_EACH_FLAT_RANGE(fr, view) {
2101 if (!fr->dirty_log_mask || fr->mr != mr) {
2102 /*
2103 * Clear dirty bitmap operation only applies to those
2104 * regions whose dirty logging is at least enabled
2105 */
2106 continue;
2107 }
2108
2109 mrs = section_from_flat_range(fr, view);
2110
2111 sec_start = MAX(mrs.offset_within_region, start);
2112 sec_end = mrs.offset_within_region + int128_get64(mrs.size);
2113 sec_end = MIN(sec_end, start + len);
2114
2115 if (sec_start >= sec_end) {
2116 /*
2117 * If this memory region section has no intersection
2118 * with the requested range, skip.
2119 */
2120 continue;
2121 }
2122
2123 /* Valid case; shrink the section if needed */
2124 mrs.offset_within_address_space +=
2125 sec_start - mrs.offset_within_region;
2126 mrs.offset_within_region = sec_start;
2127 sec_size = sec_end - sec_start;
2128 mrs.size = int128_make64(sec_size);
2129 listener->log_clear(listener, &mrs);
2130 }
2131 flatview_unref(view);
2132 }
2133 }
2134
2135 DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
2136 hwaddr addr,
2137 hwaddr size,
2138 unsigned client)
2139 {
2140 DirtyBitmapSnapshot *snapshot;
2141 assert(mr->ram_block);
2142 memory_region_sync_dirty_bitmap(mr);
2143 snapshot = cpu_physical_memory_snapshot_and_clear_dirty(mr, addr, size, client);
2144 memory_global_after_dirty_log_sync();
2145 return snapshot;
2146 }
2147
2148 bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
2149 hwaddr addr, hwaddr size)
2150 {
2151 assert(mr->ram_block);
2152 return cpu_physical_memory_snapshot_get_dirty(snap,
2153 memory_region_get_ram_addr(mr) + addr, size);
2154 }
2155
2156 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
2157 {
2158 if (mr->readonly != readonly) {
2159 memory_region_transaction_begin();
2160 mr->readonly = readonly;
2161 memory_region_update_pending |= mr->enabled;
2162 memory_region_transaction_commit();
2163 }
2164 }
2165
2166 void memory_region_set_nonvolatile(MemoryRegion *mr, bool nonvolatile)
2167 {
2168 if (mr->nonvolatile != nonvolatile) {
2169 memory_region_transaction_begin();
2170 mr->nonvolatile = nonvolatile;
2171 memory_region_update_pending |= mr->enabled;
2172 memory_region_transaction_commit();
2173 }
2174 }
2175
2176 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
2177 {
2178 if (mr->romd_mode != romd_mode) {
2179 memory_region_transaction_begin();
2180 mr->romd_mode = romd_mode;
2181 memory_region_update_pending |= mr->enabled;
2182 memory_region_transaction_commit();
2183 }
2184 }
2185
2186 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
2187 hwaddr size, unsigned client)
2188 {
2189 assert(mr->ram_block);
2190 cpu_physical_memory_test_and_clear_dirty(
2191 memory_region_get_ram_addr(mr) + addr, size, client);
2192 }
2193
2194 int memory_region_get_fd(MemoryRegion *mr)
2195 {
2196 int fd;
2197
2198 rcu_read_lock();
2199 while (mr->alias) {
2200 mr = mr->alias;
2201 }
2202 fd = mr->ram_block->fd;
2203 rcu_read_unlock();
2204
2205 return fd;
2206 }
2207
2208 void *memory_region_get_ram_ptr(MemoryRegion *mr)
2209 {
2210 void *ptr;
2211 uint64_t offset = 0;
2212
2213 rcu_read_lock();
2214 while (mr->alias) {
2215 offset += mr->alias_offset;
2216 mr = mr->alias;
2217 }
2218 assert(mr->ram_block);
2219 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
2220 rcu_read_unlock();
2221
2222 return ptr;
2223 }
2224
2225 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
2226 {
2227 RAMBlock *block;
2228
2229 block = qemu_ram_block_from_host(ptr, false, offset);
2230 if (!block) {
2231 return NULL;
2232 }
2233
2234 return block->mr;
2235 }
2236
2237 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
2238 {
2239 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
2240 }
2241
2242 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
2243 {
2244 assert(mr->ram_block);
2245
2246 qemu_ram_resize(mr->ram_block, newsize, errp);
2247 }
2248
2249 /*
2250 * Call proper memory listeners about the change on the newly
2251 * added/removed CoalescedMemoryRange.
2252 */
2253 static void memory_region_update_coalesced_range(MemoryRegion *mr,
2254 CoalescedMemoryRange *cmr,
2255 bool add)
2256 {
2257 AddressSpace *as;
2258 FlatView *view;
2259 FlatRange *fr;
2260
2261 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2262 view = address_space_get_flatview(as);
2263 FOR_EACH_FLAT_RANGE(fr, view) {
2264 if (fr->mr == mr) {
2265 flat_range_coalesced_io_notify(fr, as, cmr, add);
2266 }
2267 }
2268 flatview_unref(view);
2269 }
2270 }
2271
2272 void memory_region_set_coalescing(MemoryRegion *mr)
2273 {
2274 memory_region_clear_coalescing(mr);
2275 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
2276 }
2277
2278 void memory_region_add_coalescing(MemoryRegion *mr,
2279 hwaddr offset,
2280 uint64_t size)
2281 {
2282 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
2283
2284 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
2285 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
2286 memory_region_update_coalesced_range(mr, cmr, true);
2287 memory_region_set_flush_coalesced(mr);
2288 }
2289
2290 void memory_region_clear_coalescing(MemoryRegion *mr)
2291 {
2292 CoalescedMemoryRange *cmr;
2293
2294 if (QTAILQ_EMPTY(&mr->coalesced)) {
2295 return;
2296 }
2297
2298 qemu_flush_coalesced_mmio_buffer();
2299 mr->flush_coalesced_mmio = false;
2300
2301 while (!QTAILQ_EMPTY(&mr->coalesced)) {
2302 cmr = QTAILQ_FIRST(&mr->coalesced);
2303 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
2304 memory_region_update_coalesced_range(mr, cmr, false);
2305 g_free(cmr);
2306 }
2307 }
2308
2309 void memory_region_set_flush_coalesced(MemoryRegion *mr)
2310 {
2311 mr->flush_coalesced_mmio = true;
2312 }
2313
2314 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2315 {
2316 qemu_flush_coalesced_mmio_buffer();
2317 if (QTAILQ_EMPTY(&mr->coalesced)) {
2318 mr->flush_coalesced_mmio = false;
2319 }
2320 }
2321
2322 void memory_region_clear_global_locking(MemoryRegion *mr)
2323 {
2324 mr->global_locking = false;
2325 }
2326
2327 static bool userspace_eventfd_warning;
2328
2329 void memory_region_add_eventfd(MemoryRegion *mr,
2330 hwaddr addr,
2331 unsigned size,
2332 bool match_data,
2333 uint64_t data,
2334 EventNotifier *e)
2335 {
2336 MemoryRegionIoeventfd mrfd = {
2337 .addr.start = int128_make64(addr),
2338 .addr.size = int128_make64(size),
2339 .match_data = match_data,
2340 .data = data,
2341 .e = e,
2342 };
2343 unsigned i;
2344
2345 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
2346 userspace_eventfd_warning))) {
2347 userspace_eventfd_warning = true;
2348 error_report("Using eventfd without MMIO binding in KVM. "
2349 "Suboptimal performance expected");
2350 }
2351
2352 if (size) {
2353 adjust_endianness(mr, &mrfd.data, size);
2354 }
2355 memory_region_transaction_begin();
2356 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2357 if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) {
2358 break;
2359 }
2360 }
2361 ++mr->ioeventfd_nb;
2362 mr->ioeventfds = g_realloc(mr->ioeventfds,
2363 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2364 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2365 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2366 mr->ioeventfds[i] = mrfd;
2367 ioeventfd_update_pending |= mr->enabled;
2368 memory_region_transaction_commit();
2369 }
2370
2371 void memory_region_del_eventfd(MemoryRegion *mr,
2372 hwaddr addr,
2373 unsigned size,
2374 bool match_data,
2375 uint64_t data,
2376 EventNotifier *e)
2377 {
2378 MemoryRegionIoeventfd mrfd = {
2379 .addr.start = int128_make64(addr),
2380 .addr.size = int128_make64(size),
2381 .match_data = match_data,
2382 .data = data,
2383 .e = e,
2384 };
2385 unsigned i;
2386
2387 if (size) {
2388 adjust_endianness(mr, &mrfd.data, size);
2389 }
2390 memory_region_transaction_begin();
2391 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2392 if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) {
2393 break;
2394 }
2395 }
2396 assert(i != mr->ioeventfd_nb);
2397 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2398 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2399 --mr->ioeventfd_nb;
2400 mr->ioeventfds = g_realloc(mr->ioeventfds,
2401 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2402 ioeventfd_update_pending |= mr->enabled;
2403 memory_region_transaction_commit();
2404 }
2405
2406 static void memory_region_update_container_subregions(MemoryRegion *subregion)
2407 {
2408 MemoryRegion *mr = subregion->container;
2409 MemoryRegion *other;
2410
2411 memory_region_transaction_begin();
2412
2413 memory_region_ref(subregion);
2414 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2415 if (subregion->priority >= other->priority) {
2416 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2417 goto done;
2418 }
2419 }
2420 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2421 done:
2422 memory_region_update_pending |= mr->enabled && subregion->enabled;
2423 memory_region_transaction_commit();
2424 }
2425
2426 static void memory_region_add_subregion_common(MemoryRegion *mr,
2427 hwaddr offset,
2428 MemoryRegion *subregion)
2429 {
2430 assert(!subregion->container);
2431 subregion->container = mr;
2432 subregion->addr = offset;
2433 memory_region_update_container_subregions(subregion);
2434 }
2435
2436 void memory_region_add_subregion(MemoryRegion *mr,
2437 hwaddr offset,
2438 MemoryRegion *subregion)
2439 {
2440 subregion->priority = 0;
2441 memory_region_add_subregion_common(mr, offset, subregion);
2442 }
2443
2444 void memory_region_add_subregion_overlap(MemoryRegion *mr,
2445 hwaddr offset,
2446 MemoryRegion *subregion,
2447 int priority)
2448 {
2449 subregion->priority = priority;
2450 memory_region_add_subregion_common(mr, offset, subregion);
2451 }
2452
2453 void memory_region_del_subregion(MemoryRegion *mr,
2454 MemoryRegion *subregion)
2455 {
2456 memory_region_transaction_begin();
2457 assert(subregion->container == mr);
2458 subregion->container = NULL;
2459 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2460 memory_region_unref(subregion);
2461 memory_region_update_pending |= mr->enabled && subregion->enabled;
2462 memory_region_transaction_commit();
2463 }
2464
2465 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2466 {
2467 if (enabled == mr->enabled) {
2468 return;
2469 }
2470 memory_region_transaction_begin();
2471 mr->enabled = enabled;
2472 memory_region_update_pending = true;
2473 memory_region_transaction_commit();
2474 }
2475
2476 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2477 {
2478 Int128 s = int128_make64(size);
2479
2480 if (size == UINT64_MAX) {
2481 s = int128_2_64();
2482 }
2483 if (int128_eq(s, mr->size)) {
2484 return;
2485 }
2486 memory_region_transaction_begin();
2487 mr->size = s;
2488 memory_region_update_pending = true;
2489 memory_region_transaction_commit();
2490 }
2491
2492 static void memory_region_readd_subregion(MemoryRegion *mr)
2493 {
2494 MemoryRegion *container = mr->container;
2495
2496 if (container) {
2497 memory_region_transaction_begin();
2498 memory_region_ref(mr);
2499 memory_region_del_subregion(container, mr);
2500 mr->container = container;
2501 memory_region_update_container_subregions(mr);
2502 memory_region_unref(mr);
2503 memory_region_transaction_commit();
2504 }
2505 }
2506
2507 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2508 {
2509 if (addr != mr->addr) {
2510 mr->addr = addr;
2511 memory_region_readd_subregion(mr);
2512 }
2513 }
2514
2515 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2516 {
2517 assert(mr->alias);
2518
2519 if (offset == mr->alias_offset) {
2520 return;
2521 }
2522
2523 memory_region_transaction_begin();
2524 mr->alias_offset = offset;
2525 memory_region_update_pending |= mr->enabled;
2526 memory_region_transaction_commit();
2527 }
2528
2529 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2530 {
2531 return mr->align;
2532 }
2533
2534 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2535 {
2536 const AddrRange *addr = addr_;
2537 const FlatRange *fr = fr_;
2538
2539 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2540 return -1;
2541 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2542 return 1;
2543 }
2544 return 0;
2545 }
2546
2547 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2548 {
2549 return bsearch(&addr, view->ranges, view->nr,
2550 sizeof(FlatRange), cmp_flatrange_addr);
2551 }
2552
2553 bool memory_region_is_mapped(MemoryRegion *mr)
2554 {
2555 return mr->container ? true : false;
2556 }
2557
2558 /* Same as memory_region_find, but it does not add a reference to the
2559 * returned region. It must be called from an RCU critical section.
2560 */
2561 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2562 hwaddr addr, uint64_t size)
2563 {
2564 MemoryRegionSection ret = { .mr = NULL };
2565 MemoryRegion *root;
2566 AddressSpace *as;
2567 AddrRange range;
2568 FlatView *view;
2569 FlatRange *fr;
2570
2571 addr += mr->addr;
2572 for (root = mr; root->container; ) {
2573 root = root->container;
2574 addr += root->addr;
2575 }
2576
2577 as = memory_region_to_address_space(root);
2578 if (!as) {
2579 return ret;
2580 }
2581 range = addrrange_make(int128_make64(addr), int128_make64(size));
2582
2583 view = address_space_to_flatview(as);
2584 fr = flatview_lookup(view, range);
2585 if (!fr) {
2586 return ret;
2587 }
2588
2589 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2590 --fr;
2591 }
2592
2593 ret.mr = fr->mr;
2594 ret.fv = view;
2595 range = addrrange_intersection(range, fr->addr);
2596 ret.offset_within_region = fr->offset_in_region;
2597 ret.offset_within_region += int128_get64(int128_sub(range.start,
2598 fr->addr.start));
2599 ret.size = range.size;
2600 ret.offset_within_address_space = int128_get64(range.start);
2601 ret.readonly = fr->readonly;
2602 ret.nonvolatile = fr->nonvolatile;
2603 return ret;
2604 }
2605
2606 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2607 hwaddr addr, uint64_t size)
2608 {
2609 MemoryRegionSection ret;
2610 rcu_read_lock();
2611 ret = memory_region_find_rcu(mr, addr, size);
2612 if (ret.mr) {
2613 memory_region_ref(ret.mr);
2614 }
2615 rcu_read_unlock();
2616 return ret;
2617 }
2618
2619 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2620 {
2621 MemoryRegion *mr;
2622
2623 rcu_read_lock();
2624 mr = memory_region_find_rcu(container, addr, 1).mr;
2625 rcu_read_unlock();
2626 return mr && mr != container;
2627 }
2628
2629 void memory_global_dirty_log_sync(void)
2630 {
2631 memory_region_sync_dirty_bitmap(NULL);
2632 }
2633
2634 void memory_global_after_dirty_log_sync(void)
2635 {
2636 MEMORY_LISTENER_CALL_GLOBAL(log_global_after_sync, Forward);
2637 }
2638
2639 static VMChangeStateEntry *vmstate_change;
2640
2641 void memory_global_dirty_log_start(void)
2642 {
2643 if (vmstate_change) {
2644 qemu_del_vm_change_state_handler(vmstate_change);
2645 vmstate_change = NULL;
2646 }
2647
2648 global_dirty_log = true;
2649
2650 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2651
2652 /* Refresh DIRTY_MEMORY_MIGRATION bit. */
2653 memory_region_transaction_begin();
2654 memory_region_update_pending = true;
2655 memory_region_transaction_commit();
2656 }
2657
2658 static void memory_global_dirty_log_do_stop(void)
2659 {
2660 global_dirty_log = false;
2661
2662 /* Refresh DIRTY_MEMORY_MIGRATION bit. */
2663 memory_region_transaction_begin();
2664 memory_region_update_pending = true;
2665 memory_region_transaction_commit();
2666
2667 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2668 }
2669
2670 static void memory_vm_change_state_handler(void *opaque, int running,
2671 RunState state)
2672 {
2673 if (running) {
2674 memory_global_dirty_log_do_stop();
2675
2676 if (vmstate_change) {
2677 qemu_del_vm_change_state_handler(vmstate_change);
2678 vmstate_change = NULL;
2679 }
2680 }
2681 }
2682
2683 void memory_global_dirty_log_stop(void)
2684 {
2685 if (!runstate_is_running()) {
2686 if (vmstate_change) {
2687 return;
2688 }
2689 vmstate_change = qemu_add_vm_change_state_handler(
2690 memory_vm_change_state_handler, NULL);
2691 return;
2692 }
2693
2694 memory_global_dirty_log_do_stop();
2695 }
2696
2697 static void listener_add_address_space(MemoryListener *listener,
2698 AddressSpace *as)
2699 {
2700 FlatView *view;
2701 FlatRange *fr;
2702
2703 if (listener->begin) {
2704 listener->begin(listener);
2705 }
2706 if (global_dirty_log) {
2707 if (listener->log_global_start) {
2708 listener->log_global_start(listener);
2709 }
2710 }
2711
2712 view = address_space_get_flatview(as);
2713 FOR_EACH_FLAT_RANGE(fr, view) {
2714 MemoryRegionSection section = section_from_flat_range(fr, view);
2715
2716 if (listener->region_add) {
2717 listener->region_add(listener, &section);
2718 }
2719 if (fr->dirty_log_mask && listener->log_start) {
2720 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2721 }
2722 }
2723 if (listener->commit) {
2724 listener->commit(listener);
2725 }
2726 flatview_unref(view);
2727 }
2728
2729 static void listener_del_address_space(MemoryListener *listener,
2730 AddressSpace *as)
2731 {
2732 FlatView *view;
2733 FlatRange *fr;
2734
2735 if (listener->begin) {
2736 listener->begin(listener);
2737 }
2738 view = address_space_get_flatview(as);
2739 FOR_EACH_FLAT_RANGE(fr, view) {
2740 MemoryRegionSection section = section_from_flat_range(fr, view);
2741
2742 if (fr->dirty_log_mask && listener->log_stop) {
2743 listener->log_stop(listener, &section, fr->dirty_log_mask, 0);
2744 }
2745 if (listener->region_del) {
2746 listener->region_del(listener, &section);
2747 }
2748 }
2749 if (listener->commit) {
2750 listener->commit(listener);
2751 }
2752 flatview_unref(view);
2753 }
2754
2755 void memory_listener_register(MemoryListener *listener, AddressSpace *as)
2756 {
2757 MemoryListener *other = NULL;
2758
2759 listener->address_space = as;
2760 if (QTAILQ_EMPTY(&memory_listeners)
2761 || listener->priority >= QTAILQ_LAST(&memory_listeners)->priority) {
2762 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2763 } else {
2764 QTAILQ_FOREACH(other, &memory_listeners, link) {
2765 if (listener->priority < other->priority) {
2766 break;
2767 }
2768 }
2769 QTAILQ_INSERT_BEFORE(other, listener, link);
2770 }
2771
2772 if (QTAILQ_EMPTY(&as->listeners)
2773 || listener->priority >= QTAILQ_LAST(&as->listeners)->priority) {
2774 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
2775 } else {
2776 QTAILQ_FOREACH(other, &as->listeners, link_as) {
2777 if (listener->priority < other->priority) {
2778 break;
2779 }
2780 }
2781 QTAILQ_INSERT_BEFORE(other, listener, link_as);
2782 }
2783
2784 listener_add_address_space(listener, as);
2785 }
2786
2787 void memory_listener_unregister(MemoryListener *listener)
2788 {
2789 if (!listener->address_space) {
2790 return;
2791 }
2792
2793 listener_del_address_space(listener, listener->address_space);
2794 QTAILQ_REMOVE(&memory_listeners, listener, link);
2795 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
2796 listener->address_space = NULL;
2797 }
2798
2799 void address_space_remove_listeners(AddressSpace *as)
2800 {
2801 while (!QTAILQ_EMPTY(&as->listeners)) {
2802 memory_listener_unregister(QTAILQ_FIRST(&as->listeners));
2803 }
2804 }
2805
2806 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2807 {
2808 memory_region_ref(root);
2809 as->root = root;
2810 as->current_map = NULL;
2811 as->ioeventfd_nb = 0;
2812 as->ioeventfds = NULL;
2813 QTAILQ_INIT(&as->listeners);
2814 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2815 as->name = g_strdup(name ? name : "anonymous");
2816 address_space_update_topology(as);
2817 address_space_update_ioeventfds(as);
2818 }
2819
2820 static void do_address_space_destroy(AddressSpace *as)
2821 {
2822 assert(QTAILQ_EMPTY(&as->listeners));
2823
2824 flatview_unref(as->current_map);
2825 g_free(as->name);
2826 g_free(as->ioeventfds);
2827 memory_region_unref(as->root);
2828 }
2829
2830 void address_space_destroy(AddressSpace *as)
2831 {
2832 MemoryRegion *root = as->root;
2833
2834 /* Flush out anything from MemoryListeners listening in on this */
2835 memory_region_transaction_begin();
2836 as->root = NULL;
2837 memory_region_transaction_commit();
2838 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2839
2840 /* At this point, as->dispatch and as->current_map are dummy
2841 * entries that the guest should never use. Wait for the old
2842 * values to expire before freeing the data.
2843 */
2844 as->root = root;
2845 call_rcu(as, do_address_space_destroy, rcu);
2846 }
2847
2848 static const char *memory_region_type(MemoryRegion *mr)
2849 {
2850 if (memory_region_is_ram_device(mr)) {
2851 return "ramd";
2852 } else if (memory_region_is_romd(mr)) {
2853 return "romd";
2854 } else if (memory_region_is_rom(mr)) {
2855 return "rom";
2856 } else if (memory_region_is_ram(mr)) {
2857 return "ram";
2858 } else {
2859 return "i/o";
2860 }
2861 }
2862
2863 typedef struct MemoryRegionList MemoryRegionList;
2864
2865 struct MemoryRegionList {
2866 const MemoryRegion *mr;
2867 QTAILQ_ENTRY(MemoryRegionList) mrqueue;
2868 };
2869
2870 typedef QTAILQ_HEAD(, MemoryRegionList) MemoryRegionListHead;
2871
2872 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
2873 int128_sub((size), int128_one())) : 0)
2874 #define MTREE_INDENT " "
2875
2876 static void mtree_expand_owner(const char *label, Object *obj)
2877 {
2878 DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE);
2879
2880 qemu_printf(" %s:{%s", label, dev ? "dev" : "obj");
2881 if (dev && dev->id) {
2882 qemu_printf(" id=%s", dev->id);
2883 } else {
2884 gchar *canonical_path = object_get_canonical_path(obj);
2885 if (canonical_path) {
2886 qemu_printf(" path=%s", canonical_path);
2887 g_free(canonical_path);
2888 } else {
2889 qemu_printf(" type=%s", object_get_typename(obj));
2890 }
2891 }
2892 qemu_printf("}");
2893 }
2894
2895 static void mtree_print_mr_owner(const MemoryRegion *mr)
2896 {
2897 Object *owner = mr->owner;
2898 Object *parent = memory_region_owner((MemoryRegion *)mr);
2899
2900 if (!owner && !parent) {
2901 qemu_printf(" orphan");
2902 return;
2903 }
2904 if (owner) {
2905 mtree_expand_owner("owner", owner);
2906 }
2907 if (parent && parent != owner) {
2908 mtree_expand_owner("parent", parent);
2909 }
2910 }
2911
2912 static void mtree_print_mr(const MemoryRegion *mr, unsigned int level,
2913 hwaddr base,
2914 MemoryRegionListHead *alias_print_queue,
2915 bool owner)
2916 {
2917 MemoryRegionList *new_ml, *ml, *next_ml;
2918 MemoryRegionListHead submr_print_queue;
2919 const MemoryRegion *submr;
2920 unsigned int i;
2921 hwaddr cur_start, cur_end;
2922
2923 if (!mr) {
2924 return;
2925 }
2926
2927 for (i = 0; i < level; i++) {
2928 qemu_printf(MTREE_INDENT);
2929 }
2930
2931 cur_start = base + mr->addr;
2932 cur_end = cur_start + MR_SIZE(mr->size);
2933
2934 /*
2935 * Try to detect overflow of memory region. This should never
2936 * happen normally. When it happens, we dump something to warn the
2937 * user who is observing this.
2938 */
2939 if (cur_start < base || cur_end < cur_start) {
2940 qemu_printf("[DETECTED OVERFLOW!] ");
2941 }
2942
2943 if (mr->alias) {
2944 MemoryRegionList *ml;
2945 bool found = false;
2946
2947 /* check if the alias is already in the queue */
2948 QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
2949 if (ml->mr == mr->alias) {
2950 found = true;
2951 }
2952 }
2953
2954 if (!found) {
2955 ml = g_new(MemoryRegionList, 1);
2956 ml->mr = mr->alias;
2957 QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
2958 }
2959 qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx
2960 " (prio %d, %s%s): alias %s @%s " TARGET_FMT_plx
2961 "-" TARGET_FMT_plx "%s",
2962 cur_start, cur_end,
2963 mr->priority,
2964 mr->nonvolatile ? "nv-" : "",
2965 memory_region_type((MemoryRegion *)mr),
2966 memory_region_name(mr),
2967 memory_region_name(mr->alias),
2968 mr->alias_offset,
2969 mr->alias_offset + MR_SIZE(mr->size),
2970 mr->enabled ? "" : " [disabled]");
2971 if (owner) {
2972 mtree_print_mr_owner(mr);
2973 }
2974 } else {
2975 qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx
2976 " (prio %d, %s%s): %s%s",
2977 cur_start, cur_end,
2978 mr->priority,
2979 mr->nonvolatile ? "nv-" : "",
2980 memory_region_type((MemoryRegion *)mr),
2981 memory_region_name(mr),
2982 mr->enabled ? "" : " [disabled]");
2983 if (owner) {
2984 mtree_print_mr_owner(mr);
2985 }
2986 }
2987 qemu_printf("\n");
2988
2989 QTAILQ_INIT(&submr_print_queue);
2990
2991 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2992 new_ml = g_new(MemoryRegionList, 1);
2993 new_ml->mr = submr;
2994 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
2995 if (new_ml->mr->addr < ml->mr->addr ||
2996 (new_ml->mr->addr == ml->mr->addr &&
2997 new_ml->mr->priority > ml->mr->priority)) {
2998 QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
2999 new_ml = NULL;
3000 break;
3001 }
3002 }
3003 if (new_ml) {
3004 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
3005 }
3006 }
3007
3008 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
3009 mtree_print_mr(ml->mr, level + 1, cur_start,
3010 alias_print_queue, owner);
3011 }
3012
3013 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
3014 g_free(ml);
3015 }
3016 }
3017
3018 struct FlatViewInfo {
3019 int counter;
3020 bool dispatch_tree;
3021 bool owner;
3022 AccelClass *ac;
3023 const char *ac_name;
3024 };
3025
3026 static void mtree_print_flatview(gpointer key, gpointer value,
3027 gpointer user_data)
3028 {
3029 FlatView *view = key;
3030 GArray *fv_address_spaces = value;
3031 struct FlatViewInfo *fvi = user_data;
3032 FlatRange *range = &view->ranges[0];
3033 MemoryRegion *mr;
3034 int n = view->nr;
3035 int i;
3036 AddressSpace *as;
3037
3038 qemu_printf("FlatView #%d\n", fvi->counter);
3039 ++fvi->counter;
3040
3041 for (i = 0; i < fv_address_spaces->len; ++i) {
3042 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3043 qemu_printf(" AS \"%s\", root: %s",
3044 as->name, memory_region_name(as->root));
3045 if (as->root->alias) {
3046 qemu_printf(", alias %s", memory_region_name(as->root->alias));
3047 }
3048 qemu_printf("\n");
3049 }
3050
3051 qemu_printf(" Root memory region: %s\n",
3052 view->root ? memory_region_name(view->root) : "(none)");
3053
3054 if (n <= 0) {
3055 qemu_printf(MTREE_INDENT "No rendered FlatView\n\n");
3056 return;
3057 }
3058
3059 while (n--) {
3060 mr = range->mr;
3061 if (range->offset_in_region) {
3062 qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx
3063 " (prio %d, %s%s): %s @" TARGET_FMT_plx,
3064 int128_get64(range->addr.start),
3065 int128_get64(range->addr.start)
3066 + MR_SIZE(range->addr.size),
3067 mr->priority,
3068 range->nonvolatile ? "nv-" : "",
3069 range->readonly ? "rom" : memory_region_type(mr),
3070 memory_region_name(mr),
3071 range->offset_in_region);
3072 } else {
3073 qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx
3074 " (prio %d, %s%s): %s",
3075 int128_get64(range->addr.start),
3076 int128_get64(range->addr.start)
3077 + MR_SIZE(range->addr.size),
3078 mr->priority,
3079 range->nonvolatile ? "nv-" : "",
3080 range->readonly ? "rom" : memory_region_type(mr),
3081 memory_region_name(mr));
3082 }
3083 if (fvi->owner) {
3084 mtree_print_mr_owner(mr);
3085 }
3086
3087 if (fvi->ac) {
3088 for (i = 0; i < fv_address_spaces->len; ++i) {
3089 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3090 if (fvi->ac->has_memory(current_machine, as,
3091 int128_get64(range->addr.start),
3092 MR_SIZE(range->addr.size) + 1)) {
3093 qemu_printf(" %s", fvi->ac_name);
3094 }
3095 }
3096 }
3097 qemu_printf("\n");
3098 range++;
3099 }
3100
3101 #if !defined(CONFIG_USER_ONLY)
3102 if (fvi->dispatch_tree && view->root) {
3103 mtree_print_dispatch(view->dispatch, view->root);
3104 }
3105 #endif
3106
3107 qemu_printf("\n");
3108 }
3109
3110 static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
3111 gpointer user_data)
3112 {
3113 FlatView *view = key;
3114 GArray *fv_address_spaces = value;
3115
3116 g_array_unref(fv_address_spaces);
3117 flatview_unref(view);
3118
3119 return true;
3120 }
3121
3122 void mtree_info(bool flatview, bool dispatch_tree, bool owner)
3123 {
3124 MemoryRegionListHead ml_head;
3125 MemoryRegionList *ml, *ml2;
3126 AddressSpace *as;
3127
3128 if (flatview) {
3129 FlatView *view;
3130 struct FlatViewInfo fvi = {
3131 .counter = 0,
3132 .dispatch_tree = dispatch_tree,
3133 .owner = owner,
3134 };
3135 GArray *fv_address_spaces;
3136 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3137 AccelClass *ac = ACCEL_GET_CLASS(current_machine->accelerator);
3138
3139 if (ac->has_memory) {
3140 fvi.ac = ac;
3141 fvi.ac_name = current_machine->accel ? current_machine->accel :
3142 object_class_get_name(OBJECT_CLASS(ac));
3143 }
3144
3145 /* Gather all FVs in one table */
3146 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3147 view = address_space_get_flatview(as);
3148
3149 fv_address_spaces = g_hash_table_lookup(views, view);
3150 if (!fv_address_spaces) {
3151 fv_address_spaces = g_array_new(false, false, sizeof(as));
3152 g_hash_table_insert(views, view, fv_address_spaces);
3153 }
3154
3155 g_array_append_val(fv_address_spaces, as);
3156 }
3157
3158 /* Print */
3159 g_hash_table_foreach(views, mtree_print_flatview, &fvi);
3160
3161 /* Free */
3162 g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
3163 g_hash_table_unref(views);
3164
3165 return;
3166 }
3167
3168 QTAILQ_INIT(&ml_head);
3169
3170 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3171 qemu_printf("address-space: %s\n", as->name);
3172 mtree_print_mr(as->root, 1, 0, &ml_head, owner);
3173 qemu_printf("\n");
3174 }
3175
3176 /* print aliased regions */
3177 QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
3178 qemu_printf("memory-region: %s\n", memory_region_name(ml->mr));
3179 mtree_print_mr(ml->mr, 1, 0, &ml_head, owner);
3180 qemu_printf("\n");
3181 }
3182
3183 QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
3184 g_free(ml);
3185 }
3186 }
3187
3188 void memory_region_init_ram(MemoryRegion *mr,
3189 struct Object *owner,
3190 const char *name,
3191 uint64_t size,
3192 Error **errp)
3193 {
3194 DeviceState *owner_dev;
3195 Error *err = NULL;
3196
3197 memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
3198 if (err) {
3199 error_propagate(errp, err);
3200 return;
3201 }
3202 /* This will assert if owner is neither NULL nor a DeviceState.
3203 * We only want the owner here for the purposes of defining a
3204 * unique name for migration. TODO: Ideally we should implement
3205 * a naming scheme for Objects which are not DeviceStates, in
3206 * which case we can relax this restriction.
3207 */
3208 owner_dev = DEVICE(owner);
3209 vmstate_register_ram(mr, owner_dev);
3210 }
3211
3212 void memory_region_init_rom(MemoryRegion *mr,
3213 struct Object *owner,
3214 const char *name,
3215 uint64_t size,
3216 Error **errp)
3217 {
3218 DeviceState *owner_dev;
3219 Error *err = NULL;
3220
3221 memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
3222 if (err) {
3223 error_propagate(errp, err);
3224 return;
3225 }
3226 /* This will assert if owner is neither NULL nor a DeviceState.
3227 * We only want the owner here for the purposes of defining a
3228 * unique name for migration. TODO: Ideally we should implement
3229 * a naming scheme for Objects which are not DeviceStates, in
3230 * which case we can relax this restriction.
3231 */
3232 owner_dev = DEVICE(owner);
3233 vmstate_register_ram(mr, owner_dev);
3234 }
3235
3236 void memory_region_init_rom_device(MemoryRegion *mr,
3237 struct Object *owner,
3238 const MemoryRegionOps *ops,
3239 void *opaque,
3240 const char *name,
3241 uint64_t size,
3242 Error **errp)
3243 {
3244 DeviceState *owner_dev;
3245 Error *err = NULL;
3246
3247 memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
3248 name, size, &err);
3249 if (err) {
3250 error_propagate(errp, err);
3251 return;
3252 }
3253 /* This will assert if owner is neither NULL nor a DeviceState.
3254 * We only want the owner here for the purposes of defining a
3255 * unique name for migration. TODO: Ideally we should implement
3256 * a naming scheme for Objects which are not DeviceStates, in
3257 * which case we can relax this restriction.
3258 */
3259 owner_dev = DEVICE(owner);
3260 vmstate_register_ram(mr, owner_dev);
3261 }
3262
3263 static const TypeInfo memory_region_info = {
3264 .parent = TYPE_OBJECT,
3265 .name = TYPE_MEMORY_REGION,
3266 .class_size = sizeof(MemoryRegionClass),
3267 .instance_size = sizeof(MemoryRegion),
3268 .instance_init = memory_region_initfn,
3269 .instance_finalize = memory_region_finalize,
3270 };
3271
3272 static const TypeInfo iommu_memory_region_info = {
3273 .parent = TYPE_MEMORY_REGION,
3274 .name = TYPE_IOMMU_MEMORY_REGION,
3275 .class_size = sizeof(IOMMUMemoryRegionClass),
3276 .instance_size = sizeof(IOMMUMemoryRegion),
3277 .instance_init = iommu_memory_region_initfn,
3278 .abstract = true,
3279 };
3280
3281 static void memory_register_types(void)
3282 {
3283 type_register_static(&memory_region_info);
3284 type_register_static(&iommu_memory_region_info);
3285 }
3286
3287 type_init(memory_register_types)
3288
3289 MemOp devend_memop(enum device_endian end)
3290 {
3291 static MemOp conv[] = {
3292 [DEVICE_LITTLE_ENDIAN] = MO_LE,
3293 [DEVICE_BIG_ENDIAN] = MO_BE,
3294 [DEVICE_NATIVE_ENDIAN] = MO_TE,
3295 [DEVICE_HOST_ENDIAN] = 0,
3296 };
3297 switch (end) {
3298 case DEVICE_LITTLE_ENDIAN:
3299 case DEVICE_BIG_ENDIAN:
3300 case DEVICE_NATIVE_ENDIAN:
3301 return conv[end];
3302 default:
3303 g_assert_not_reached();
3304 }
3305 }
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