4 * Copyright (c) 2012-2014 SUSE LINUX Products GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
21 #include "qemu/osdep.h"
22 #include "qapi/error.h"
23 #include "qemu-common.h"
25 #include "sysemu/hw_accel.h"
26 #include "qemu/notify.h"
29 #include "exec/cpu-common.h"
30 #include "qemu/error-report.h"
31 #include "sysemu/sysemu.h"
32 #include "hw/boards.h"
33 #include "hw/qdev-properties.h"
34 #include "trace-root.h"
36 CPUInterruptHandler cpu_interrupt_handler
;
38 CPUState
*cpu_by_arch_id(int64_t id
)
43 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
45 if (cc
->get_arch_id(cpu
) == id
) {
52 bool cpu_exists(int64_t id
)
54 return !!cpu_by_arch_id(id
);
57 CPUState
*cpu_create(const char *typename
)
60 CPUState
*cpu
= CPU(object_new(typename
));
61 object_property_set_bool(OBJECT(cpu
), true, "realized", &err
);
63 error_report_err(err
);
64 object_unref(OBJECT(cpu
));
70 const char *cpu_parse_cpu_model(const char *typename
, const char *cpu_model
)
78 model_pieces
= g_strsplit(cpu_model
, ",", 2);
80 oc
= cpu_class_by_name(typename
, model_pieces
[0]);
82 g_strfreev(model_pieces
);
86 cpu_type
= object_class_get_name(oc
);
88 cc
->parse_features(cpu_type
, model_pieces
[1], &err
);
89 g_strfreev(model_pieces
);
91 error_report_err(err
);
97 CPUState
*cpu_generic_init(const char *typename
, const char *cpu_model
)
99 /* TODO: all callers of cpu_generic_init() need to be converted to
100 * call cpu_parse_features() only once, before calling cpu_generic_init().
102 const char *cpu_type
= cpu_parse_cpu_model(typename
, cpu_model
);
105 return cpu_create(cpu_type
);
110 bool cpu_paging_enabled(const CPUState
*cpu
)
112 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
114 return cc
->get_paging_enabled(cpu
);
117 static bool cpu_common_get_paging_enabled(const CPUState
*cpu
)
122 void cpu_get_memory_mapping(CPUState
*cpu
, MemoryMappingList
*list
,
125 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
127 cc
->get_memory_mapping(cpu
, list
, errp
);
130 static void cpu_common_get_memory_mapping(CPUState
*cpu
,
131 MemoryMappingList
*list
,
134 error_setg(errp
, "Obtaining memory mappings is unsupported on this CPU.");
137 /* Resetting the IRQ comes from across the code base so we take the
138 * BQL here if we need to. cpu_interrupt assumes it is held.*/
139 void cpu_reset_interrupt(CPUState
*cpu
, int mask
)
141 bool need_lock
= !qemu_mutex_iothread_locked();
144 qemu_mutex_lock_iothread();
146 cpu
->interrupt_request
&= ~mask
;
148 qemu_mutex_unlock_iothread();
152 void cpu_exit(CPUState
*cpu
)
154 atomic_set(&cpu
->exit_request
, 1);
155 /* Ensure cpu_exec will see the exit request after TCG has exited. */
157 atomic_set(&cpu
->icount_decr
.u16
.high
, -1);
160 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f
, CPUState
*cpu
,
163 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
165 return (*cc
->write_elf32_qemunote
)(f
, cpu
, opaque
);
168 static int cpu_common_write_elf32_qemunote(WriteCoreDumpFunction f
,
169 CPUState
*cpu
, void *opaque
)
174 int cpu_write_elf32_note(WriteCoreDumpFunction f
, CPUState
*cpu
,
175 int cpuid
, void *opaque
)
177 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
179 return (*cc
->write_elf32_note
)(f
, cpu
, cpuid
, opaque
);
182 static int cpu_common_write_elf32_note(WriteCoreDumpFunction f
,
183 CPUState
*cpu
, int cpuid
,
189 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f
, CPUState
*cpu
,
192 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
194 return (*cc
->write_elf64_qemunote
)(f
, cpu
, opaque
);
197 static int cpu_common_write_elf64_qemunote(WriteCoreDumpFunction f
,
198 CPUState
*cpu
, void *opaque
)
203 int cpu_write_elf64_note(WriteCoreDumpFunction f
, CPUState
*cpu
,
204 int cpuid
, void *opaque
)
206 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
208 return (*cc
->write_elf64_note
)(f
, cpu
, cpuid
, opaque
);
211 static int cpu_common_write_elf64_note(WriteCoreDumpFunction f
,
212 CPUState
*cpu
, int cpuid
,
219 static int cpu_common_gdb_read_register(CPUState
*cpu
, uint8_t *buf
, int reg
)
224 static int cpu_common_gdb_write_register(CPUState
*cpu
, uint8_t *buf
, int reg
)
229 static bool cpu_common_debug_check_watchpoint(CPUState
*cpu
, CPUWatchpoint
*wp
)
231 /* If no extra check is required, QEMU watchpoint match can be considered
232 * as an architectural match.
237 bool target_words_bigendian(void);
238 static bool cpu_common_virtio_is_big_endian(CPUState
*cpu
)
240 return target_words_bigendian();
243 static void cpu_common_noop(CPUState
*cpu
)
247 static bool cpu_common_exec_interrupt(CPUState
*cpu
, int int_req
)
252 GuestPanicInformation
*cpu_get_crash_info(CPUState
*cpu
)
254 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
255 GuestPanicInformation
*res
= NULL
;
257 if (cc
->get_crash_info
) {
258 res
= cc
->get_crash_info(cpu
);
263 void cpu_dump_state(CPUState
*cpu
, FILE *f
, fprintf_function cpu_fprintf
,
266 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
268 if (cc
->dump_state
) {
269 cpu_synchronize_state(cpu
);
270 cc
->dump_state(cpu
, f
, cpu_fprintf
, flags
);
274 void cpu_dump_statistics(CPUState
*cpu
, FILE *f
, fprintf_function cpu_fprintf
,
277 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
279 if (cc
->dump_statistics
) {
280 cc
->dump_statistics(cpu
, f
, cpu_fprintf
, flags
);
284 void cpu_reset(CPUState
*cpu
)
286 CPUClass
*klass
= CPU_GET_CLASS(cpu
);
288 if (klass
->reset
!= NULL
) {
289 (*klass
->reset
)(cpu
);
292 trace_guest_cpu_reset(cpu
);
295 static void cpu_common_reset(CPUState
*cpu
)
297 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
299 if (qemu_loglevel_mask(CPU_LOG_RESET
)) {
300 qemu_log("CPU Reset (CPU %d)\n", cpu
->cpu_index
);
301 log_cpu_state(cpu
, cc
->reset_dump_flags
);
304 cpu
->interrupt_request
= 0;
307 cpu
->mem_io_vaddr
= 0;
308 cpu
->icount_extra
= 0;
309 cpu
->icount_decr
.u32
= 0;
311 cpu
->exception_index
= -1;
312 cpu
->crash_occurred
= false;
315 cpu_tb_jmp_cache_clear(cpu
);
317 tcg_flush_softmmu_tlb(cpu
);
321 static bool cpu_common_has_work(CPUState
*cs
)
326 ObjectClass
*cpu_class_by_name(const char *typename
, const char *cpu_model
)
328 CPUClass
*cc
= CPU_CLASS(object_class_by_name(typename
));
330 return cc
->class_by_name(cpu_model
);
333 static ObjectClass
*cpu_common_class_by_name(const char *cpu_model
)
338 static void cpu_common_parse_features(const char *typename
, char *features
,
341 char *featurestr
; /* Single "key=value" string being parsed */
343 static bool cpu_globals_initialized
;
345 /* TODO: all callers of ->parse_features() need to be changed to
346 * call it only once, so we can remove this check (or change it
347 * to assert(!cpu_globals_initialized).
348 * Current callers of ->parse_features() are:
349 * - cpu_generic_init()
351 if (cpu_globals_initialized
) {
354 cpu_globals_initialized
= true;
356 featurestr
= features
? strtok(features
, ",") : NULL
;
359 val
= strchr(featurestr
, '=');
361 GlobalProperty
*prop
= g_new0(typeof(*prop
), 1);
364 prop
->driver
= typename
;
365 prop
->property
= g_strdup(featurestr
);
366 prop
->value
= g_strdup(val
);
367 prop
->errp
= &error_fatal
;
368 qdev_prop_register_global(prop
);
370 error_setg(errp
, "Expected key=value format, found %s.",
374 featurestr
= strtok(NULL
, ",");
378 static void cpu_common_realizefn(DeviceState
*dev
, Error
**errp
)
380 CPUState
*cpu
= CPU(dev
);
381 Object
*machine
= qdev_get_machine();
383 /* qdev_get_machine() can return something that's not TYPE_MACHINE
384 * if this is one of the user-only emulators; in that case there's
385 * no need to check the ignore_memory_transaction_failures board flag.
387 if (object_dynamic_cast(machine
, TYPE_MACHINE
)) {
388 ObjectClass
*oc
= object_get_class(machine
);
389 MachineClass
*mc
= MACHINE_CLASS(oc
);
392 cpu
->ignore_memory_transaction_failures
=
393 mc
->ignore_memory_transaction_failures
;
397 if (dev
->hotplugged
) {
398 cpu_synchronize_post_init(cpu
);
402 /* NOTE: latest generic point where the cpu is fully realized */
403 trace_init_vcpu(cpu
);
406 static void cpu_common_unrealizefn(DeviceState
*dev
, Error
**errp
)
408 CPUState
*cpu
= CPU(dev
);
409 /* NOTE: latest generic point before the cpu is fully unrealized */
410 trace_fini_vcpu(cpu
);
411 cpu_exec_unrealizefn(cpu
);
414 static void cpu_common_initfn(Object
*obj
)
416 CPUState
*cpu
= CPU(obj
);
417 CPUClass
*cc
= CPU_GET_CLASS(obj
);
419 cpu
->cpu_index
= UNASSIGNED_CPU_INDEX
;
420 cpu
->gdb_num_regs
= cpu
->gdb_num_g_regs
= cc
->gdb_num_core_regs
;
421 /* *-user doesn't have configurable SMP topology */
422 /* the default value is changed by qemu_init_vcpu() for softmmu */
426 qemu_mutex_init(&cpu
->work_mutex
);
427 QTAILQ_INIT(&cpu
->breakpoints
);
428 QTAILQ_INIT(&cpu
->watchpoints
);
430 cpu_exec_initfn(cpu
);
433 static void cpu_common_finalize(Object
*obj
)
437 static int64_t cpu_common_get_arch_id(CPUState
*cpu
)
439 return cpu
->cpu_index
;
442 static vaddr
cpu_adjust_watchpoint_address(CPUState
*cpu
, vaddr addr
, int len
)
447 static void generic_handle_interrupt(CPUState
*cpu
, int mask
)
449 cpu
->interrupt_request
|= mask
;
451 if (!qemu_cpu_is_self(cpu
)) {
456 CPUInterruptHandler cpu_interrupt_handler
= generic_handle_interrupt
;
458 static void cpu_class_init(ObjectClass
*klass
, void *data
)
460 DeviceClass
*dc
= DEVICE_CLASS(klass
);
461 CPUClass
*k
= CPU_CLASS(klass
);
463 k
->class_by_name
= cpu_common_class_by_name
;
464 k
->parse_features
= cpu_common_parse_features
;
465 k
->reset
= cpu_common_reset
;
466 k
->get_arch_id
= cpu_common_get_arch_id
;
467 k
->has_work
= cpu_common_has_work
;
468 k
->get_paging_enabled
= cpu_common_get_paging_enabled
;
469 k
->get_memory_mapping
= cpu_common_get_memory_mapping
;
470 k
->write_elf32_qemunote
= cpu_common_write_elf32_qemunote
;
471 k
->write_elf32_note
= cpu_common_write_elf32_note
;
472 k
->write_elf64_qemunote
= cpu_common_write_elf64_qemunote
;
473 k
->write_elf64_note
= cpu_common_write_elf64_note
;
474 k
->gdb_read_register
= cpu_common_gdb_read_register
;
475 k
->gdb_write_register
= cpu_common_gdb_write_register
;
476 k
->virtio_is_big_endian
= cpu_common_virtio_is_big_endian
;
477 k
->debug_excp_handler
= cpu_common_noop
;
478 k
->debug_check_watchpoint
= cpu_common_debug_check_watchpoint
;
479 k
->cpu_exec_enter
= cpu_common_noop
;
480 k
->cpu_exec_exit
= cpu_common_noop
;
481 k
->cpu_exec_interrupt
= cpu_common_exec_interrupt
;
482 k
->adjust_watchpoint_address
= cpu_adjust_watchpoint_address
;
483 set_bit(DEVICE_CATEGORY_CPU
, dc
->categories
);
484 dc
->realize
= cpu_common_realizefn
;
485 dc
->unrealize
= cpu_common_unrealizefn
;
486 dc
->props
= cpu_common_props
;
488 * Reason: CPUs still need special care by board code: wiring up
489 * IRQs, adding reset handlers, halting non-first CPUs, ...
491 dc
->user_creatable
= false;
494 static const TypeInfo cpu_type_info
= {
496 .parent
= TYPE_DEVICE
,
497 .instance_size
= sizeof(CPUState
),
498 .instance_init
= cpu_common_initfn
,
499 .instance_finalize
= cpu_common_finalize
,
501 .class_size
= sizeof(CPUClass
),
502 .class_init
= cpu_class_init
,
505 static void cpu_register_types(void)
507 type_register_static(&cpu_type_info
);
510 type_init(cpu_register_types
)