* fixes for Alpine and SuSE
* fix crash when hot-plugging nvdimm on older machine types
# gpg: Signature made Tue 09 Apr 2019 17:34:27 BST
# gpg: using RSA key
BFFBD25F78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* remotes/bonzini/tags/for-upstream:
tests: Make check-block a phony target
hw/i386/pc: Fix crash when hot-plugging nvdimm on older machine types
include/qemu/bswap.h: Use __builtin_memcpy() in accessor functions
roms: Allow passing configure options to the EDK2 build tools
roms: Rename the EFIROM variable to avoid clashing with iPXE
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
return NUMA_NODE_UNASSIGNED;
}
+static bool pcibus_allows_extended_config_space(PCIBus *bus)
+{
+ return false;
+}
+
static void pci_bus_class_init(ObjectClass *klass, void *data)
{
BusClass *k = BUS_CLASS(klass);
pbc->is_root = pcibus_is_root;
pbc->bus_num = pcibus_num;
pbc->numa_node = pcibus_numa_node;
+ pbc->allows_extended_config_space = pcibus_allows_extended_config_space;
}
static const TypeInfo pci_bus_info = {
.parent = TYPE_INTERFACE,
};
+static bool pciebus_allows_extended_config_space(PCIBus *bus)
+{
+ return true;
+}
+
+static void pcie_bus_class_init(ObjectClass *klass, void *data)
+{
+ PCIBusClass *pbc = PCI_BUS_CLASS(klass);
+
+ pbc->allows_extended_config_space = pciebus_allows_extended_config_space;
+}
+
static const TypeInfo pcie_bus_info = {
.name = TYPE_PCIE_BUS,
.parent = TYPE_PCI_BUS,
+ .class_init = pcie_bus_class_init,
};
static PCIBus *pci_find_bus_nr(PCIBus *bus, int bus_num);
return PCI_BUS_GET_CLASS(bus)->is_root(bus);
}
+bool pci_bus_allows_extended_config_space(PCIBus *bus)
+{
+ return PCI_BUS_GET_CLASS(bus)->allows_extended_config_space(bus);
+}
+
void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
const char *name,
MemoryRegion *address_space_mem,
static void pci_adjust_config_limit(PCIBus *bus, uint32_t *limit)
{
if (*limit > PCI_CONFIG_SPACE_SIZE) {
- if (!pci_bus_is_express(bus)) {
+ if (!pci_bus_allows_extended_config_space(bus)) {
*limit = PCI_CONFIG_SPACE_SIZE;
return;
}
memory_region_del_subregion(get_system_memory(), &sphb->mem32window);
}
+static bool spapr_phb_allows_extended_config_space(PCIBus *bus)
+{
+ SpaprPhbState *sphb = SPAPR_PCI_HOST_BRIDGE(BUS(bus)->parent);
+
+ return sphb->pcie_ecs;
+}
+
+static void spapr_phb_root_bus_class_init(ObjectClass *klass, void *data)
+{
+ PCIBusClass *pbc = PCI_BUS_CLASS(klass);
+
+ pbc->allows_extended_config_space = spapr_phb_allows_extended_config_space;
+}
+
+#define TYPE_SPAPR_PHB_ROOT_BUS "spapr-pci-host-bridge-root-bus"
+
+static const TypeInfo spapr_phb_root_bus_info = {
+ .name = TYPE_SPAPR_PHB_ROOT_BUS,
+ .parent = TYPE_PCI_BUS,
+ .class_init = spapr_phb_root_bus_class_init,
+};
+
static void spapr_phb_realize(DeviceState *dev, Error **errp)
{
/* We don't use SPAPR_MACHINE() in order to exit gracefully if the user
memory_region_add_subregion(get_system_memory(), sphb->io_win_addr,
&sphb->iowindow);
- bus = pci_register_root_bus(dev, NULL,
+ bus = pci_register_root_bus(dev, "pci.0",
pci_spapr_set_irq, pci_spapr_map_irq, sphb,
&sphb->memspace, &sphb->iospace,
- PCI_DEVFN(0, 0), PCI_NUM_PINS, TYPE_PCI_BUS);
+ PCI_DEVFN(0, 0), PCI_NUM_PINS,
+ TYPE_SPAPR_PHB_ROOT_BUS);
phb->bus = bus;
qbus_set_hotplug_handler(BUS(phb->bus), OBJECT(sphb), NULL);
static void spapr_pci_register_types(void)
{
type_register_static(&spapr_phb_info);
+ type_register_static(&spapr_phb_root_bus_info);
}
type_init(spapr_pci_register_types)
bool pci_bus_is_express(PCIBus *bus);
bool pci_bus_is_root(PCIBus *bus);
+bool pci_bus_allows_extended_config_space(PCIBus *bus);
+
void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
const char *name,
MemoryRegion *address_space_mem,
bool (*is_root)(PCIBus *bus);
int (*bus_num)(PCIBus *bus);
uint16_t (*numa_node)(PCIBus *bus);
+ bool (*allows_extended_config_space)(PCIBus *bus);
} PCIBusClass;
struct PCIBus {
static void gen_inc(DisasContext *s1, TCGMemOp ot, int d, int c)
{
if (s1->prefix & PREFIX_LOCK) {
+ if (d != OR_TMP0) {
+ /* Lock prefix when destination is not memory */
+ gen_illegal_opcode(s1);
+ return;
+ }
tcg_gen_movi_tl(s1->T0, c > 0 ? 1 : -1);
tcg_gen_atomic_add_fetch_tl(s1->T0, s1->A0, s1->T0,
s1->mem_index, ot | MO_LE);