*/
#define TYPE_CRYPTODEV_BACKEND_BUILTIN "cryptodev-backend-builtin"
-typedef struct CryptoDevBackendBuiltin
- CryptoDevBackendBuiltin;
-DECLARE_INSTANCE_CHECKER(CryptoDevBackendBuiltin, CRYPTODEV_BACKEND_BUILTIN,
- TYPE_CRYPTODEV_BACKEND_BUILTIN)
+OBJECT_DECLARE_SIMPLE_TYPE(CryptoDevBackendBuiltin, CRYPTODEV_BACKEND_BUILTIN)
typedef struct CryptoDevBackendBuiltinSession {
*/
#define TYPE_CRYPTODEV_BACKEND_VHOST_USER "cryptodev-vhost-user"
-typedef struct CryptoDevBackendVhostUser CryptoDevBackendVhostUser;
-DECLARE_INSTANCE_CHECKER(CryptoDevBackendVhostUser, CRYPTODEV_BACKEND_VHOST_USER,
- TYPE_CRYPTODEV_BACKEND_VHOST_USER)
+OBJECT_DECLARE_SIMPLE_TYPE(CryptoDevBackendVhostUser, CRYPTODEV_BACKEND_VHOST_USER)
struct CryptoDevBackendVhostUser {
#include "qom/object_interfaces.h"
#include "qom/object.h"
-typedef struct HostMemoryBackendFile HostMemoryBackendFile;
-DECLARE_INSTANCE_CHECKER(HostMemoryBackendFile, MEMORY_BACKEND_FILE,
- TYPE_MEMORY_BACKEND_FILE)
+OBJECT_DECLARE_SIMPLE_TYPE(HostMemoryBackendFile, MEMORY_BACKEND_FILE)
struct HostMemoryBackendFile {
#define TYPE_MEMORY_BACKEND_MEMFD "memory-backend-memfd"
-typedef struct HostMemoryBackendMemfd HostMemoryBackendMemfd;
-DECLARE_INSTANCE_CHECKER(HostMemoryBackendMemfd, MEMORY_BACKEND_MEMFD,
- TYPE_MEMORY_BACKEND_MEMFD)
+OBJECT_DECLARE_SIMPLE_TYPE(HostMemoryBackendMemfd, MEMORY_BACKEND_MEMFD)
struct HostMemoryBackendMemfd {
#include "qemu/guest-random.h"
#include "qom/object.h"
-typedef struct RngBuiltin RngBuiltin;
-DECLARE_INSTANCE_CHECKER(RngBuiltin, RNG_BUILTIN,
- TYPE_RNG_BUILTIN)
+OBJECT_DECLARE_SIMPLE_TYPE(RngBuiltin, RNG_BUILTIN)
struct RngBuiltin {
RngBackend parent;
#include "qom/object.h"
#define TYPE_RNG_EGD "rng-egd"
-typedef struct RngEgd RngEgd;
-DECLARE_INSTANCE_CHECKER(RngEgd, RNG_EGD,
- TYPE_RNG_EGD)
+OBJECT_DECLARE_SIMPLE_TYPE(RngEgd, RNG_EGD)
struct RngEgd {
RngBackend parent;
#include "qom/object.h"
#define TYPE_TPM_EMULATOR "tpm-emulator"
-typedef struct TPMEmulator TPMEmulator;
-DECLARE_INSTANCE_CHECKER(TPMEmulator, TPM_EMULATOR,
- TYPE_TPM_EMULATOR)
+OBJECT_DECLARE_SIMPLE_TYPE(TPMEmulator, TPM_EMULATOR)
#define TPM_EMULATOR_IMPLEMENTS_ALL_CAPS(S, cap) (((S)->caps & (cap)) == (cap))
#include "qom/object.h"
#define TYPE_TPM_PASSTHROUGH "tpm-passthrough"
-typedef struct TPMPassthruState TPMPassthruState;
-DECLARE_INSTANCE_CHECKER(TPMPassthruState, TPM_PASSTHROUGH,
- TYPE_TPM_PASSTHROUGH)
+OBJECT_DECLARE_SIMPLE_TYPE(TPMPassthruState, TPM_PASSTHROUGH)
/* data structures */
struct TPMPassthruState {
VirtQueueElement *elems[MAX_REQ];
V9fsState state;
};
-typedef struct V9fsVirtioState V9fsVirtioState;
#define TYPE_VIRTIO_9P "virtio-9p-device"
-DECLARE_INSTANCE_CHECKER(V9fsVirtioState, VIRTIO_9P,
- TYPE_VIRTIO_9P)
+OBJECT_DECLARE_SIMPLE_TYPE(V9fsVirtioState, VIRTIO_9P)
#endif
MemHotplugState acpi_memory_hotplug;
};
-typedef struct PIIX4PMState PIIX4PMState;
-DECLARE_INSTANCE_CHECKER(PIIX4PMState, PIIX4_PM,
- TYPE_PIIX4_PM)
+OBJECT_DECLARE_SIMPLE_TYPE(PIIX4PMState, PIIX4_PM)
static void piix4_acpi_system_hot_add_init(MemoryRegion *parent,
PCIBus *bus, PIIX4PMState *s);
TyphoonWindow win[4];
} TyphoonPchip;
-typedef struct TyphoonState TyphoonState;
-DECLARE_INSTANCE_CHECKER(TyphoonState, TYPHOON_PCI_HOST_BRIDGE,
- TYPE_TYPHOON_PCI_HOST_BRIDGE)
+OBJECT_DECLARE_SIMPLE_TYPE(TyphoonState, TYPHOON_PCI_HOST_BRIDGE)
struct TyphoonState {
PCIHostState parent_obj;
StrongARMState *sa1110;
};
-typedef struct CollieMachineState CollieMachineState;
#define TYPE_COLLIE_MACHINE MACHINE_TYPE_NAME("collie")
-DECLARE_INSTANCE_CHECKER(CollieMachineState, COLLIE_MACHINE,
- TYPE_COLLIE_MACHINE)
+OBJECT_DECLARE_SIMPLE_TYPE(CollieMachineState, COLLIE_MACHINE)
static struct arm_boot_info collie_binfo = {
.loader_start = SA_SDCS0,
};
#define TYPE_HIGHBANK_REGISTERS "highbank-regs"
-typedef struct HighbankRegsState HighbankRegsState;
-DECLARE_INSTANCE_CHECKER(HighbankRegsState, HIGHBANK_REGISTERS,
- TYPE_HIGHBANK_REGISTERS)
+OBJECT_DECLARE_SIMPLE_TYPE(HighbankRegsState, HIGHBANK_REGISTERS)
struct HighbankRegsState {
/*< private >*/
#include "qom/object.h"
#define TYPE_INTEGRATOR_CM "integrator_core"
-typedef struct IntegratorCMState IntegratorCMState;
-DECLARE_INSTANCE_CHECKER(IntegratorCMState, INTEGRATOR_CM,
- TYPE_INTEGRATOR_CM)
+OBJECT_DECLARE_SIMPLE_TYPE(IntegratorCMState, INTEGRATOR_CM)
struct IntegratorCMState {
/*< private >*/
/* Primary interrupt controller. */
#define TYPE_INTEGRATOR_PIC "integrator_pic"
-typedef struct icp_pic_state icp_pic_state;
-DECLARE_INSTANCE_CHECKER(icp_pic_state, INTEGRATOR_PIC,
- TYPE_INTEGRATOR_PIC)
+OBJECT_DECLARE_SIMPLE_TYPE(icp_pic_state, INTEGRATOR_PIC)
struct icp_pic_state {
/*< private >*/
/* CP control registers. */
#define TYPE_ICP_CONTROL_REGS "icp-ctrl-regs"
-typedef struct ICPCtrlRegsState ICPCtrlRegsState;
-DECLARE_INSTANCE_CHECKER(ICPCtrlRegsState, ICP_CONTROL_REGS,
- TYPE_ICP_CONTROL_REGS)
+OBJECT_DECLARE_SIMPLE_TYPE(ICPCtrlRegsState, ICP_CONTROL_REGS)
struct ICPCtrlRegsState {
/*< private >*/
NRF51State nrf51;
MicrobitI2CState i2c;
};
-typedef struct MicrobitMachineState MicrobitMachineState;
#define TYPE_MICROBIT_MACHINE MACHINE_TYPE_NAME("microbit")
-DECLARE_INSTANCE_CHECKER(MicrobitMachineState, MICROBIT_MACHINE,
- TYPE_MICROBIT_MACHINE)
+OBJECT_DECLARE_SIMPLE_TYPE(MicrobitMachineState, MICROBIT_MACHINE)
static void microbit_init(MachineState *machine)
{
} mv88w8618_rx_desc;
#define TYPE_MV88W8618_ETH "mv88w8618_eth"
-typedef struct mv88w8618_eth_state mv88w8618_eth_state;
-DECLARE_INSTANCE_CHECKER(mv88w8618_eth_state, MV88W8618_ETH,
- TYPE_MV88W8618_ETH)
+OBJECT_DECLARE_SIMPLE_TYPE(mv88w8618_eth_state, MV88W8618_ETH)
struct mv88w8618_eth_state {
/*< private >*/
#define MP_LCD_TEXTCOLOR 0xe0e0ff /* RRGGBB */
#define TYPE_MUSICPAL_LCD "musicpal_lcd"
-typedef struct musicpal_lcd_state musicpal_lcd_state;
-DECLARE_INSTANCE_CHECKER(musicpal_lcd_state, MUSICPAL_LCD,
- TYPE_MUSICPAL_LCD)
+OBJECT_DECLARE_SIMPLE_TYPE(musicpal_lcd_state, MUSICPAL_LCD)
struct musicpal_lcd_state {
/*< private >*/
#define MP_PIC_ENABLE_CLR 0x0C
#define TYPE_MV88W8618_PIC "mv88w8618_pic"
-typedef struct mv88w8618_pic_state mv88w8618_pic_state;
-DECLARE_INSTANCE_CHECKER(mv88w8618_pic_state, MV88W8618_PIC,
- TYPE_MV88W8618_PIC)
+OBJECT_DECLARE_SIMPLE_TYPE(mv88w8618_pic_state, MV88W8618_PIC)
struct mv88w8618_pic_state {
/*< private >*/
} mv88w8618_timer_state;
#define TYPE_MV88W8618_PIT "mv88w8618_pit"
-typedef struct mv88w8618_pit_state mv88w8618_pit_state;
-DECLARE_INSTANCE_CHECKER(mv88w8618_pit_state, MV88W8618_PIT,
- TYPE_MV88W8618_PIT)
+OBJECT_DECLARE_SIMPLE_TYPE(mv88w8618_pit_state, MV88W8618_PIT)
struct mv88w8618_pit_state {
/*< private >*/
#define MP_FLASHCFG_CFGR0 0x04
#define TYPE_MV88W8618_FLASHCFG "mv88w8618_flashcfg"
-typedef struct mv88w8618_flashcfg_state mv88w8618_flashcfg_state;
-DECLARE_INSTANCE_CHECKER(mv88w8618_flashcfg_state, MV88W8618_FLASHCFG,
- TYPE_MV88W8618_FLASHCFG)
+OBJECT_DECLARE_SIMPLE_TYPE(mv88w8618_flashcfg_state, MV88W8618_FLASHCFG)
struct mv88w8618_flashcfg_state {
/*< private >*/
SysBusDevice parent_obj;
MemoryRegion iomem;
};
-typedef struct MusicPalMiscState MusicPalMiscState;
#define TYPE_MUSICPAL_MISC "musicpal-misc"
-DECLARE_INSTANCE_CHECKER(MusicPalMiscState, MUSICPAL_MISC,
- TYPE_MUSICPAL_MISC)
+OBJECT_DECLARE_SIMPLE_TYPE(MusicPalMiscState, MUSICPAL_MISC)
static uint64_t musicpal_misc_read(void *opaque, hwaddr offset,
unsigned size)
#define MP_OE_LCD_BRIGHTNESS 0x0007
#define TYPE_MUSICPAL_GPIO "musicpal_gpio"
-typedef struct musicpal_gpio_state musicpal_gpio_state;
-DECLARE_INSTANCE_CHECKER(musicpal_gpio_state, MUSICPAL_GPIO,
- TYPE_MUSICPAL_GPIO)
+OBJECT_DECLARE_SIMPLE_TYPE(musicpal_gpio_state, MUSICPAL_GPIO)
struct musicpal_gpio_state {
/*< private >*/
#define MP_KEY_BTN_NAVIGATION (1 << 7)
#define TYPE_MUSICPAL_KEY "musicpal_key"
-typedef struct musicpal_key_state musicpal_key_state;
-DECLARE_INSTANCE_CHECKER(musicpal_key_state, MUSICPAL_KEY,
- TYPE_MUSICPAL_KEY)
+OBJECT_DECLARE_SIMPLE_TYPE(musicpal_key_state, MUSICPAL_KEY)
struct musicpal_key_state {
/*< private >*/
*/
#define TYPE_PALM_MISC_GPIO "palm-misc-gpio"
-typedef struct PalmMiscGPIOState PalmMiscGPIOState;
-DECLARE_INSTANCE_CHECKER(PalmMiscGPIOState, PALM_MISC_GPIO,
- TYPE_PALM_MISC_GPIO)
+OBJECT_DECLARE_SIMPLE_TYPE(PalmMiscGPIOState, PALM_MISC_GPIO)
struct PalmMiscGPIOState {
SysBusDevice parent_obj;
};
#define TYPE_PXA2XX_SSP "pxa2xx-ssp"
-typedef struct PXA2xxSSPState PXA2xxSSPState;
-DECLARE_INSTANCE_CHECKER(PXA2xxSSPState, PXA2XX_SSP,
- TYPE_PXA2XX_SSP)
+OBJECT_DECLARE_SIMPLE_TYPE(PXA2xxSSPState, PXA2XX_SSP)
/* Synchronous Serial Ports */
struct PXA2xxSSPState {
#define PIAR 0x38 /* RTC Periodic Interrupt Alarm register */
#define TYPE_PXA2XX_RTC "pxa2xx_rtc"
-typedef struct PXA2xxRTCState PXA2xxRTCState;
-DECLARE_INSTANCE_CHECKER(PXA2xxRTCState, PXA2XX_RTC,
- TYPE_PXA2XX_RTC)
+OBJECT_DECLARE_SIMPLE_TYPE(PXA2xxRTCState, PXA2XX_RTC)
struct PXA2xxRTCState {
/*< private >*/
/* I2C Interface */
#define TYPE_PXA2XX_I2C_SLAVE "pxa2xx-i2c-slave"
-typedef struct PXA2xxI2CSlaveState PXA2xxI2CSlaveState;
-DECLARE_INSTANCE_CHECKER(PXA2xxI2CSlaveState, PXA2XX_I2C_SLAVE,
- TYPE_PXA2XX_I2C_SLAVE)
+OBJECT_DECLARE_SIMPLE_TYPE(PXA2xxI2CSlaveState, PXA2XX_I2C_SLAVE)
struct PXA2xxI2CSlaveState {
I2CSlave parent_obj;
#define PXA2XX_GPIO_BANKS 4
#define TYPE_PXA2XX_GPIO "pxa2xx-gpio"
-typedef struct PXA2xxGPIOInfo PXA2xxGPIOInfo;
-DECLARE_INSTANCE_CHECKER(PXA2xxGPIOInfo, PXA2XX_GPIO,
- TYPE_PXA2XX_GPIO)
+OBJECT_DECLARE_SIMPLE_TYPE(PXA2xxGPIOInfo, PXA2XX_GPIO)
struct PXA2xxGPIOInfo {
/*< private >*/
#define PXA2XX_PIC_SRCS 40
#define TYPE_PXA2XX_PIC "pxa2xx_pic"
-typedef struct PXA2xxPICState PXA2xxPICState;
-DECLARE_INSTANCE_CHECKER(PXA2xxPICState, PXA2XX_PIC,
- TYPE_PXA2XX_PIC)
+OBJECT_DECLARE_SIMPLE_TYPE(PXA2xxPICState, PXA2XX_PIC)
struct PXA2xxPICState {
/*< private >*/
DeviceState *gic;
PFlashCFI01 *flash[2];
};
-typedef struct SBSAMachineState SBSAMachineState;
#define TYPE_SBSA_MACHINE MACHINE_TYPE_NAME("sbsa-ref")
-DECLARE_INSTANCE_CHECKER(SBSAMachineState, SBSA_MACHINE,
- TYPE_SBSA_MACHINE)
+OBJECT_DECLARE_SIMPLE_TYPE(SBSAMachineState, SBSA_MACHINE)
static const MemMapEntry sbsa_ref_memmap[] = {
/* 512M boot ROM */
#define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1)
#define TYPE_SL_NAND "sl-nand"
-typedef struct SLNANDState SLNANDState;
-DECLARE_INSTANCE_CHECKER(SLNANDState, SL_NAND,
- TYPE_SL_NAND)
+OBJECT_DECLARE_SIMPLE_TYPE(SLNANDState, SL_NAND)
struct SLNANDState {
SysBusDevice parent_obj;
};
#define TYPE_SPITZ_KEYBOARD "spitz-keyboard"
-typedef struct SpitzKeyboardState SpitzKeyboardState;
-DECLARE_INSTANCE_CHECKER(SpitzKeyboardState, SPITZ_KEYBOARD,
- TYPE_SPITZ_KEYBOARD)
+OBJECT_DECLARE_SIMPLE_TYPE(SpitzKeyboardState, SPITZ_KEYBOARD)
struct SpitzKeyboardState {
SysBusDevice parent_obj;
#define LCDTG_POLCTRL 0x07
#define TYPE_SPITZ_LCDTG "spitz-lcdtg"
-typedef struct SpitzLCDTG SpitzLCDTG;
-DECLARE_INSTANCE_CHECKER(SpitzLCDTG, SPITZ_LCDTG,
- TYPE_SPITZ_LCDTG)
+OBJECT_DECLARE_SIMPLE_TYPE(SpitzLCDTG, SPITZ_LCDTG)
struct SpitzLCDTG {
SSISlave ssidev;
#define SPITZ_GPIO_TP_INT 11
#define TYPE_CORGI_SSP "corgi-ssp"
-typedef struct CorgiSSPState CorgiSSPState;
-DECLARE_INSTANCE_CHECKER(CorgiSSPState, CORGI_SSP,
- TYPE_CORGI_SSP)
+OBJECT_DECLARE_SIMPLE_TYPE(CorgiSSPState, CORGI_SSP)
/* "Demux" the signal based on current chipselect */
struct CorgiSSPState {
* + named GPIO output "adc-temp": the ADC value, to be wired up to the max111x
*/
#define TYPE_SPITZ_MISC_GPIO "spitz-misc-gpio"
-typedef struct SpitzMiscGPIOState SpitzMiscGPIOState;
-DECLARE_INSTANCE_CHECKER(SpitzMiscGPIOState, SPITZ_MISC_GPIO,
- TYPE_SPITZ_MISC_GPIO)
+OBJECT_DECLARE_SIMPLE_TYPE(SpitzMiscGPIOState, SPITZ_MISC_GPIO)
struct SpitzMiscGPIOState {
SysBusDevice parent_obj;
/* General purpose timer module. */
#define TYPE_STELLARIS_GPTM "stellaris-gptm"
-typedef struct gptm_state gptm_state;
-DECLARE_INSTANCE_CHECKER(gptm_state, STELLARIS_GPTM,
- TYPE_STELLARIS_GPTM)
+OBJECT_DECLARE_SIMPLE_TYPE(gptm_state, STELLARIS_GPTM)
struct gptm_state {
SysBusDevice parent_obj;
/* I2C controller. */
#define TYPE_STELLARIS_I2C "stellaris-i2c"
-typedef struct stellaris_i2c_state stellaris_i2c_state;
-DECLARE_INSTANCE_CHECKER(stellaris_i2c_state, STELLARIS_I2C,
- TYPE_STELLARIS_I2C)
+OBJECT_DECLARE_SIMPLE_TYPE(stellaris_i2c_state, STELLARIS_I2C)
struct stellaris_i2c_state {
SysBusDevice parent_obj;
/* Interrupt Controller */
#define TYPE_STRONGARM_PIC "strongarm_pic"
-typedef struct StrongARMPICState StrongARMPICState;
-DECLARE_INSTANCE_CHECKER(StrongARMPICState, STRONGARM_PIC,
- TYPE_STRONGARM_PIC)
+OBJECT_DECLARE_SIMPLE_TYPE(StrongARMPICState, STRONGARM_PIC)
struct StrongARMPICState {
SysBusDevice parent_obj;
* f = 32 768 / (RTTR_trim + 1) */
#define TYPE_STRONGARM_RTC "strongarm-rtc"
-typedef struct StrongARMRTCState StrongARMRTCState;
-DECLARE_INSTANCE_CHECKER(StrongARMRTCState, STRONGARM_RTC,
- TYPE_STRONGARM_RTC)
+OBJECT_DECLARE_SIMPLE_TYPE(StrongARMRTCState, STRONGARM_RTC)
struct StrongARMRTCState {
SysBusDevice parent_obj;
#define GAFR 0x1c
#define TYPE_STRONGARM_GPIO "strongarm-gpio"
-typedef struct StrongARMGPIOInfo StrongARMGPIOInfo;
-DECLARE_INSTANCE_CHECKER(StrongARMGPIOInfo, STRONGARM_GPIO,
- TYPE_STRONGARM_GPIO)
+OBJECT_DECLARE_SIMPLE_TYPE(StrongARMGPIOInfo, STRONGARM_GPIO)
struct StrongARMGPIOInfo {
SysBusDevice busdev;
#define PPFR 0x10
#define TYPE_STRONGARM_PPC "strongarm-ppc"
-typedef struct StrongARMPPCInfo StrongARMPPCInfo;
-DECLARE_INSTANCE_CHECKER(StrongARMPPCInfo, STRONGARM_PPC,
- TYPE_STRONGARM_PPC)
+OBJECT_DECLARE_SIMPLE_TYPE(StrongARMPPCInfo, STRONGARM_PPC)
struct StrongARMPPCInfo {
SysBusDevice parent_obj;
#define RX_FIFO_ROR (1 << 10)
#define TYPE_STRONGARM_UART "strongarm-uart"
-typedef struct StrongARMUARTState StrongARMUARTState;
-DECLARE_INSTANCE_CHECKER(StrongARMUARTState, STRONGARM_UART,
- TYPE_STRONGARM_UART)
+OBJECT_DECLARE_SIMPLE_TYPE(StrongARMUARTState, STRONGARM_UART)
struct StrongARMUARTState {
SysBusDevice parent_obj;
/* Synchronous Serial Ports */
#define TYPE_STRONGARM_SSP "strongarm-ssp"
-typedef struct StrongARMSSPState StrongARMSSPState;
-DECLARE_INSTANCE_CHECKER(StrongARMSSPState, STRONGARM_SSP,
- TYPE_STRONGARM_SSP)
+OBJECT_DECLARE_SIMPLE_TYPE(StrongARMSSPState, STRONGARM_SSP)
struct StrongARMSSPState {
SysBusDevice parent_obj;
*/
#define TYPE_TOSA_MISC_GPIO "tosa-misc-gpio"
-typedef struct TosaMiscGPIOState TosaMiscGPIOState;
-DECLARE_INSTANCE_CHECKER(TosaMiscGPIOState, TOSA_MISC_GPIO,
- TYPE_TOSA_MISC_GPIO)
+OBJECT_DECLARE_SIMPLE_TYPE(TosaMiscGPIOState, TOSA_MISC_GPIO)
struct TosaMiscGPIOState {
SysBusDevice parent_obj;
}
#define TYPE_TOSA_DAC "tosa_dac"
-typedef struct TosaDACState TosaDACState;
-DECLARE_INSTANCE_CHECKER(TosaDACState, TOSA_DAC,
- TYPE_TOSA_DAC)
+OBJECT_DECLARE_SIMPLE_TYPE(TosaDACState, TOSA_DAC)
struct TosaDACState {
I2CSlave parent_obj;
/* Primary interrupt controller. */
#define TYPE_VERSATILE_PB_SIC "versatilepb_sic"
-typedef struct vpb_sic_state vpb_sic_state;
-DECLARE_INSTANCE_CHECKER(vpb_sic_state, VERSATILE_PB_SIC,
- TYPE_VERSATILE_PB_SIC)
+OBJECT_DECLARE_SIMPLE_TYPE(vpb_sic_state, VERSATILE_PB_SIC)
struct vpb_sic_state {
SysBusDevice parent_obj;
#include "qom/object.h"
#define TYPE_ZYNQ_MACHINE MACHINE_TYPE_NAME("xilinx-zynq-a9")
-typedef struct ZynqMachineState ZynqMachineState;
-DECLARE_INSTANCE_CHECKER(ZynqMachineState, ZYNQ_MACHINE,
- TYPE_ZYNQ_MACHINE)
+OBJECT_DECLARE_SIMPLE_TYPE(ZynqMachineState, ZYNQ_MACHINE)
/* board base frequency: 33.333333 MHz */
#define PS_CLK_FREQUENCY (100 * 1000 * 1000 / 3)
#include "qom/object.h"
#define TYPE_XLNX_VERSAL_VIRT_MACHINE MACHINE_TYPE_NAME("xlnx-versal-virt")
-typedef struct VersalVirt VersalVirt;
-DECLARE_INSTANCE_CHECKER(VersalVirt, XLNX_VERSAL_VIRT_MACHINE,
- TYPE_XLNX_VERSAL_VIRT_MACHINE)
+OBJECT_DECLARE_SIMPLE_TYPE(VersalVirt, XLNX_VERSAL_VIRT_MACHINE)
struct VersalVirt {
MachineState parent_obj;
struct arm_boot_info binfo;
};
-typedef struct XlnxZCU102 XlnxZCU102;
#define TYPE_ZCU102_MACHINE MACHINE_TYPE_NAME("xlnx-zcu102")
-DECLARE_INSTANCE_CHECKER(XlnxZCU102, ZCU102_MACHINE,
- TYPE_ZCU102_MACHINE)
+OBJECT_DECLARE_SIMPLE_TYPE(XlnxZCU102, ZCU102_MACHINE)
static bool zcu102_get_secure(Object *obj, Error **errp)
uint32_t cur_reg;
int pos;
};
-typedef struct ZipitLCD ZipitLCD;
#define TYPE_ZIPIT_LCD "zipit-lcd"
-DECLARE_INSTANCE_CHECKER(ZipitLCD, ZIPIT_LCD,
- TYPE_ZIPIT_LCD)
+OBJECT_DECLARE_SIMPLE_TYPE(ZipitLCD, ZIPIT_LCD)
static uint32_t zipit_lcd_transfer(SSISlave *dev, uint32_t value)
{
};
#define TYPE_AER915 "aer915"
-typedef struct AER915State AER915State;
-DECLARE_INSTANCE_CHECKER(AER915State, AER915,
- TYPE_AER915)
+OBJECT_DECLARE_SIMPLE_TYPE(AER915State, AER915)
struct AER915State {
I2CSlave parent_obj;
#define MUTE_SHIFT 15
#define TYPE_AC97 "AC97"
-typedef struct AC97LinkState AC97LinkState;
-DECLARE_INSTANCE_CHECKER(AC97LinkState, AC97,
- TYPE_AC97)
+OBJECT_DECLARE_SIMPLE_TYPE(AC97LinkState, AC97)
#define REC_MASK 7
enum {
#define SHIFT 1
#define TYPE_ADLIB "adlib"
-typedef struct AdlibState AdlibState;
-DECLARE_INSTANCE_CHECKER(AdlibState, ADLIB,
- TYPE_ADLIB)
+OBJECT_DECLARE_SIMPLE_TYPE(AdlibState, ADLIB)
struct AdlibState {
ISADevice parent_obj;
};
#define TYPE_ES1370 "ES1370"
-DECLARE_INSTANCE_CHECKER(ES1370State, ES1370,
- TYPE_ES1370)
+OBJECT_DECLARE_SIMPLE_TYPE(ES1370State, ES1370)
static void es1370_dac1_calc_freq (ES1370State *s, uint32_t ctl,
uint32_t *old_freq, uint32_t *new_freq);
#endif
#define TYPE_GUS "gus"
-typedef struct GUSState GUSState;
-DECLARE_INSTANCE_CHECKER(GUSState, GUS,
- TYPE_GUS)
+OBJECT_DECLARE_SIMPLE_TYPE(GUSState, GUS)
struct GUSState {
ISADevice dev;
};
#define TYPE_HDA_AUDIO "hda-audio"
-DECLARE_INSTANCE_CHECKER(HDAAudioState, HDA_AUDIO,
- TYPE_HDA_AUDIO)
+OBJECT_DECLARE_SIMPLE_TYPE(HDAAudioState, HDA_AUDIO)
struct HDAAudioState {
HDACodecDevice hda;
HDA_CODEC_DEVICE)
#define TYPE_HDA_BUS "HDA"
-typedef struct HDACodecBus HDACodecBus;
-DECLARE_INSTANCE_CHECKER(HDACodecBus, HDA_BUS,
- TYPE_HDA_BUS)
+OBJECT_DECLARE_SIMPLE_TYPE(HDACodecBus, HDA_BUS)
typedef void (*hda_codec_response_func)(HDACodecDevice *dev,
#define MP_AUDIO_CLOCK_24MHZ (1 << 9)
#define MP_AUDIO_MONO (1 << 14)
-typedef struct mv88w8618_audio_state mv88w8618_audio_state;
-DECLARE_INSTANCE_CHECKER(mv88w8618_audio_state, MV88W8618_AUDIO,
- TYPE_MV88W8618_AUDIO)
+OBJECT_DECLARE_SIMPLE_TYPE(mv88w8618_audio_state, MV88W8618_AUDIO)
struct mv88w8618_audio_state {
SysBusDevice parent_obj;
};
#define TYPE_MILKYMIST_AC97 "milkymist-ac97"
-typedef struct MilkymistAC97State MilkymistAC97State;
-DECLARE_INSTANCE_CHECKER(MilkymistAC97State, MILKYMIST_AC97,
- TYPE_MILKYMIST_AC97)
+OBJECT_DECLARE_SIMPLE_TYPE(MilkymistAC97State, MILKYMIST_AC97)
struct MilkymistAC97State {
SysBusDevice parent_obj;
#define PCSPK_MAX_FREQ (PCSPK_SAMPLE_RATE >> 1)
#define PCSPK_MIN_COUNT DIV_ROUND_UP(PIT_FREQ, PCSPK_MAX_FREQ)
-typedef struct PCSpkState PCSpkState;
-DECLARE_INSTANCE_CHECKER(PCSpkState, PC_SPEAKER,
- TYPE_PC_SPEAKER)
+OBJECT_DECLARE_SIMPLE_TYPE(PCSpkState, PC_SPEAKER)
struct PCSpkState {
ISADevice parent_obj;
} pl041_channel;
#define TYPE_PL041 "pl041"
-typedef struct PL041State PL041State;
-DECLARE_INSTANCE_CHECKER(PL041State, PL041,
- TYPE_PL041)
+OBJECT_DECLARE_SIMPLE_TYPE(PL041State, PL041)
struct PL041State {
SysBusDevice parent_obj;
static const char e3[] = "COPYRIGHT (C) CREATIVE TECHNOLOGY LTD, 1992.";
#define TYPE_SB16 "sb16"
-typedef struct SB16State SB16State;
-DECLARE_INSTANCE_CHECKER(SB16State, SB16,
- TYPE_SB16)
+OBJECT_DECLARE_SIMPLE_TYPE(SB16State, SB16)
struct SB16State {
ISADevice parent_obj;
int dac_hz;
} WMRate;
-typedef struct WM8750State WM8750State;
-DECLARE_INSTANCE_CHECKER(WM8750State, WM8750,
- TYPE_WM8750)
+OBJECT_DECLARE_SIMPLE_TYPE(WM8750State, WM8750)
struct WM8750State {
I2CSlave parent_obj;
/* qdev floppy bus */
#define TYPE_FLOPPY_BUS "floppy-bus"
-typedef struct FloppyBus FloppyBus;
-DECLARE_INSTANCE_CHECKER(FloppyBus, FLOPPY_BUS,
- TYPE_FLOPPY_BUS)
+OBJECT_DECLARE_SIMPLE_TYPE(FloppyBus, FLOPPY_BUS)
typedef struct FDCtrl FDCtrl;
typedef struct FDrive FDrive;
#define TYPE_FLOPPY_DRIVE "floppy"
-typedef struct FloppyDrive FloppyDrive;
-DECLARE_INSTANCE_CHECKER(FloppyDrive, FLOPPY_DRIVE,
- TYPE_FLOPPY_DRIVE)
+OBJECT_DECLARE_SIMPLE_TYPE(FloppyDrive, FLOPPY_DRIVE)
struct FloppyDrive {
DeviceState qdev;
}
#define TYPE_SYSBUS_FDC "base-sysbus-fdc"
-typedef struct FDCtrlSysBus FDCtrlSysBus;
-DECLARE_INSTANCE_CHECKER(FDCtrlSysBus, SYSBUS_FDC,
- TYPE_SYSBUS_FDC)
+OBJECT_DECLARE_SIMPLE_TYPE(FDCtrlSysBus, SYSBUS_FDC)
struct FDCtrlSysBus {
/*< private >*/
struct FDCtrl state;
};
-typedef struct FDCtrlISABus FDCtrlISABus;
-DECLARE_INSTANCE_CHECKER(FDCtrlISABus, ISA_FDC,
- TYPE_ISA_FDC)
+OBJECT_DECLARE_SIMPLE_TYPE(FDCtrlISABus, ISA_FDC)
struct FDCtrlISABus {
ISADevice parent_obj;
#define TYPE_NAND "nand"
-DECLARE_INSTANCE_CHECKER(NANDFlashState, NAND,
- TYPE_NAND)
+OBJECT_DECLARE_SIMPLE_TYPE(NANDFlashState, NAND)
static void mem_and(uint8_t *dest, const uint8_t *src, size_t n)
{
#define BLOCK_SHIFT (PAGE_SHIFT + 6)
#define TYPE_ONE_NAND "onenand"
-typedef struct OneNANDState OneNANDState;
-DECLARE_INSTANCE_CHECKER(OneNANDState, ONE_NAND,
- TYPE_ONE_NAND)
+OBJECT_DECLARE_SIMPLE_TYPE(OneNANDState, ONE_NAND)
struct OneNANDState {
SysBusDevice parent_obj;
#include "qom/object.h"
#define TYPE_ISA_DEBUGCON_DEVICE "isa-debugcon"
-typedef struct ISADebugconState ISADebugconState;
-DECLARE_INSTANCE_CHECKER(ISADebugconState, ISA_DEBUGCON_DEVICE,
- TYPE_ISA_DEBUGCON_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(ISADebugconState, ISA_DEBUGCON_DEVICE)
//#define DEBUG_DEBUGCON
} Exynos4210UartFIFO;
#define TYPE_EXYNOS4210_UART "exynos4210.uart"
-typedef struct Exynos4210UartState Exynos4210UartState;
-DECLARE_INSTANCE_CHECKER(Exynos4210UartState, EXYNOS4210_UART,
- TYPE_EXYNOS4210_UART)
+OBJECT_DECLARE_SIMPLE_TYPE(Exynos4210UartState, EXYNOS4210_UART)
struct Exynos4210UartState {
SysBusDevice parent_obj;
#define FIFO_LENGTH 1024
-typedef struct UART UART;
-DECLARE_INSTANCE_CHECKER(UART, GRLIB_APB_UART,
- TYPE_GRLIB_APB_UART)
+OBJECT_DECLARE_SIMPLE_TYPE(UART, GRLIB_APB_UART)
struct UART {
SysBusDevice parent_obj;
#define TYPE_IPOCTAL "ipoctal232"
-DECLARE_INSTANCE_CHECKER(IPOctalState, IPOCTAL,
- TYPE_IPOCTAL)
+OBJECT_DECLARE_SIMPLE_TYPE(IPOctalState, IPOCTAL)
static const VMStateDescription vmstate_scc2698_channel = {
.name = "scc2698_channel",
JRX_FULL = (1<<8),
};
-typedef struct LM32JuartState LM32JuartState;
-DECLARE_INSTANCE_CHECKER(LM32JuartState, LM32_JUART,
- TYPE_LM32_JUART)
+OBJECT_DECLARE_SIMPLE_TYPE(LM32JuartState, LM32_JUART)
struct LM32JuartState {
SysBusDevice parent_obj;
};
#define TYPE_LM32_UART "lm32-uart"
-typedef struct LM32UartState LM32UartState;
-DECLARE_INSTANCE_CHECKER(LM32UartState, LM32_UART,
- TYPE_LM32_UART)
+OBJECT_DECLARE_SIMPLE_TYPE(LM32UartState, LM32_UART)
struct LM32UartState {
SysBusDevice parent_obj;
qemu_irq irq;
CharBackend chr;
};
-typedef struct mcf_uart_state mcf_uart_state;
#define TYPE_MCF_UART "mcf-uart"
-DECLARE_INSTANCE_CHECKER(mcf_uart_state, MCF_UART,
- TYPE_MCF_UART)
+OBJECT_DECLARE_SIMPLE_TYPE(mcf_uart_state, MCF_UART)
/* UART Status Register bits. */
#define MCF_UART_RxRDY 0x01
};
#define TYPE_MILKYMIST_UART "milkymist-uart"
-typedef struct MilkymistUartState MilkymistUartState;
-DECLARE_INSTANCE_CHECKER(MilkymistUartState, MILKYMIST_UART,
- TYPE_MILKYMIST_UART)
+OBJECT_DECLARE_SIMPLE_TYPE(MilkymistUartState, MILKYMIST_UART)
struct MilkymistUartState {
SysBusDevice parent_obj;
} ParallelState;
#define TYPE_ISA_PARALLEL "isa-parallel"
-typedef struct ISAParallelState ISAParallelState;
-DECLARE_INSTANCE_CHECKER(ISAParallelState, ISA_PARALLEL,
- TYPE_ISA_PARALLEL)
+OBJECT_DECLARE_SIMPLE_TYPE(ISAParallelState, ISA_PARALLEL)
struct ISAParallelState {
ISADevice parent_obj;
#include "migration/vmstate.h"
#include "qom/object.h"
-typedef struct ISASerialState ISASerialState;
-DECLARE_INSTANCE_CHECKER(ISASerialState, ISA_SERIAL,
- TYPE_ISA_SERIAL)
+OBJECT_DECLARE_SIMPLE_TYPE(ISASerialState, ISA_SERIAL)
struct ISASerialState {
ISADevice parent_obj;
SerialState state;
uint8_t prog_if;
};
-typedef struct PCISerialState PCISerialState;
#define TYPE_PCI_SERIAL "pci-serial"
-DECLARE_INSTANCE_CHECKER(PCISerialState, PCI_SERIAL,
- TYPE_PCI_SERIAL)
+OBJECT_DECLARE_SIMPLE_TYPE(PCISerialState, PCI_SERIAL)
static void serial_pci_realize(PCIDevice *dev, Error **errp)
{
uint32_t in, out;
uint8_t buf[VTERM_BUFSIZE];
};
-typedef struct SpaprVioVty SpaprVioVty;
#define TYPE_VIO_SPAPR_VTY_DEVICE "spapr-vty"
-DECLARE_INSTANCE_CHECKER(SpaprVioVty, VIO_SPAPR_VTY_DEVICE,
- TYPE_VIO_SPAPR_VTY_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(SpaprVioVty, VIO_SPAPR_VTY_DEVICE)
static int vty_can_receive(void *opaque)
{
#define CONTROL_IE 0x10
#define TYPE_XILINX_UARTLITE "xlnx.xps-uartlite"
-typedef struct XilinxUARTLite XilinxUARTLite;
-DECLARE_INSTANCE_CHECKER(XilinxUARTLite, XILINX_UARTLITE,
- TYPE_XILINX_UARTLITE)
+OBJECT_DECLARE_SIMPLE_TYPE(XilinxUARTLite, XILINX_UARTLITE)
struct XilinxUARTLite {
SysBusDevice parent_obj;
#include "qom/object.h"
#define TYPE_REALVIEW_MPCORE_RIRQ "realview_mpcore"
-typedef struct mpcore_rirq_state mpcore_rirq_state;
-DECLARE_INSTANCE_CHECKER(mpcore_rirq_state, REALVIEW_MPCORE_RIRQ,
- TYPE_REALVIEW_MPCORE_RIRQ)
+OBJECT_DECLARE_SIMPLE_TYPE(mpcore_rirq_state, REALVIEW_MPCORE_RIRQ)
/* Dummy PIC to route IRQ lines. The baseboard has 4 independent IRQ
controllers. The output of these, plus some of the raw input lines
int cycle;
int output;
};
-typedef struct ADS7846State ADS7846State;
#define TYPE_ADS7846 "ads7846"
-DECLARE_INSTANCE_CHECKER(ADS7846State, ADS7846,
- TYPE_ADS7846)
+OBJECT_DECLARE_SIMPLE_TYPE(ADS7846State, ADS7846)
/* Control-byte bitfields */
#define CB_PD0 (1 << 0)
#include "qom/object.h"
#define TYPE_ARTIST "artist"
-typedef struct ARTISTState ARTISTState;
-DECLARE_INSTANCE_CHECKER(ARTISTState, ARTIST,
- TYPE_ARTIST)
+OBJECT_DECLARE_SIMPLE_TYPE(ARTISTState, ARTIST)
#ifdef HOST_WORDS_BIGENDIAN
#define ROP8OFF(_i) (3 - (_i))
#define PCI_DEVICE_ID_ATI_RADEON_QY 0x5159
#define TYPE_ATI_VGA "ati-vga"
-typedef struct ATIVGAState ATIVGAState;
-DECLARE_INSTANCE_CHECKER(ATIVGAState, ATI_VGA,
- TYPE_ATI_VGA)
+OBJECT_DECLARE_SIMPLE_TYPE(ATIVGAState, ATI_VGA)
typedef struct ATIVGARegs {
uint32_t mm_index;
/* device state */
BochsDisplayMode mode;
};
-typedef struct BochsDisplayState BochsDisplayState;
#define TYPE_BOCHS_DISPLAY "bochs-display"
-DECLARE_INSTANCE_CHECKER(BochsDisplayState, BOCHS_DISPLAY,
- TYPE_BOCHS_DISPLAY)
+OBJECT_DECLARE_SIMPLE_TYPE(BochsDisplayState, BOCHS_DISPLAY)
static const VMStateDescription vmstate_bochs_display = {
.name = "bochs-display",
#define CG3_VRAM_OFFSET 0x800000
#define TYPE_CG3 "cgthree"
-typedef struct CG3State CG3State;
-DECLARE_INSTANCE_CHECKER(CG3State, CG3,
- TYPE_CG3)
+OBJECT_DECLARE_SIMPLE_TYPE(CG3State, CG3)
struct CG3State {
SysBusDevice parent_obj;
PCIDevice dev;
CirrusVGAState cirrus_vga;
};
-typedef struct PCICirrusVGAState PCICirrusVGAState;
#define TYPE_PCI_CIRRUS_VGA "cirrus-vga"
-DECLARE_INSTANCE_CHECKER(PCICirrusVGAState, PCI_CIRRUS_VGA,
- TYPE_PCI_CIRRUS_VGA)
+OBJECT_DECLARE_SIMPLE_TYPE(PCICirrusVGAState, PCI_CIRRUS_VGA)
static uint8_t rop_to_index[256];
#include "qom/object.h"
#define TYPE_ISA_CIRRUS_VGA "isa-cirrus-vga"
-typedef struct ISACirrusVGAState ISACirrusVGAState;
-DECLARE_INSTANCE_CHECKER(ISACirrusVGAState, ISA_CIRRUS_VGA,
- TYPE_ISA_CIRRUS_VGA)
+OBJECT_DECLARE_SIMPLE_TYPE(ISACirrusVGAState, ISA_CIRRUS_VGA)
struct ISACirrusVGAState {
ISADevice parent_obj;
};
#define TYPE_EXYNOS4210_FIMD "exynos4210.fimd"
-typedef struct Exynos4210fimdState Exynos4210fimdState;
-DECLARE_INSTANCE_CHECKER(Exynos4210fimdState, EXYNOS4210_FIMD,
- TYPE_EXYNOS4210_FIMD)
+OBJECT_DECLARE_SIMPLE_TYPE(Exynos4210fimdState, EXYNOS4210_FIMD)
struct Exynos4210fimdState {
SysBusDevice parent_obj;
}
#define TYPE_G364 "sysbus-g364"
-typedef struct G364SysBusState G364SysBusState;
-DECLARE_INSTANCE_CHECKER(G364SysBusState, G364,
- TYPE_G364)
+OBJECT_DECLARE_SIMPLE_TYPE(G364SysBusState, G364)
struct G364SysBusState {
SysBusDevice parent_obj;
} screen_state_t;
#define TYPE_JAZZ_LED "jazz-led"
-typedef struct LedState LedState;
-DECLARE_INSTANCE_CHECKER(LedState, JAZZ_LED,
- TYPE_JAZZ_LED)
+OBJECT_DECLARE_SIMPLE_TYPE(LedState, JAZZ_LED)
struct LedState {
SysBusDevice parent_obj;
} QEMU_PACKED;
#define TYPE_MILKYMIST_TMU2 "milkymist-tmu2"
-typedef struct MilkymistTMU2State MilkymistTMU2State;
-DECLARE_INSTANCE_CHECKER(MilkymistTMU2State, MILKYMIST_TMU2,
- TYPE_MILKYMIST_TMU2)
+OBJECT_DECLARE_SIMPLE_TYPE(MilkymistTMU2State, MILKYMIST_TMU2)
struct MilkymistTMU2State {
SysBusDevice parent_obj;
};
#define TYPE_MILKYMIST_VGAFB "milkymist-vgafb"
-typedef struct MilkymistVgafbState MilkymistVgafbState;
-DECLARE_INSTANCE_CHECKER(MilkymistVgafbState, MILKYMIST_VGAFB,
- TYPE_MILKYMIST_VGAFB)
+OBJECT_DECLARE_SIMPLE_TYPE(MilkymistVgafbState, MILKYMIST_VGAFB)
struct MilkymistVgafbState {
SysBusDevice parent_obj;
#include "hw/m68k/next-cube.h"
#include "qom/object.h"
-typedef struct NeXTFbState NeXTFbState;
-DECLARE_INSTANCE_CHECKER(NeXTFbState, NEXTFB,
- TYPE_NEXTFB)
+OBJECT_DECLARE_SIMPLE_TYPE(NeXTFbState, NEXTFB)
struct NeXTFbState {
SysBusDevice parent_obj;
};
#define TYPE_PL110 "pl110"
-typedef struct PL110State PL110State;
-DECLARE_INSTANCE_CHECKER(PL110State, PL110,
- TYPE_PL110)
+OBJECT_DECLARE_SIMPLE_TYPE(PL110State, PL110)
struct PL110State {
SysBusDevice parent_obj;
QXLRect dirty[QXL_NUM_DIRTY_RECTS];
QEMUBH *update_area_bh;
};
-typedef struct PCIQXLDevice PCIQXLDevice;
#define TYPE_PCI_QXL "pci-qxl"
-DECLARE_INSTANCE_CHECKER(PCIQXLDevice, PCI_QXL,
- TYPE_PCI_QXL)
+OBJECT_DECLARE_SIMPLE_TYPE(PCIQXLDevice, PCI_QXL)
#define PANIC_ON(x) if ((x)) { \
printf("%s: PANIC %s failed\n", __func__, #x); \
#define SII9022_INT_STATUS_PLUGGED 0x04;
#define TYPE_SII9022 "sii9022"
-typedef struct sii9022_state sii9022_state;
-DECLARE_INSTANCE_CHECKER(sii9022_state, SII9022,
- TYPE_SII9022)
+OBJECT_DECLARE_SIMPLE_TYPE(sii9022_state, SII9022)
struct sii9022_state {
I2CSlave parent_obj;
};
#define TYPE_SYSBUS_SM501 "sysbus-sm501"
-typedef struct SM501SysBusState SM501SysBusState;
-DECLARE_INSTANCE_CHECKER(SM501SysBusState, SYSBUS_SM501,
- TYPE_SYSBUS_SM501)
+OBJECT_DECLARE_SIMPLE_TYPE(SM501SysBusState, SYSBUS_SM501)
struct SM501SysBusState {
/*< private >*/
};
#define TYPE_PCI_SM501 "sm501"
-typedef struct SM501PCIState SM501PCIState;
-DECLARE_INSTANCE_CHECKER(SM501PCIState, PCI_SM501,
- TYPE_PCI_SM501)
+OBJECT_DECLARE_SIMPLE_TYPE(SM501PCIState, PCI_SM501)
struct SM501PCIState {
/*< private >*/
};
#define TYPE_SSD0303 "ssd0303"
-typedef struct ssd0303_state ssd0303_state;
-DECLARE_INSTANCE_CHECKER(ssd0303_state, SSD0303,
- TYPE_SSD0303)
+OBJECT_DECLARE_SIMPLE_TYPE(ssd0303_state, SSD0303)
struct ssd0303_state {
I2CSlave parent_obj;
uint32_t mode;
uint8_t framebuffer[128 * 80 / 2];
};
-typedef struct ssd0323_state ssd0323_state;
#define TYPE_SSD0323 "ssd0323"
-DECLARE_INSTANCE_CHECKER(ssd0323_state, SSD0323,
- TYPE_SSD0323)
+OBJECT_DECLARE_SIMPLE_TYPE(ssd0323_state, SSD0323)
static uint32_t ssd0323_transfer(SSISlave *dev, uint32_t data)
#define TCX_THC_CURSBITS 0x980
#define TYPE_TCX "SUNW,tcx"
-typedef struct TCXState TCXState;
-DECLARE_INSTANCE_CHECKER(TCXState, TCX,
- TYPE_TCX)
+OBJECT_DECLARE_SIMPLE_TYPE(TCXState, TCX)
struct TCXState {
SysBusDevice parent_obj;
#include "qom/object.h"
#define TYPE_ISA_VGA "isa-vga"
-typedef struct ISAVGAState ISAVGAState;
-DECLARE_INSTANCE_CHECKER(ISAVGAState, ISA_VGA,
- TYPE_ISA_VGA)
+OBJECT_DECLARE_SIMPLE_TYPE(ISAVGAState, ISA_VGA)
struct ISAVGAState {
ISADevice parent_obj;
MemoryRegion mrs[4];
uint8_t edid[256];
};
-typedef struct PCIVGAState PCIVGAState;
#define TYPE_PCI_VGA "pci-vga"
-DECLARE_INSTANCE_CHECKER(PCIVGAState, PCI_VGA,
- TYPE_PCI_VGA)
+OBJECT_DECLARE_SIMPLE_TYPE(PCIVGAState, PCI_VGA)
static const VMStateDescription vmstate_vga_pci = {
.name = "vga",
#include "qom/object.h"
#define TYPE_I82374 "i82374"
-typedef struct I82374State I82374State;
-DECLARE_INSTANCE_CHECKER(I82374State, I82374,
- TYPE_I82374)
+OBJECT_DECLARE_SIMPLE_TYPE(I82374State, I82374)
//#define DEBUG_I82374
};
#define TYPE_PL330 "pl330"
-DECLARE_INSTANCE_CHECKER(PL330State, PL330,
- TYPE_PL330)
+OBJECT_DECLARE_SIMPLE_TYPE(PL330State, PL330)
static const VMStateDescription vmstate_pl330 = {
.name = "pl330",
#define PUV3_DMA_CH(offset) ((offset) >> 8)
#define TYPE_PUV3_DMA "puv3_dma"
-typedef struct PUV3DMAState PUV3DMAState;
-DECLARE_INSTANCE_CHECKER(PUV3DMAState, PUV3_DMA,
- TYPE_PUV3_DMA)
+OBJECT_DECLARE_SIMPLE_TYPE(PUV3DMAState, PUV3_DMA)
struct PUV3DMAState {
SysBusDevice parent_obj;
} PXA2xxDMAChannel;
#define TYPE_PXA2XX_DMA "pxa2xx-dma"
-typedef struct PXA2xxDMAState PXA2xxDMAState;
-DECLARE_INSTANCE_CHECKER(PXA2xxDMAState, PXA2XX_DMA,
- TYPE_PXA2XX_DMA)
+OBJECT_DECLARE_SIMPLE_TYPE(PXA2xxDMAState, PXA2XX_DMA)
struct PXA2xxDMAState {
SysBusDevice parent_obj;
#define DMA_FLAG_ADDR_INTR 0x0400
#define TYPE_RC4030 "rc4030"
-typedef struct rc4030State rc4030State;
-DECLARE_INSTANCE_CHECKER(rc4030State, RC4030,
- TYPE_RC4030)
+OBJECT_DECLARE_SIMPLE_TYPE(rc4030State, RC4030)
#define TYPE_RC4030_IOMMU_MEMORY_REGION "rc4030-iommu-memory-region"
#define TYPE_XILINX_AXI_DMA_DATA_STREAM "xilinx-axi-dma-data-stream"
#define TYPE_XILINX_AXI_DMA_CONTROL_STREAM "xilinx-axi-dma-control-stream"
-typedef struct XilinxAXIDMA XilinxAXIDMA;
-DECLARE_INSTANCE_CHECKER(XilinxAXIDMA, XILINX_AXI_DMA,
- TYPE_XILINX_AXI_DMA)
+OBJECT_DECLARE_SIMPLE_TYPE(XilinxAXIDMA, XILINX_AXI_DMA)
typedef struct XilinxAXIDMAStreamSlave XilinxAXIDMAStreamSlave;
DECLARE_INSTANCE_CHECKER(XilinxAXIDMAStreamSlave, XILINX_AXI_DMA_DATA_STREAM,
#include "qom/object.h"
#define TYPE_GPIOKEY "gpio-key"
-typedef struct GPIOKEYState GPIOKEYState;
-DECLARE_INSTANCE_CHECKER(GPIOKEYState, GPIOKEY,
- TYPE_GPIOKEY)
+OBJECT_DECLARE_SIMPLE_TYPE(GPIOKEYState, GPIOKEY)
#define GPIO_KEY_LATENCY 100 /* 100ms */
struct GPIOKEYState {
#include "qom/object.h"
#define TYPE_MAX7310 "max7310"
-typedef struct MAX7310State MAX7310State;
-DECLARE_INSTANCE_CHECKER(MAX7310State, MAX7310,
- TYPE_MAX7310)
+OBJECT_DECLARE_SIMPLE_TYPE(MAX7310State, MAX7310)
struct MAX7310State {
I2CSlave parent_obj;
#include "qom/object.h"
#define TYPE_MPC8XXX_GPIO "mpc8xxx_gpio"
-typedef struct MPC8XXXGPIOState MPC8XXXGPIOState;
-DECLARE_INSTANCE_CHECKER(MPC8XXXGPIOState, MPC8XXX_GPIO,
- TYPE_MPC8XXX_GPIO)
+OBJECT_DECLARE_SIMPLE_TYPE(MPC8XXXGPIOState, MPC8XXX_GPIO)
struct MPC8XXXGPIOState {
SysBusDevice parent_obj;
{ 0x00, 0x00, 0x00, 0x00, 0x61, 0x00, 0x18, 0x01, 0x0d, 0xf0, 0x05, 0xb1 };
#define TYPE_PL061 "pl061"
-typedef struct PL061State PL061State;
-DECLARE_INSTANCE_CHECKER(PL061State, PL061,
- TYPE_PL061)
+OBJECT_DECLARE_SIMPLE_TYPE(PL061State, PL061)
#define N_GPIOS 8
#include "qemu/log.h"
#define TYPE_PUV3_GPIO "puv3_gpio"
-typedef struct PUV3GPIOState PUV3GPIOState;
-DECLARE_INSTANCE_CHECKER(PUV3GPIOState, PUV3_GPIO,
- TYPE_PUV3_GPIO)
+OBJECT_DECLARE_SIMPLE_TYPE(PUV3GPIOState, PUV3_GPIO)
struct PUV3GPIOState {
SysBusDevice parent_obj;
/* SCOOP devices */
#define TYPE_SCOOP "scoop"
-typedef struct ScoopInfo ScoopInfo;
-DECLARE_INSTANCE_CHECKER(ScoopInfo, SCOOP,
- TYPE_SCOOP)
+OBJECT_DECLARE_SIMPLE_TYPE(ScoopInfo, SCOOP)
struct ScoopInfo {
SysBusDevice parent_obj;
#define DINO_MEM_CHUNK_SIZE (8 * MiB)
-typedef struct DinoState DinoState;
-DECLARE_INSTANCE_CHECKER(DinoState, DINO_PCI_HOST_BRIDGE,
- TYPE_DINO_PCI_HOST_BRIDGE)
+OBJECT_DECLARE_SIMPLE_TYPE(DinoState, DINO_PCI_HOST_BRIDGE)
#define DINO800_REGS (1 + (DINO_TLTIM - DINO_GMASK) / 4)
static const uint32_t reg800_keep_bits[DINO800_REGS] = {
#define ICR_BUS_ERROR_BIT LASI_BIT(8) /* bit 8 in ICR */
#define ICR_TOC_BIT LASI_BIT(1) /* bit 1 in ICR */
-typedef struct LasiState LasiState;
-DECLARE_INSTANCE_CHECKER(LasiState, LASI_CHIP,
- TYPE_LASI_CHIP)
+OBJECT_DECLARE_SIMPLE_TYPE(LasiState, LASI_CHIP)
struct LasiState {
PCIHostState parent_obj;
struct hyperv_message_page *msg_page;
struct hyperv_event_flags_page *event_page;
};
-typedef struct SynICState SynICState;
#define TYPE_SYNIC "hyperv-synic"
-DECLARE_INSTANCE_CHECKER(SynICState, SYNIC,
- TYPE_SYNIC)
+OBJECT_DECLARE_SIMPLE_TYPE(SynICState, SYNIC)
static bool synic_enabled;
QLIST_HEAD(, TestMsgConn) msg_conns;
QLIST_HEAD(, TestEvtConn) evt_conns;
};
-typedef struct HypervTestDev HypervTestDev;
#define TYPE_HYPERV_TEST_DEV "hyperv-testdev"
-DECLARE_INSTANCE_CHECKER(HypervTestDev, HYPERV_TEST_DEV,
- TYPE_HYPERV_TEST_DEV)
+OBJECT_DECLARE_SIMPLE_TYPE(HypervTestDev, HYPERV_TEST_DEV)
enum {
HV_TEST_DEV_SINT_ROUTE_CREATE = 1,
/* GPIO interface. */
#define TYPE_GPIO_I2C "gpio_i2c"
-typedef struct GPIOI2CState GPIOI2CState;
-DECLARE_INSTANCE_CHECKER(GPIOI2CState, GPIO_I2C,
- TYPE_GPIO_I2C)
+OBJECT_DECLARE_SIMPLE_TYPE(GPIOI2CState, GPIO_I2C)
struct GPIOI2CState {
SysBusDevice parent_obj;
#endif
#define TYPE_EXYNOS4_I2C "exynos4210.i2c"
-typedef struct Exynos4210I2CState Exynos4210I2CState;
-DECLARE_INSTANCE_CHECKER(Exynos4210I2CState, EXYNOS4_I2C,
- TYPE_EXYNOS4_I2C)
+OBJECT_DECLARE_SIMPLE_TYPE(Exynos4210I2CState, EXYNOS4_I2C)
/* Exynos4210 I2C memory map */
#define EXYNOS4_I2C_MEM_SIZE 0x14
#endif
#define TYPE_MPC_I2C "mpc-i2c"
-typedef struct MPCI2CState MPCI2CState;
-DECLARE_INSTANCE_CHECKER(MPCI2CState, MPC_I2C,
- TYPE_MPC_I2C)
+OBJECT_DECLARE_SIMPLE_TYPE(MPCI2CState, MPC_I2C)
#define MPC_I2C_ADR 0x00
#define MPC_I2C_FDR 0x04
#define TYPE_SMBUS_EEPROM "smbus-eeprom"
-typedef struct SMBusEEPROMDevice SMBusEEPROMDevice;
-DECLARE_INSTANCE_CHECKER(SMBusEEPROMDevice, SMBUS_EEPROM,
- TYPE_SMBUS_EEPROM)
+OBJECT_DECLARE_SIMPLE_TYPE(SMBusEEPROMDevice, SMBUS_EEPROM)
#define SMBUS_EEPROM_SIZE 256
#include "hw/i386/ich9.h"
#include "qom/object.h"
-typedef struct ICH9SMBState ICH9SMBState;
-DECLARE_INSTANCE_CHECKER(ICH9SMBState, ICH9_SMB_DEVICE,
- TYPE_ICH9_SMB_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(ICH9SMBState, ICH9_SMB_DEVICE)
struct ICH9SMBState {
PCIDevice dev;
};
#define TYPE_AMD_IOMMU_DEVICE "amd-iommu"
-typedef struct AMDVIState AMDVIState;
-DECLARE_INSTANCE_CHECKER(AMDVIState, AMD_IOMMU_DEVICE,
- TYPE_AMD_IOMMU_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(AMDVIState, AMD_IOMMU_DEVICE)
#define TYPE_AMD_IOMMU_PCI "AMDVI-PCI"
#include "qom/object.h"
#define TYPE_KVM_CLOCK "kvmclock"
-typedef struct KVMClockState KVMClockState;
-DECLARE_INSTANCE_CHECKER(KVMClockState, KVM_CLOCK,
- TYPE_KVM_CLOCK)
+OBJECT_DECLARE_SIMPLE_TYPE(KVMClockState, KVM_CLOCK)
struct KVMClockState {
/*< private >*/
bool rom_mapped_writable;
VMChangeStateEntry *vmsentry;
};
-typedef struct VAPICROMState VAPICROMState;
#define TYPE_VAPIC "kvmvapic"
-DECLARE_INSTANCE_CHECKER(VAPICROMState, VAPIC,
- TYPE_VAPIC)
+OBJECT_DECLARE_SIMPLE_TYPE(VAPICROMState, VAPIC)
#define TPR_INSTR_ABS_MODRM 0x1
#define TPR_INSTR_MATCH_MODRM_REG 0x2
#include "trace.h"
#include "qom/object.h"
-typedef struct Port92State Port92State;
-DECLARE_INSTANCE_CHECKER(Port92State, PORT92,
- TYPE_PORT92)
+OBJECT_DECLARE_SIMPLE_TYPE(Port92State, PORT92)
struct Port92State {
ISADevice parent_obj;
#endif
#define TYPE_VMMOUSE "vmmouse"
-typedef struct VMMouseState VMMouseState;
-DECLARE_INSTANCE_CHECKER(VMMouseState, VMMOUSE,
- TYPE_VMMOUSE)
+OBJECT_DECLARE_SIMPLE_TYPE(VMMouseState, VMMOUSE)
struct VMMouseState {
ISADevice parent_obj;
#define VCPU_INFO_LEGACY_X2APIC_BIT 3
#define VCPU_INFO_RESERVED_BIT 31
-typedef struct VMPortState VMPortState;
-DECLARE_INSTANCE_CHECKER(VMPortState, VMPORT,
- TYPE_VMPORT)
+OBJECT_DECLARE_SIMPLE_TYPE(VMPortState, VMPORT)
struct VMPortState {
ISADevice parent_obj;
char log_buffer[4096];
int log_buffer_off;
};
-typedef struct PCIXenPlatformState PCIXenPlatformState;
#define TYPE_XEN_PLATFORM "xen-platform"
-DECLARE_INSTANCE_CHECKER(PCIXenPlatformState, XEN_PLATFORM,
- TYPE_XEN_PLATFORM)
+OBJECT_DECLARE_SIMPLE_TYPE(PCIXenPlatformState, XEN_PLATFORM)
#define XEN_PLATFORM_IOPORT 0x10
#define TYPE_XEN_PV_DEVICE "xen-pvdevice"
-typedef struct XenPVDevice XenPVDevice;
-DECLARE_INSTANCE_CHECKER(XenPVDevice, XEN_PV_DEVICE,
- TYPE_XEN_PV_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(XenPVDevice, XEN_PV_DEVICE)
struct XenPVDevice {
/*< private >*/
/* ISA IDE definitions */
#define TYPE_ISA_IDE "isa-ide"
-typedef struct ISAIDEState ISAIDEState;
-DECLARE_INSTANCE_CHECKER(ISAIDEState, ISA_IDE,
- TYPE_ISA_IDE)
+OBJECT_DECLARE_SIMPLE_TYPE(ISAIDEState, ISA_IDE)
struct ISAIDEState {
ISADevice parent_obj;
#include "qom/object.h"
#define TYPE_MICRODRIVE "microdrive"
-typedef struct MicroDriveState MicroDriveState;
-DECLARE_INSTANCE_CHECKER(MicroDriveState, MICRODRIVE,
- TYPE_MICRODRIVE)
+OBJECT_DECLARE_SIMPLE_TYPE(MicroDriveState, MICRODRIVE)
/***********************************************************/
/* CF-ATA Microdrive */
#include "qom/object.h"
#define TYPE_SII3112_PCI "sii3112"
-typedef struct SiI3112PCIState SiI3112PCIState;
-DECLARE_INSTANCE_CHECKER(SiI3112PCIState, SII3112_PCI,
- TYPE_SII3112_PCI)
+OBJECT_DECLARE_SIMPLE_TYPE(SiI3112PCIState, SII3112_PCI)
typedef struct SiI3112Regs {
uint32_t confstat;
#include "qom/object.h"
#define TYPE_LM8323 "lm8323"
-typedef struct LM823KbdState LM823KbdState;
-DECLARE_INSTANCE_CHECKER(LM823KbdState, LM8323,
- TYPE_LM8323)
+OBJECT_DECLARE_SIMPLE_TYPE(LM823KbdState, LM8323)
struct LM823KbdState {
I2CSlave parent_obj;
#define COMLOC_KEVT_BASE 0x1143
#define TYPE_MILKYMIST_SOFTUSB "milkymist-softusb"
-typedef struct MilkymistSoftUsbState MilkymistSoftUsbState;
-DECLARE_INSTANCE_CHECKER(MilkymistSoftUsbState, MILKYMIST_SOFTUSB,
- TYPE_MILKYMIST_SOFTUSB)
+OBJECT_DECLARE_SIMPLE_TYPE(MilkymistSoftUsbState, MILKYMIST_SOFTUSB)
struct MilkymistSoftUsbState {
SysBusDevice parent_obj;
#include "qom/object.h"
#define TYPE_PL050 "pl050"
-typedef struct PL050State PL050State;
-DECLARE_INSTANCE_CHECKER(PL050State, PL050,
- TYPE_PL050)
+OBJECT_DECLARE_SIMPLE_TYPE(PL050State, PL050)
struct PL050State {
SysBusDevice parent_obj;
#include "qom/object.h"
#define TYPE_ARM_GICV2M "arm-gicv2m"
-typedef struct ARMGICv2mState ARMGICv2mState;
-DECLARE_INSTANCE_CHECKER(ARMGICv2mState, ARM_GICV2M,
- TYPE_ARM_GICV2M)
+OBJECT_DECLARE_SIMPLE_TYPE(ARMGICv2mState, ARM_GICV2M)
#define GICV2M_NUM_SPI_MAX 128
} CombinerGroupState;
#define TYPE_EXYNOS4210_COMBINER "exynos4210.combiner"
-typedef struct Exynos4210CombinerState Exynos4210CombinerState;
-DECLARE_INSTANCE_CHECKER(Exynos4210CombinerState, EXYNOS4210_COMBINER,
- TYPE_EXYNOS4210_COMBINER)
+OBJECT_DECLARE_SIMPLE_TYPE(Exynos4210CombinerState, EXYNOS4210_COMBINER)
struct Exynos4210CombinerState {
SysBusDevice parent_obj;
/********* GIC part *********/
#define TYPE_EXYNOS4210_GIC "exynos4210.gic"
-typedef struct Exynos4210GicState Exynos4210GicState;
-DECLARE_INSTANCE_CHECKER(Exynos4210GicState, EXYNOS4210_GIC,
- TYPE_EXYNOS4210_GIC)
+OBJECT_DECLARE_SIMPLE_TYPE(Exynos4210GicState, EXYNOS4210_GIC)
struct Exynos4210GicState {
SysBusDevice parent_obj;
*/
#define TYPE_EXYNOS4210_IRQ_GATE "exynos4210.irq_gate"
-typedef struct Exynos4210IRQGateState Exynos4210IRQGateState;
-DECLARE_INSTANCE_CHECKER(Exynos4210IRQGateState, EXYNOS4210_IRQ_GATE,
- TYPE_EXYNOS4210_IRQ_GATE)
+OBJECT_DECLARE_SIMPLE_TYPE(Exynos4210IRQGateState, EXYNOS4210_IRQ_GATE)
struct Exynos4210IRQGateState {
SysBusDevice parent_obj;
#define FORCE_OFFSET 0x80
#define EXTENDED_OFFSET 0xC0
-typedef struct IRQMP IRQMP;
-DECLARE_INSTANCE_CHECKER(IRQMP, GRLIB_IRQMP,
- TYPE_GRLIB_IRQMP)
+OBJECT_DECLARE_SIMPLE_TYPE(IRQMP, GRLIB_IRQMP)
typedef struct IRQMPState IRQMPState;
#include "qom/object.h"
#define TYPE_LM32_PIC "lm32-pic"
-typedef struct LM32PicState LM32PicState;
-DECLARE_INSTANCE_CHECKER(LM32PicState, LM32_PIC,
- TYPE_LM32_PIC)
+OBJECT_DECLARE_SIMPLE_TYPE(LM32PicState, LM32_PIC)
struct LM32PicState {
SysBusDevice parent_obj;
#include "qom/object.h"
#define TYPE_ALTERA_IIC "altera,iic"
-typedef struct AlteraIIC AlteraIIC;
-DECLARE_INSTANCE_CHECKER(AlteraIIC, ALTERA_IIC,
- TYPE_ALTERA_IIC)
+OBJECT_DECLARE_SIMPLE_TYPE(AlteraIIC, ALTERA_IIC)
struct AlteraIIC {
SysBusDevice parent_obj;
#include "qom/object.h"
#define TYPE_OR1K_OMPIC "or1k-ompic"
-typedef struct OR1KOMPICState OR1KOMPICState;
-DECLARE_INSTANCE_CHECKER(OR1KOMPICState, OR1K_OMPIC,
- TYPE_OR1K_OMPIC)
+OBJECT_DECLARE_SIMPLE_TYPE(OR1KOMPICState, OR1K_OMPIC)
#define OMPIC_CTRL_IRQ_ACK (1 << 31)
#define OMPIC_CTRL_IRQ_GEN (1 << 30)
#define GCR_RESET 0x80000000
-typedef struct KVMOpenPICState KVMOpenPICState;
-DECLARE_INSTANCE_CHECKER(KVMOpenPICState, KVM_OPENPIC,
- TYPE_KVM_OPENPIC)
+OBJECT_DECLARE_SIMPLE_TYPE(KVMOpenPICState, KVM_OPENPIC)
struct KVMOpenPICState {
/*< private >*/
#define PL190_NUM_PRIO 17
#define TYPE_PL190 "pl190"
-typedef struct PL190State PL190State;
-DECLARE_INSTANCE_CHECKER(PL190State, PL190,
- TYPE_PL190)
+OBJECT_DECLARE_SIMPLE_TYPE(PL190State, PL190)
struct PL190State {
SysBusDevice parent_obj;
#include "qemu/log.h"
#define TYPE_PUV3_INTC "puv3_intc"
-typedef struct PUV3INTCState PUV3INTCState;
-DECLARE_INSTANCE_CHECKER(PUV3INTCState, PUV3_INTC,
- TYPE_PUV3_INTC)
+OBJECT_DECLARE_SIMPLE_TYPE(PUV3INTCState, PUV3_INTC)
struct PUV3INTCState {
SysBusDevice parent_obj;
} SLAVIO_CPUINTCTLState;
#define TYPE_SLAVIO_INTCTL "slavio_intctl"
-typedef struct SLAVIO_INTCTLState SLAVIO_INTCTLState;
-DECLARE_INSTANCE_CHECKER(SLAVIO_INTCTLState, SLAVIO_INTCTL,
- TYPE_SLAVIO_INTCTL)
+OBJECT_DECLARE_SIMPLE_TYPE(SLAVIO_INTCTLState, SLAVIO_INTCTL)
struct SLAVIO_INTCTLState {
SysBusDevice parent_obj;
uint16_t status;
uint8_t int_set;
};
-typedef struct TPCI200State TPCI200State;
#define TYPE_TPCI200 "tpci200"
-DECLARE_INSTANCE_CHECKER(TPCI200State, TPCI200,
- TYPE_TPCI200)
+OBJECT_DECLARE_SIMPLE_TYPE(TPCI200State, TPCI200)
static const uint8_t local_config_regs[] = {
0x00, 0xFF, 0xFF, 0x0F, 0x00, 0xFC, 0xFF, 0x0F, 0x00, 0x00, 0x00,
#define VM_CMD_GRACEFUL_SHUTDOWN 0x09
#define TYPE_IPMI_BMC_EXTERN "ipmi-bmc-extern"
-typedef struct IPMIBmcExtern IPMIBmcExtern;
-DECLARE_INSTANCE_CHECKER(IPMIBmcExtern, IPMI_BMC_EXTERN,
- TYPE_IPMI_BMC_EXTERN)
+OBJECT_DECLARE_SIMPLE_TYPE(IPMIBmcExtern, IPMI_BMC_EXTERN)
struct IPMIBmcExtern {
IPMIBmc parent;
#include "qom/object.h"
#define TYPE_ISA_IPMI_BT "isa-ipmi-bt"
-typedef struct ISAIPMIBTDevice ISAIPMIBTDevice;
-DECLARE_INSTANCE_CHECKER(ISAIPMIBTDevice, ISA_IPMI_BT,
- TYPE_ISA_IPMI_BT)
+OBJECT_DECLARE_SIMPLE_TYPE(ISAIPMIBTDevice, ISA_IPMI_BT)
struct ISAIPMIBTDevice {
ISADevice dev;
#include "qom/object.h"
#define TYPE_ISA_IPMI_KCS "isa-ipmi-kcs"
-typedef struct ISAIPMIKCSDevice ISAIPMIKCSDevice;
-DECLARE_INSTANCE_CHECKER(ISAIPMIKCSDevice, ISA_IPMI_KCS,
- TYPE_ISA_IPMI_KCS)
+OBJECT_DECLARE_SIMPLE_TYPE(ISAIPMIKCSDevice, ISA_IPMI_KCS)
struct ISAIPMIKCSDevice {
ISADevice dev;
#include "qom/object.h"
#define TYPE_PCI_IPMI_BT "pci-ipmi-bt"
-typedef struct PCIIPMIBTDevice PCIIPMIBTDevice;
-DECLARE_INSTANCE_CHECKER(PCIIPMIBTDevice, PCI_IPMI_BT,
- TYPE_PCI_IPMI_BT)
+OBJECT_DECLARE_SIMPLE_TYPE(PCIIPMIBTDevice, PCI_IPMI_BT)
struct PCIIPMIBTDevice {
PCIDevice dev;
#include "qom/object.h"
#define TYPE_PCI_IPMI_KCS "pci-ipmi-kcs"
-typedef struct PCIIPMIKCSDevice PCIIPMIKCSDevice;
-DECLARE_INSTANCE_CHECKER(PCIIPMIKCSDevice, PCI_IPMI_KCS,
- TYPE_PCI_IPMI_KCS)
+OBJECT_DECLARE_SIMPLE_TYPE(PCIIPMIKCSDevice, PCI_IPMI_KCS)
struct PCIIPMIKCSDevice {
PCIDevice dev;
#include "qom/object.h"
#define TYPE_SMBUS_IPMI "smbus-ipmi"
-typedef struct SMBusIPMIDevice SMBusIPMIDevice;
-DECLARE_INSTANCE_CHECKER(SMBusIPMIDevice, SMBUS_IPMI,
- TYPE_SMBUS_IPMI)
+OBJECT_DECLARE_SIMPLE_TYPE(SMBusIPMIDevice, SMBUS_IPMI)
#define SSIF_IPMI_REQUEST 2
#define SSIF_IPMI_MULTI_PART_REQUEST_START 6
#include "qom/object.h"
#define TYPE_I82378 "i82378"
-typedef struct I82378State I82378State;
-DECLARE_INSTANCE_CHECKER(I82378State, I82378,
- TYPE_I82378)
+OBJECT_DECLARE_SIMPLE_TYPE(I82378State, I82378)
struct I82378State {
PCIDevice parent_obj;
MemoryRegion rcr_mem;
uint8_t rcr;
};
-typedef struct PIIX4State PIIX4State;
-DECLARE_INSTANCE_CHECKER(PIIX4State, PIIX4_PCI_DEVICE,
- TYPE_PIIX4_PCI_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(PIIX4State, PIIX4_PCI_DEVICE)
static void piix4_isa_reset(DeviceState *dev)
{
MemoryRegion superio;
SuperIOConfig superio_conf;
};
-typedef struct VT82C686BState VT82C686BState;
#define TYPE_VT82C686B_DEVICE "VT82C686B"
-DECLARE_INSTANCE_CHECKER(VT82C686BState, VT82C686B_DEVICE,
- TYPE_VT82C686B_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(VT82C686BState, VT82C686B_DEVICE)
static void superio_ioport_writeb(void *opaque, hwaddr addr, uint64_t data,
unsigned size)
PMSMBus smb;
uint32_t smb_io_base;
};
-typedef struct VT686PMState VT686PMState;
struct VT686AC97State {
PCIDevice dev;
};
-typedef struct VT686AC97State VT686AC97State;
struct VT686MC97State {
PCIDevice dev;
};
-typedef struct VT686MC97State VT686MC97State;
#define TYPE_VT82C686B_PM_DEVICE "VT82C686B_PM"
-DECLARE_INSTANCE_CHECKER(VT686PMState, VT82C686B_PM_DEVICE,
- TYPE_VT82C686B_PM_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(VT686PMState, VT82C686B_PM_DEVICE)
#define TYPE_VT82C686B_MC97_DEVICE "VT82C686B_MC97"
-DECLARE_INSTANCE_CHECKER(VT686MC97State, VT82C686B_MC97_DEVICE,
- TYPE_VT82C686B_MC97_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(VT686MC97State, VT82C686B_MC97_DEVICE)
#define TYPE_VT82C686B_AC97_DEVICE "VT82C686B_AC97"
-DECLARE_INSTANCE_CHECKER(VT686AC97State, VT82C686B_AC97_DEVICE,
- TYPE_VT82C686B_AC97_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(VT686AC97State, VT82C686B_AC97_DEVICE)
static void pm_update_sci(VT686PMState *s)
{
#include "qom/object.h"
#define TYPE_MCF_INTC "mcf-intc"
-typedef struct mcf_intc_state mcf_intc_state;
-DECLARE_INSTANCE_CHECKER(mcf_intc_state, MCF_INTC,
- TYPE_MCF_INTC)
+OBJECT_DECLARE_SIMPLE_TYPE(mcf_intc_state, MCF_INTC)
struct mcf_intc_state {
SysBusDevice parent_obj;
#endif
#define TYPE_NEXT_MACHINE MACHINE_TYPE_NAME("next-cube")
-typedef struct NeXTState NeXTState;
-DECLARE_INSTANCE_CHECKER(NeXTState, NEXT_MACHINE,
- TYPE_NEXT_MACHINE)
+OBJECT_DECLARE_SIMPLE_TYPE(NeXTState, NEXT_MACHINE)
#define ENTRY 0x0100001e
#define RAM_SIZE 0x4000000
#include "migration/vmstate.h"
#include "qom/object.h"
-typedef struct NextKBDState NextKBDState;
-DECLARE_INSTANCE_CHECKER(NextKBDState, NEXTKBD,
- TYPE_NEXTKBD)
+OBJECT_DECLARE_SIMPLE_TYPE(NextKBDState, NEXTKBD)
/* following defintions from next68k netbsd */
#define CSR_INT 0x00800000
/* Define the PMU device */
#define TYPE_XLNX_ZYNQMP_PMU_SOC "xlnx,zynqmp-pmu-soc"
-typedef struct XlnxZynqMPPMUSoCState XlnxZynqMPPMUSoCState;
-DECLARE_INSTANCE_CHECKER(XlnxZynqMPPMUSoCState, XLNX_ZYNQMP_PMU_SOC,
- TYPE_XLNX_ZYNQMP_PMU_SOC)
+OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPPMUSoCState, XLNX_ZYNQMP_PMU_SOC)
#define XLNX_ZYNQMP_PMU_ROM_SIZE 0x8000
#define XLNX_ZYNQMP_PMU_ROM_ADDR 0xFFD00000
#define TYPE_GT64120_PCI_HOST_BRIDGE "gt64120"
-typedef struct GT64120State GT64120State;
-DECLARE_INSTANCE_CHECKER(GT64120State, GT64120_PCI_HOST_BRIDGE,
- TYPE_GT64120_PCI_HOST_BRIDGE)
+OBJECT_DECLARE_SIMPLE_TYPE(GT64120State, GT64120_PCI_HOST_BRIDGE)
struct GT64120State {
PCIHostState parent_obj;
} MaltaFPGAState;
#define TYPE_MIPS_MALTA "mips-malta"
-typedef struct MaltaState MaltaState;
-DECLARE_INSTANCE_CHECKER(MaltaState, MIPS_MALTA,
- TYPE_MIPS_MALTA)
+OBJECT_DECLARE_SIMPLE_TYPE(MaltaState, MIPS_MALTA)
struct MaltaState {
SysBusDevice parent_obj;
QLIST_ENTRY(AppleSMCData) node;
};
-typedef struct AppleSMCState AppleSMCState;
-DECLARE_INSTANCE_CHECKER(AppleSMCState, APPLE_SMC,
- TYPE_APPLE_SMC)
+OBJECT_DECLARE_SIMPLE_TYPE(AppleSMCState, APPLE_SMC)
struct AppleSMCState {
ISADevice parent_obj;
#include "qemu/module.h"
#include "qom/object.h"
-typedef struct IntegratorDebugState IntegratorDebugState;
-DECLARE_INSTANCE_CHECKER(IntegratorDebugState, INTEGRATOR_DEBUG,
- TYPE_INTEGRATOR_DEBUG)
+OBJECT_DECLARE_SIMPLE_TYPE(IntegratorDebugState, INTEGRATOR_DEBUG)
struct IntegratorDebugState {
SysBusDevice parent_obj;
#define CACHE_ID 0x410000c8
#define TYPE_ARM_L2X0 "l2x0"
-typedef struct L2x0State L2x0State;
-DECLARE_INSTANCE_CHECKER(L2x0State, ARM_L2X0,
- TYPE_ARM_L2X0)
+OBJECT_DECLARE_SIMPLE_TYPE(L2x0State, ARM_L2X0)
struct L2x0State {
SysBusDevice parent_obj;
#define LOCK_VALUE 0xa05f
#define TYPE_ARM_SYSCTL "realview_sysctl"
-typedef struct arm_sysctl_state arm_sysctl_state;
-DECLARE_INSTANCE_CHECKER(arm_sysctl_state, ARM_SYSCTL,
- TYPE_ARM_SYSCTL)
+OBJECT_DECLARE_SIMPLE_TYPE(arm_sysctl_state, ARM_SYSCTL)
struct arm_sysctl_state {
SysBusDevice parent_obj;
#include "qom/object.h"
#define TYPE_ISA_DEBUG_EXIT_DEVICE "isa-debug-exit"
-typedef struct ISADebugExitState ISADebugExitState;
-DECLARE_INSTANCE_CHECKER(ISADebugExitState, ISA_DEBUG_EXIT_DEVICE,
- TYPE_ISA_DEBUG_EXIT_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(ISADebugExitState, ISA_DEBUG_EXIT_DEVICE)
struct ISADebugExitState {
ISADevice parent_obj;
#define ECC_DIAG_MASK (ECC_DIAG_SIZE - 1)
#define TYPE_ECC_MEMCTL "eccmemctl"
-typedef struct ECCState ECCState;
-DECLARE_INSTANCE_CHECKER(ECCState, ECC_MEMCTL,
- TYPE_ECC_MEMCTL)
+OBJECT_DECLARE_SIMPLE_TYPE(ECCState, ECC_MEMCTL)
struct ECCState {
SysBusDevice parent_obj;
#include "qom/object.h"
#define TYPE_EMPTY_SLOT "empty_slot"
-typedef struct EmptySlot EmptySlot;
-DECLARE_INSTANCE_CHECKER(EmptySlot, EMPTY_SLOT,
- TYPE_EMPTY_SLOT)
+OBJECT_DECLARE_SIMPLE_TYPE(EmptySlot, EMPTY_SLOT)
struct EmptySlot {
SysBusDevice parent_obj;
#include "qom/object.h"
#define TYPE_EXYNOS4210_CLK "exynos4210.clk"
-typedef struct Exynos4210ClkState Exynos4210ClkState;
-DECLARE_INSTANCE_CHECKER(Exynos4210ClkState, EXYNOS4210_CLK,
- TYPE_EXYNOS4210_CLK)
+OBJECT_DECLARE_SIMPLE_TYPE(Exynos4210ClkState, EXYNOS4210_CLK)
#define CLK_PLL_LOCKED BIT(29)
#define PMU_NUM_OF_REGISTERS ARRAY_SIZE(exynos4210_pmu_regs)
#define TYPE_EXYNOS4210_PMU "exynos4210.pmu"
-typedef struct Exynos4210PmuState Exynos4210PmuState;
-DECLARE_INSTANCE_CHECKER(Exynos4210PmuState, EXYNOS4210_PMU,
- TYPE_EXYNOS4210_PMU)
+OBJECT_DECLARE_SIMPLE_TYPE(Exynos4210PmuState, EXYNOS4210_PMU)
struct Exynos4210PmuState {
SysBusDevice parent_obj;
} while (0)
#define TYPE_EXYNOS4210_RNG "exynos4210.rng"
-typedef struct Exynos4210RngState Exynos4210RngState;
-DECLARE_INSTANCE_CHECKER(Exynos4210RngState, EXYNOS4210_RNG,
- TYPE_EXYNOS4210_RNG)
+OBJECT_DECLARE_SIMPLE_TYPE(Exynos4210RngState, EXYNOS4210_RNG)
/*
* Exynos4220, PRNG, only polling mode is supported.
};
#define TYPE_MILKYMIST_HPDMC "milkymist-hpdmc"
-typedef struct MilkymistHpdmcState MilkymistHpdmcState;
-DECLARE_INSTANCE_CHECKER(MilkymistHpdmcState, MILKYMIST_HPDMC,
- TYPE_MILKYMIST_HPDMC)
+OBJECT_DECLARE_SIMPLE_TYPE(MilkymistHpdmcState, MILKYMIST_HPDMC)
struct MilkymistHpdmcState {
SysBusDevice parent_obj;
#endif
#define TYPE_MILKYMIST_PFPU "milkymist-pfpu"
-typedef struct MilkymistPFPUState MilkymistPFPUState;
-DECLARE_INSTANCE_CHECKER(MilkymistPFPUState, MILKYMIST_PFPU,
- TYPE_MILKYMIST_PFPU)
+OBJECT_DECLARE_SIMPLE_TYPE(MilkymistPFPUState, MILKYMIST_PFPU)
struct MilkymistPFPUState {
SysBusDevice parent_obj;
#define MST_PCMCIA_CD1_IRQ 13
#define TYPE_MAINSTONE_FPGA "mainstone-fpga"
-typedef struct mst_irq_state mst_irq_state;
-DECLARE_INSTANCE_CHECKER(mst_irq_state, MAINSTONE_FPGA,
- TYPE_MAINSTONE_FPGA)
+OBJECT_DECLARE_SIMPLE_TYPE(mst_irq_state, MAINSTONE_FPGA)
struct mst_irq_state {
SysBusDevice parent_obj;
uint32_t ioport_data;
char iomem_buf[IOMEM_LEN];
};
-typedef struct PCTestdev PCTestdev;
#define TYPE_TESTDEV "pc-testdev"
-DECLARE_INSTANCE_CHECKER(PCTestdev, TESTDEV,
- TYPE_TESTDEV)
+OBJECT_DECLARE_SIMPLE_TYPE(PCTestdev, TESTDEV)
static uint64_t test_irq_line_read(void *opaque, hwaddr addr, unsigned size)
{
uint64_t membar_size;
MemoryRegion membar;
};
-typedef struct PCITestDevState PCITestDevState;
#define TYPE_PCI_TEST_DEV "pci-testdev"
-DECLARE_INSTANCE_CHECKER(PCITestDevState, PCI_TEST_DEV,
- TYPE_PCI_TEST_DEV)
+OBJECT_DECLARE_SIMPLE_TYPE(PCITestDevState, PCI_TEST_DEV)
#define IOTEST_IS_MEM(i) (strcmp(IOTEST_TYPE(i), "portio"))
#define IOTEST_REGION(d, i) (IOTEST_IS_MEM(i) ? &(d)->mmio : &(d)->portio)
#include "qemu/log.h"
#define TYPE_PUV3_PM "puv3_pm"
-typedef struct PUV3PMState PUV3PMState;
-DECLARE_INSTANCE_CHECKER(PUV3PMState, PUV3_PM,
- TYPE_PUV3_PM)
+OBJECT_DECLARE_SIMPLE_TYPE(PUV3PMState, PUV3_PM)
struct PUV3PMState {
SysBusDevice parent_obj;
#define SGABIOS_FILENAME "sgabios.bin"
#define TYPE_SGA "sga"
-typedef struct ISASGAState ISASGAState;
-DECLARE_INSTANCE_CHECKER(ISASGAState, SGA,
- TYPE_SGA)
+OBJECT_DECLARE_SIMPLE_TYPE(ISASGAState, SGA)
struct ISASGAState {
ISADevice parent_obj;
*/
#define TYPE_SLAVIO_MISC "slavio_misc"
-typedef struct MiscState MiscState;
-DECLARE_INSTANCE_CHECKER(MiscState, SLAVIO_MISC,
- TYPE_SLAVIO_MISC)
+OBJECT_DECLARE_SIMPLE_TYPE(MiscState, SLAVIO_MISC)
struct MiscState {
SysBusDevice parent_obj;
#include "qom/object.h"
#define TYPE_TMP105 "tmp105"
-typedef struct TMP105State TMP105State;
-DECLARE_INSTANCE_CHECKER(TMP105State, TMP105,
- TYPE_TMP105)
+OBJECT_DECLARE_SIMPLE_TYPE(TMP105State, TMP105)
/**
* TMP105State:
#define ZYNQ_SLCR_NUM_REGS (ZYNQ_SLCR_MMIO_SIZE / 4)
#define TYPE_ZYNQ_SLCR "xilinx,zynq_slcr"
-typedef struct ZynqSLCRState ZynqSLCRState;
-DECLARE_INSTANCE_CHECKER(ZynqSLCRState, ZYNQ_SLCR,
- TYPE_ZYNQ_SLCR)
+OBJECT_DECLARE_SIMPLE_TYPE(ZynqSLCRState, ZYNQ_SLCR)
struct ZynqSLCRState {
SysBusDevice parent_obj;
#define SONIC_DESC_ADDR 0xFFFE
#define TYPE_DP8393X "dp8393x"
-typedef struct dp8393xState dp8393xState;
-DECLARE_INSTANCE_CHECKER(dp8393xState, DP8393X,
- TYPE_DP8393X)
+OBJECT_DECLARE_SIMPLE_TYPE(dp8393xState, DP8393X)
struct dp8393xState {
SysBusDevice parent_obj;
#include "qom/object.h"
#define TYPE_E1000E "e1000e"
-typedef struct E1000EState E1000EState;
-DECLARE_INSTANCE_CHECKER(E1000EState, E1000E,
- TYPE_E1000E)
+OBJECT_DECLARE_SIMPLE_TYPE(E1000EState, E1000E)
struct E1000EState {
PCIDevice parent_obj;
#define FS_ETH_MAX_REGS 0x17
#define TYPE_ETRAX_FS_ETH "etraxfs-eth"
-typedef struct ETRAXFSEthState ETRAXFSEthState;
-DECLARE_INSTANCE_CHECKER(ETRAXFSEthState, ETRAX_FS_ETH,
- TYPE_ETRAX_FS_ETH)
+OBJECT_DECLARE_SIMPLE_TYPE(ETRAXFSEthState, ETRAX_FS_ETH)
struct ETRAXFSEthState {
SysBusDevice parent_obj;
typedef struct eTSEC eTSEC;
#define TYPE_ETSEC_COMMON "eTSEC"
-DECLARE_INSTANCE_CHECKER(eTSEC, ETSEC_COMMON,
- TYPE_ETSEC_COMMON)
+OBJECT_DECLARE_SIMPLE_TYPE(eTSEC, ETSEC_COMMON)
#define eTSEC_TRANSMIT 1
#define eTSEC_RECEIVE 2
}
};
-typedef struct lan9118_state lan9118_state;
-DECLARE_INSTANCE_CHECKER(lan9118_state, LAN9118,
- TYPE_LAN9118)
+OBJECT_DECLARE_SIMPLE_TYPE(lan9118_state, LAN9118)
struct lan9118_state {
SysBusDevice parent_obj;
typedef struct MilkymistMinimac2MdioState MilkymistMinimac2MdioState;
#define TYPE_MILKYMIST_MINIMAC2 "milkymist-minimac2"
-typedef struct MilkymistMinimac2State MilkymistMinimac2State;
-DECLARE_INSTANCE_CHECKER(MilkymistMinimac2State, MILKYMIST_MINIMAC2,
- TYPE_MILKYMIST_MINIMAC2)
+OBJECT_DECLARE_SIMPLE_TYPE(MilkymistMinimac2State, MILKYMIST_MINIMAC2)
struct MilkymistMinimac2State {
SysBusDevice parent_obj;
#define MAX_ETH_FRAME_SIZE 1514
#define TYPE_MIPS_NET "mipsnet"
-typedef struct MIPSnetState MIPSnetState;
-DECLARE_INSTANCE_CHECKER(MIPSnetState, MIPS_NET,
- TYPE_MIPS_NET)
+OBJECT_DECLARE_SIMPLE_TYPE(MIPSnetState, MIPS_NET)
struct MIPSnetState {
SysBusDevice parent_obj;
#include "qemu/module.h"
#include "qom/object.h"
-typedef struct ISANE2000State ISANE2000State;
-DECLARE_INSTANCE_CHECKER(ISANE2000State, ISA_NE2000,
- TYPE_ISA_NE2000)
+OBJECT_DECLARE_SIMPLE_TYPE(ISANE2000State, ISA_NE2000)
struct ISANE2000State {
ISADevice parent_obj;
#define DEFAULT_PHY 1
#define TYPE_OPEN_ETH "open_eth"
-typedef struct OpenEthState OpenEthState;
-DECLARE_INSTANCE_CHECKER(OpenEthState, OPEN_ETH,
- TYPE_OPEN_ETH)
+OBJECT_DECLARE_SIMPLE_TYPE(OpenEthState, OPEN_ETH)
struct OpenEthState {
SysBusDevice parent_obj;
#define TYPE_PCI_PCNET "pcnet"
-typedef struct PCIPCNetState PCIPCNetState;
-DECLARE_INSTANCE_CHECKER(PCIPCNetState, PCI_PCNET,
- TYPE_PCI_PCNET)
+OBJECT_DECLARE_SIMPLE_TYPE(PCIPCNetState, PCI_PCNET)
struct PCIPCNetState {
/*< private >*/
#define TYPE_RTL8139 "rtl8139"
-typedef struct RTL8139State RTL8139State;
-DECLARE_INSTANCE_CHECKER(RTL8139State, RTL8139,
- TYPE_RTL8139)
+OBJECT_DECLARE_SIMPLE_TYPE(RTL8139State, RTL8139)
/* Symbolic offsets to registers. */
enum RTL8139_registers {
#define NUM_PACKETS 4
#define TYPE_SMC91C111 "smc91c111"
-typedef struct smc91c111_state smc91c111_state;
-DECLARE_INSTANCE_CHECKER(smc91c111_state, SMC91C111,
- TYPE_SMC91C111)
+OBJECT_DECLARE_SIMPLE_TYPE(smc91c111_state, SMC91C111)
struct smc91c111_state {
SysBusDevice parent_obj;
#define VLAN_MAX_BUFS (VLAN_RX_BDS_LEN / 8)
#define TYPE_VIO_SPAPR_VLAN_DEVICE "spapr-vlan"
-typedef struct SpaprVioVlan SpaprVioVlan;
-DECLARE_INSTANCE_CHECKER(SpaprVioVlan, VIO_SPAPR_VLAN_DEVICE,
- TYPE_VIO_SPAPR_VLAN_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(SpaprVioVlan, VIO_SPAPR_VLAN_DEVICE)
#define RX_POOL_MAX_BDS 4096
#define RX_MAX_POOLS 5
#define SE_TCTL_DUPLEX 0x08
#define TYPE_STELLARIS_ENET "stellaris_enet"
-typedef struct stellaris_enet_state stellaris_enet_state;
-DECLARE_INSTANCE_CHECKER(stellaris_enet_state, STELLARIS_ENET,
- TYPE_STELLARIS_ENET)
+OBJECT_DECLARE_SIMPLE_TYPE(stellaris_enet_state, STELLARIS_ENET)
typedef struct {
uint8_t data[2048];
#define TYPE_SUNGEM "sungem"
-typedef struct SunGEMState SunGEMState;
-DECLARE_INSTANCE_CHECKER(SunGEMState, SUNGEM,
- TYPE_SUNGEM)
+OBJECT_DECLARE_SIMPLE_TYPE(SunGEMState, SUNGEM)
#define MAX_PACKET_SIZE 9016
#define MII_COMMAND_WRITE 0x1
#define TYPE_SUNHME "sunhme"
-typedef struct SunHMEState SunHMEState;
-DECLARE_INSTANCE_CHECKER(SunHMEState, SUNHME,
- TYPE_SUNHME)
+OBJECT_DECLARE_SIMPLE_TYPE(SunHMEState, SUNHME)
/* Maximum size of buffer */
#define HME_FIFO_SIZE 0x800
#include "qom/object.h"
#define TYPE_TULIP "tulip"
-typedef struct TULIPState TULIPState;
-DECLARE_INSTANCE_CHECKER(TULIPState, TULIP,
- TYPE_TULIP)
+OBJECT_DECLARE_SIMPLE_TYPE(TULIPState, TULIP)
#define CSR(_x) ((_x) << 3)
} RxTxStats;
#define TYPE_XGMAC "xgmac"
-typedef struct XgmacState XgmacState;
-DECLARE_INSTANCE_CHECKER(XgmacState, XGMAC,
- TYPE_XGMAC)
+OBJECT_DECLARE_SIMPLE_TYPE(XgmacState, XGMAC)
struct XgmacState {
SysBusDevice parent_obj;
#define TYPE_XILINX_AXI_ENET_DATA_STREAM "xilinx-axienet-data-stream"
#define TYPE_XILINX_AXI_ENET_CONTROL_STREAM "xilinx-axienet-control-stream"
-typedef struct XilinxAXIEnet XilinxAXIEnet;
-DECLARE_INSTANCE_CHECKER(XilinxAXIEnet, XILINX_AXI_ENET,
- TYPE_XILINX_AXI_ENET)
+OBJECT_DECLARE_SIMPLE_TYPE(XilinxAXIEnet, XILINX_AXI_ENET)
typedef struct XilinxAXIEnetStreamSlave XilinxAXIEnetStreamSlave;
DECLARE_INSTANCE_CHECKER(XilinxAXIEnetStreamSlave, XILINX_AXI_ENET_DATA_STREAM,
};
#define TYPE_DS1225Y "ds1225y"
-typedef struct SysBusNvRamState SysBusNvRamState;
-DECLARE_INSTANCE_CHECKER(SysBusNvRamState, DS1225Y,
- TYPE_DS1225Y)
+OBJECT_DECLARE_SIMPLE_TYPE(SysBusNvRamState, DS1225Y)
struct SysBusNvRamState {
SysBusDevice parent_obj;
BlockBackend *blk;
VMChangeStateEntry *vmstate;
};
-typedef struct SpaprNvram SpaprNvram;
#define TYPE_VIO_SPAPR_NVRAM "spapr-nvram"
-DECLARE_INSTANCE_CHECKER(SpaprNvram, VIO_SPAPR_NVRAM,
- TYPE_VIO_SPAPR_NVRAM)
+OBJECT_DECLARE_SIMPLE_TYPE(SpaprNvram, VIO_SPAPR_NVRAM)
#define MIN_NVRAM_SIZE (8 * KiB)
#define DEFAULT_NVRAM_SIZE (64 * KiB)
#include "hw/pci/pci_bus.h"
#include "qom/object.h"
-typedef struct DECState DECState;
-DECLARE_INSTANCE_CHECKER(DECState, DEC_21154,
- TYPE_DEC_21154)
+OBJECT_DECLARE_SIMPLE_TYPE(DECState, DEC_21154)
struct DECState {
PCIHostState parent_obj;
#include "qom/object.h"
#define TYPE_GEN_PCIE_ROOT_PORT "pcie-root-port"
-typedef struct GenPCIERootPort GenPCIERootPort;
-DECLARE_INSTANCE_CHECKER(GenPCIERootPort, GEN_PCIE_ROOT_PORT,
- TYPE_GEN_PCIE_ROOT_PORT)
+OBJECT_DECLARE_SIMPLE_TYPE(GenPCIERootPort, GEN_PCIE_ROOT_PORT)
#define GEN_PCIE_ROOT_PORT_AER_OFFSET 0x100
#define GEN_PCIE_ROOT_PORT_ACS_OFFSET \
#define TYPE_PCI_BRIDGE_DEV "pci-bridge"
#define TYPE_PCI_BRIDGE_SEAT_DEV "pci-bridge-seat"
-typedef struct PCIBridgeDev PCIBridgeDev;
-DECLARE_INSTANCE_CHECKER(PCIBridgeDev, PCI_BRIDGE_DEV,
- TYPE_PCI_BRIDGE_DEV)
+OBJECT_DECLARE_SIMPLE_TYPE(PCIBridgeDev, PCI_BRIDGE_DEV)
struct PCIBridgeDev {
/*< private >*/
MemoryRegion shpc_bar;
/*< public >*/
};
-typedef struct PCIEPCIBridge PCIEPCIBridge;
#define TYPE_PCIE_PCI_BRIDGE_DEV "pcie-pci-bridge"
-DECLARE_INSTANCE_CHECKER(PCIEPCIBridge, PCIE_PCI_BRIDGE_DEV,
- TYPE_PCIE_PCI_BRIDGE_DEV)
+OBJECT_DECLARE_SIMPLE_TYPE(PCIEPCIBridge, PCIE_PCI_BRIDGE_DEV)
static void pcie_pci_bridge_realize(PCIDevice *d, Error **errp)
{
};
#define TYPE_BONITO_PCI_HOST_BRIDGE "Bonito-pcihost"
-DECLARE_INSTANCE_CHECKER(BonitoState, BONITO_PCI_HOST_BRIDGE,
- TYPE_BONITO_PCI_HOST_BRIDGE)
+OBJECT_DECLARE_SIMPLE_TYPE(BonitoState, BONITO_PCI_HOST_BRIDGE)
#define TYPE_PCI_BONITO "Bonito"
-DECLARE_INSTANCE_CHECKER(PCIBonitoState, PCI_BONITO,
- TYPE_PCI_BONITO)
+OBJECT_DECLARE_SIMPLE_TYPE(PCIBonitoState, PCI_BONITO)
static void bonito_writel(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
#include "trace.h"
#include "qom/object.h"
-typedef struct GrackleState GrackleState;
-DECLARE_INSTANCE_CHECKER(GrackleState, GRACKLE_PCI_HOST_BRIDGE,
- TYPE_GRACKLE_PCI_HOST_BRIDGE)
+OBJECT_DECLARE_SIMPLE_TYPE(GrackleState, GRACKLE_PCI_HOST_BRIDGE)
struct GrackleState {
PCIHostState parent_obj;
* https://wiki.qemu.org/File:29054901.pdf
*/
-typedef struct I440FXState I440FXState;
-DECLARE_INSTANCE_CHECKER(I440FXState, I440FX_PCI_HOST_BRIDGE,
- TYPE_I440FX_PCI_HOST_BRIDGE)
+OBJECT_DECLARE_SIMPLE_TYPE(I440FXState, I440FX_PCI_HOST_BRIDGE)
struct I440FXState {
PCIHostState parent_obj;
#define TYPE_PPC_E500_PCI_HOST_BRIDGE "e500-pcihost"
-typedef struct PPCE500PCIState PPCE500PCIState;
-DECLARE_INSTANCE_CHECKER(PPCE500PCIState, PPC_E500_PCI_HOST_BRIDGE,
- TYPE_PPC_E500_PCI_HOST_BRIDGE)
+OBJECT_DECLARE_SIMPLE_TYPE(PPCE500PCIState, PPC_E500_PCI_HOST_BRIDGE)
struct PPCE500PCIState {
PCIHostState parent_obj;
};
#define TYPE_PPC_E500_PCI_BRIDGE "e500-host-bridge"
-typedef struct PPCE500PCIBridgeState PPCE500PCIBridgeState;
-DECLARE_INSTANCE_CHECKER(PPCE500PCIBridgeState, PPC_E500_PCI_BRIDGE,
- TYPE_PPC_E500_PCI_BRIDGE)
+OBJECT_DECLARE_SIMPLE_TYPE(PPCE500PCIBridgeState, PPC_E500_PCI_BRIDGE)
struct PPCE500PCIBridgeState {
/*< private >*/
#define TYPE_RAVEN_PCI_DEVICE "raven"
#define TYPE_RAVEN_PCI_HOST_BRIDGE "raven-pcihost"
-typedef struct RavenPCIState RavenPCIState;
-DECLARE_INSTANCE_CHECKER(RavenPCIState, RAVEN_PCI_DEVICE,
- TYPE_RAVEN_PCI_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(RavenPCIState, RAVEN_PCI_DEVICE)
struct RavenPCIState {
PCIDevice dev;
MemoryRegion ccsr_space;
};
-typedef struct PPCE500CCSRState PPCE500CCSRState;
#define TYPE_CCSR "e500-ccsr"
-DECLARE_INSTANCE_CHECKER(PPCE500CCSRState, CCSR,
- TYPE_CCSR)
+OBJECT_DECLARE_SIMPLE_TYPE(PPCE500CCSRState, CCSR)
#endif /* E500_CCSR_H */
/* Mac NVRAM */
#define TYPE_MACIO_NVRAM "macio-nvram"
-typedef struct MacIONVRAMState MacIONVRAMState;
-DECLARE_INSTANCE_CHECKER(MacIONVRAMState, MACIO_NVRAM,
- TYPE_MACIO_NVRAM)
+OBJECT_DECLARE_SIMPLE_TYPE(MacIONVRAMState, MACIO_NVRAM)
struct MacIONVRAMState {
/*< private >*/
#define MPC8544_GUTS_ADDR_SRDS2CR3 0xF18
#define TYPE_MPC8544_GUTS "mpc8544-guts"
-typedef struct GutsState GutsState;
-DECLARE_INSTANCE_CHECKER(GutsState, MPC8544_GUTS,
- TYPE_MPC8544_GUTS)
+OBJECT_DECLARE_SIMPLE_TYPE(GutsState, MPC8544_GUTS)
struct GutsState {
/*< private >*/
};
#define TYPE_PPC440_PCIX_HOST_BRIDGE "ppc440-pcix-host"
-typedef struct PPC440PCIXState PPC440PCIXState;
-DECLARE_INSTANCE_CHECKER(PPC440PCIXState, PPC440_PCIX_HOST_BRIDGE,
- TYPE_PPC440_PCIX_HOST_BRIDGE)
+OBJECT_DECLARE_SIMPLE_TYPE(PPC440PCIXState, PPC440_PCIX_HOST_BRIDGE)
#define PPC440_PCIX_NR_POMS 3
#define PPC440_PCIX_NR_PIMS 3
#include "hw/pci/pcie_host.h"
#define TYPE_PPC460EX_PCIE_HOST "ppc460ex-pcie-host"
-typedef struct PPC460EXPCIEState PPC460EXPCIEState;
-DECLARE_INSTANCE_CHECKER(PPC460EXPCIEState, PPC460EX_PCIE_HOST,
- TYPE_PPC460EX_PCIE_HOST)
+OBJECT_DECLARE_SIMPLE_TYPE(PPC460EXPCIEState, PPC460EX_PCIE_HOST)
struct PPC460EXPCIEState {
PCIExpressHost host;
uint32_t la;
};
-typedef struct PPC4xxPCIState PPC4xxPCIState;
-DECLARE_INSTANCE_CHECKER(PPC4xxPCIState, PPC4xx_PCI_HOST_BRIDGE,
- TYPE_PPC4xx_PCI_HOST_BRIDGE)
+OBJECT_DECLARE_SIMPLE_TYPE(PPC4xxPCIState, PPC4xx_PCI_HOST_BRIDGE)
#define PPC4xx_PCI_NR_PMMS 3
#define PPC4xx_PCI_NR_PTMS 2
} QEMU_PACKED SpinInfo;
#define TYPE_E500_SPIN "e500-spin"
-typedef struct SpinState SpinState;
-DECLARE_INSTANCE_CHECKER(SpinState, E500_SPIN,
- TYPE_E500_SPIN)
+OBJECT_DECLARE_SIMPLE_TYPE(SpinState, E500_SPIN)
struct SpinState {
SysBusDevice parent_obj;
#include "trace.h"
#define TYPE_PREP_SYSTEMIO "prep-systemio"
-typedef struct PrepSystemIoState PrepSystemIoState;
-DECLARE_INSTANCE_CHECKER(PrepSystemIoState, PREP_SYSTEMIO,
- TYPE_PREP_SYSTEMIO)
+OBJECT_DECLARE_SIMPLE_TYPE(PrepSystemIoState, PREP_SYSTEMIO)
/* Bit as defined in PowerPC Reference Plaform v1.1, sect. 6.1.5, p. 132 */
#define PREP_BIT(n) (1 << (7 - (n)))
#include "qom/object.h"
#define TYPE_RS6000MC "rs6000-mc"
-typedef struct RS6000MCState RS6000MCState;
-DECLARE_INSTANCE_CHECKER(RS6000MCState, RS6000MC,
- TYPE_RS6000MC)
+OBJECT_DECLARE_SIMPLE_TYPE(RS6000MCState, RS6000MC)
struct RS6000MCState {
ISADevice parent_obj;
#include "kvm_ppc.h"
#include "qom/object.h"
-typedef struct SpaprRngState SpaprRngState;
-DECLARE_INSTANCE_CHECKER(SpaprRngState, SPAPR_RNG,
- TYPE_SPAPR_RNG)
+OBJECT_DECLARE_SIMPLE_TYPE(SpaprRngState, SPAPR_RNG)
struct SpaprRngState {
/*< private >*/
#define CTRL_OSF 0x20
#define TYPE_DS1338 "ds1338"
-typedef struct DS1338State DS1338State;
-DECLARE_INSTANCE_CHECKER(DS1338State, DS1338,
- TYPE_DS1338)
+OBJECT_DECLARE_SIMPLE_TYPE(DS1338State, DS1338)
struct DS1338State {
I2CSlave parent_obj;
#define RTC_BASE_FREQ 32768
#define TYPE_EXYNOS4210_RTC "exynos4210.rtc"
-typedef struct Exynos4210RTCState Exynos4210RTCState;
-DECLARE_INSTANCE_CHECKER(Exynos4210RTCState, EXYNOS4210_RTC,
- TYPE_EXYNOS4210_RTC)
+OBJECT_DECLARE_SIMPLE_TYPE(Exynos4210RTCState, EXYNOS4210_RTC)
struct Exynos4210RTCState {
SysBusDevice parent_obj;
#include "qom/object.h"
#define TYPE_M41T80 "m41t80"
-typedef struct M41t80State M41t80State;
-DECLARE_INSTANCE_CHECKER(M41t80State, M41T80,
- TYPE_M41T80)
+OBJECT_DECLARE_SIMPLE_TYPE(M41t80State, M41T80)
struct M41t80State {
I2CSlave parent_obj;
#define TYPE_SUN4V_RTC "sun4v_rtc"
-typedef struct Sun4vRtc Sun4vRtc;
-DECLARE_INSTANCE_CHECKER(Sun4vRtc, SUN4V_RTC,
- TYPE_SUN4V_RTC)
+OBJECT_DECLARE_SIMPLE_TYPE(Sun4vRtc, SUN4V_RTC)
struct Sun4vRtc {
SysBusDevice parent_obj;
#define VERBOSE 1
#define TYPE_TWL92230 "twl92230"
-typedef struct MenelausState MenelausState;
-DECLARE_INSTANCE_CHECKER(MenelausState, TWL92230,
- TYPE_TWL92230)
+OBJECT_DECLARE_SIMPLE_TYPE(MenelausState, TWL92230)
struct MenelausState {
I2CSlave parent_obj;
typedef struct QemuIplParameters QemuIplParameters;
#define TYPE_S390_IPL "s390-ipl"
-typedef struct S390IPLState S390IPLState;
-DECLARE_INSTANCE_CHECKER(S390IPLState, S390_IPL,
- TYPE_S390_IPL)
+OBJECT_DECLARE_SIMPLE_TYPE(S390IPLState, S390_IPL)
struct S390IPLState {
/*< private >*/
#define UID_UNDEFINED 0
#define UID_CHECKING_ENABLED 0x01
-typedef struct S390pciState S390pciState;
-DECLARE_INSTANCE_CHECKER(S390pciState, S390_PCI_HOST_BRIDGE,
- TYPE_S390_PCI_HOST_BRIDGE)
-typedef struct S390PCIBus S390PCIBus;
-DECLARE_INSTANCE_CHECKER(S390PCIBus, S390_PCI_BUS,
- TYPE_S390_PCI_BUS)
-typedef struct S390PCIBusDevice S390PCIBusDevice;
-DECLARE_INSTANCE_CHECKER(S390PCIBusDevice, S390_PCI_DEVICE,
- TYPE_S390_PCI_DEVICE)
-typedef struct S390PCIIOMMU S390PCIIOMMU;
-DECLARE_INSTANCE_CHECKER(S390PCIIOMMU, S390_PCI_IOMMU,
- TYPE_S390_PCI_IOMMU)
+OBJECT_DECLARE_SIMPLE_TYPE(S390pciState, S390_PCI_HOST_BRIDGE)
+OBJECT_DECLARE_SIMPLE_TYPE(S390PCIBus, S390_PCI_BUS)
+OBJECT_DECLARE_SIMPLE_TYPE(S390PCIBusDevice, S390_PCI_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(S390PCIIOMMU, S390_PCI_IOMMU)
#define HP_EVENT_TO_CONFIGURED 0x0301
#define HP_EVENT_RESERVED_TO_STANDBY 0x0302
/* virtio-scsi-ccw */
#define TYPE_VIRTIO_SCSI_CCW "virtio-scsi-ccw"
-typedef struct VirtIOSCSICcw VirtIOSCSICcw;
-DECLARE_INSTANCE_CHECKER(VirtIOSCSICcw, VIRTIO_SCSI_CCW,
- TYPE_VIRTIO_SCSI_CCW)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtIOSCSICcw, VIRTIO_SCSI_CCW)
struct VirtIOSCSICcw {
VirtioCcwDevice parent_obj;
/* vhost-scsi-ccw */
#define TYPE_VHOST_SCSI_CCW "vhost-scsi-ccw"
-typedef struct VHostSCSICcw VHostSCSICcw;
-DECLARE_INSTANCE_CHECKER(VHostSCSICcw, VHOST_SCSI_CCW,
- TYPE_VHOST_SCSI_CCW)
+OBJECT_DECLARE_SIMPLE_TYPE(VHostSCSICcw, VHOST_SCSI_CCW)
struct VHostSCSICcw {
VirtioCcwDevice parent_obj;
/* virtio-blk-ccw */
#define TYPE_VIRTIO_BLK_CCW "virtio-blk-ccw"
-typedef struct VirtIOBlkCcw VirtIOBlkCcw;
-DECLARE_INSTANCE_CHECKER(VirtIOBlkCcw, VIRTIO_BLK_CCW,
- TYPE_VIRTIO_BLK_CCW)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtIOBlkCcw, VIRTIO_BLK_CCW)
struct VirtIOBlkCcw {
VirtioCcwDevice parent_obj;
/* virtio-balloon-ccw */
#define TYPE_VIRTIO_BALLOON_CCW "virtio-balloon-ccw"
-typedef struct VirtIOBalloonCcw VirtIOBalloonCcw;
-DECLARE_INSTANCE_CHECKER(VirtIOBalloonCcw, VIRTIO_BALLOON_CCW,
- TYPE_VIRTIO_BALLOON_CCW)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtIOBalloonCcw, VIRTIO_BALLOON_CCW)
struct VirtIOBalloonCcw {
VirtioCcwDevice parent_obj;
/* virtio-serial-ccw */
#define TYPE_VIRTIO_SERIAL_CCW "virtio-serial-ccw"
-typedef struct VirtioSerialCcw VirtioSerialCcw;
-DECLARE_INSTANCE_CHECKER(VirtioSerialCcw, VIRTIO_SERIAL_CCW,
- TYPE_VIRTIO_SERIAL_CCW)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtioSerialCcw, VIRTIO_SERIAL_CCW)
struct VirtioSerialCcw {
VirtioCcwDevice parent_obj;
/* virtio-net-ccw */
#define TYPE_VIRTIO_NET_CCW "virtio-net-ccw"
-typedef struct VirtIONetCcw VirtIONetCcw;
-DECLARE_INSTANCE_CHECKER(VirtIONetCcw, VIRTIO_NET_CCW,
- TYPE_VIRTIO_NET_CCW)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtIONetCcw, VIRTIO_NET_CCW)
struct VirtIONetCcw {
VirtioCcwDevice parent_obj;
/* virtio-rng-ccw */
#define TYPE_VIRTIO_RNG_CCW "virtio-rng-ccw"
-typedef struct VirtIORNGCcw VirtIORNGCcw;
-DECLARE_INSTANCE_CHECKER(VirtIORNGCcw, VIRTIO_RNG_CCW,
- TYPE_VIRTIO_RNG_CCW)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtIORNGCcw, VIRTIO_RNG_CCW)
struct VirtIORNGCcw {
VirtioCcwDevice parent_obj;
/* virtio-crypto-ccw */
#define TYPE_VIRTIO_CRYPTO_CCW "virtio-crypto-ccw"
-typedef struct VirtIOCryptoCcw VirtIOCryptoCcw;
-DECLARE_INSTANCE_CHECKER(VirtIOCryptoCcw, VIRTIO_CRYPTO_CCW,
- TYPE_VIRTIO_CRYPTO_CCW)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtIOCryptoCcw, VIRTIO_CRYPTO_CCW)
struct VirtIOCryptoCcw {
VirtioCcwDevice parent_obj;
#include "hw/9pfs/virtio-9p.h"
#define TYPE_VIRTIO_9P_CCW "virtio-9p-ccw"
-typedef struct V9fsCCWState V9fsCCWState;
-DECLARE_INSTANCE_CHECKER(V9fsCCWState, VIRTIO_9P_CCW,
- TYPE_VIRTIO_9P_CCW)
+OBJECT_DECLARE_SIMPLE_TYPE(V9fsCCWState, VIRTIO_9P_CCW)
struct V9fsCCWState {
VirtioCcwDevice parent_obj;
#ifdef CONFIG_VHOST_VSOCK
#define TYPE_VHOST_VSOCK_CCW "vhost-vsock-ccw"
-typedef struct VHostVSockCCWState VHostVSockCCWState;
-DECLARE_INSTANCE_CHECKER(VHostVSockCCWState, VHOST_VSOCK_CCW,
- TYPE_VHOST_VSOCK_CCW)
+OBJECT_DECLARE_SIMPLE_TYPE(VHostVSockCCWState, VHOST_VSOCK_CCW)
struct VHostVSockCCWState {
VirtioCcwDevice parent_obj;
#endif /* CONFIG_VHOST_VSOCK */
#define TYPE_VIRTIO_GPU_CCW "virtio-gpu-ccw"
-typedef struct VirtIOGPUCcw VirtIOGPUCcw;
-DECLARE_INSTANCE_CHECKER(VirtIOGPUCcw, VIRTIO_GPU_CCW,
- TYPE_VIRTIO_GPU_CCW)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtIOGPUCcw, VIRTIO_GPU_CCW)
struct VirtIOGPUCcw {
VirtioCcwDevice parent_obj;
};
#define TYPE_VIRTIO_INPUT_CCW "virtio-input-ccw"
-typedef struct VirtIOInputCcw VirtIOInputCcw;
-DECLARE_INSTANCE_CHECKER(VirtIOInputCcw, VIRTIO_INPUT_CCW,
- TYPE_VIRTIO_INPUT_CCW)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtIOInputCcw, VIRTIO_INPUT_CCW)
struct VirtIOInputCcw {
VirtioCcwDevice parent_obj;
#define TYPE_VIRTIO_KEYBOARD_CCW "virtio-keyboard-ccw"
#define TYPE_VIRTIO_MOUSE_CCW "virtio-mouse-ccw"
#define TYPE_VIRTIO_TABLET_CCW "virtio-tablet-ccw"
-typedef struct VirtIOInputHIDCcw VirtIOInputHIDCcw;
-DECLARE_INSTANCE_CHECKER(VirtIOInputHIDCcw, VIRTIO_INPUT_HID_CCW,
- TYPE_VIRTIO_INPUT_HID_CCW)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtIOInputHIDCcw, VIRTIO_INPUT_HID_CCW)
struct VirtIOInputHIDCcw {
VirtioCcwDevice parent_obj;
uint8_t script_ram[2048 * sizeof(uint32_t)];
};
-typedef struct LSIState LSIState;
#define TYPE_LSI53C810 "lsi53c810"
#define TYPE_LSI53C895A "lsi53c895a"
-DECLARE_INSTANCE_CHECKER(LSIState, LSI53C895A,
- TYPE_LSI53C895A)
+OBJECT_DECLARE_SIMPLE_TYPE(LSIState, LSI53C895A)
static const char *scsi_phases[] = {
"DOUT",
} vscsi_req;
#define TYPE_VIO_SPAPR_VSCSI_DEVICE "spapr-vscsi"
-typedef struct VSCSIState VSCSIState;
-DECLARE_INSTANCE_CHECKER(VSCSIState, VIO_SPAPR_VSCSI_DEVICE,
- TYPE_VIO_SPAPR_VSCSI_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(VSCSIState, VIO_SPAPR_VSCSI_DEVICE)
struct VSCSIState {
SpaprVioDevice vdev;
};
#define TYPE_MILKYMIST_MEMCARD "milkymist-memcard"
-typedef struct MilkymistMemcardState MilkymistMemcardState;
-DECLARE_INSTANCE_CHECKER(MilkymistMemcardState, MILKYMIST_MEMCARD,
- TYPE_MILKYMIST_MEMCARD)
+OBJECT_DECLARE_SIMPLE_TYPE(MilkymistMemcardState, MILKYMIST_MEMCARD)
#define TYPE_MILKYMIST_SDBUS "milkymist-sdbus"
#define PL181_FIFO_LEN 16
#define TYPE_PL181 "pl181"
-typedef struct PL181State PL181State;
-DECLARE_INSTANCE_CHECKER(PL181State, PL181,
- TYPE_PL181)
+OBJECT_DECLARE_SIMPLE_TYPE(PL181State, PL181)
#define TYPE_PL181_BUS "pl181-bus"
int32_t stopping;
SDBus sdbus;
};
-typedef struct ssi_sd_state ssi_sd_state;
#define TYPE_SSI_SD "ssi-sd"
-DECLARE_INSTANCE_CHECKER(ssi_sd_state, SSI_SD,
- TYPE_SSI_SD)
+OBJECT_DECLARE_SIMPLE_TYPE(ssi_sd_state, SSI_SD)
/* State word bits. */
#define SSI_SDR_LOCKED 0x0001
#define TYPE_SH_PCI_HOST_BRIDGE "sh_pci"
-typedef struct SHPCIState SHPCIState;
-DECLARE_INSTANCE_CHECKER(SHPCIState, SH_PCI_HOST_BRIDGE,
- TYPE_SH_PCI_HOST_BRIDGE)
+OBJECT_DECLARE_SIMPLE_TYPE(SHPCIState, SH_PCI_HOST_BRIDGE)
struct SHPCIState {
PCIHostState parent_obj;
idreg_data, sizeof(idreg_data));
}
-typedef struct IDRegState IDRegState;
-DECLARE_INSTANCE_CHECKER(IDRegState, MACIO_ID_REGISTER,
- TYPE_MACIO_ID_REGISTER)
+OBJECT_DECLARE_SIMPLE_TYPE(IDRegState, MACIO_ID_REGISTER)
struct IDRegState {
SysBusDevice parent_obj;
};
#define TYPE_TCX_AFX "tcx_afx"
-typedef struct AFXState AFXState;
-DECLARE_INSTANCE_CHECKER(AFXState, TCX_AFX,
- TYPE_TCX_AFX)
+OBJECT_DECLARE_SIMPLE_TYPE(AFXState, TCX_AFX)
struct AFXState {
SysBusDevice parent_obj;
MemoryRegion bar0;
MemoryRegion bar1;
};
-typedef struct EbusState EbusState;
#define TYPE_EBUS "ebus"
-DECLARE_INSTANCE_CHECKER(EbusState, EBUS,
- TYPE_EBUS)
+OBJECT_DECLARE_SIMPLE_TYPE(EbusState, EBUS)
const char *fw_cfg_arch_key_name(uint16_t key)
{
} ResetData;
#define TYPE_SUN4U_POWER "power"
-typedef struct PowerDevice PowerDevice;
-DECLARE_INSTANCE_CHECKER(PowerDevice, SUN4U_POWER,
- TYPE_SUN4U_POWER)
+OBJECT_DECLARE_SIMPLE_TYPE(PowerDevice, SUN4U_POWER)
struct PowerDevice {
SysBusDevice parent_obj;
};
#define TYPE_SSI_BUS "SSI"
-DECLARE_INSTANCE_CHECKER(SSIBus, SSI_BUS,
- TYPE_SSI_BUS)
+OBJECT_DECLARE_SIMPLE_TYPE(SSIBus, SSI_BUS)
static const TypeInfo ssi_bus_info = {
.name = TYPE_SSI_BUS,
#define FIFO_CAPACITY 256
#define TYPE_XILINX_SPI "xlnx.xps-spi"
-typedef struct XilinxSPI XilinxSPI;
-DECLARE_INSTANCE_CHECKER(XilinxSPI, XILINX_SPI,
- TYPE_XILINX_SPI)
+OBJECT_DECLARE_SIMPLE_TYPE(XilinxSPI, XILINX_SPI)
struct XilinxSPI {
SysBusDevice parent_obj;
#define CONTROL_STOP 0x0008
#define TYPE_ALTERA_TIMER "ALTR.timer"
-typedef struct AlteraTimer AlteraTimer;
-DECLARE_INSTANCE_CHECKER(AlteraTimer, ALTERA_TIMER,
- TYPE_ALTERA_TIMER)
+OBJECT_DECLARE_SIMPLE_TYPE(AlteraTimer, ALTERA_TIMER)
struct AlteraTimer {
SysBusDevice busdev;
*/
#define TYPE_SP804 "sp804"
-typedef struct SP804State SP804State;
-DECLARE_INSTANCE_CHECKER(SP804State, SP804,
- TYPE_SP804)
+OBJECT_DECLARE_SIMPLE_TYPE(SP804State, SP804)
struct SP804State {
SysBusDevice parent_obj;
/* Integrator/CP timer module. */
#define TYPE_INTEGRATOR_PIT "integrator_pit"
-typedef struct icp_pit_state icp_pit_state;
-DECLARE_INSTANCE_CHECKER(icp_pit_state, INTEGRATOR_PIT,
- TYPE_INTEGRATOR_PIT)
+OBJECT_DECLARE_SIMPLE_TYPE(icp_pit_state, INTEGRATOR_PIT)
struct icp_pit_state {
SysBusDevice parent_obj;
} CadenceTimerState;
#define TYPE_CADENCE_TTC "cadence_ttc"
-typedef struct CadenceTTCState CadenceTTCState;
-DECLARE_INSTANCE_CHECKER(CadenceTTCState, CADENCE_TTC,
- TYPE_CADENCE_TTC)
+OBJECT_DECLARE_SIMPLE_TYPE(CadenceTTCState, CADENCE_TTC)
struct CadenceTTCState {
SysBusDevice parent_obj;
} Exynos4210MCTLT;
#define TYPE_EXYNOS4210_MCT "exynos4210.mct"
-typedef struct Exynos4210MCTState Exynos4210MCTState;
-DECLARE_INSTANCE_CHECKER(Exynos4210MCTState, EXYNOS4210_MCT,
- TYPE_EXYNOS4210_MCT)
+OBJECT_DECLARE_SIMPLE_TYPE(Exynos4210MCTState, EXYNOS4210_MCT)
struct Exynos4210MCTState {
SysBusDevice parent_obj;
} Exynos4210PWM;
#define TYPE_EXYNOS4210_PWM "exynos4210.pwm"
-typedef struct Exynos4210PWMState Exynos4210PWMState;
-DECLARE_INSTANCE_CHECKER(Exynos4210PWMState, EXYNOS4210_PWM,
- TYPE_EXYNOS4210_PWM)
+OBJECT_DECLARE_SIMPLE_TYPE(Exynos4210PWMState, EXYNOS4210_PWM)
struct Exynos4210PWMState {
SysBusDevice parent_obj;
#define COUNTER_RELOAD_OFFSET 0x04
#define TIMER_BASE 0x10
-typedef struct GPTimerUnit GPTimerUnit;
-DECLARE_INSTANCE_CHECKER(GPTimerUnit, GRLIB_GPTIMER,
- TYPE_GRLIB_GPTIMER)
+OBJECT_DECLARE_SIMPLE_TYPE(GPTimerUnit, GRLIB_GPTIMER)
typedef struct GPTimer GPTimer;
#define HPET_MSI_SUPPORT 0
-typedef struct HPETState HPETState;
-DECLARE_INSTANCE_CHECKER(HPETState, HPET,
- TYPE_HPET)
+OBJECT_DECLARE_SIMPLE_TYPE(HPETState, HPET)
struct HPETState;
typedef struct HPETTimer { /* timers */
};
#define TYPE_LM32_TIMER "lm32-timer"
-typedef struct LM32TimerState LM32TimerState;
-DECLARE_INSTANCE_CHECKER(LM32TimerState, LM32_TIMER,
- TYPE_LM32_TIMER)
+OBJECT_DECLARE_SIMPLE_TYPE(LM32TimerState, LM32_TIMER)
struct LM32TimerState {
SysBusDevice parent_obj;
};
#define TYPE_MILKYMIST_SYSCTL "milkymist-sysctl"
-typedef struct MilkymistSysctlState MilkymistSysctlState;
-DECLARE_INSTANCE_CHECKER(MilkymistSysctlState, MILKYMIST_SYSCTL,
- TYPE_MILKYMIST_SYSCTL)
+OBJECT_DECLARE_SIMPLE_TYPE(MilkymistSysctlState, MILKYMIST_SYSCTL)
struct MilkymistSysctlState {
SysBusDevice parent_obj;
#include "hw/unicore32/puv3.h"
#define TYPE_PUV3_OST "puv3_ost"
-typedef struct PUV3OSTState PUV3OSTState;
-DECLARE_INSTANCE_CHECKER(PUV3OSTState, PUV3_OST,
- TYPE_PUV3_OST)
+OBJECT_DECLARE_SIMPLE_TYPE(PUV3OSTState, PUV3_OST)
/* puv3 ostimer implementation. */
struct PUV3OSTState {
};
#define TYPE_PXA2XX_TIMER "pxa2xx-timer"
-typedef struct PXA2xxTimerInfo PXA2xxTimerInfo;
-DECLARE_INSTANCE_CHECKER(PXA2xxTimerInfo, PXA2XX_TIMER,
- TYPE_PXA2XX_TIMER)
+OBJECT_DECLARE_SIMPLE_TYPE(PXA2xxTimerInfo, PXA2XX_TIMER)
typedef struct {
} CPUTimerState;
#define TYPE_SLAVIO_TIMER "slavio_timer"
-typedef struct SLAVIO_TIMERState SLAVIO_TIMERState;
-DECLARE_INSTANCE_CHECKER(SLAVIO_TIMERState, SLAVIO_TIMER,
- TYPE_SLAVIO_TIMER)
+OBJECT_DECLARE_SIMPLE_TYPE(SLAVIO_TIMERState, SLAVIO_TIMER)
struct SLAVIO_TIMERState {
SysBusDevice parent_obj;
/*< public >*/
TPMState state; /* not a QOM object */
};
-typedef struct TPMStateISA TPMStateISA;
-DECLARE_INSTANCE_CHECKER(TPMStateISA, TPM_TIS_ISA,
- TYPE_TPM_TIS_ISA)
+OBJECT_DECLARE_SIMPLE_TYPE(TPMStateISA, TPM_TIS_ISA)
static int tpm_tis_pre_save_isa(void *opaque)
{
/*< public >*/
TPMState state; /* not a QOM object */
};
-typedef struct TPMStateSysBus TPMStateSysBus;
-DECLARE_INSTANCE_CHECKER(TPMStateSysBus, TPM_TIS_SYSBUS,
- TYPE_TPM_TIS_SYSBUS)
+OBJECT_DECLARE_SIMPLE_TYPE(TPMStateSysBus, TPM_TIS_SYSBUS)
static int tpm_tis_pre_save_sysbus(void *opaque)
{
uint32_t buffer_user, buffer;
bool multi;
};
-typedef struct USBAudioState USBAudioState;
#define TYPE_USB_AUDIO "usb-audio"
-DECLARE_INSTANCE_CHECKER(USBAudioState, USB_AUDIO,
- TYPE_USB_AUDIO)
+OBJECT_DECLARE_SIMPLE_TYPE(USBAudioState, USB_AUDIO)
static void output_callback(void *opaque, int avail)
{
char *display;
uint32_t head;
};
-typedef struct USBHIDState USBHIDState;
#define TYPE_USB_HID "usb-hid"
-DECLARE_INSTANCE_CHECKER(USBHIDState, USB_HID,
- TYPE_USB_HID)
+OBJECT_DECLARE_SIMPLE_TYPE(USBHIDState, USB_HID)
enum {
STR_MANUFACTURER = 1,
QEMUTimer *port_timer;
USBHubPort ports[MAX_PORTS];
};
-typedef struct USBHubState USBHubState;
#define TYPE_USB_HUB "usb-hub"
-DECLARE_INSTANCE_CHECKER(USBHubState, USB_HUB,
- TYPE_USB_HUB)
+OBJECT_DECLARE_SIMPLE_TYPE(USBHubState, USB_HUB)
#define ClearHubFeature (0x2000 | USB_REQ_CLEAR_FEATURE)
#define ClearPortFeature (0x2300 | USB_REQ_CLEAR_FEATURE)
} QEMU_PACKED ObjectInfo;
#define TYPE_USB_MTP "usb-mtp"
-DECLARE_INSTANCE_CHECKER(MTPState, USB_MTP,
- TYPE_USB_MTP)
+OBJECT_DECLARE_SIMPLE_TYPE(MTPState, USB_MTP)
#define QEMU_STORAGE_ID 0x00010001
NICConf conf;
QTAILQ_HEAD(, rndis_response) rndis_resp;
};
-typedef struct USBNetState USBNetState;
#define TYPE_USB_NET "usb-net"
-DECLARE_INSTANCE_CHECKER(USBNetState, USB_NET,
- TYPE_USB_NET)
+OBJECT_DECLARE_SIMPLE_TYPE(USBNetState, USB_NET)
static int is_rndis(USBNetState *s)
{
int latency; /* ms */
CharBackend cs;
};
-typedef struct USBSerialState USBSerialState;
#define TYPE_USB_SERIAL "usb-serial-dev"
-DECLARE_INSTANCE_CHECKER(USBSerialState, USB_SERIAL,
- TYPE_USB_SERIAL)
+OBJECT_DECLARE_SIMPLE_TYPE(USBSerialState, USB_SERIAL)
enum {
STR_MANUFACTURER = 1,
#define D_VERBOSE 4
#define TYPE_USB_CCID_DEV "usb-ccid"
-typedef struct USBCCIDState USBCCIDState;
-DECLARE_INSTANCE_CHECKER(USBCCIDState, USB_CCID_DEV,
- TYPE_USB_CCID_DEV)
+OBJECT_DECLARE_SIMPLE_TYPE(USBCCIDState, USB_CCID_DEV)
/*
* The two options for variable sized buffers:
* make them constant size, for large enough constant,
};
#define TYPE_CCID_BUS "ccid-bus"
-DECLARE_INSTANCE_CHECKER(CCIDBus, CCID_BUS,
- TYPE_CCID_BUS)
+OBJECT_DECLARE_SIMPLE_TYPE(CCIDBus, CCID_BUS)
static const TypeInfo ccid_bus_info = {
.name = TYPE_CCID_BUS,
};
#define TYPE_USB_UAS "usb-uas"
-DECLARE_INSTANCE_CHECKER(UASDevice, USB_UAS,
- TYPE_USB_UAS)
+OBJECT_DECLARE_SIMPLE_TYPE(UASDevice, USB_UAS)
struct UASRequest {
uint16_t tag;
uint8_t idle;
int changed;
};
-typedef struct USBWacomState USBWacomState;
#define TYPE_USB_WACOM "usb-wacom-tablet"
-DECLARE_INSTANCE_CHECKER(USBWacomState, USB_WACOM,
- TYPE_USB_WACOM)
+OBJECT_DECLARE_SIMPLE_TYPE(USBWacomState, USB_WACOM)
enum {
STR_MANUFACTURER = 1,
void ehci_reset(void *opaque);
#define TYPE_PCI_EHCI "pci-ehci-usb"
-typedef struct EHCIPCIState EHCIPCIState;
-DECLARE_INSTANCE_CHECKER(EHCIPCIState, PCI_EHCI,
- TYPE_PCI_EHCI)
+OBJECT_DECLARE_SIMPLE_TYPE(EHCIPCIState, PCI_EHCI)
struct EHCIPCIState {
/*< private >*/
uint16_t portnr;
};
-typedef struct FUSBH200EHCIState FUSBH200EHCIState;
-DECLARE_INSTANCE_CHECKER(FUSBH200EHCIState, FUSBH200_EHCI,
- TYPE_FUSBH200_EHCI)
+OBJECT_DECLARE_SIMPLE_TYPE(FUSBH200EHCIState, FUSBH200_EHCI)
struct FUSBH200EHCIState {
/*< private >*/
#include "qom/object.h"
#define TYPE_PCI_OHCI "pci-ohci"
-typedef struct OHCIPCIState OHCIPCIState;
-DECLARE_INSTANCE_CHECKER(OHCIPCIState, PCI_OHCI,
- TYPE_PCI_OHCI)
+OBJECT_DECLARE_SIMPLE_TYPE(OHCIPCIState, PCI_OHCI)
struct OHCIPCIState {
/*< private >*/
} OHCIState;
#define TYPE_SYSBUS_OHCI "sysbus-ohci"
-typedef struct OHCISysBusState OHCISysBusState;
-DECLARE_INSTANCE_CHECKER(OHCISysBusState, SYSBUS_OHCI,
- TYPE_SYSBUS_OHCI)
+OBJECT_DECLARE_SIMPLE_TYPE(OHCISysBusState, SYSBUS_OHCI)
struct OHCISysBusState {
/*< private >*/
#define TYPE_NEC_XHCI "nec-usb-xhci"
#define TYPE_QEMU_XHCI "qemu-xhci"
-typedef struct XHCIState XHCIState;
-DECLARE_INSTANCE_CHECKER(XHCIState, XHCI,
- TYPE_XHCI)
+OBJECT_DECLARE_SIMPLE_TYPE(XHCIState, XHCI)
#define MAXPORTS_2 15
#define MAXPORTS_3 15
/* ------------------------------------------------------------------------ */
#define TYPE_USB_HOST_DEVICE "usb-host"
-typedef struct USBHostDevice USBHostDevice;
-DECLARE_INSTANCE_CHECKER(USBHostDevice, USB_HOST_DEVICE,
- TYPE_USB_HOST_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(USBHostDevice, USB_HOST_DEVICE)
typedef struct USBHostRequest USBHostRequest;
typedef struct USBHostIsoXfer USBHostIsoXfer;
#include "qom/object.h"
#define TYPE_TUSB6010 "tusb6010"
-typedef struct TUSBState TUSBState;
-DECLARE_INSTANCE_CHECKER(TUSBState, TUSB6010,
- TYPE_TUSB6010)
+OBJECT_DECLARE_SIMPLE_TYPE(TUSBState, TUSB6010)
struct TUSBState {
SysBusDevice parent_obj;
APDevice apdev;
VFIODevice vdev;
};
-typedef struct VFIOAPDevice VFIOAPDevice;
-DECLARE_INSTANCE_CHECKER(VFIOAPDevice, VFIO_AP_DEVICE,
- TYPE_VFIO_AP_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(VFIOAPDevice, VFIO_AP_DEVICE)
static void vfio_ap_compute_needs_reset(VFIODevice *vdev)
{
} VFIOMSIXInfo;
#define TYPE_VFIO_PCI "vfio-pci"
-typedef struct VFIOPCIDevice VFIOPCIDevice;
-DECLARE_INSTANCE_CHECKER(VFIOPCIDevice, VFIO_PCI,
- TYPE_VFIO_PCI)
+OBJECT_DECLARE_SIMPLE_TYPE(VFIOPCIDevice, VFIO_PCI)
struct VFIOPCIDevice {
PCIDevice pdev;
#include "qemu/module.h"
#include "qom/object.h"
-typedef struct VirtIOInputPCI VirtIOInputPCI;
-typedef struct VirtIOInputHIDPCI VirtIOInputHIDPCI;
/*
* virtio-input-pci: This extends VirtioPCIProxy.
*/
-DECLARE_INSTANCE_CHECKER(VirtIOInputPCI, VIRTIO_INPUT_PCI,
- TYPE_VIRTIO_INPUT_PCI)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtIOInputPCI, VIRTIO_INPUT_PCI)
struct VirtIOInputPCI {
VirtIOPCIProxy parent_obj;
#define TYPE_VIRTIO_KEYBOARD_PCI "virtio-keyboard-pci"
#define TYPE_VIRTIO_MOUSE_PCI "virtio-mouse-pci"
#define TYPE_VIRTIO_TABLET_PCI "virtio-tablet-pci"
-DECLARE_INSTANCE_CHECKER(VirtIOInputHIDPCI, VIRTIO_INPUT_HID_PCI,
- TYPE_VIRTIO_INPUT_HID_PCI)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtIOInputHIDPCI, VIRTIO_INPUT_HID_PCI)
struct VirtIOInputHIDPCI {
VirtIOPCIProxy parent_obj;
*/
};
-typedef struct I6300State I6300State;
#define TYPE_WATCHDOG_I6300ESB_DEVICE "i6300esb"
-DECLARE_INSTANCE_CHECKER(I6300State, WATCHDOG_I6300ESB_DEVICE,
- TYPE_WATCHDOG_I6300ESB_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(I6300State, WATCHDOG_I6300ESB_DEVICE)
/* This function is called when the watchdog has either been enabled
* (hence it starts counting down) or has been keep-alived.
typedef const struct XenPTRegInfo XenPTRegInfo;
typedef struct XenPTReg XenPTReg;
-typedef struct XenPCIPassthroughState XenPCIPassthroughState;
#define TYPE_XEN_PT_DEVICE "xen-pci-passthrough"
-DECLARE_INSTANCE_CHECKER(XenPCIPassthroughState, XEN_PT_DEVICE,
- TYPE_XEN_PT_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(XenPCIPassthroughState, XEN_PT_DEVICE)
uint32_t igd_read_opregion(XenPCIPassthroughState *s);
void igd_write_opregion(XenPCIPassthroughState *s, uint32_t val);
} ThrottleGroupMember;
#define TYPE_THROTTLE_GROUP "throttle-group"
-typedef struct ThrottleGroup ThrottleGroup;
-DECLARE_INSTANCE_CHECKER(ThrottleGroup, THROTTLE_GROUP,
- TYPE_THROTTLE_GROUP)
+OBJECT_DECLARE_SIMPLE_TYPE(ThrottleGroup, THROTTLE_GROUP)
const char *throttle_group_get_name(ThrottleGroupMember *tgm);
#define ACPI_POWER_BUTTON_DEVICE "PWRB"
#define TYPE_ACPI_GED "acpi-ged"
-typedef struct AcpiGedState AcpiGedState;
-DECLARE_INSTANCE_CHECKER(AcpiGedState, ACPI_GED,
- TYPE_ACPI_GED)
+OBJECT_DECLARE_SIMPLE_TYPE(AcpiGedState, ACPI_GED)
#define TYPE_ACPI_GED_X86 "acpi-ged-x86"
#define ACPI_GED_X86(obj) \
* OVMF SDT Header Probe Supressor
*/
-typedef struct VmGenIdState VmGenIdState;
-DECLARE_INSTANCE_CHECKER(VmGenIdState, VMGENID,
- TYPE_VMGENID)
+OBJECT_DECLARE_SIMPLE_TYPE(VmGenIdState, VMGENID)
struct VmGenIdState {
DeviceClass parent_obj;
#define ADC_COMMON_ADDRESS 0x100
#define TYPE_STM32F2XX_ADC "stm32f2xx-adc"
-typedef struct STM32F2XXADCState STM32F2XXADCState;
-DECLARE_INSTANCE_CHECKER(STM32F2XXADCState, STM32F2XX_ADC,
- TYPE_STM32F2XX_ADC)
+OBJECT_DECLARE_SIMPLE_TYPE(STM32F2XXADCState, STM32F2XX_ADC)
struct STM32F2XXADCState {
/* <private> */
#define AW_A10_NUM_USB 2
#define TYPE_AW_A10 "allwinner-a10"
-typedef struct AwA10State AwA10State;
-DECLARE_INSTANCE_CHECKER(AwA10State, AW_A10,
- TYPE_AW_A10)
+OBJECT_DECLARE_SIMPLE_TYPE(AwA10State, AW_A10)
struct AwA10State {
/*< private >*/
#define TYPE_AW_H3 "allwinner-h3"
/** Convert input object to Allwinner H3 state object */
-typedef struct AwH3State AwH3State;
-DECLARE_INSTANCE_CHECKER(AwH3State, AW_H3,
- TYPE_AW_H3)
+OBJECT_DECLARE_SIMPLE_TYPE(AwH3State, AW_H3)
/** @} */
#include "qom/object.h"
#define TYPE_BITBAND "ARM,bitband-memory"
-typedef struct BitBandState BitBandState;
-DECLARE_INSTANCE_CHECKER(BitBandState, BITBAND,
- TYPE_BITBAND)
+OBJECT_DECLARE_SIMPLE_TYPE(BitBandState, BITBAND)
struct BitBandState {
/*< private >*/
};
#define TYPE_ARMV7M "armv7m"
-typedef struct ARMv7MState ARMv7MState;
-DECLARE_INSTANCE_CHECKER(ARMv7MState, ARMV7M,
- TYPE_ARMV7M)
+OBJECT_DECLARE_SIMPLE_TYPE(ARMv7MState, ARMV7M)
#define ARMV7M_NUM_BITBANDS 2
#include "qom/object.h"
#define TYPE_BCM2835_PERIPHERALS "bcm2835-peripherals"
-typedef struct BCM2835PeripheralState BCM2835PeripheralState;
-DECLARE_INSTANCE_CHECKER(BCM2835PeripheralState, BCM2835_PERIPHERALS,
- TYPE_BCM2835_PERIPHERALS)
+OBJECT_DECLARE_SIMPLE_TYPE(BCM2835PeripheralState, BCM2835_PERIPHERALS)
struct BCM2835PeripheralState {
/*< private >*/
#define TYPE_DIGIC "digic"
-typedef struct DigicState DigicState;
-DECLARE_INSTANCE_CHECKER(DigicState, DIGIC,
- TYPE_DIGIC)
+OBJECT_DECLARE_SIMPLE_TYPE(DigicState, DIGIC)
#define DIGIC4_NB_TIMERS 3
I2CBus *i2c_if[EXYNOS4210_I2C_NUMBER];
qemu_or_irq pl330_irq_orgate[EXYNOS4210_NUM_DMA];
};
-typedef struct Exynos4210State Exynos4210State;
#define TYPE_EXYNOS4210_SOC "exynos4210"
-DECLARE_INSTANCE_CHECKER(Exynos4210State, EXYNOS4210_SOC,
- TYPE_EXYNOS4210_SOC)
+OBJECT_DECLARE_SIMPLE_TYPE(Exynos4210State, EXYNOS4210_SOC)
void exynos4210_write_secondary(ARMCPU *cpu,
const struct arm_boot_info *info);
#include "qom/object.h"
#define TYPE_FSL_IMX25 "fsl,imx25"
-typedef struct FslIMX25State FslIMX25State;
-DECLARE_INSTANCE_CHECKER(FslIMX25State, FSL_IMX25,
- TYPE_FSL_IMX25)
+OBJECT_DECLARE_SIMPLE_TYPE(FslIMX25State, FSL_IMX25)
#define FSL_IMX25_NUM_UARTS 5
#define FSL_IMX25_NUM_GPTS 4
#include "qom/object.h"
#define TYPE_FSL_IMX31 "fsl,imx31"
-typedef struct FslIMX31State FslIMX31State;
-DECLARE_INSTANCE_CHECKER(FslIMX31State, FSL_IMX31,
- TYPE_FSL_IMX31)
+OBJECT_DECLARE_SIMPLE_TYPE(FslIMX31State, FSL_IMX31)
#define FSL_IMX31_NUM_UARTS 2
#define FSL_IMX31_NUM_EPITS 2
#include "qom/object.h"
#define TYPE_FSL_IMX6 "fsl,imx6"
-typedef struct FslIMX6State FslIMX6State;
-DECLARE_INSTANCE_CHECKER(FslIMX6State, FSL_IMX6,
- TYPE_FSL_IMX6)
+OBJECT_DECLARE_SIMPLE_TYPE(FslIMX6State, FSL_IMX6)
#define FSL_IMX6_NUM_CPUS 4
#define FSL_IMX6_NUM_UARTS 5
#include "qom/object.h"
#define TYPE_FSL_IMX6UL "fsl,imx6ul"
-typedef struct FslIMX6ULState FslIMX6ULState;
-DECLARE_INSTANCE_CHECKER(FslIMX6ULState, FSL_IMX6UL,
- TYPE_FSL_IMX6UL)
+OBJECT_DECLARE_SIMPLE_TYPE(FslIMX6ULState, FSL_IMX6UL)
enum FslIMX6ULConfiguration {
FSL_IMX6UL_NUM_CPUS = 1,
#include "qom/object.h"
#define TYPE_FSL_IMX7 "fsl,imx7"
-typedef struct FslIMX7State FslIMX7State;
-DECLARE_INSTANCE_CHECKER(FslIMX7State, FSL_IMX7,
- TYPE_FSL_IMX7)
+OBJECT_DECLARE_SIMPLE_TYPE(FslIMX7State, FSL_IMX7)
enum FslIMX7Configuration {
FSL_IMX7_NUM_CPUS = 2,
#include "qom/object.h"
#define TYPE_MSF2_SOC "msf2-soc"
-typedef struct MSF2State MSF2State;
-DECLARE_INSTANCE_CHECKER(MSF2State, MSF2_SOC,
- TYPE_MSF2_SOC)
+OBJECT_DECLARE_SIMPLE_TYPE(MSF2State, MSF2_SOC)
#define MSF2_NUM_SPIS 2
#define MSF2_NUM_UARTS 2
#include "qom/object.h"
#define TYPE_NRF51_SOC "nrf51-soc"
-typedef struct NRF51State NRF51State;
-DECLARE_INSTANCE_CHECKER(NRF51State, NRF51_SOC,
- TYPE_NRF51_SOC)
+OBJECT_DECLARE_SIMPLE_TYPE(NRF51State, NRF51_SOC)
#define NRF51_NUM_TIMERS 3
/* omap_i2c.c */
#define TYPE_OMAP_I2C "omap_i2c"
-typedef struct OMAPI2CState OMAPI2CState;
-DECLARE_INSTANCE_CHECKER(OMAPI2CState, OMAP_I2C,
- TYPE_OMAP_I2C)
+OBJECT_DECLARE_SIMPLE_TYPE(OMAPI2CState, OMAP_I2C)
/* TODO: clock framework (see above) */
/* pxa2xx_mmci.c */
#define TYPE_PXA2XX_MMCI "pxa2xx-mmci"
-typedef struct PXA2xxMMCIState PXA2xxMMCIState;
-DECLARE_INSTANCE_CHECKER(PXA2xxMMCIState, PXA2XX_MMCI,
- TYPE_PXA2XX_MMCI)
+OBJECT_DECLARE_SIMPLE_TYPE(PXA2xxMMCIState, PXA2XX_MMCI)
PXA2xxMMCIState *pxa2xx_mmci_init(MemoryRegion *sysmem,
hwaddr base,
/* pxa2xx_pcmcia.c */
#define TYPE_PXA2XX_PCMCIA "pxa2xx-pcmcia"
-typedef struct PXA2xxPCMCIAState PXA2xxPCMCIAState;
-DECLARE_INSTANCE_CHECKER(PXA2xxPCMCIAState, PXA2XX_PCMCIA,
- TYPE_PXA2XX_PCMCIA)
+OBJECT_DECLARE_SIMPLE_TYPE(PXA2xxPCMCIAState, PXA2XX_PCMCIA)
PXA2xxPCMCIAState *pxa2xx_pcmcia_init(MemoryRegion *sysmem,
hwaddr base);
#define TYPE_PXA2XX_I2C "pxa2xx_i2c"
typedef struct PXA2xxI2SState PXA2xxI2SState;
-DECLARE_INSTANCE_CHECKER(PXA2xxI2CState, PXA2XX_I2C,
- TYPE_PXA2XX_I2C)
+OBJECT_DECLARE_SIMPLE_TYPE(PXA2xxI2CState, PXA2XX_I2C)
#define TYPE_PXA2XX_FIR "pxa2xx-fir"
-typedef struct PXA2xxFIrState PXA2xxFIrState;
-DECLARE_INSTANCE_CHECKER(PXA2xxFIrState, PXA2XX_FIR,
- TYPE_PXA2XX_FIR)
+OBJECT_DECLARE_SIMPLE_TYPE(PXA2xxFIrState, PXA2XX_FIR)
typedef struct {
ARMCPU *cpu;
#include "qom/object.h"
#define TYPE_STM32F205_SOC "stm32f205-soc"
-typedef struct STM32F205State STM32F205State;
-DECLARE_INSTANCE_CHECKER(STM32F205State, STM32F205_SOC,
- TYPE_STM32F205_SOC)
+OBJECT_DECLARE_SIMPLE_TYPE(STM32F205State, STM32F205_SOC)
#define STM_NUM_USARTS 6
#define STM_NUM_TIMERS 4
#include "qom/object.h"
#define TYPE_STM32F405_SOC "stm32f405-soc"
-typedef struct STM32F405State STM32F405State;
-DECLARE_INSTANCE_CHECKER(STM32F405State, STM32F405_SOC,
- TYPE_STM32F405_SOC)
+OBJECT_DECLARE_SIMPLE_TYPE(STM32F405State, STM32F405_SOC)
#define STM_NUM_USARTS 7
#define STM_NUM_TIMERS 4
#include "qom/object.h"
#define TYPE_XLNX_VERSAL "xlnx-versal"
-typedef struct Versal Versal;
-DECLARE_INSTANCE_CHECKER(Versal, XLNX_VERSAL,
- TYPE_XLNX_VERSAL)
+OBJECT_DECLARE_SIMPLE_TYPE(Versal, XLNX_VERSAL)
#define XLNX_VERSAL_NR_ACPUS 2
#define XLNX_VERSAL_NR_UARTS 2
#include "qom/object.h"
#define TYPE_XLNX_ZYNQMP "xlnx,zynqmp"
-typedef struct XlnxZynqMPState XlnxZynqMPState;
-DECLARE_INSTANCE_CHECKER(XlnxZynqMPState, XLNX_ZYNQMP,
- TYPE_XLNX_ZYNQMP)
+OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPState, XLNX_ZYNQMP)
#define XLNX_ZYNQMP_NUM_APU_CPUS 4
#define XLNX_ZYNQMP_NUM_RPU_CPUS 2
/* pflash_cfi01.c */
#define TYPE_PFLASH_CFI01 "cfi.pflash01"
-typedef struct PFlashCFI01 PFlashCFI01;
-DECLARE_INSTANCE_CHECKER(PFlashCFI01, PFLASH_CFI01,
- TYPE_PFLASH_CFI01)
+OBJECT_DECLARE_SIMPLE_TYPE(PFlashCFI01, PFLASH_CFI01)
PFlashCFI01 *pflash_cfi01_register(hwaddr base,
/* pflash_cfi02.c */
#define TYPE_PFLASH_CFI02 "cfi.pflash02"
-typedef struct PFlashCFI02 PFlashCFI02;
-DECLARE_INSTANCE_CHECKER(PFlashCFI02, PFLASH_CFI02,
- TYPE_PFLASH_CFI02)
+OBJECT_DECLARE_SIMPLE_TYPE(PFlashCFI02, PFLASH_CFI02)
PFlashCFI02 *pflash_cfi02_register(hwaddr base,
#define SWIM_MAX_FD 2
-typedef struct SWIMDrive SWIMDrive;
-typedef struct SWIMBus SWIMBus;
typedef struct SWIMCtrl SWIMCtrl;
#define TYPE_SWIM_DRIVE "swim-drive"
-DECLARE_INSTANCE_CHECKER(SWIMDrive, SWIM_DRIVE,
- TYPE_SWIM_DRIVE)
+OBJECT_DECLARE_SIMPLE_TYPE(SWIMDrive, SWIM_DRIVE)
struct SWIMDrive {
DeviceState qdev;
};
#define TYPE_SWIM_BUS "swim-bus"
-DECLARE_INSTANCE_CHECKER(SWIMBus, SWIM_BUS,
- TYPE_SWIM_BUS)
+OBJECT_DECLARE_SIMPLE_TYPE(SWIMBus, SWIM_BUS)
struct SWIMBus {
BusState bus;
};
#define TYPE_SWIM "swim"
-typedef struct Swim Swim;
-DECLARE_INSTANCE_CHECKER(Swim, SWIM,
- TYPE_SWIM)
+OBJECT_DECLARE_SIMPLE_TYPE(Swim, SWIM)
struct Swim {
SysBusDevice parent_obj;
#define USART_CSRC_CSZ0 (1 << 1)
#define TYPE_AVR_USART "avr-usart"
-typedef struct AVRUsartState AVRUsartState;
-DECLARE_INSTANCE_CHECKER(AVRUsartState, AVR_USART,
- TYPE_AVR_USART)
+OBJECT_DECLARE_SIMPLE_TYPE(AVRUsartState, AVR_USART)
struct AVRUsartState {
/* <private> */
#include "qom/object.h"
#define TYPE_BCM2835_AUX "bcm2835-aux"
-typedef struct BCM2835AuxState BCM2835AuxState;
-DECLARE_INSTANCE_CHECKER(BCM2835AuxState, BCM2835_AUX,
- TYPE_BCM2835_AUX)
+OBJECT_DECLARE_SIMPLE_TYPE(BCM2835AuxState, BCM2835_AUX)
#define BCM2835_AUX_RX_FIFO_LEN 8
#define CADENCE_UART_R_MAX (0x48/4)
#define TYPE_CADENCE_UART "cadence_uart"
-typedef struct CadenceUARTState CadenceUARTState;
-DECLARE_INSTANCE_CHECKER(CadenceUARTState, CADENCE_UART,
- TYPE_CADENCE_UART)
+OBJECT_DECLARE_SIMPLE_TYPE(CadenceUARTState, CADENCE_UART)
struct CadenceUARTState {
/*< private >*/
#include "qom/object.h"
#define TYPE_CMSDK_APB_UART "cmsdk-apb-uart"
-typedef struct CMSDKAPBUART CMSDKAPBUART;
-DECLARE_INSTANCE_CHECKER(CMSDKAPBUART, CMSDK_APB_UART,
- TYPE_CMSDK_APB_UART)
+OBJECT_DECLARE_SIMPLE_TYPE(CMSDKAPBUART, CMSDK_APB_UART)
struct CMSDKAPBUART {
/*< private >*/
#include "qom/object.h"
#define TYPE_DIGIC_UART "digic-uart"
-typedef struct DigicUartState DigicUartState;
-DECLARE_INSTANCE_CHECKER(DigicUartState, DIGIC_UART,
- TYPE_DIGIC_UART)
+OBJECT_DECLARE_SIMPLE_TYPE(DigicUartState, DIGIC_UART)
enum {
R_TX = 0x00,
#define TYPE_ESCC "escc"
#define ESCC_SIZE 4
-typedef struct ESCCState ESCCState;
-DECLARE_INSTANCE_CHECKER(ESCCState, ESCC,
- TYPE_ESCC)
+OBJECT_DECLARE_SIMPLE_TYPE(ESCCState, ESCC)
typedef enum {
escc_chn_a, escc_chn_b,
#define IBEX_UART_CLOCK 50000000 /* 50MHz clock */
#define TYPE_IBEX_UART "ibex-uart"
-typedef struct IbexUartState IbexUartState;
-DECLARE_INSTANCE_CHECKER(IbexUartState, IBEX_UART,
- TYPE_IBEX_UART)
+OBJECT_DECLARE_SIMPLE_TYPE(IbexUartState, IBEX_UART)
struct IbexUartState {
/* <private> */
#include "qom/object.h"
#define TYPE_IMX_SERIAL "imx.serial"
-typedef struct IMXSerialState IMXSerialState;
-DECLARE_INSTANCE_CHECKER(IMXSerialState, IMX_SERIAL,
- TYPE_IMX_SERIAL)
+OBJECT_DECLARE_SIMPLE_TYPE(IMXSerialState, IMX_SERIAL)
#define URXD_CHARRDY (1<<15) /* character read is valid */
#define URXD_ERR (1<<14) /* Character has error */
#define UART_SIZE 0x1000
#define TYPE_NRF51_UART "nrf51_soc.uart"
-typedef struct NRF51UARTState NRF51UARTState;
-DECLARE_INSTANCE_CHECKER(NRF51UARTState, NRF51_UART,
- TYPE_NRF51_UART)
+OBJECT_DECLARE_SIMPLE_TYPE(NRF51UARTState, NRF51_UART)
REG32(UART_STARTRX, 0x000)
REG32(UART_STOPRX, 0x004)
#include "qom/object.h"
#define TYPE_PL011 "pl011"
-typedef struct PL011State PL011State;
-DECLARE_INSTANCE_CHECKER(PL011State, PL011,
- TYPE_PL011)
+OBJECT_DECLARE_SIMPLE_TYPE(PL011State, PL011)
/* This shares the same struct (and cast macro) as the base pl011 device */
#define TYPE_PL011_LUMINARY "pl011_luminary"
uint8_t regshift;
uint8_t endianness;
};
-typedef struct SerialMM SerialMM;
struct SerialIO {
SysBusDevice parent;
SerialState serial;
};
-typedef struct SerialIO SerialIO;
extern const VMStateDescription vmstate_serial;
extern const MemoryRegionOps serial_io_ops;
void serial_set_frequency(SerialState *s, uint32_t frequency);
#define TYPE_SERIAL "serial"
-DECLARE_INSTANCE_CHECKER(SerialState, SERIAL,
- TYPE_SERIAL)
+OBJECT_DECLARE_SIMPLE_TYPE(SerialState, SERIAL)
#define TYPE_SERIAL_MM "serial-mm"
-DECLARE_INSTANCE_CHECKER(SerialMM, SERIAL_MM,
- TYPE_SERIAL_MM)
+OBJECT_DECLARE_SIMPLE_TYPE(SerialMM, SERIAL_MM)
#define TYPE_SERIAL_IO "serial-io"
-DECLARE_INSTANCE_CHECKER(SerialIO, SERIAL_IO,
- TYPE_SERIAL_IO)
+OBJECT_DECLARE_SIMPLE_TYPE(SerialIO, SERIAL_IO)
SerialMM *serial_mm_init(MemoryRegion *address_space,
hwaddr base, int regshift,
#define USART_CR1_RE (1 << 2)
#define TYPE_STM32F2XX_USART "stm32f2xx-usart"
-typedef struct STM32F2XXUsartState STM32F2XXUsartState;
-DECLARE_INSTANCE_CHECKER(STM32F2XXUsartState, STM32F2XX_USART,
- TYPE_STM32F2XX_USART)
+OBJECT_DECLARE_SIMPLE_TYPE(STM32F2XXUsartState, STM32F2XX_USART)
struct STM32F2XXUsartState {
/* <private> */
#include "qemu/queue.h"
#define TYPE_CLOCK "clock"
-typedef struct Clock Clock;
-DECLARE_INSTANCE_CHECKER(Clock, CLOCK,
- TYPE_CLOCK)
+OBJECT_DECLARE_SIMPLE_TYPE(Clock, CLOCK)
typedef void ClockCallback(void *opaque);
bool data_be;
bool set_pc;
};
-typedef struct GenericLoaderState GenericLoaderState;
#define TYPE_GENERIC_LOADER "loader"
-DECLARE_INSTANCE_CHECKER(GenericLoaderState, GENERIC_LOADER,
- TYPE_GENERIC_LOADER)
+OBJECT_DECLARE_SIMPLE_TYPE(GenericLoaderState, GENERIC_LOADER)
#endif
#define MAX_SPLIT_LINES 16
-typedef struct SplitIRQ SplitIRQ;
-DECLARE_INSTANCE_CHECKER(SplitIRQ, SPLIT_IRQ,
- TYPE_SPLIT_IRQ)
+OBJECT_DECLARE_SIMPLE_TYPE(SplitIRQ, SPLIT_IRQ)
struct SplitIRQ {
DeviceState parent_obj;
/* A15MP private memory region. */
#define TYPE_A15MPCORE_PRIV "a15mpcore_priv"
-typedef struct A15MPPrivState A15MPPrivState;
-DECLARE_INSTANCE_CHECKER(A15MPPrivState, A15MPCORE_PRIV,
- TYPE_A15MPCORE_PRIV)
+OBJECT_DECLARE_SIMPLE_TYPE(A15MPPrivState, A15MPCORE_PRIV)
struct A15MPPrivState {
/*< private >*/
#include "qom/object.h"
#define TYPE_A9MPCORE_PRIV "a9mpcore_priv"
-typedef struct A9MPPrivState A9MPPrivState;
-DECLARE_INSTANCE_CHECKER(A9MPPrivState, A9MPCORE_PRIV,
- TYPE_A9MPCORE_PRIV)
+OBJECT_DECLARE_SIMPLE_TYPE(A9MPPrivState, A9MPCORE_PRIV)
struct A9MPPrivState {
/*< private >*/
#include "qom/object.h"
#define TYPE_ARM11MPCORE_PRIV "arm11mpcore_priv"
-typedef struct ARM11MPCorePriveState ARM11MPCorePriveState;
-DECLARE_INSTANCE_CHECKER(ARM11MPCorePriveState, ARM11MPCORE_PRIV,
- TYPE_ARM11MPCORE_PRIV)
+OBJECT_DECLARE_SIMPLE_TYPE(ARM11MPCorePriveState, ARM11MPCORE_PRIV)
struct ARM11MPCorePriveState {
SysBusDevice parent_obj;
*/
#define TYPE_CPU_CLUSTER "cpu-cluster"
-typedef struct CPUClusterState CPUClusterState;
-DECLARE_INSTANCE_CHECKER(CPUClusterState, CPU_CLUSTER,
- TYPE_CPU_CLUSTER)
+OBJECT_DECLARE_SIMPLE_TYPE(CPUClusterState, CPU_CLUSTER)
/*
* This limit is imposed by TCG, which puts the cluster ID into an
#define TYPE_CPU_CORE "cpu-core"
-typedef struct CPUCore CPUCore;
-DECLARE_INSTANCE_CHECKER(CPUCore, CPU_CORE,
- TYPE_CPU_CORE)
+OBJECT_DECLARE_SIMPLE_TYPE(CPUCore, CPU_CORE)
struct CPUCore {
/*< private >*/
#include "qom/object.h"
#define TYPE_BCM2835_FB "bcm2835-fb"
-typedef struct BCM2835FBState BCM2835FBState;
-DECLARE_INSTANCE_CHECKER(BCM2835FBState, BCM2835_FB,
- TYPE_BCM2835_FB)
+OBJECT_DECLARE_SIMPLE_TYPE(BCM2835FBState, BCM2835_FB)
/*
* Configuration information about the fb which the guest can program
#define DPCD_H
#include "qom/object.h"
-typedef struct DPCDState DPCDState;
#define TYPE_DPCD "dpcd"
-DECLARE_INSTANCE_CHECKER(DPCDState, DPCD,
- TYPE_DPCD)
+OBJECT_DECLARE_SIMPLE_TYPE(DPCDState, DPCD)
/* DCPD Revision. */
#define DPCD_REVISION 0x00
uint8_t edid_blob[128];
};
-typedef struct I2CDDCState I2CDDCState;
#define TYPE_I2CDDC "i2c-ddc"
-DECLARE_INSTANCE_CHECKER(I2CDDCState, I2CDDC,
- TYPE_I2CDDC)
+OBJECT_DECLARE_SIMPLE_TYPE(I2CDDCState, I2CDDC)
#endif /* I2C_DDC_H */
} MacfbState;
#define TYPE_MACFB "sysbus-macfb"
-typedef struct MacfbSysBusState MacfbSysBusState;
-DECLARE_INSTANCE_CHECKER(MacfbSysBusState, MACFB,
- TYPE_MACFB)
+OBJECT_DECLARE_SIMPLE_TYPE(MacfbSysBusState, MACFB)
struct MacfbSysBusState {
SysBusDevice busdev;
DPCDState *dpcd;
I2CDDCState *edid;
};
-typedef struct XlnxDPState XlnxDPState;
#define TYPE_XLNX_DP "xlnx.v-dp"
-DECLARE_INSTANCE_CHECKER(XlnxDPState, XLNX_DP,
- TYPE_XLNX_DP)
+OBJECT_DECLARE_SIMPLE_TYPE(XlnxDPState, XLNX_DP)
#endif
} BCM2835DMAChan;
#define TYPE_BCM2835_DMA "bcm2835-dma"
-typedef struct BCM2835DMAState BCM2835DMAState;
-DECLARE_INSTANCE_CHECKER(BCM2835DMAState, BCM2835_DMA,
- TYPE_BCM2835_DMA)
+OBJECT_DECLARE_SIMPLE_TYPE(BCM2835DMAState, BCM2835_DMA)
#define BCM2835_DMA_NCHANS 16
#include "qom/object.h"
#define TYPE_I8257 "i8257"
-typedef struct I8257State I8257State;
-DECLARE_INSTANCE_CHECKER(I8257State, I8257,
- TYPE_I8257)
+OBJECT_DECLARE_SIMPLE_TYPE(I8257State, I8257)
typedef struct I8257Regs {
int now[2];
#define TYPE_PL080 "pl080"
#define TYPE_PL081 "pl081"
-typedef struct PL080State PL080State;
-DECLARE_INSTANCE_CHECKER(PL080State, PL080,
- TYPE_PL080)
+OBJECT_DECLARE_SIMPLE_TYPE(PL080State, PL080)
struct PL080State {
SysBusDevice parent_obj;
to model write only mode. */
uint8_t buf[2048];
};
-typedef struct XlnxZDMA XlnxZDMA;
#define TYPE_XLNX_ZDMA "xlnx.zdma"
-DECLARE_INSTANCE_CHECKER(XlnxZDMA, XLNX_ZDMA,
- TYPE_XLNX_ZDMA)
+OBJECT_DECLARE_SIMPLE_TYPE(XlnxZDMA, XLNX_ZDMA)
#endif /* XLNX_ZDMA_H */
#define TYPE_XLNX_ZYNQ_DEVCFG "xlnx.ps7-dev-cfg"
-typedef struct XlnxZynqDevcfg XlnxZynqDevcfg;
-DECLARE_INSTANCE_CHECKER(XlnxZynqDevcfg, XLNX_ZYNQ_DEVCFG,
- TYPE_XLNX_ZYNQ_DEVCFG)
+OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqDevcfg, XLNX_ZYNQ_DEVCFG)
#define XLNX_ZYNQ_DEVCFG_R_MAX (0x100 / 4)
qemu_irq irq;
};
-typedef struct XlnxDPDMAState XlnxDPDMAState;
#define TYPE_XLNX_DPDMA "xlnx.dpdma"
-DECLARE_INSTANCE_CHECKER(XlnxDPDMAState, XLNX_DPDMA,
- TYPE_XLNX_DPDMA)
+OBJECT_DECLARE_SIMPLE_TYPE(XlnxDPDMAState, XLNX_DPDMA)
/*
* xlnx_dpdma_start_operation: Start the operation on the specified channel. The
uint8_t sd_fsel;
qemu_irq out[54];
};
-typedef struct BCM2835GpioState BCM2835GpioState;
#define TYPE_BCM2835_GPIO "bcm2835_gpio"
-DECLARE_INSTANCE_CHECKER(BCM2835GpioState, BCM2835_GPIO,
- TYPE_BCM2835_GPIO)
+OBJECT_DECLARE_SIMPLE_TYPE(BCM2835GpioState, BCM2835_GPIO)
#endif
#include "qom/object.h"
#define TYPE_IMX_GPIO "imx.gpio"
-typedef struct IMXGPIOState IMXGPIOState;
-DECLARE_INSTANCE_CHECKER(IMXGPIOState, IMX_GPIO,
- TYPE_IMX_GPIO)
+OBJECT_DECLARE_SIMPLE_TYPE(IMXGPIOState, IMX_GPIO)
#define IMX_GPIO_MEM_SIZE 0x20
#include "hw/sysbus.h"
#include "qom/object.h"
#define TYPE_NRF51_GPIO "nrf51_soc.gpio"
-typedef struct NRF51GPIOState NRF51GPIOState;
-DECLARE_INSTANCE_CHECKER(NRF51GPIOState, NRF51_GPIO,
- TYPE_NRF51_GPIO)
+OBJECT_DECLARE_SIMPLE_TYPE(NRF51GPIOState, NRF51_GPIO)
#define NRF51_GPIO_PINS 32
VMBus *bus;
};
-typedef struct VMBusBridge VMBusBridge;
-DECLARE_INSTANCE_CHECKER(VMBusBridge, VMBUS_BRIDGE,
- TYPE_VMBUS_BRIDGE)
+OBJECT_DECLARE_SIMPLE_TYPE(VMBusBridge, VMBUS_BRIDGE)
static inline VMBusBridge *vmbus_bridge_find(void)
{
VMBUS_DEVICE)
#define TYPE_VMBUS "vmbus"
-typedef struct VMBus VMBus;
-DECLARE_INSTANCE_CHECKER(VMBus, VMBUS,
- TYPE_VMBUS)
+OBJECT_DECLARE_SIMPLE_TYPE(VMBus, VMBUS)
/*
* Object wrapping a GPADL -- GPA Descriptor List -- an array of guest physical
};
#define TYPE_I2C_BUS "i2c-bus"
-DECLARE_INSTANCE_CHECKER(I2CBus, I2C_BUS,
- TYPE_I2C_BUS)
+OBJECT_DECLARE_SIMPLE_TYPE(I2CBus, I2C_BUS)
typedef struct I2CNode I2CNode;
#include "qom/object.h"
#define TYPE_IMX_I2C "imx.i2c"
-typedef struct IMXI2CState IMXI2CState;
-DECLARE_INSTANCE_CHECKER(IMXI2CState, IMX_I2C,
- TYPE_IMX_I2C)
+OBJECT_DECLARE_SIMPLE_TYPE(IMXI2CState, IMX_I2C)
#define IMX_I2C_MEM_SIZE 0x14
#define NRF51_TWI_REG_ADDRESS 0x588
#define TYPE_MICROBIT_I2C "microbit.i2c"
-typedef struct MicrobitI2CState MicrobitI2CState;
-DECLARE_INSTANCE_CHECKER(MicrobitI2CState, MICROBIT_I2C,
- TYPE_MICROBIT_I2C)
+OBJECT_DECLARE_SIMPLE_TYPE(MicrobitI2CState, MICROBIT_I2C)
#define MICROBIT_I2C_NREGS (NRF51_PERIPHERAL_SIZE / sizeof(uint32_t))
#include "qom/object.h"
#define TYPE_PPC4xx_I2C "ppc4xx-i2c"
-typedef struct PPC4xxI2CState PPC4xxI2CState;
-DECLARE_INSTANCE_CHECKER(PPC4xxI2CState, PPC4xx_I2C,
- TYPE_PPC4xx_I2C)
+OBJECT_DECLARE_SIMPLE_TYPE(PPC4xxI2CState, PPC4xx_I2C)
struct PPC4xxI2CState {
/*< private >*/
#define ICH9_CC_SIZE (16 * 1024) /* 16KB. Chipset configuration registers */
#define TYPE_ICH9_LPC_DEVICE "ICH9-LPC"
-typedef struct ICH9LPCState ICH9LPCState;
-DECLARE_INSTANCE_CHECKER(ICH9LPCState, ICH9_LPC_DEVICE,
- TYPE_ICH9_LPC_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(ICH9LPCState, ICH9_LPC_DEVICE)
struct ICH9LPCState {
/* ICH9 LPC PCI to ISA bridge */
#include "qom/object.h"
#define TYPE_INTEL_IOMMU_DEVICE "intel-iommu"
-typedef struct IntelIOMMUState IntelIOMMUState;
-DECLARE_INSTANCE_CHECKER(IntelIOMMUState, INTEL_IOMMU_DEVICE,
- TYPE_INTEL_IOMMU_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(IntelIOMMUState, INTEL_IOMMU_DEVICE)
#define TYPE_INTEL_IOMMU_MEMORY_REGION "intel-iommu-iommu-memory-region"
AddressSpace *as;
} AHCIState;
-typedef struct AHCIPCIState AHCIPCIState;
#define TYPE_ICH9_AHCI "ich9-ahci"
-DECLARE_INSTANCE_CHECKER(AHCIPCIState, ICH9_AHCI,
- TYPE_ICH9_AHCI)
+OBJECT_DECLARE_SIMPLE_TYPE(AHCIPCIState, ICH9_AHCI)
int32_t ahci_get_num_ports(PCIDevice *dev);
void ahci_ide_create_devs(PCIDevice *dev, DriveInfo **hd);
#define TYPE_SYSBUS_AHCI "sysbus-ahci"
-typedef struct SysbusAHCIState SysbusAHCIState;
-DECLARE_INSTANCE_CHECKER(SysbusAHCIState, SYSBUS_AHCI,
- TYPE_SYSBUS_AHCI)
+OBJECT_DECLARE_SIMPLE_TYPE(SysbusAHCIState, SYSBUS_AHCI)
struct SysbusAHCIState {
/*< private >*/
};
#define TYPE_ALLWINNER_AHCI "allwinner-ahci"
-typedef struct AllwinnerAHCIState AllwinnerAHCIState;
-DECLARE_INSTANCE_CHECKER(AllwinnerAHCIState, ALLWINNER_AHCI,
- TYPE_ALLWINNER_AHCI)
+OBJECT_DECLARE_SIMPLE_TYPE(AllwinnerAHCIState, ALLWINNER_AHCI)
#define ALLWINNER_AHCI_MMIO_OFF 0x80
#define ALLWINNER_AHCI_MMIO_SIZE 0x80
#define USE_DMA_CDROM
#include "qom/object.h"
-typedef struct IDEBus IDEBus;
typedef struct IDEDevice IDEDevice;
typedef struct IDEState IDEState;
typedef struct IDEDMA IDEDMA;
typedef struct IDEDMAOps IDEDMAOps;
#define TYPE_IDE_BUS "IDE"
-DECLARE_INSTANCE_CHECKER(IDEBus, IDE_BUS,
- TYPE_IDE_BUS)
+OBJECT_DECLARE_SIMPLE_TYPE(IDEBus, IDE_BUS)
#define MAX_IDE_DEVS 2
} BMDMAState;
#define TYPE_PCI_IDE "pci-ide"
-typedef struct PCIIDEState PCIIDEState;
-DECLARE_INSTANCE_CHECKER(PCIIDEState, PCI_IDE,
- TYPE_PCI_IDE)
+OBJECT_DECLARE_SIMPLE_TYPE(PCIIDEState, PCI_IDE)
struct PCIIDEState {
/*< private >*/
#define ADB_MAX_OUT_LEN 16
-typedef struct ADBBusState ADBBusState;
typedef struct ADBDevice ADBDevice;
/* buf = NULL means polling */
};
#define TYPE_ADB_BUS "apple-desktop-bus"
-DECLARE_INSTANCE_CHECKER(ADBBusState, ADB_BUS,
- TYPE_ADB_BUS)
+OBJECT_DECLARE_SIMPLE_TYPE(ADBBusState, ADB_BUS)
#define ADB_STATUS_BUSTIMEOUT 0x1
#define ADB_STATUS_POLLREPLY 0x2
#include "qom/object.h"
#define TYPE_I8042 "i8042"
-typedef struct ISAKBDState ISAKBDState;
-DECLARE_INSTANCE_CHECKER(ISAKBDState, I8042,
- TYPE_I8042)
+OBJECT_DECLARE_SIMPLE_TYPE(ISAKBDState, I8042)
#define I8042_A20_LINE "a20"
#include "qom/object.h"
#define TYPE_AW_A10_PIC "allwinner-a10-pic"
-typedef struct AwA10PICState AwA10PICState;
-DECLARE_INSTANCE_CHECKER(AwA10PICState, AW_A10_PIC,
- TYPE_AW_A10_PIC)
+OBJECT_DECLARE_SIMPLE_TYPE(AwA10PICState, AW_A10_PIC)
#define AW_A10_PIC_VECTOR 0
#define AW_A10_PIC_BASE_ADDR 4
#include "qom/object.h"
#define TYPE_ASPEED_VIC "aspeed.vic"
-typedef struct AspeedVICState AspeedVICState;
-DECLARE_INSTANCE_CHECKER(AspeedVICState, ASPEED_VIC,
- TYPE_ASPEED_VIC)
+OBJECT_DECLARE_SIMPLE_TYPE(AspeedVICState, ASPEED_VIC)
#define ASPEED_VIC_NR_IRQS 51
#include "qom/object.h"
#define TYPE_BCM2835_IC "bcm2835-ic"
-typedef struct BCM2835ICState BCM2835ICState;
-DECLARE_INSTANCE_CHECKER(BCM2835ICState, BCM2835_IC,
- TYPE_BCM2835_IC)
+OBJECT_DECLARE_SIMPLE_TYPE(BCM2835ICState, BCM2835_IC)
#define BCM2835_IC_GPU_IRQ "gpu-irq"
#define BCM2835_IC_ARM_IRQ "arm-irq"
#define BCM2836_MBPERCORE 4
#define TYPE_BCM2836_CONTROL "bcm2836-control"
-typedef struct BCM2836ControlState BCM2836ControlState;
-DECLARE_INSTANCE_CHECKER(BCM2836ControlState, BCM2836_CONTROL,
- TYPE_BCM2836_CONTROL)
+OBJECT_DECLARE_SIMPLE_TYPE(BCM2836ControlState, BCM2836_CONTROL)
struct BCM2836ControlState {
/*< private >*/
#include "qom/object.h"
#define TYPE_HEATHROW "heathrow"
-typedef struct HeathrowState HeathrowState;
-DECLARE_INSTANCE_CHECKER(HeathrowState, HEATHROW,
- TYPE_HEATHROW)
+OBJECT_DECLARE_SIMPLE_TYPE(HeathrowState, HEATHROW)
typedef struct HeathrowPICState {
uint32_t events;
#include "qom/object.h"
#define TYPE_IBEX_PLIC "ibex-plic"
-typedef struct IbexPlicState IbexPlicState;
-DECLARE_INSTANCE_CHECKER(IbexPlicState, IBEX_PLIC,
- TYPE_IBEX_PLIC)
+OBJECT_DECLARE_SIMPLE_TYPE(IbexPlicState, IBEX_PLIC)
struct IbexPlicState {
/*< private >*/
#include "qom/object.h"
#define TYPE_IMX_AVIC "imx.avic"
-typedef struct IMXAVICState IMXAVICState;
-DECLARE_INSTANCE_CHECKER(IMXAVICState, IMX_AVIC,
- TYPE_IMX_AVIC)
+OBJECT_DECLARE_SIMPLE_TYPE(IMXAVICState, IMX_AVIC)
#define IMX_AVIC_NUM_IRQS 64
MemoryRegion iomem;
uint32_t regs[GPC_NUM];
};
-typedef struct IMXGPCv2State IMXGPCv2State;
#define TYPE_IMX_GPCV2 "imx-gpcv2"
-DECLARE_INSTANCE_CHECKER(IMXGPCv2State, IMX_GPCV2,
- TYPE_IMX_GPCV2)
+OBJECT_DECLARE_SIMPLE_TYPE(IMXGPCv2State, IMX_GPCV2)
#endif /* IMX_GPCV2_H */
#define GIC_LOCAL_INT_WD 0 /* GIC watchdog */
#define TYPE_MIPS_GIC "mips-gic"
-typedef struct MIPSGICState MIPSGICState;
-DECLARE_INSTANCE_CHECKER(MIPSGICState, MIPS_GIC,
- TYPE_MIPS_GIC)
+OBJECT_DECLARE_SIMPLE_TYPE(MIPSGICState, MIPS_GIC)
/* Support up to 32 VPs and 256 IRQs */
#define GIC_MAX_VPS 32
#include "qom/object.h"
#define TYPE_REALVIEW_GIC "realview_gic"
-typedef struct RealViewGICState RealViewGICState;
-DECLARE_INSTANCE_CHECKER(RealViewGICState, REALVIEW_GIC,
- TYPE_REALVIEW_GIC)
+OBJECT_DECLARE_SIMPLE_TYPE(RealViewGICState, REALVIEW_GIC)
struct RealViewGICState {
SysBusDevice parent_obj;
qemu_irq _fir;
qemu_irq _swi;
};
-typedef struct RXICUState RXICUState;
#define TYPE_RX_ICU "rx-icu"
-DECLARE_INSTANCE_CHECKER(RXICUState, RX_ICU,
- TYPE_RX_ICU)
+OBJECT_DECLARE_SIMPLE_TYPE(RXICUState, RX_ICU)
#endif /* RX_ICU_H */
#define TYPE_XLNX_PMU_IO_INTC "xlnx.pmu_io_intc"
-typedef struct XlnxPMUIOIntc XlnxPMUIOIntc;
-DECLARE_INSTANCE_CHECKER(XlnxPMUIOIntc, XLNX_PMU_IO_INTC,
- TYPE_XLNX_PMU_IO_INTC)
+OBJECT_DECLARE_SIMPLE_TYPE(XlnxPMUIOIntc, XLNX_PMU_IO_INTC)
/* This is R_PIT3_CONTROL + 1 */
#define XLNXPMUIOINTC_R_MAX (0x78 + 1)
#define TYPE_XLNX_ZYNQMP_IPI "xlnx.zynqmp_ipi"
-typedef struct XlnxZynqMPIPI XlnxZynqMPIPI;
-DECLARE_INSTANCE_CHECKER(XlnxZynqMPIPI, XLNX_ZYNQMP_IPI,
- TYPE_XLNX_ZYNQMP_IPI)
+OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPIPI, XLNX_ZYNQMP_IPI)
/* This is R_IPI_IDR + 1 */
#define R_XLNX_ZYNQMP_IPI_MAX ((0x1c / 4) + 1)
#include "hw/qdev-core.h"
#include "qom/object.h"
-typedef struct IPackBus IPackBus;
#define TYPE_IPACK_BUS "IndustryPack"
-DECLARE_INSTANCE_CHECKER(IPackBus, IPACK_BUS,
- TYPE_IPACK_BUS)
+OBJECT_DECLARE_SIMPLE_TYPE(IPackBus, IPACK_BUS)
struct IPackBus {
/*< private >*/
void ipmi_bmc_gen_event(IPMIBmc *b, uint8_t *evt, bool log);
#define TYPE_IPMI_BMC_SIMULATOR "ipmi-bmc-sim"
-typedef struct IPMIBmcSim IPMIBmcSim;
-DECLARE_INSTANCE_CHECKER(IPMIBmcSim, IPMI_BMC_SIMULATOR,
- TYPE_IPMI_BMC_SIMULATOR)
+OBJECT_DECLARE_SIMPLE_TYPE(IPMIBmcSim, IPMI_BMC_SIMULATOR)
typedef struct RspBuffer {
OBJECT_DECLARE_TYPE(ISADevice, ISADeviceClass, ISA_DEVICE)
#define TYPE_ISA_BUS "ISA"
-DECLARE_INSTANCE_CHECKER(ISABus, ISA_BUS,
- TYPE_ISA_BUS)
+OBJECT_DECLARE_SIMPLE_TYPE(ISABus, ISA_BUS)
#define TYPE_APPLE_SMC "isa-applesmc"
#define APPLESMC_MAX_DATA_LENGTH 32
#define TYPE_PC87312 "pc87312"
-typedef struct PC87312State PC87312State;
-DECLARE_INSTANCE_CHECKER(PC87312State, PC87312,
- TYPE_PC87312)
+OBJECT_DECLARE_SIMPLE_TYPE(PC87312State, PC87312)
struct PC87312State {
/*< private >*/
#include "qom/object.h"
#define TYPE_MCF_FEC_NET "mcf-fec"
-typedef struct mcf_fec_state mcf_fec_state;
-DECLARE_INSTANCE_CHECKER(mcf_fec_state, MCF_FEC_NET,
- TYPE_MCF_FEC_NET)
+OBJECT_DECLARE_SIMPLE_TYPE(mcf_fec_state, MCF_FEC_NET)
#define FEC_NUM_IRQ 13
#include "qom/object.h"
#define TYPE_MIPS_CPS "mips-cps"
-typedef struct MIPSCPSState MIPSCPSState;
-DECLARE_INSTANCE_CHECKER(MIPSCPSState, MIPS_CPS,
- TYPE_MIPS_CPS)
+OBJECT_DECLARE_SIMPLE_TYPE(MIPSCPSState, MIPS_CPS)
struct MIPSCPSState {
SysBusDevice parent_obj;
uint32_t status;
uint32_t num_cpu;
};
-typedef struct A9SCUState A9SCUState;
#define TYPE_A9_SCU "a9-scu"
-DECLARE_INSTANCE_CHECKER(A9SCUState, A9_SCU,
- TYPE_A9_SCU)
+OBJECT_DECLARE_SIMPLE_TYPE(A9SCUState, A9_SCU)
#endif
*/
#define TYPE_AW_CPUCFG "allwinner-cpucfg"
-typedef struct AwCpuCfgState AwCpuCfgState;
-DECLARE_INSTANCE_CHECKER(AwCpuCfgState, AW_CPUCFG,
- TYPE_AW_CPUCFG)
+OBJECT_DECLARE_SIMPLE_TYPE(AwCpuCfgState, AW_CPUCFG)
/** @} */
*/
#define TYPE_AW_H3_CCU "allwinner-h3-ccu"
-typedef struct AwH3ClockCtlState AwH3ClockCtlState;
-DECLARE_INSTANCE_CHECKER(AwH3ClockCtlState, AW_H3_CCU,
- TYPE_AW_H3_CCU)
+OBJECT_DECLARE_SIMPLE_TYPE(AwH3ClockCtlState, AW_H3_CCU)
/** @} */
*/
#define TYPE_AW_H3_DRAMC "allwinner-h3-dramc"
-typedef struct AwH3DramCtlState AwH3DramCtlState;
-DECLARE_INSTANCE_CHECKER(AwH3DramCtlState, AW_H3_DRAMC,
- TYPE_AW_H3_DRAMC)
+OBJECT_DECLARE_SIMPLE_TYPE(AwH3DramCtlState, AW_H3_DRAMC)
/** @} */
*/
#define TYPE_AW_H3_SYSCTRL "allwinner-h3-sysctrl"
-typedef struct AwH3SysCtrlState AwH3SysCtrlState;
-DECLARE_INSTANCE_CHECKER(AwH3SysCtrlState, AW_H3_SYSCTRL,
- TYPE_AW_H3_SYSCTRL)
+OBJECT_DECLARE_SIMPLE_TYPE(AwH3SysCtrlState, AW_H3_SYSCTRL)
/** @} */
*/
#define TYPE_AW_SID "allwinner-sid"
-typedef struct AwSidState AwSidState;
-DECLARE_INSTANCE_CHECKER(AwSidState, AW_SID,
- TYPE_AW_SID)
+OBJECT_DECLARE_SIMPLE_TYPE(AwSidState, AW_SID)
/** @} */
#include "qom/object.h"
#define TYPE_ARM11_SCU "arm11-scu"
-typedef struct ARM11SCUState ARM11SCUState;
-DECLARE_INSTANCE_CHECKER(ARM11SCUState, ARM11_SCU,
- TYPE_ARM11_SCU)
+OBJECT_DECLARE_SIMPLE_TYPE(ARM11SCUState, ARM11_SCU)
struct ARM11SCUState {
/*< private >*/
#include "qom/object.h"
#define TYPE_ARMSSE_CPUID "armsse-cpuid"
-typedef struct ARMSSECPUID ARMSSECPUID;
-DECLARE_INSTANCE_CHECKER(ARMSSECPUID, ARMSSE_CPUID,
- TYPE_ARMSSE_CPUID)
+OBJECT_DECLARE_SIMPLE_TYPE(ARMSSECPUID, ARMSSE_CPUID)
struct ARMSSECPUID {
/*< private >*/
#include "qom/object.h"
#define TYPE_ARMSSE_MHU "armsse-mhu"
-typedef struct ARMSSEMHU ARMSSEMHU;
-DECLARE_INSTANCE_CHECKER(ARMSSEMHU, ARMSSE_MHU,
- TYPE_ARMSSE_MHU)
+OBJECT_DECLARE_SIMPLE_TYPE(ARMSSEMHU, ARMSSE_MHU)
struct ARMSSEMHU {
/*< private >*/
#include "qom/object.h"
#define TYPE_ASPEED_XDMA "aspeed.xdma"
-typedef struct AspeedXDMAState AspeedXDMAState;
-DECLARE_INSTANCE_CHECKER(AspeedXDMAState, ASPEED_XDMA,
- TYPE_ASPEED_XDMA)
+OBJECT_DECLARE_SIMPLE_TYPE(AspeedXDMAState, ASPEED_XDMA)
#define ASPEED_XDMA_NUM_REGS (ASPEED_XDMA_REG_SIZE / sizeof(uint32_t))
#define ASPEED_XDMA_REG_SIZE 0x7C
#include "hw/qdev-core.h"
#include "qom/object.h"
-typedef struct AUXBus AUXBus;
typedef struct AUXSlave AUXSlave;
typedef enum AUXCommand AUXCommand;
typedef enum AUXReply AUXReply;
#define TYPE_AUXTOI2C "aux-to-i2c-bridge"
-typedef struct AUXTOI2CState AUXTOI2CState;
-DECLARE_INSTANCE_CHECKER(AUXTOI2CState, AUXTOI2C,
- TYPE_AUXTOI2C)
+OBJECT_DECLARE_SIMPLE_TYPE(AUXTOI2CState, AUXTOI2C)
enum AUXCommand {
WRITE_I2C = 0,
};
#define TYPE_AUX_BUS "aux-bus"
-DECLARE_INSTANCE_CHECKER(AUXBus, AUX_BUS,
- TYPE_AUX_BUS)
+OBJECT_DECLARE_SIMPLE_TYPE(AUXBus, AUX_BUS)
struct AUXBus {
/* < private > */
};
#define TYPE_AUX_SLAVE "aux-slave"
-DECLARE_INSTANCE_CHECKER(AUXSlave, AUX_SLAVE,
- TYPE_AUX_SLAVE)
+OBJECT_DECLARE_SIMPLE_TYPE(AUXSlave, AUX_SLAVE)
struct AUXSlave {
/* < private > */
#define TYPE_AVR_MASK "avr-power"
-typedef struct AVRMaskState AVRMaskState;
-DECLARE_INSTANCE_CHECKER(AVRMaskState, AVR_MASK,
- TYPE_AVR_MASK)
+OBJECT_DECLARE_SIMPLE_TYPE(AVRMaskState, AVR_MASK)
struct AVRMaskState {
/* <private> */
#include "qom/object.h"
#define TYPE_BCM2835_MBOX "bcm2835-mbox"
-typedef struct BCM2835MboxState BCM2835MboxState;
-DECLARE_INSTANCE_CHECKER(BCM2835MboxState, BCM2835_MBOX,
- TYPE_BCM2835_MBOX)
+OBJECT_DECLARE_SIMPLE_TYPE(BCM2835MboxState, BCM2835_MBOX)
typedef struct {
uint32_t reg[MBOX_SIZE];
#define TYPE_BCM2835_MPHI "bcm2835-mphi"
-DECLARE_INSTANCE_CHECKER(BCM2835MphiState, BCM2835_MPHI,
- TYPE_BCM2835_MPHI)
+OBJECT_DECLARE_SIMPLE_TYPE(BCM2835MphiState, BCM2835_MPHI)
#endif
#include "qom/object.h"
#define TYPE_BCM2835_PROPERTY "bcm2835-property"
-typedef struct BCM2835PropertyState BCM2835PropertyState;
-DECLARE_INSTANCE_CHECKER(BCM2835PropertyState, BCM2835_PROPERTY,
- TYPE_BCM2835_PROPERTY)
+OBJECT_DECLARE_SIMPLE_TYPE(BCM2835PropertyState, BCM2835_PROPERTY)
struct BCM2835PropertyState {
/*< private >*/
#include "qom/object.h"
#define TYPE_BCM2835_RNG "bcm2835-rng"
-typedef struct BCM2835RngState BCM2835RngState;
-DECLARE_INSTANCE_CHECKER(BCM2835RngState, BCM2835_RNG,
- TYPE_BCM2835_RNG)
+OBJECT_DECLARE_SIMPLE_TYPE(BCM2835RngState, BCM2835_RNG)
struct BCM2835RngState {
SysBusDevice busdev;
#define TYPE_BCM2835_THERMAL "bcm2835-thermal"
-typedef struct Bcm2835ThermalState Bcm2835ThermalState;
-DECLARE_INSTANCE_CHECKER(Bcm2835ThermalState, BCM2835_THERMAL,
- TYPE_BCM2835_THERMAL)
+OBJECT_DECLARE_SIMPLE_TYPE(Bcm2835ThermalState, BCM2835_THERMAL)
struct Bcm2835ThermalState {
/*< private >*/
#include "qom/object.h"
#define TYPE_GRLIB_AHB_PNP "grlib,ahbpnp"
-typedef struct AHBPnp AHBPnp;
-DECLARE_INSTANCE_CHECKER(AHBPnp, GRLIB_AHB_PNP,
- TYPE_GRLIB_AHB_PNP)
+OBJECT_DECLARE_SIMPLE_TYPE(AHBPnp, GRLIB_AHB_PNP)
#define TYPE_GRLIB_APB_PNP "grlib,apbpnp"
-typedef struct APBPnp APBPnp;
-DECLARE_INSTANCE_CHECKER(APBPnp, GRLIB_APB_PNP,
- TYPE_GRLIB_APB_PNP)
+OBJECT_DECLARE_SIMPLE_TYPE(APBPnp, GRLIB_APB_PNP)
void grlib_ahb_pnp_add_entry(AHBPnp *dev, uint32_t address, uint32_t mask,
uint8_t vendor, uint16_t device, int slave,
CCTL_##name##_SHIFT)
#define TYPE_IMX25_CCM "imx25.ccm"
-typedef struct IMX25CCMState IMX25CCMState;
-DECLARE_INSTANCE_CHECKER(IMX25CCMState, IMX25_CCM,
- TYPE_IMX25_CCM)
+OBJECT_DECLARE_SIMPLE_TYPE(IMX25CCMState, IMX25_CCM)
struct IMX25CCMState {
/* <private> */
PDR0_##name##_PODF_SHIFT)
#define TYPE_IMX31_CCM "imx31.ccm"
-typedef struct IMX31CCMState IMX31CCMState;
-DECLARE_INSTANCE_CHECKER(IMX31CCMState, IMX31_CCM,
- TYPE_IMX31_CCM)
+OBJECT_DECLARE_SIMPLE_TYPE(IMX31CCMState, IMX31_CCM)
struct IMX31CCMState {
/* <private> */
#define EXTRACT(value, name) extract32(value, name##_SHIFT, name##_LENGTH)
#define TYPE_IMX6_CCM "imx6.ccm"
-typedef struct IMX6CCMState IMX6CCMState;
-DECLARE_INSTANCE_CHECKER(IMX6CCMState, IMX6_CCM,
- TYPE_IMX6_CCM)
+OBJECT_DECLARE_SIMPLE_TYPE(IMX6CCMState, IMX6_CCM)
struct IMX6CCMState {
/* <private> */
#define EXTRACT(value, name) extract32(value, name##_SHIFT, name##_LENGTH)
#define TYPE_IMX6_SRC "imx6.src"
-typedef struct IMX6SRCState IMX6SRCState;
-DECLARE_INSTANCE_CHECKER(IMX6SRCState, IMX6_SRC,
- TYPE_IMX6_SRC)
+OBJECT_DECLARE_SIMPLE_TYPE(IMX6SRCState, IMX6_SRC)
struct IMX6SRCState {
/* <private> */
#define CCM_ANALOG_PLL_LOCK (1 << 31);
#define TYPE_IMX6UL_CCM "imx6ul.ccm"
-typedef struct IMX6ULCCMState IMX6ULCCMState;
-DECLARE_INSTANCE_CHECKER(IMX6ULCCMState, IMX6UL_CCM,
- TYPE_IMX6UL_CCM)
+OBJECT_DECLARE_SIMPLE_TYPE(IMX6ULCCMState, IMX6UL_CCM)
struct IMX6ULCCMState {
/* <private> */
};
#define TYPE_IMX7_CCM "imx7.ccm"
-typedef struct IMX7CCMState IMX7CCMState;
-DECLARE_INSTANCE_CHECKER(IMX7CCMState, IMX7_CCM,
- TYPE_IMX7_CCM)
+OBJECT_DECLARE_SIMPLE_TYPE(IMX7CCMState, IMX7_CCM)
struct IMX7CCMState {
/* <private> */
#define TYPE_IMX7_ANALOG "imx7.analog"
-typedef struct IMX7AnalogState IMX7AnalogState;
-DECLARE_INSTANCE_CHECKER(IMX7AnalogState, IMX7_ANALOG,
- TYPE_IMX7_ANALOG)
+OBJECT_DECLARE_SIMPLE_TYPE(IMX7AnalogState, IMX7_ANALOG)
struct IMX7AnalogState {
/* <private> */
#include "qom/object.h"
#define TYPE_IMX7_GPR "imx7.gpr"
-typedef struct IMX7GPRState IMX7GPRState;
-DECLARE_INSTANCE_CHECKER(IMX7GPRState, IMX7_GPR,
- TYPE_IMX7_GPR)
+OBJECT_DECLARE_SIMPLE_TYPE(IMX7GPRState, IMX7_GPR)
struct IMX7GPRState {
/* <private> */
};
#define TYPE_IMX7_SNVS "imx7.snvs"
-typedef struct IMX7SNVSState IMX7SNVSState;
-DECLARE_INSTANCE_CHECKER(IMX7SNVSState, IMX7_SNVS,
- TYPE_IMX7_SNVS)
+OBJECT_DECLARE_SIMPLE_TYPE(IMX7SNVSState, IMX7_SNVS)
struct IMX7SNVSState {
/* <private> */
#include "qom/object.h"
#define TYPE_IMX_RNGC "imx.rngc"
-typedef struct IMXRNGCState IMXRNGCState;
-DECLARE_INSTANCE_CHECKER(IMXRNGCState, IMX_RNGC,
- TYPE_IMX_RNGC)
+OBJECT_DECLARE_SIMPLE_TYPE(IMXRNGCState, IMX_RNGC)
struct IMXRNGCState {
/*< private >*/
#include "qom/object.h"
#define TYPE_IOTKIT_SECCTL "iotkit-secctl"
-typedef struct IoTKitSecCtl IoTKitSecCtl;
-DECLARE_INSTANCE_CHECKER(IoTKitSecCtl, IOTKIT_SECCTL,
- TYPE_IOTKIT_SECCTL)
+OBJECT_DECLARE_SIMPLE_TYPE(IoTKitSecCtl, IOTKIT_SECCTL)
#define IOTS_APB_PPC0_NUM_PORTS 3
#define IOTS_APB_PPC1_NUM_PORTS 1
#include "qom/object.h"
#define TYPE_IOTKIT_SYSCTL "iotkit-sysctl"
-typedef struct IoTKitSysCtl IoTKitSysCtl;
-DECLARE_INSTANCE_CHECKER(IoTKitSysCtl, IOTKIT_SYSCTL,
- TYPE_IOTKIT_SYSCTL)
+OBJECT_DECLARE_SIMPLE_TYPE(IoTKitSysCtl, IOTKIT_SYSCTL)
struct IoTKitSysCtl {
/*< private >*/
#include "qom/object.h"
#define TYPE_IOTKIT_SYSINFO "iotkit-sysinfo"
-typedef struct IoTKitSysInfo IoTKitSysInfo;
-DECLARE_INSTANCE_CHECKER(IoTKitSysInfo, IOTKIT_SYSINFO,
- TYPE_IOTKIT_SYSINFO)
+OBJECT_DECLARE_SIMPLE_TYPE(IoTKitSysInfo, IOTKIT_SYSINFO)
struct IoTKitSysInfo {
/*< private >*/
#define TYPE_MOS6522_Q800_VIA1 "mos6522-q800-via1"
-typedef struct MOS6522Q800VIA1State MOS6522Q800VIA1State;
-DECLARE_INSTANCE_CHECKER(MOS6522Q800VIA1State, MOS6522_Q800_VIA1,
- TYPE_MOS6522_Q800_VIA1)
+OBJECT_DECLARE_SIMPLE_TYPE(MOS6522Q800VIA1State, MOS6522_Q800_VIA1)
struct MOS6522Q800VIA1State {
/*< private >*/
#define VIA2_IRQ_ASC (1 << VIA2_IRQ_ASC_BIT)
#define TYPE_MOS6522_Q800_VIA2 "mos6522-q800-via2"
-typedef struct MOS6522Q800VIA2State MOS6522Q800VIA2State;
-DECLARE_INSTANCE_CHECKER(MOS6522Q800VIA2State, MOS6522_Q800_VIA2,
- TYPE_MOS6522_Q800_VIA2)
+OBJECT_DECLARE_SIMPLE_TYPE(MOS6522Q800VIA2State, MOS6522_Q800_VIA2)
struct MOS6522Q800VIA2State {
/*< private >*/
#define TYPE_MAC_VIA "mac_via"
-typedef struct MacVIAState MacVIAState;
-DECLARE_INSTANCE_CHECKER(MacVIAState, MAC_VIA,
- TYPE_MAC_VIA)
+OBJECT_DECLARE_SIMPLE_TYPE(MacVIAState, MAC_VIA)
struct MacVIAState {
SysBusDevice busdev;
/*< private >*/
MOS6522State parent_obj;
};
-typedef struct MOS6522CUDAState MOS6522CUDAState;
#define TYPE_MOS6522_CUDA "mos6522-cuda"
-DECLARE_INSTANCE_CHECKER(MOS6522CUDAState, MOS6522_CUDA,
- TYPE_MOS6522_CUDA)
+OBJECT_DECLARE_SIMPLE_TYPE(MOS6522CUDAState, MOS6522_CUDA)
/* Cuda */
#define TYPE_CUDA "cuda"
-typedef struct CUDAState CUDAState;
-DECLARE_INSTANCE_CHECKER(CUDAState, CUDA,
- TYPE_CUDA)
+OBJECT_DECLARE_SIMPLE_TYPE(CUDAState, CUDA)
struct CUDAState {
/*< private >*/
#include "qom/object.h"
#define TYPE_MACIO_GPIO "macio-gpio"
-typedef struct MacIOGPIOState MacIOGPIOState;
-DECLARE_INSTANCE_CHECKER(MacIOGPIOState, MACIO_GPIO,
- TYPE_MACIO_GPIO)
+OBJECT_DECLARE_SIMPLE_TYPE(MacIOGPIOState, MACIO_GPIO)
struct MacIOGPIOState {
/*< private >*/
/* MacIO virtual bus */
#define TYPE_MACIO_BUS "macio-bus"
-typedef struct MacIOBusState MacIOBusState;
-DECLARE_INSTANCE_CHECKER(MacIOBusState, MACIO_BUS,
- TYPE_MACIO_BUS)
+OBJECT_DECLARE_SIMPLE_TYPE(MacIOBusState, MACIO_BUS)
struct MacIOBusState {
/*< private >*/
/* MacIO IDE */
#define TYPE_MACIO_IDE "macio-ide"
-typedef struct MACIOIDEState MACIOIDEState;
-DECLARE_INSTANCE_CHECKER(MACIOIDEState, MACIO_IDE,
- TYPE_MACIO_IDE)
+OBJECT_DECLARE_SIMPLE_TYPE(MACIOIDEState, MACIO_IDE)
struct MACIOIDEState {
/*< private >*/
void macio_ide_register_dma(MACIOIDEState *ide);
#define TYPE_MACIO "macio"
-typedef struct MacIOState MacIOState;
-DECLARE_INSTANCE_CHECKER(MacIOState, MACIO,
- TYPE_MACIO)
+OBJECT_DECLARE_SIMPLE_TYPE(MacIOState, MACIO)
struct MacIOState {
/*< private >*/
};
#define TYPE_OLDWORLD_MACIO "macio-oldworld"
-typedef struct OldWorldMacIOState OldWorldMacIOState;
-DECLARE_INSTANCE_CHECKER(OldWorldMacIOState, OLDWORLD_MACIO,
- TYPE_OLDWORLD_MACIO)
+OBJECT_DECLARE_SIMPLE_TYPE(OldWorldMacIOState, OLDWORLD_MACIO)
struct OldWorldMacIOState {
/*< private >*/
};
#define TYPE_NEWWORLD_MACIO "macio-newworld"
-typedef struct NewWorldMacIOState NewWorldMacIOState;
-DECLARE_INSTANCE_CHECKER(NewWorldMacIOState, NEWWORLD_MACIO,
- TYPE_NEWWORLD_MACIO)
+OBJECT_DECLARE_SIMPLE_TYPE(NewWorldMacIOState, NEWWORLD_MACIO)
struct NewWorldMacIOState {
/*< private >*/
/*< private >*/
MOS6522State parent_obj;
};
-typedef struct MOS6522PMUState MOS6522PMUState;
#define TYPE_MOS6522_PMU "mos6522-pmu"
-DECLARE_INSTANCE_CHECKER(MOS6522PMUState, MOS6522_PMU,
- TYPE_MOS6522_PMU)
+OBJECT_DECLARE_SIMPLE_TYPE(MOS6522PMUState, MOS6522_PMU)
/**
* PMUState:
* @last_b: last value of B register
/* GPIO */
MacIOGPIOState *gpio;
};
-typedef struct PMUState PMUState;
#define TYPE_VIA_PMU "via-pmu"
-DECLARE_INSTANCE_CHECKER(PMUState, VIA_PMU,
- TYPE_VIA_PMU)
+OBJECT_DECLARE_SIMPLE_TYPE(PMUState, VIA_PMU)
#endif /* PMU_H */
uint8_t input[8];
int inputs, com;
};
-typedef struct MAX111xState MAX111xState;
#define TYPE_MAX_111X "max111x"
-DECLARE_INSTANCE_CHECKER(MAX111xState, MAX_111X,
- TYPE_MAX_111X)
+OBJECT_DECLARE_SIMPLE_TYPE(MAX111xState, MAX_111X)
#define TYPE_MAX_1110 "max1110"
#define TYPE_MAX_1111 "max1111"
#include "qom/object.h"
#define TYPE_MIPS_GCR "mips-gcr"
-typedef struct MIPSGCRState MIPSGCRState;
-DECLARE_INSTANCE_CHECKER(MIPSGCRState, MIPS_GCR,
- TYPE_MIPS_GCR)
+OBJECT_DECLARE_SIMPLE_TYPE(MIPSGCRState, MIPS_GCR)
#define GCR_BASE_ADDR 0x1fbf8000ULL
#define GCR_ADDRSPACE_SZ 0x8000
#define CPC_VP_RUNNING_OFS 0x30
#define TYPE_MIPS_CPC "mips-cpc"
-typedef struct MIPSCPCState MIPSCPCState;
-DECLARE_INSTANCE_CHECKER(MIPSCPCState, MIPS_CPC,
- TYPE_MIPS_CPC)
+OBJECT_DECLARE_SIMPLE_TYPE(MIPSCPCState, MIPS_CPC)
struct MIPSCPCState {
SysBusDevice parent_obj;
#include "qom/object.h"
#define TYPE_MIPS_ITU "mips-itu"
-typedef struct MIPSITUState MIPSITUState;
-DECLARE_INSTANCE_CHECKER(MIPSITUState, MIPS_ITU,
- TYPE_MIPS_ITU)
+OBJECT_DECLARE_SIMPLE_TYPE(MIPSITUState, MIPS_ITU)
#define ITC_CELL_DEPTH_SHIFT 2
#define ITC_CELL_DEPTH (1u << ITC_CELL_DEPTH_SHIFT)
#include "qom/object.h"
#define TYPE_MPS2_FPGAIO "mps2-fpgaio"
-typedef struct MPS2FPGAIO MPS2FPGAIO;
-DECLARE_INSTANCE_CHECKER(MPS2FPGAIO, MPS2_FPGAIO,
- TYPE_MPS2_FPGAIO)
+OBJECT_DECLARE_SIMPLE_TYPE(MPS2FPGAIO, MPS2_FPGAIO)
struct MPS2FPGAIO {
/*< private >*/
#include "qom/object.h"
#define TYPE_MPS2_SCC "mps2-scc"
-typedef struct MPS2SCC MPS2SCC;
-DECLARE_INSTANCE_CHECKER(MPS2SCC, MPS2_SCC,
- TYPE_MPS2_SCC)
+OBJECT_DECLARE_SIMPLE_TYPE(MPS2SCC, MPS2_SCC)
#define NUM_OSCCLK 3
#define MSF2_SYSREG_MMIO_SIZE 0x300
#define TYPE_MSF2_SYSREG "msf2-sysreg"
-typedef struct MSF2SysregState MSF2SysregState;
-DECLARE_INSTANCE_CHECKER(MSF2SysregState, MSF2_SYSREG,
- TYPE_MSF2_SYSREG)
+OBJECT_DECLARE_SIMPLE_TYPE(MSF2SysregState, MSF2_SYSREG)
struct MSF2SysregState {
SysBusDevice parent_obj;
#include "qemu/timer.h"
#include "qom/object.h"
#define TYPE_NRF51_RNG "nrf51_soc.rng"
-typedef struct NRF51RNGState NRF51RNGState;
-DECLARE_INSTANCE_CHECKER(NRF51RNGState, NRF51_RNG,
- TYPE_NRF51_RNG)
+OBJECT_DECLARE_SIMPLE_TYPE(NRF51RNGState, NRF51_RNG)
#define NRF51_RNG_SIZE 0x1000
#define SYSCFG_CMPCR 0x20
#define TYPE_STM32F2XX_SYSCFG "stm32f2xx-syscfg"
-typedef struct STM32F2XXSyscfgState STM32F2XXSyscfgState;
-DECLARE_INSTANCE_CHECKER(STM32F2XXSyscfgState, STM32F2XX_SYSCFG,
- TYPE_STM32F2XX_SYSCFG)
+OBJECT_DECLARE_SIMPLE_TYPE(STM32F2XXSyscfgState, STM32F2XX_SYSCFG)
struct STM32F2XXSyscfgState {
/* <private> */
#define EXTI_PR 0x14
#define TYPE_STM32F4XX_EXTI "stm32f4xx-exti"
-typedef struct STM32F4xxExtiState STM32F4xxExtiState;
-DECLARE_INSTANCE_CHECKER(STM32F4xxExtiState, STM32F4XX_EXTI,
- TYPE_STM32F4XX_EXTI)
+OBJECT_DECLARE_SIMPLE_TYPE(STM32F4xxExtiState, STM32F4XX_EXTI)
#define NUM_GPIO_EVENT_IN_LINES 16
#define NUM_INTERRUPT_OUT_LINES 16
#define SYSCFG_CMPCR 0x20
#define TYPE_STM32F4XX_SYSCFG "stm32f4xx-syscfg"
-typedef struct STM32F4xxSyscfgState STM32F4xxSyscfgState;
-DECLARE_INSTANCE_CHECKER(STM32F4xxSyscfgState, STM32F4XX_SYSCFG,
- TYPE_STM32F4XX_SYSCFG)
+OBJECT_DECLARE_SIMPLE_TYPE(STM32F4xxSyscfgState, STM32F4XX_SYSCFG)
#define SYSCFG_NUM_EXTICR 4
#include "qom/object.h"
#define TYPE_TZ_MPC "tz-mpc"
-typedef struct TZMPC TZMPC;
-DECLARE_INSTANCE_CHECKER(TZMPC, TZ_MPC,
- TYPE_TZ_MPC)
+OBJECT_DECLARE_SIMPLE_TYPE(TZMPC, TZ_MPC)
#define TZ_NUM_PORTS 16
#include "qom/object.h"
#define TYPE_TZ_MSC "tz-msc"
-typedef struct TZMSC TZMSC;
-DECLARE_INSTANCE_CHECKER(TZMSC, TZ_MSC,
- TYPE_TZ_MSC)
+OBJECT_DECLARE_SIMPLE_TYPE(TZMSC, TZ_MSC)
struct TZMSC {
/*< private >*/
#include "qom/object.h"
#define TYPE_TZ_PPC "tz-ppc"
-typedef struct TZPPC TZPPC;
-DECLARE_INSTANCE_CHECKER(TZPPC, TZ_PPC,
- TYPE_TZ_PPC)
+OBJECT_DECLARE_SIMPLE_TYPE(TZPPC, TZ_PPC)
#define TZ_NUM_PORTS 16
#define TYPE_UNIMPLEMENTED_DEVICE "unimplemented-device"
-typedef struct UnimplementedDeviceState UnimplementedDeviceState;
-DECLARE_INSTANCE_CHECKER(UnimplementedDeviceState, UNIMPLEMENTED_DEVICE,
- TYPE_UNIMPLEMENTED_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(UnimplementedDeviceState, UNIMPLEMENTED_DEVICE)
struct UnimplementedDeviceState {
SysBusDevice parent_obj;
#define ZYNQ_XADC_FIFO_DEPTH 15
#define TYPE_ZYNQ_XADC "xlnx,zynq-xadc"
-typedef struct ZynqXADCState ZynqXADCState;
-DECLARE_INSTANCE_CHECKER(ZynqXADCState, ZYNQ_XADC,
- TYPE_ZYNQ_XADC)
+OBJECT_DECLARE_SIMPLE_TYPE(ZynqXADCState, ZYNQ_XADC)
struct ZynqXADCState {
/*< private >*/
*/
#define TYPE_AW_SUN8I_EMAC "allwinner-sun8i-emac"
-typedef struct AwSun8iEmacState AwSun8iEmacState;
-DECLARE_INSTANCE_CHECKER(AwSun8iEmacState, AW_SUN8I_EMAC,
- TYPE_AW_SUN8I_EMAC)
+OBJECT_DECLARE_SIMPLE_TYPE(AwSun8iEmacState, AW_SUN8I_EMAC)
/** @} */
#include "qom/object.h"
#define TYPE_AW_EMAC "allwinner-emac"
-typedef struct AwEmacState AwEmacState;
-DECLARE_INSTANCE_CHECKER(AwEmacState, AW_EMAC,
- TYPE_AW_EMAC)
+OBJECT_DECLARE_SIMPLE_TYPE(AwEmacState, AW_EMAC)
/*
* Allwinner EMAC register list
#include "qom/object.h"
#define TYPE_CADENCE_GEM "cadence_gem"
-typedef struct CadenceGEMState CadenceGEMState;
-DECLARE_INSTANCE_CHECKER(CadenceGEMState, CADENCE_GEM,
- TYPE_CADENCE_GEM)
+OBJECT_DECLARE_SIMPLE_TYPE(CadenceGEMState, CADENCE_GEM)
#include "net/net.h"
#include "hw/sysbus.h"
#include "qom/object.h"
#define TYPE_FTGMAC100 "ftgmac100"
-typedef struct FTGMAC100State FTGMAC100State;
-DECLARE_INSTANCE_CHECKER(FTGMAC100State, FTGMAC100,
- TYPE_FTGMAC100)
+OBJECT_DECLARE_SIMPLE_TYPE(FTGMAC100State, FTGMAC100)
#include "hw/sysbus.h"
#include "net/net.h"
};
#define TYPE_ASPEED_MII "aspeed-mmi"
-typedef struct AspeedMiiState AspeedMiiState;
-DECLARE_INSTANCE_CHECKER(AspeedMiiState, ASPEED_MII,
- TYPE_ASPEED_MII)
+OBJECT_DECLARE_SIMPLE_TYPE(AspeedMiiState, ASPEED_MII)
/*
* AST2600 MII controller
#include "qom/object.h"
#define TYPE_IMX_FEC "imx.fec"
-typedef struct IMXFECState IMXFECState;
-DECLARE_INSTANCE_CHECKER(IMXFECState, IMX_FEC,
- TYPE_IMX_FEC)
+OBJECT_DECLARE_SIMPLE_TYPE(IMXFECState, IMX_FEC)
#define TYPE_IMX_ENET "imx.enet"
#include "qom/object.h"
#define TYPE_MSS_EMAC "msf2-emac"
-typedef struct MSF2EmacState MSF2EmacState;
-DECLARE_INSTANCE_CHECKER(MSF2EmacState, MSS_EMAC,
- TYPE_MSS_EMAC)
+OBJECT_DECLARE_SIMPLE_TYPE(MSF2EmacState, MSS_EMAC)
#define R_MAX (0x1a0 / 4)
#define PHY_MAX_REGS 32
#include "qom/object.h"
#define TYPE_MAC_NUBUS_BRIDGE "mac-nubus-bridge"
-typedef struct MacNubusState MacNubusState;
-DECLARE_INSTANCE_CHECKER(MacNubusState, MAC_NUBUS_BRIDGE,
- TYPE_MAC_NUBUS_BRIDGE)
+OBJECT_DECLARE_SIMPLE_TYPE(MacNubusState, MAC_NUBUS_BRIDGE)
struct MacNubusState {
SysBusDevice sysbus_dev;
#define NUBUS_LAST_SLOT 0xF
#define TYPE_NUBUS_DEVICE "nubus-device"
-typedef struct NubusDevice NubusDevice;
-DECLARE_INSTANCE_CHECKER(NubusDevice, NUBUS_DEVICE,
- TYPE_NUBUS_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(NubusDevice, NUBUS_DEVICE)
#define TYPE_NUBUS_BUS "nubus-bus"
-typedef struct NubusBus NubusBus;
-DECLARE_INSTANCE_CHECKER(NubusBus, NUBUS_BUS,
- TYPE_NUBUS_BUS)
+OBJECT_DECLARE_SIMPLE_TYPE(NubusBus, NUBUS_BUS)
#define TYPE_NUBUS_BRIDGE "nubus-bridge"
#define TYPE_FW_CFG_MEM "fw_cfg_mem"
#define TYPE_FW_CFG_DATA_GENERATOR_INTERFACE "fw_cfg-data-generator"
-DECLARE_INSTANCE_CHECKER(FWCfgState, FW_CFG,
- TYPE_FW_CFG)
-DECLARE_INSTANCE_CHECKER(FWCfgIoState, FW_CFG_IO,
- TYPE_FW_CFG_IO)
-DECLARE_INSTANCE_CHECKER(FWCfgMemState, FW_CFG_MEM,
- TYPE_FW_CFG_MEM)
+OBJECT_DECLARE_SIMPLE_TYPE(FWCfgState, FW_CFG)
+OBJECT_DECLARE_SIMPLE_TYPE(FWCfgIoState, FW_CFG_IO)
+OBJECT_DECLARE_SIMPLE_TYPE(FWCfgMemState, FW_CFG_MEM)
typedef struct FWCfgDataGeneratorClass FWCfgDataGeneratorClass;
DECLARE_CLASS_CHECKERS(FWCfgDataGeneratorClass, FW_CFG_DATA_GENERATOR,
#include "hw/sysbus.h"
#include "qom/object.h"
#define TYPE_NRF51_NVM "nrf51_soc.nvm"
-typedef struct NRF51NVMState NRF51NVMState;
-DECLARE_INSTANCE_CHECKER(NRF51NVMState, NRF51_NVM,
- TYPE_NRF51_NVM)
+OBJECT_DECLARE_SIMPLE_TYPE(NRF51NVMState, NRF51_NVM)
#define NRF51_UICR_FIXTURE_SIZE 64
/*< private >*/
PCIBridge parent_obj;
};
-typedef struct SimbaPCIBridge SimbaPCIBridge;
#define TYPE_SIMBA_PCI_BRIDGE "pbm-bridge"
-DECLARE_INSTANCE_CHECKER(SimbaPCIBridge, SIMBA_PCI_BRIDGE,
- TYPE_SIMBA_PCI_BRIDGE)
+OBJECT_DECLARE_SIMPLE_TYPE(SimbaPCIBridge, SIMBA_PCI_BRIDGE)
#endif
#include "qom/object.h"
#define TYPE_DESIGNWARE_PCIE_HOST "designware-pcie-host"
-typedef struct DesignwarePCIEHost DesignwarePCIEHost;
-DECLARE_INSTANCE_CHECKER(DesignwarePCIEHost, DESIGNWARE_PCIE_HOST,
- TYPE_DESIGNWARE_PCIE_HOST)
+OBJECT_DECLARE_SIMPLE_TYPE(DesignwarePCIEHost, DESIGNWARE_PCIE_HOST)
#define TYPE_DESIGNWARE_PCIE_ROOT "designware-pcie-root"
-typedef struct DesignwarePCIERoot DesignwarePCIERoot;
-DECLARE_INSTANCE_CHECKER(DesignwarePCIERoot, DESIGNWARE_PCIE_ROOT,
- TYPE_DESIGNWARE_PCIE_ROOT)
+OBJECT_DECLARE_SIMPLE_TYPE(DesignwarePCIERoot, DESIGNWARE_PCIE_ROOT)
struct DesignwarePCIERoot;
#include "qom/object.h"
#define TYPE_GPEX_HOST "gpex-pcihost"
-typedef struct GPEXHost GPEXHost;
-DECLARE_INSTANCE_CHECKER(GPEXHost, GPEX_HOST,
- TYPE_GPEX_HOST)
+OBJECT_DECLARE_SIMPLE_TYPE(GPEXHost, GPEX_HOST)
#define TYPE_GPEX_ROOT_DEVICE "gpex-root"
-typedef struct GPEXRootState GPEXRootState;
-DECLARE_INSTANCE_CHECKER(GPEXRootState, GPEX_ROOT_DEVICE,
- TYPE_GPEX_ROOT_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(GPEXRootState, GPEX_ROOT_DEVICE)
#define GPEX_NUM_IRQS 4
#define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost"
#define TYPE_I440FX_PCI_DEVICE "i440FX"
-typedef struct PCII440FXState PCII440FXState;
-DECLARE_INSTANCE_CHECKER(PCII440FXState, I440FX_PCI_DEVICE,
- TYPE_I440FX_PCI_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(PCII440FXState, I440FX_PCI_DEVICE)
struct PCII440FXState {
/*< private >*/
* PHB3 Power Bus Common Queue
*/
#define TYPE_PNV_PBCQ "pnv-pbcq"
-typedef struct PnvPBCQState PnvPBCQState;
-DECLARE_INSTANCE_CHECKER(PnvPBCQState, PNV_PBCQ,
- TYPE_PNV_PBCQ)
+OBJECT_DECLARE_SIMPLE_TYPE(PnvPBCQState, PNV_PBCQ)
struct PnvPBCQState {
DeviceState parent;
* PHB3 PCIe Host Bridge for PowerNV machines (POWER8)
*/
#define TYPE_PNV_PHB3 "pnv-phb3"
-DECLARE_INSTANCE_CHECKER(PnvPHB3, PNV_PHB3,
- TYPE_PNV_PHB3)
+OBJECT_DECLARE_SIMPLE_TYPE(PnvPHB3, PNV_PHB3)
#define PNV_PHB3_NUM_M64 16
#define PNV_PHB3_NUM_REGS (0x1000 >> 3)
* PHB4 PCIe Host Bridge for PowerNV machines (POWER9)
*/
#define TYPE_PNV_PHB4 "pnv-phb4"
-DECLARE_INSTANCE_CHECKER(PnvPHB4, PNV_PHB4,
- TYPE_PNV_PHB4)
+OBJECT_DECLARE_SIMPLE_TYPE(PnvPHB4, PNV_PHB4)
#define PNV_PHB4_MAX_LSIs 8
#define PNV_PHB4_MAX_INTs 4096
OBJECT_DECLARE_TYPE(PnvPhb4PecState, PnvPhb4PecClass, PNV_PHB4_PEC)
#define TYPE_PNV_PHB4_PEC_STACK "pnv-phb4-pec-stack"
-DECLARE_INSTANCE_CHECKER(PnvPhb4PecStack, PNV_PHB4_PEC_STACK,
- TYPE_PNV_PHB4_PEC_STACK)
+OBJECT_DECLARE_SIMPLE_TYPE(PnvPhb4PecStack, PNV_PHB4_PEC_STACK)
/* Per-stack data */
struct PnvPhb4PecStack {
#include "qom/object.h"
#define TYPE_Q35_HOST_DEVICE "q35-pcihost"
-typedef struct Q35PCIHost Q35PCIHost;
-DECLARE_INSTANCE_CHECKER(Q35PCIHost, Q35_HOST_DEVICE,
- TYPE_Q35_HOST_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(Q35PCIHost, Q35_HOST_DEVICE)
#define TYPE_MCH_PCI_DEVICE "mch"
-typedef struct MCHPCIState MCHPCIState;
-DECLARE_INSTANCE_CHECKER(MCHPCIState, MCH_PCI_DEVICE,
- TYPE_MCH_PCI_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(MCHPCIState, MCH_PCI_DEVICE)
struct MCHPCIState {
/*< private >*/
struct SabrePCIState {
PCIDevice parent_obj;
};
-typedef struct SabrePCIState SabrePCIState;
#define TYPE_SABRE_PCI_DEVICE "sabre-pci"
-DECLARE_INSTANCE_CHECKER(SabrePCIState, SABRE_PCI_DEVICE,
- TYPE_SABRE_PCI_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(SabrePCIState, SABRE_PCI_DEVICE)
struct SabreState {
PCIHostState parent_obj;
uint32_t reset_control;
unsigned int nr_resets;
};
-typedef struct SabreState SabreState;
#define TYPE_SABRE "sabre"
-DECLARE_INSTANCE_CHECKER(SabreState, SABRE,
- TYPE_SABRE)
+OBJECT_DECLARE_SIMPLE_TYPE(SabreState, SABRE)
#endif
#define TYPE_SPAPR_PCI_HOST_BRIDGE "spapr-pci-host-bridge"
-typedef struct SpaprPhbState SpaprPhbState;
-DECLARE_INSTANCE_CHECKER(SpaprPhbState, SPAPR_PCI_HOST_BRIDGE,
- TYPE_SPAPR_PCI_HOST_BRIDGE)
+OBJECT_DECLARE_SIMPLE_TYPE(SpaprPhbState, SPAPR_PCI_HOST_BRIDGE)
#define SPAPR_PCI_DMA_MAX_WINDOWS 2
MemoryRegion mem;
};
-typedef struct UNINState UNINState;
#define TYPE_UNI_NORTH "uni-north"
-DECLARE_INSTANCE_CHECKER(UNINState, UNI_NORTH,
- TYPE_UNI_NORTH)
+OBJECT_DECLARE_SIMPLE_TYPE(UNINState, UNI_NORTH)
#endif /* UNINORTH_H */
#include "qom/object.h"
#define TYPE_XILINX_PCIE_HOST "xilinx-pcie-host"
-typedef struct XilinxPCIEHost XilinxPCIEHost;
-DECLARE_INSTANCE_CHECKER(XilinxPCIEHost, XILINX_PCIE_HOST,
- TYPE_XILINX_PCIE_HOST)
+OBJECT_DECLARE_SIMPLE_TYPE(XilinxPCIEHost, XILINX_PCIE_HOST)
#define TYPE_XILINX_PCIE_ROOT "xilinx-pcie-root"
-typedef struct XilinxPCIERoot XilinxPCIERoot;
-DECLARE_INSTANCE_CHECKER(XilinxPCIERoot, XILINX_PCIE_ROOT,
- TYPE_XILINX_PCIE_ROOT)
+OBJECT_DECLARE_SIMPLE_TYPE(XilinxPCIERoot, XILINX_PCIE_ROOT)
struct XilinxPCIERoot {
PCIBridge parent_obj;
};
#define TYPE_PCI_BRIDGE "base-pci-bridge"
-DECLARE_INSTANCE_CHECKER(PCIBridge, PCI_BRIDGE,
- TYPE_PCI_BRIDGE)
+OBJECT_DECLARE_SIMPLE_TYPE(PCIBridge, PCI_BRIDGE)
struct PCIBridge {
/*< private >*/
#include "qom/object.h"
#define TYPE_PCIE_HOST_BRIDGE "pcie-host-bridge"
-DECLARE_INSTANCE_CHECKER(PCIExpressHost, PCIE_HOST_BRIDGE,
- TYPE_PCIE_HOST_BRIDGE)
+OBJECT_DECLARE_SIMPLE_TYPE(PCIExpressHost, PCIE_HOST_BRIDGE)
#define PCIE_HOST_MCFG_BASE "MCFG"
#define PCIE_HOST_MCFG_SIZE "mcfg_size"
#include "qom/object.h"
#define TYPE_PCIE_PORT "pcie-port"
-DECLARE_INSTANCE_CHECKER(PCIEPort, PCIE_PORT,
- TYPE_PCIE_PORT)
+OBJECT_DECLARE_SIMPLE_TYPE(PCIEPort, PCIE_PORT)
struct PCIEPort {
/*< private >*/
void pcie_port_init_reg(PCIDevice *d);
#define TYPE_PCIE_SLOT "pcie-slot"
-DECLARE_INSTANCE_CHECKER(PCIESlot, PCIE_SLOT,
- TYPE_PCIE_SLOT)
+OBJECT_DECLARE_SIMPLE_TYPE(PCIESlot, PCIE_SLOT)
struct PCIESlot {
/*< private >*/
#include "hw/sysbus.h"
#include "qom/object.h"
-typedef struct PlatformBusDevice PlatformBusDevice;
#define TYPE_PLATFORM_BUS_DEVICE "platform-bus-device"
-DECLARE_INSTANCE_CHECKER(PlatformBusDevice, PLATFORM_BUS_DEVICE,
- TYPE_PLATFORM_BUS_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(PlatformBusDevice, PLATFORM_BUS_DEVICE)
struct PlatformBusDevice {
/*< private >*/
void DBDMA_kick(DBDMAState *dbdma);
#define TYPE_MAC_DBDMA "mac-dbdma"
-DECLARE_INSTANCE_CHECKER(DBDMAState, MAC_DBDMA,
- TYPE_MAC_DBDMA)
+OBJECT_DECLARE_SIMPLE_TYPE(DBDMAState, MAC_DBDMA)
#endif
} IRQDest;
#define TYPE_OPENPIC "openpic"
-typedef struct OpenPICState OpenPICState;
-DECLARE_INSTANCE_CHECKER(OpenPICState, OPENPIC,
- TYPE_OPENPIC)
+OBJECT_DECLARE_SIMPLE_TYPE(OpenPICState, OPENPIC)
struct OpenPICState {
/*< private >*/
}
#define TYPE_PNV_QUAD "powernv-cpu-quad"
-typedef struct PnvQuad PnvQuad;
-DECLARE_INSTANCE_CHECKER(PnvQuad, PNV_QUAD,
- TYPE_PNV_QUAD)
+OBJECT_DECLARE_SIMPLE_TYPE(PnvQuad, PNV_QUAD)
struct PnvQuad {
DeviceState parent_obj;
#define PNOR_SPI_OFFSET 0x0c000000UL
#define TYPE_PNV_PNOR "pnv-pnor"
-typedef struct PnvPnor PnvPnor;
-DECLARE_INSTANCE_CHECKER(PnvPnor, PNV_PNOR,
- TYPE_PNV_PNOR)
+OBJECT_DECLARE_SIMPLE_TYPE(PnvPnor, PNV_PNOR)
struct PnvPnor {
SysBusDevice parent_obj;
};
#define TYPE_PNV8_PSI TYPE_PNV_PSI "-POWER8"
-typedef struct Pnv8Psi Pnv8Psi;
-DECLARE_INSTANCE_CHECKER(Pnv8Psi, PNV8_PSI,
- TYPE_PNV8_PSI)
+OBJECT_DECLARE_SIMPLE_TYPE(Pnv8Psi, PNV8_PSI)
struct Pnv8Psi {
PnvPsi parent;
};
#define TYPE_PNV9_PSI TYPE_PNV_PSI "-POWER9"
-typedef struct Pnv9Psi Pnv9Psi;
-DECLARE_INSTANCE_CHECKER(Pnv9Psi, PNV9_PSI,
- TYPE_PNV9_PSI)
+OBJECT_DECLARE_SIMPLE_TYPE(Pnv9Psi, PNV9_PSI)
struct Pnv9Psi {
PnvPsi parent;
#define TYPE_SPAPR_RTC "spapr-rtc"
-typedef struct SpaprRtcState SpaprRtcState;
-DECLARE_INSTANCE_CHECKER(SpaprRtcState, SPAPR_RTC,
- TYPE_SPAPR_RTC)
+OBJECT_DECLARE_SIMPLE_TYPE(SpaprRtcState, SPAPR_RTC)
struct SpaprRtcState {
/*< private >*/
intspec[1] = is_lsi ? cpu_to_be32(1) : 0;
}
-typedef struct SpaprTceTable SpaprTceTable;
#define TYPE_SPAPR_TCE_TABLE "spapr-tce-table"
-DECLARE_INSTANCE_CHECKER(SpaprTceTable, SPAPR_TCE_TABLE,
- TYPE_SPAPR_TCE_TABLE)
+OBJECT_DECLARE_SIMPLE_TYPE(SpaprTceTable, SPAPR_TCE_TABLE)
#define TYPE_SPAPR_IOMMU_MEMORY_REGION "spapr-iommu-memory-region"
DECLARE_INSTANCE_CHECKER(IOMMUMemoryRegion, SPAPR_IOMMU_MEMORY_REGION,
#include "hw/qdev-core.h"
#define TYPE_SPAPR_TPM_PROXY "spapr-tpm-proxy"
-typedef struct SpaprTpmProxy SpaprTpmProxy;
-DECLARE_INSTANCE_CHECKER(SpaprTpmProxy, SPAPR_TPM_PROXY,
- TYPE_SPAPR_TPM_PROXY)
+OBJECT_DECLARE_SIMPLE_TYPE(SpaprTpmProxy, SPAPR_TPM_PROXY)
struct SpaprTpmProxy {
/*< private >*/
VIO_SPAPR_DEVICE)
#define TYPE_SPAPR_VIO_BUS "spapr-vio-bus"
-typedef struct SpaprVioBus SpaprVioBus;
-DECLARE_INSTANCE_CHECKER(SpaprVioBus, SPAPR_VIO_BUS,
- TYPE_SPAPR_VIO_BUS)
+OBJECT_DECLARE_SIMPLE_TYPE(SpaprVioBus, SPAPR_VIO_BUS)
#define TYPE_SPAPR_VIO_BRIDGE "spapr-vio-bridge"
*/
#define TYPE_XIVE_SOURCE "xive-source"
-typedef struct XiveSource XiveSource;
-DECLARE_INSTANCE_CHECKER(XiveSource, XIVE_SOURCE,
- TYPE_XIVE_SOURCE)
+OBJECT_DECLARE_SIMPLE_TYPE(XiveSource, XIVE_SOURCE)
/*
* XIVE Interrupt Source characteristics, which define how the ESB are
*/
#define TYPE_XIVE_TCTX "xive-tctx"
-typedef struct XiveTCTX XiveTCTX;
-DECLARE_INSTANCE_CHECKER(XiveTCTX, XIVE_TCTX,
- TYPE_XIVE_TCTX)
+OBJECT_DECLARE_SIMPLE_TYPE(XiveTCTX, XIVE_TCTX)
/*
* XIVE Thread interrupt Management register rings :
*/
#define TYPE_XIVE_END_SOURCE "xive-end-source"
-typedef struct XiveENDSource XiveENDSource;
-DECLARE_INSTANCE_CHECKER(XiveENDSource, XIVE_END_SOURCE,
- TYPE_XIVE_END_SOURCE)
+OBJECT_DECLARE_SIMPLE_TYPE(XiveENDSource, XIVE_END_SOURCE)
struct XiveENDSource {
DeviceState parent;
#include "qom/object.h"
#define TYPE_RISCV_IBEX_SOC "riscv.lowrisc.ibex.soc"
-typedef struct LowRISCIbexSoCState LowRISCIbexSoCState;
-DECLARE_INSTANCE_CHECKER(LowRISCIbexSoCState, RISCV_IBEX_SOC,
- TYPE_RISCV_IBEX_SOC)
+OBJECT_DECLARE_SIMPLE_TYPE(LowRISCIbexSoCState, RISCV_IBEX_SOC)
struct LowRISCIbexSoCState {
/*< private >*/
#define TYPE_RISCV_HART_ARRAY "riscv.hart_array"
-typedef struct RISCVHartArrayState RISCVHartArrayState;
-DECLARE_INSTANCE_CHECKER(RISCVHartArrayState, RISCV_HART_ARRAY,
- TYPE_RISCV_HART_ARRAY)
+OBJECT_DECLARE_SIMPLE_TYPE(RISCVHartArrayState, RISCV_HART_ARRAY)
struct RISCVHartArrayState {
/*< private >*/
int offset;
};
-typedef struct AspeedRtcState AspeedRtcState;
#define TYPE_ASPEED_RTC "aspeed.rtc"
-DECLARE_INSTANCE_CHECKER(AspeedRtcState, ASPEED_RTC,
- TYPE_ASPEED_RTC)
+OBJECT_DECLARE_SIMPLE_TYPE(AspeedRtcState, ASPEED_RTC)
#endif /* HW_RTC_ASPEED_RTC_H */
#include "qom/object.h"
#define TYPE_GOLDFISH_RTC "goldfish_rtc"
-typedef struct GoldfishRTCState GoldfishRTCState;
-DECLARE_INSTANCE_CHECKER(GoldfishRTCState, GOLDFISH_RTC,
- TYPE_GOLDFISH_RTC)
+OBJECT_DECLARE_SIMPLE_TYPE(GoldfishRTCState, GOLDFISH_RTC)
struct GoldfishRTCState {
SysBusDevice parent_obj;
#include "qom/object.h"
#define TYPE_MC146818_RTC "mc146818rtc"
-typedef struct RTCState RTCState;
-DECLARE_INSTANCE_CHECKER(RTCState, MC146818_RTC,
- TYPE_MC146818_RTC)
+OBJECT_DECLARE_SIMPLE_TYPE(RTCState, MC146818_RTC)
struct RTCState {
ISADevice parent_obj;
#include "qom/object.h"
#define TYPE_PL031 "pl031"
-typedef struct PL031State PL031State;
-DECLARE_INSTANCE_CHECKER(PL031State, PL031,
- TYPE_PL031)
+OBJECT_DECLARE_SIMPLE_TYPE(PL031State, PL031)
struct PL031State {
SysBusDevice parent_obj;
#define TYPE_XLNX_ZYNQMP_RTC "xlnx-zynmp.rtc"
-typedef struct XlnxZynqMPRTC XlnxZynqMPRTC;
-DECLARE_INSTANCE_CHECKER(XlnxZynqMPRTC, XLNX_ZYNQMP_RTC,
- TYPE_XLNX_ZYNQMP_RTC)
+OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPRTC, XLNX_ZYNQMP_RTC)
REG32(SET_TIME_WRITE, 0x0)
REG32(SET_TIME_READ, 0x4)
SysBusDevice sysbus_dev;
bool css_dev_path;
};
-typedef struct VirtualCssBridge VirtualCssBridge;
#define TYPE_VIRTUAL_CSS_BRIDGE "virtual-css-bridge"
-DECLARE_INSTANCE_CHECKER(VirtualCssBridge, VIRTUAL_CSS_BRIDGE,
- TYPE_VIRTUAL_CSS_BRIDGE)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtualCssBridge, VIRTUAL_CSS_BRIDGE)
/* virtual css bus type */
struct VirtualCssBus {
BusState parent_obj;
};
-typedef struct VirtualCssBus VirtualCssBus;
#define TYPE_VIRTUAL_CSS_BUS "virtual-css-bus"
-DECLARE_INSTANCE_CHECKER(VirtualCssBus, VIRTUAL_CSS_BUS,
- TYPE_VIRTUAL_CSS_BUS)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtualCssBus, VIRTUAL_CSS_BUS)
VirtualCssBus *virtual_css_bus_init(void);
#endif
TYPE_KVM_S390_FLIC)
#define TYPE_QEMU_S390_FLIC "s390-flic-qemu"
-typedef struct QEMUS390FLICState QEMUS390FLICState;
-DECLARE_INSTANCE_CHECKER(QEMUS390FLICState, QEMU_S390_FLIC,
- TYPE_QEMU_S390_FLIC)
+OBJECT_DECLARE_SIMPLE_TYPE(QEMUS390FLICState, QEMU_S390_FLIC)
#define SIC_IRQ_MODE_ALL 0
#define SIC_IRQ_MODE_SINGLE 1
#include "qom/object.h"
#define TYPE_VFIO_CCW "vfio-ccw"
-typedef struct VFIOCCWDevice VFIOCCWDevice;
-DECLARE_INSTANCE_CHECKER(VFIOCCWDevice, VFIO_CCW,
- TYPE_VFIO_CCW)
+OBJECT_DECLARE_SIMPLE_TYPE(VFIOCCWDevice, VFIO_CCW)
#define TYPE_VFIO_CCW "vfio-ccw"
};
#define TYPE_ESP "esp"
-typedef struct SysBusESPState SysBusESPState;
-DECLARE_INSTANCE_CHECKER(SysBusESPState, ESP,
- TYPE_ESP)
+OBJECT_DECLARE_SIMPLE_TYPE(SysBusESPState, ESP)
struct SysBusESPState {
/*< private >*/
};
#define TYPE_SCSI_BUS "SCSI"
-DECLARE_INSTANCE_CHECKER(SCSIBus, SCSI_BUS,
- TYPE_SCSI_BUS)
+OBJECT_DECLARE_SIMPLE_TYPE(SCSIBus, SCSI_BUS)
struct SCSIBus {
BusState qbus;
#include "qom/object.h"
#define TYPE_ASPEED_SDHCI "aspeed.sdhci"
-typedef struct AspeedSDHCIState AspeedSDHCIState;
-DECLARE_INSTANCE_CHECKER(AspeedSDHCIState, ASPEED_SDHCI,
- TYPE_ASPEED_SDHCI)
+OBJECT_DECLARE_SIMPLE_TYPE(AspeedSDHCIState, ASPEED_SDHCI)
#define ASPEED_SDHCI_CAPABILITIES 0x01E80080
#define ASPEED_SDHCI_NUM_SLOTS 2
#include "qom/object.h"
#define TYPE_BCM2835_SDHOST "bcm2835-sdhost"
-typedef struct BCM2835SDHostState BCM2835SDHostState;
-DECLARE_INSTANCE_CHECKER(BCM2835SDHostState, BCM2835_SDHOST,
- TYPE_BCM2835_SDHOST)
+OBJECT_DECLARE_SIMPLE_TYPE(BCM2835SDHostState, BCM2835_SDHOST)
#define BCM2835_SDHOST_FIFO_LEN 16
#define DMA_REGS 4
#define TYPE_SPARC32_DMA_DEVICE "sparc32-dma-device"
-typedef struct DMADeviceState DMADeviceState;
-DECLARE_INSTANCE_CHECKER(DMADeviceState, SPARC32_DMA_DEVICE,
- TYPE_SPARC32_DMA_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(DMADeviceState, SPARC32_DMA_DEVICE)
struct DMADeviceState {
};
#define TYPE_SPARC32_ESPDMA_DEVICE "sparc32-espdma"
-typedef struct ESPDMADeviceState ESPDMADeviceState;
-DECLARE_INSTANCE_CHECKER(ESPDMADeviceState, SPARC32_ESPDMA_DEVICE,
- TYPE_SPARC32_ESPDMA_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(ESPDMADeviceState, SPARC32_ESPDMA_DEVICE)
struct ESPDMADeviceState {
DMADeviceState parent_obj;
};
#define TYPE_SPARC32_LEDMA_DEVICE "sparc32-ledma"
-typedef struct LEDMADeviceState LEDMADeviceState;
-DECLARE_INSTANCE_CHECKER(LEDMADeviceState, SPARC32_LEDMA_DEVICE,
- TYPE_SPARC32_LEDMA_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(LEDMADeviceState, SPARC32_LEDMA_DEVICE)
struct LEDMADeviceState {
DMADeviceState parent_obj;
};
#define TYPE_SPARC32_DMA "sparc32-dma"
-typedef struct SPARC32DMAState SPARC32DMAState;
-DECLARE_INSTANCE_CHECKER(SPARC32DMAState, SPARC32_DMA,
- TYPE_SPARC32_DMA)
+OBJECT_DECLARE_SIMPLE_TYPE(SPARC32DMAState, SPARC32_DMA)
struct SPARC32DMAState {
SysBusDevice parent_obj;
#define EXTRACT(value, name) extract32(value, name##_SHIFT, name##_LENGTH)
#define TYPE_IMX_SPI "imx.spi"
-typedef struct IMXSPIState IMXSPIState;
-DECLARE_INSTANCE_CHECKER(IMXSPIState, IMX_SPI,
- TYPE_IMX_SPI)
+OBJECT_DECLARE_SIMPLE_TYPE(IMXSPIState, IMX_SPI)
struct IMXSPIState {
/* <private> */
#include "qom/object.h"
#define TYPE_MSS_SPI "mss-spi"
-typedef struct MSSSpiState MSSSpiState;
-DECLARE_INSTANCE_CHECKER(MSSSpiState, MSS_SPI,
- TYPE_MSS_SPI)
+OBJECT_DECLARE_SIMPLE_TYPE(MSSSpiState, MSS_SPI)
#define R_SPI_MAX 16
#include "qom/object.h"
#define TYPE_PL022 "pl022"
-typedef struct PL022State PL022State;
-DECLARE_INSTANCE_CHECKER(PL022State, PL022,
- TYPE_PL022)
+OBJECT_DECLARE_SIMPLE_TYPE(PL022State, PL022)
struct PL022State {
SysBusDevice parent_obj;
#define STM_SPI_SR_RXNE 1
#define TYPE_STM32F2XX_SPI "stm32f2xx-spi"
-typedef struct STM32F2XXSPIState STM32F2XXSPIState;
-DECLARE_INSTANCE_CHECKER(STM32F2XXSPIState, STM32F2XX_SPI,
- TYPE_STM32F2XX_SPI)
+OBJECT_DECLARE_SIMPLE_TYPE(STM32F2XXSPIState, STM32F2XX_SPI)
struct STM32F2XXSPIState {
/* <private> */
uint32_t dma_burst_size;
uint8_t dma_buf[QSPI_DMA_MAX_BURST_SIZE];
};
-typedef struct XlnxZynqMPQSPIPS XlnxZynqMPQSPIPS;
struct XilinxSPIPSClass {
SysBusDeviceClass parent_class;
OBJECT_DECLARE_TYPE(XilinxSPIPS, XilinxSPIPSClass, XILINX_SPIPS)
-DECLARE_INSTANCE_CHECKER(XilinxQSPIPS, XILINX_QSPIPS,
- TYPE_XILINX_QSPIPS)
+OBJECT_DECLARE_SIMPLE_TYPE(XilinxQSPIPS, XILINX_QSPIPS)
-DECLARE_INSTANCE_CHECKER(XlnxZynqMPQSPIPS, XLNX_ZYNQMP_QSPIPS,
- TYPE_XLNX_ZYNQMP_QSPIPS)
+OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPQSPIPS, XLNX_ZYNQMP_QSPIPS)
#endif /* XILINX_SPIPS_H */
#define A9_GTIMER_MAX_CPUS 4
#define TYPE_A9_GTIMER "arm.cortex-a9-global-timer"
-typedef struct A9GTimerState A9GTimerState;
-DECLARE_INSTANCE_CHECKER(A9GTimerState, A9_GTIMER,
- TYPE_A9_GTIMER)
+OBJECT_DECLARE_SIMPLE_TYPE(A9GTimerState, A9_GTIMER)
#define R_COUNTER_LO 0x00
#define R_COUNTER_HI 0x04
#include "qom/object.h"
#define TYPE_AW_A10_PIT "allwinner-A10-timer"
-typedef struct AwA10PITState AwA10PITState;
-DECLARE_INSTANCE_CHECKER(AwA10PITState, AW_A10_PIT,
- TYPE_AW_A10_PIT)
+OBJECT_DECLARE_SIMPLE_TYPE(AwA10PITState, AW_A10_PIT)
#define AW_A10_PIT_TIMER_NR 6
#define AW_A10_PIT_TIMER_IRQ 0x1
} TimerBlock;
#define TYPE_ARM_MPTIMER "arm_mptimer"
-typedef struct ARMMPTimerState ARMMPTimerState;
-DECLARE_INSTANCE_CHECKER(ARMMPTimerState, ARM_MPTIMER,
- TYPE_ARM_MPTIMER)
+OBJECT_DECLARE_SIMPLE_TYPE(ARMMPTimerState, ARM_MPTIMER)
struct ARMMPTimerState {
/*< private >*/
#define TYPE_SYSTICK "armv7m_systick"
-typedef struct SysTickState SysTickState;
-DECLARE_INSTANCE_CHECKER(SysTickState, SYSTICK,
- TYPE_SYSTICK)
+OBJECT_DECLARE_SIMPLE_TYPE(SysTickState, SYSTICK)
struct SysTickState {
/*< private >*/
};
#define TYPE_AVR_TIMER16 "avr-timer16"
-typedef struct AVRTimer16State AVRTimer16State;
-DECLARE_INSTANCE_CHECKER(AVRTimer16State, AVR_TIMER16,
- TYPE_AVR_TIMER16)
+OBJECT_DECLARE_SIMPLE_TYPE(AVRTimer16State, AVR_TIMER16)
struct AVRTimer16State {
/* <private> */
#include "qom/object.h"
#define TYPE_BCM2835_SYSTIMER "bcm2835-sys-timer"
-typedef struct BCM2835SystemTimerState BCM2835SystemTimerState;
-DECLARE_INSTANCE_CHECKER(BCM2835SystemTimerState, BCM2835_SYSTIMER,
- TYPE_BCM2835_SYSTIMER)
+OBJECT_DECLARE_SIMPLE_TYPE(BCM2835SystemTimerState, BCM2835_SYSTIMER)
struct BCM2835SystemTimerState {
/*< private >*/
#include "qom/object.h"
#define TYPE_CMSDK_APB_DUALTIMER "cmsdk-apb-dualtimer"
-typedef struct CMSDKAPBDualTimer CMSDKAPBDualTimer;
-DECLARE_INSTANCE_CHECKER(CMSDKAPBDualTimer, CMSDK_APB_DUALTIMER,
- TYPE_CMSDK_APB_DUALTIMER)
+OBJECT_DECLARE_SIMPLE_TYPE(CMSDKAPBDualTimer, CMSDK_APB_DUALTIMER)
/* One of the two identical timer modules in the dual-timer module */
#include "qom/object.h"
#define TYPE_CMSDK_APB_TIMER "cmsdk-apb-timer"
-typedef struct CMSDKAPBTIMER CMSDKAPBTIMER;
-DECLARE_INSTANCE_CHECKER(CMSDKAPBTIMER, CMSDK_APB_TIMER,
- TYPE_CMSDK_APB_TIMER)
+OBJECT_DECLARE_SIMPLE_TYPE(CMSDKAPBTIMER, CMSDK_APB_TIMER)
struct CMSDKAPBTIMER {
/*< private >*/
#include "qom/object.h"
#define TYPE_DIGIC_TIMER "digic-timer"
-typedef struct DigicTimerState DigicTimerState;
-DECLARE_INSTANCE_CHECKER(DigicTimerState, DIGIC_TIMER,
- TYPE_DIGIC_TIMER)
+OBJECT_DECLARE_SIMPLE_TYPE(DigicTimerState, DIGIC_TIMER)
#define DIGIC_TIMER_CONTROL 0x00
#define DIGIC_TIMER_CONTROL_RST 0x80000000
#define EPIT_TIMER_MAX 0XFFFFFFFFUL
#define TYPE_IMX_EPIT "imx.epit"
-typedef struct IMXEPITState IMXEPITState;
-DECLARE_INSTANCE_CHECKER(IMXEPITState, IMX_EPIT,
- TYPE_IMX_EPIT)
+OBJECT_DECLARE_SIMPLE_TYPE(IMXEPITState, IMX_EPIT)
struct IMXEPITState {
/*< private >*/
#include "qom/object.h"
#define TYPE_MSS_TIMER "mss-timer"
-typedef struct MSSTimerState MSSTimerState;
-DECLARE_INSTANCE_CHECKER(MSSTimerState, MSS_TIMER,
- TYPE_MSS_TIMER)
+OBJECT_DECLARE_SIMPLE_TYPE(MSSTimerState, MSS_TIMER)
/*
* There are two 32-bit down counting timers.
#include "qemu/timer.h"
#include "qom/object.h"
#define TYPE_NRF51_TIMER "nrf51_soc.timer"
-typedef struct NRF51TimerState NRF51TimerState;
-DECLARE_INSTANCE_CHECKER(NRF51TimerState, NRF51_TIMER,
- TYPE_NRF51_TIMER)
+OBJECT_DECLARE_SIMPLE_TYPE(NRF51TimerState, NRF51_TIMER)
#define NRF51_TIMER_REG_COUNT 4
#define USB_INTERFACE_INVALID 255
-typedef struct USBBus USBBus;
typedef struct USBBusOps USBBusOps;
typedef struct USBPort USBPort;
typedef struct USBDevice USBDevice;
/* usb-bus.c */
#define TYPE_USB_BUS "usb-bus"
-DECLARE_INSTANCE_CHECKER(USBBus, USB_BUS,
- TYPE_USB_BUS)
+OBJECT_DECLARE_SIMPLE_TYPE(USBBus, USB_BUS)
struct USBBus {
BusState qbus;
MemoryRegion iomem[3];
};
-typedef struct ChipideaState ChipideaState;
#define TYPE_CHIPIDEA "usb-chipidea"
-DECLARE_INSTANCE_CHECKER(ChipideaState, CHIPIDEA,
- TYPE_CHIPIDEA)
+OBJECT_DECLARE_SIMPLE_TYPE(ChipideaState, CHIPIDEA)
#endif /* CHIPIDEA_H */
#define USBPHY_CTRL_SFTRST BIT(31)
#define TYPE_IMX_USBPHY "imx.usbphy"
-typedef struct IMXUSBPHYState IMXUSBPHYState;
-DECLARE_INSTANCE_CHECKER(IMXUSBPHYState, IMX_USBPHY,
- TYPE_IMX_USBPHY)
+OBJECT_DECLARE_SIMPLE_TYPE(IMXUSBPHYState, IMX_USBPHY)
struct IMXUSBPHYState {
/* <private> */
#include "qom/object.h"
#define TYPE_VHOST_SCSI_COMMON "vhost-scsi-common"
-typedef struct VHostSCSICommon VHostSCSICommon;
-DECLARE_INSTANCE_CHECKER(VHostSCSICommon, VHOST_SCSI_COMMON,
- TYPE_VHOST_SCSI_COMMON)
+OBJECT_DECLARE_SIMPLE_TYPE(VHostSCSICommon, VHOST_SCSI_COMMON)
struct VHostSCSICommon {
VirtIOSCSICommon parent_obj;
};
#define TYPE_VHOST_SCSI "vhost-scsi"
-typedef struct VHostSCSI VHostSCSI;
-DECLARE_INSTANCE_CHECKER(VHostSCSI, VHOST_SCSI,
- TYPE_VHOST_SCSI)
+OBJECT_DECLARE_SIMPLE_TYPE(VHostSCSI, VHOST_SCSI)
struct VHostSCSI {
VHostSCSICommon parent_obj;
#include "qom/object.h"
#define TYPE_VHOST_USER_BLK "vhost-user-blk"
-typedef struct VHostUserBlk VHostUserBlk;
-DECLARE_INSTANCE_CHECKER(VHostUserBlk, VHOST_USER_BLK,
- TYPE_VHOST_USER_BLK)
+OBJECT_DECLARE_SIMPLE_TYPE(VHostUserBlk, VHOST_USER_BLK)
#define VHOST_USER_BLK_AUTO_NUM_QUEUES UINT16_MAX
#include "qom/object.h"
#define TYPE_VHOST_USER_FS "vhost-user-fs-device"
-typedef struct VHostUserFS VHostUserFS;
-DECLARE_INSTANCE_CHECKER(VHostUserFS, VHOST_USER_FS,
- TYPE_VHOST_USER_FS)
+OBJECT_DECLARE_SIMPLE_TYPE(VHostUserFS, VHOST_USER_FS)
typedef struct {
CharBackend chardev;
#include "qom/object.h"
#define TYPE_VHOST_USER_SCSI "vhost-user-scsi"
-typedef struct VHostUserSCSI VHostUserSCSI;
-DECLARE_INSTANCE_CHECKER(VHostUserSCSI, VHOST_USER_SCSI,
- TYPE_VHOST_USER_SCSI)
+OBJECT_DECLARE_SIMPLE_TYPE(VHostUserSCSI, VHOST_USER_SCSI)
struct VHostUserSCSI {
VHostSCSICommon parent_obj;
#include "qom/object.h"
#define TYPE_VHOST_USER_VSOCK "vhost-user-vsock-device"
-typedef struct VHostUserVSock VHostUserVSock;
-DECLARE_INSTANCE_CHECKER(VHostUserVSock, VHOST_USER_VSOCK,
- TYPE_VHOST_USER_VSOCK)
+OBJECT_DECLARE_SIMPLE_TYPE(VHostUserVSock, VHOST_USER_VSOCK)
typedef struct {
CharBackend chardev;
#include "qom/object.h"
#define TYPE_VHOST_VSOCK_COMMON "vhost-vsock-common"
-typedef struct VHostVSockCommon VHostVSockCommon;
-DECLARE_INSTANCE_CHECKER(VHostVSockCommon, VHOST_VSOCK_COMMON,
- TYPE_VHOST_VSOCK_COMMON)
+OBJECT_DECLARE_SIMPLE_TYPE(VHostVSockCommon, VHOST_VSOCK_COMMON)
enum {
VHOST_VSOCK_SAVEVM_VERSION = 0,
#include "qom/object.h"
#define TYPE_VHOST_VSOCK "vhost-vsock-device"
-typedef struct VHostVSock VHostVSock;
-DECLARE_INSTANCE_CHECKER(VHostVSock, VHOST_VSOCK,
- TYPE_VHOST_VSOCK)
+OBJECT_DECLARE_SIMPLE_TYPE(VHostVSock, VHOST_VSOCK)
typedef struct {
uint64_t guest_cid;
#include "qom/object.h"
#define TYPE_VIRTIO_BALLOON "virtio-balloon-device"
-typedef struct VirtIOBalloon VirtIOBalloon;
-DECLARE_INSTANCE_CHECKER(VirtIOBalloon, VIRTIO_BALLOON,
- TYPE_VIRTIO_BALLOON)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtIOBalloon, VIRTIO_BALLOON)
#define VIRTIO_BALLOON_FREE_PAGE_HINT_CMD_ID_MIN 0x80000000
#include "qom/object.h"
#define TYPE_VIRTIO_BLK "virtio-blk-device"
-typedef struct VirtIOBlock VirtIOBlock;
-DECLARE_INSTANCE_CHECKER(VirtIOBlock, VIRTIO_BLK,
- TYPE_VIRTIO_BLK)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtIOBlock, VIRTIO_BLK)
/* This is the last element of the write scatter-gather list */
struct virtio_blk_inhdr
#define TYPE_VIRTIO_CRYPTO "virtio-crypto-device"
-typedef struct VirtIOCrypto VirtIOCrypto;
-DECLARE_INSTANCE_CHECKER(VirtIOCrypto, VIRTIO_CRYPTO,
- TYPE_VIRTIO_CRYPTO)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtIOCrypto, VIRTIO_CRYPTO)
#define VIRTIO_CRYPTO_GET_PARENT_CLASS(obj) \
OBJECT_GET_PARENT_CLASS(obj, TYPE_VIRTIO_CRYPTO)
#include "hw/virtio/virtio-gpu.h"
#include "qom/object.h"
-typedef struct VirtIOGPUPCIBase VirtIOGPUPCIBase;
/*
* virtio-gpu-pci-base: This extends VirtioPCIProxy.
*/
#define TYPE_VIRTIO_GPU_PCI_BASE "virtio-gpu-pci-base"
-DECLARE_INSTANCE_CHECKER(VirtIOGPUPCIBase, VIRTIO_GPU_PCI_BASE,
- TYPE_VIRTIO_GPU_PCI_BASE)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtIOGPUPCIBase, VIRTIO_GPU_PCI_BASE)
struct VirtIOGPUPCIBase {
VirtIOPCIProxy parent_obj;
VIRTIO_GPU_BASE)
#define TYPE_VIRTIO_GPU "virtio-gpu-device"
-typedef struct VirtIOGPU VirtIOGPU;
-DECLARE_INSTANCE_CHECKER(VirtIOGPU, VIRTIO_GPU,
- TYPE_VIRTIO_GPU)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtIOGPU, VIRTIO_GPU)
#define TYPE_VHOST_USER_GPU "vhost-user-gpu"
-typedef struct VhostUserGPU VhostUserGPU;
-DECLARE_INSTANCE_CHECKER(VhostUserGPU, VHOST_USER_GPU,
- TYPE_VHOST_USER_GPU)
+OBJECT_DECLARE_SIMPLE_TYPE(VhostUserGPU, VHOST_USER_GPU)
#define VIRTIO_ID_GPU 16
#define TYPE_VIRTIO_MOUSE "virtio-mouse-device"
#define TYPE_VIRTIO_TABLET "virtio-tablet-device"
-typedef struct VirtIOInputHID VirtIOInputHID;
-DECLARE_INSTANCE_CHECKER(VirtIOInputHID, VIRTIO_INPUT_HID,
- TYPE_VIRTIO_INPUT_HID)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtIOInputHID, VIRTIO_INPUT_HID)
#define VIRTIO_INPUT_HID_GET_PARENT_CLASS(obj) \
OBJECT_GET_PARENT_CLASS(obj, TYPE_VIRTIO_INPUT_HID)
#define TYPE_VIRTIO_INPUT_HOST "virtio-input-host-device"
-typedef struct VirtIOInputHost VirtIOInputHost;
-DECLARE_INSTANCE_CHECKER(VirtIOInputHost, VIRTIO_INPUT_HOST,
- TYPE_VIRTIO_INPUT_HOST)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtIOInputHost, VIRTIO_INPUT_HOST)
#define VIRTIO_INPUT_HOST_GET_PARENT_CLASS(obj) \
OBJECT_GET_PARENT_CLASS(obj, TYPE_VIRTIO_INPUT_HOST)
#define TYPE_VHOST_USER_INPUT "vhost-user-input"
-typedef struct VHostUserInput VHostUserInput;
-DECLARE_INSTANCE_CHECKER(VHostUserInput, VHOST_USER_INPUT,
- TYPE_VHOST_USER_INPUT)
+OBJECT_DECLARE_SIMPLE_TYPE(VHostUserInput, VHOST_USER_INPUT)
#define VHOST_USER_INPUT_GET_PARENT_CLASS(obj) \
OBJECT_GET_PARENT_CLASS(obj, TYPE_VHOST_USER_INPUT)
#define TYPE_VIRTIO_IOMMU "virtio-iommu-device"
#define TYPE_VIRTIO_IOMMU_PCI "virtio-iommu-device-base"
-typedef struct VirtIOIOMMU VirtIOIOMMU;
-DECLARE_INSTANCE_CHECKER(VirtIOIOMMU, VIRTIO_IOMMU,
- TYPE_VIRTIO_IOMMU)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtIOIOMMU, VIRTIO_IOMMU)
#define TYPE_VIRTIO_IOMMU_MEMORY_REGION "virtio-iommu-memory-region"
/* virtio-mmio */
#define TYPE_VIRTIO_MMIO "virtio-mmio"
-typedef struct VirtIOMMIOProxy VirtIOMMIOProxy;
-DECLARE_INSTANCE_CHECKER(VirtIOMMIOProxy, VIRTIO_MMIO,
- TYPE_VIRTIO_MMIO)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtIOMMIOProxy, VIRTIO_MMIO)
#define VIRT_MAGIC 0x74726976 /* 'virt' */
#define VIRT_VERSION 2
#include "qom/object.h"
#define TYPE_VIRTIO_NET "virtio-net-device"
-typedef struct VirtIONet VirtIONet;
-DECLARE_INSTANCE_CHECKER(VirtIONet, VIRTIO_NET,
- TYPE_VIRTIO_NET)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtIONet, VIRTIO_NET)
#define TX_TIMER_INTERVAL 150000 /* 150 us */
#include "qom/object.h"
#define TYPE_VIRTIO_RNG "virtio-rng-device"
-typedef struct VirtIORNG VirtIORNG;
-DECLARE_INSTANCE_CHECKER(VirtIORNG, VIRTIO_RNG,
- TYPE_VIRTIO_RNG)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtIORNG, VIRTIO_RNG)
#define VIRTIO_RNG_GET_PARENT_CLASS(obj) \
OBJECT_GET_PARENT_CLASS(obj, TYPE_VIRTIO_RNG)
#include "sysemu/iothread.h"
#define TYPE_VIRTIO_SCSI_COMMON "virtio-scsi-common"
-typedef struct VirtIOSCSICommon VirtIOSCSICommon;
-DECLARE_INSTANCE_CHECKER(VirtIOSCSICommon, VIRTIO_SCSI_COMMON,
- TYPE_VIRTIO_SCSI_COMMON)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtIOSCSICommon, VIRTIO_SCSI_COMMON)
#define TYPE_VIRTIO_SCSI "virtio-scsi-device"
-typedef struct VirtIOSCSI VirtIOSCSI;
-DECLARE_INSTANCE_CHECKER(VirtIOSCSI, VIRTIO_SCSI,
- TYPE_VIRTIO_SCSI)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtIOSCSI, VIRTIO_SCSI)
#define VIRTIO_SCSI_MAX_CHANNEL 0
#define VIRTIO_SCSI_MAX_TARGET 255
typedef struct VirtIOSerial VirtIOSerial;
#define TYPE_VIRTIO_SERIAL_BUS "virtio-serial-bus"
-typedef struct VirtIOSerialBus VirtIOSerialBus;
-DECLARE_INSTANCE_CHECKER(VirtIOSerialBus, VIRTIO_SERIAL_BUS,
- TYPE_VIRTIO_SERIAL_BUS)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtIOSerialBus, VIRTIO_SERIAL_BUS)
struct VirtIOSerialPortClass {
void virtio_serial_throttle_port(VirtIOSerialPort *port, bool throttle);
#define TYPE_VIRTIO_SERIAL "virtio-serial-device"
-DECLARE_INSTANCE_CHECKER(VirtIOSerial, VIRTIO_SERIAL,
- TYPE_VIRTIO_SERIAL)
+OBJECT_DECLARE_SIMPLE_TYPE(VirtIOSerial, VIRTIO_SERIAL)
#endif
#include "qom/object.h"
#define TYPE_CMSDK_APB_WATCHDOG "cmsdk-apb-watchdog"
-typedef struct CMSDKAPBWatchdog CMSDKAPBWatchdog;
-DECLARE_INSTANCE_CHECKER(CMSDKAPBWatchdog, CMSDK_APB_WATCHDOG,
- TYPE_CMSDK_APB_WATCHDOG)
+OBJECT_DECLARE_SIMPLE_TYPE(CMSDKAPBWatchdog, CMSDK_APB_WATCHDOG)
/*
* This shares the same struct (and cast macro) as the base
#include "qom/object.h"
#define TYPE_IMX2_WDT "imx2.wdt"
-typedef struct IMX2WdtState IMX2WdtState;
-DECLARE_INSTANCE_CHECKER(IMX2WdtState, IMX2_WDT,
- TYPE_IMX2_WDT)
+OBJECT_DECLARE_SIMPLE_TYPE(IMX2WdtState, IMX2_WDT)
enum IMX2WdtRegisters {
IMX2_WDT_WCR = 0x0000, /* Control Register */
struct XenDiskDevice {
XenBlockDevice blockdev;
};
-typedef struct XenDiskDevice XenDiskDevice;
#define TYPE_XEN_DISK_DEVICE "xen-disk"
-DECLARE_INSTANCE_CHECKER(XenDiskDevice, XEN_DISK_DEVICE,
- TYPE_XEN_DISK_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(XenDiskDevice, XEN_DISK_DEVICE)
struct XenCDRomDevice {
XenBlockDevice blockdev;
};
-typedef struct XenCDRomDevice XenCDRomDevice;
#define TYPE_XEN_CDROM_DEVICE "xen-cdrom"
-DECLARE_INSTANCE_CHECKER(XenCDRomDevice, XEN_CDROM_DEVICE,
- TYPE_XEN_CDROM_DEVICE)
+OBJECT_DECLARE_SIMPLE_TYPE(XenCDRomDevice, XEN_CDROM_DEVICE)
#endif /* HW_XEN_BLOCK_H */
#include "qom/object.h"
#define TYPE_QIO_CHANNEL_BUFFER "qio-channel-buffer"
-typedef struct QIOChannelBuffer QIOChannelBuffer;
-DECLARE_INSTANCE_CHECKER(QIOChannelBuffer, QIO_CHANNEL_BUFFER,
- TYPE_QIO_CHANNEL_BUFFER)
+OBJECT_DECLARE_SIMPLE_TYPE(QIOChannelBuffer, QIO_CHANNEL_BUFFER)
/**
#include "qom/object.h"
#define TYPE_QIO_CHANNEL_COMMAND "qio-channel-command"
-typedef struct QIOChannelCommand QIOChannelCommand;
-DECLARE_INSTANCE_CHECKER(QIOChannelCommand, QIO_CHANNEL_COMMAND,
- TYPE_QIO_CHANNEL_COMMAND)
+OBJECT_DECLARE_SIMPLE_TYPE(QIOChannelCommand, QIO_CHANNEL_COMMAND)
#include "qom/object.h"
#define TYPE_QIO_CHANNEL_FILE "qio-channel-file"
-typedef struct QIOChannelFile QIOChannelFile;
-DECLARE_INSTANCE_CHECKER(QIOChannelFile, QIO_CHANNEL_FILE,
- TYPE_QIO_CHANNEL_FILE)
+OBJECT_DECLARE_SIMPLE_TYPE(QIOChannelFile, QIO_CHANNEL_FILE)
/**
#include "qom/object.h"
#define TYPE_QIO_CHANNEL_SOCKET "qio-channel-socket"
-typedef struct QIOChannelSocket QIOChannelSocket;
-DECLARE_INSTANCE_CHECKER(QIOChannelSocket, QIO_CHANNEL_SOCKET,
- TYPE_QIO_CHANNEL_SOCKET)
+OBJECT_DECLARE_SIMPLE_TYPE(QIOChannelSocket, QIO_CHANNEL_SOCKET)
/**
#include "qom/object.h"
#define TYPE_QIO_CHANNEL_TLS "qio-channel-tls"
-typedef struct QIOChannelTLS QIOChannelTLS;
-DECLARE_INSTANCE_CHECKER(QIOChannelTLS, QIO_CHANNEL_TLS,
- TYPE_QIO_CHANNEL_TLS)
+OBJECT_DECLARE_SIMPLE_TYPE(QIOChannelTLS, QIO_CHANNEL_TLS)
/**
#include "qom/object.h"
#define TYPE_QIO_CHANNEL_WEBSOCK "qio-channel-websock"
-typedef struct QIOChannelWebsock QIOChannelWebsock;
-DECLARE_INSTANCE_CHECKER(QIOChannelWebsock, QIO_CHANNEL_WEBSOCK,
- TYPE_QIO_CHANNEL_WEBSOCK)
+OBJECT_DECLARE_SIMPLE_TYPE(QIOChannelWebsock, QIO_CHANNEL_WEBSOCK)
typedef union QIOChannelWebsockMask QIOChannelWebsockMask;
};
#define TYPE_CAN_BUS "can-bus"
-DECLARE_INSTANCE_CHECKER(CanBusState, CAN_BUS,
- TYPE_CAN_BUS)
+OBJECT_DECLARE_SIMPLE_TYPE(CanBusState, CAN_BUS)
int can_bus_filter_match(struct qemu_can_filter *filter, qemu_canid_t can_id);
#include "qom/object.h"
#define TYPE_RNG_RANDOM "rng-random"
-typedef struct RngRandom RngRandom;
-DECLARE_INSTANCE_CHECKER(RngRandom, RNG_RANDOM,
- TYPE_RNG_RANDOM)
+OBJECT_DECLARE_SIMPLE_TYPE(RngRandom, RNG_RANDOM)
#endif
} RDMAContext;
#define TYPE_QIO_CHANNEL_RDMA "qio-channel-rdma"
-typedef struct QIOChannelRDMA QIOChannelRDMA;
-DECLARE_INSTANCE_CHECKER(QIOChannelRDMA, QIO_CHANNEL_RDMA,
- TYPE_QIO_CHANNEL_RDMA)
+OBJECT_DECLARE_SIMPLE_TYPE(QIOChannelRDMA, QIO_CHANNEL_RDMA)
#endif /*DEBUG_CAN*/
#define TYPE_CAN_HOST_SOCKETCAN "can-host-socketcan"
-typedef struct CanHostSocketCAN CanHostSocketCAN;
-DECLARE_INSTANCE_CHECKER(CanHostSocketCAN, CAN_HOST_SOCKETCAN,
- TYPE_CAN_HOST_SOCKETCAN)
+OBJECT_DECLARE_SIMPLE_TYPE(CanHostSocketCAN, CAN_HOST_SOCKETCAN)
#define CAN_READ_BUF_LEN 5
struct CanHostSocketCAN {
#define TYPE_FILTER_DUMP "filter-dump"
-typedef struct NetFilterDumpState NetFilterDumpState;
-DECLARE_INSTANCE_CHECKER(NetFilterDumpState, FILTER_DUMP,
- TYPE_FILTER_DUMP)
+OBJECT_DECLARE_SIMPLE_TYPE(NetFilterDumpState, FILTER_DUMP)
struct NetFilterDumpState {
NetFilterState nfs;
#define TYPE_FILTER_BUFFER "filter-buffer"
-typedef struct FilterBufferState FilterBufferState;
-DECLARE_INSTANCE_CHECKER(FilterBufferState, FILTER_BUFFER,
- TYPE_FILTER_BUFFER)
+OBJECT_DECLARE_SIMPLE_TYPE(FilterBufferState, FILTER_BUFFER)
struct FilterBufferState {
NetFilterState parent_obj;
#define TYPE_FILTER_REPLAY "filter-replay"
-typedef struct NetFilterReplayState NetFilterReplayState;
-DECLARE_INSTANCE_CHECKER(NetFilterReplayState, FILTER_REPLAY,
- TYPE_FILTER_REPLAY)
+OBJECT_DECLARE_SIMPLE_TYPE(NetFilterReplayState, FILTER_REPLAY)
struct NetFilterReplayState {
NetFilterState nfs;
#include "util.h"
#define TYPE_FILTER_REWRITER "filter-rewriter"
-typedef struct RewriterState RewriterState;
-DECLARE_INSTANCE_CHECKER(RewriterState, FILTER_REWRITER,
- TYPE_FILTER_REWRITER)
+OBJECT_DECLARE_SIMPLE_TYPE(RewriterState, FILTER_REWRITER)
#define FAILOVER_MODE_ON true
#define FAILOVER_MODE_OFF false
#define TYPE_PR_MANAGER_HELPER "pr-manager-helper"
-typedef struct PRManagerHelper PRManagerHelper;
-DECLARE_INSTANCE_CHECKER(PRManagerHelper, PR_MANAGER_HELPER,
- TYPE_PR_MANAGER_HELPER)
+OBJECT_DECLARE_SIMPLE_TYPE(PRManagerHelper, PR_MANAGER_HELPER)
struct PRManagerHelper {
/* <private> */
#include "qom/object.h"
#define TYPE_SEV_GUEST "sev-guest"
-typedef struct SevGuestState SevGuestState;
-DECLARE_INSTANCE_CHECKER(SevGuestState, SEV_GUEST,
- TYPE_SEV_GUEST)
+OBJECT_DECLARE_SIMPLE_TYPE(SevGuestState, SEV_GUEST)
/**
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