#include "hw/ptimer.h"
#include "hw/qdev-properties.h"
#include "qemu/error-report.h"
-#include "qemu/main-loop.h"
#include "qemu/module.h"
#define DEFAULT_FREQUENCY (50*1000000)
MemoryRegion iomem;
- QEMUBH *bh;
ptimer_state *ptimer;
qemu_irq irq;
s->regs[R_SR] &= ~SR_TO;
break;
case R_CR:
+ ptimer_transaction_begin(s->ptimer);
s->regs[R_CR] = value;
if (s->regs[R_CR] & CR_START) {
ptimer_run(s->ptimer, 1);
if (s->regs[R_CR] & CR_STOP) {
ptimer_stop(s->ptimer);
}
+ ptimer_transaction_commit(s->ptimer);
break;
case R_PERIOD:
s->regs[R_PERIOD] = value;
+ ptimer_transaction_begin(s->ptimer);
ptimer_set_count(s->ptimer, value);
+ ptimer_transaction_commit(s->ptimer);
break;
case R_SNAPSHOT:
error_report("lm32_timer: write access to read only register 0x"
for (i = 0; i < R_MAX; i++) {
s->regs[i] = 0;
}
+ ptimer_transaction_begin(s->ptimer);
ptimer_stop(s->ptimer);
+ ptimer_transaction_commit(s->ptimer);
}
static void lm32_timer_init(Object *obj)
{
LM32TimerState *s = LM32_TIMER(dev);
- s->bh = qemu_bh_new(timer_hit, s);
- s->ptimer = ptimer_init_with_bh(s->bh, PTIMER_POLICY_DEFAULT);
+ s->ptimer = ptimer_init(timer_hit, s, PTIMER_POLICY_DEFAULT);
+ ptimer_transaction_begin(s->ptimer);
ptimer_set_freq(s->ptimer, s->freq_hz);
+ ptimer_transaction_commit(s->ptimer);
}
static const VMStateDescription vmstate_lm32_timer = {