update seabios to 1.16.2
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# gpg: Signature made Thu 16 Mar 2023 10:38:59 GMT
# gpg: using RSA key
A0328CFFB93A17A79901FE7D4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138
* tag 'seabios-1.16.2-
20230316-pull-request' of https://gitlab.com/kraxel/qemu:
update seabios binaries to 1.16.2
update seabios submodule to 1.16.2
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
In QEMU, the second kind is named ``atomic_OP_fetch``.
- different atomic read-modify-write operations in Linux imply
- a different set of memory barriers; in QEMU, all of them enforce
- sequential consistency.
-
-- in QEMU, ``qatomic_read()`` and ``qatomic_set()`` do not participate in
- the ordering enforced by read-modify-write operations.
- This is because QEMU uses the C11 memory model. The following example
- is correct in Linux but not in QEMU:
+ a different set of memory barriers. In QEMU, all of them enforce
+ sequential consistency: there is a single order in which the
+ program sees them happen.
+
+- however, according to the C11 memory model that QEMU uses, this order
+ does not propagate to other memory accesses on either side of the
+ read-modify-write operation. As far as those are concerned, the
+ operation consist of just a load-acquire followed by a store-release.
+ Stores that precede the RMW operation, and loads that follow it, can
+ still be reordered and will happen *in the middle* of the read-modify-write
+ operation!
+
+ Therefore, the following example is correct in Linux but not in QEMU:
+----------------------------------+--------------------------------+
| Linux (correct) | QEMU (incorrect) |
ps2_put_keycode(s, 0xaa);
}
}
+ } else if ((qcode == Q_KEY_CODE_LANG1 || qcode == Q_KEY_CODE_LANG2)
+ && !key->down) {
+ /* Ignore release for these keys */
} else {
if (qcode < qemu_input_map_qcode_to_atset1_len) {
keycode = qemu_input_map_qcode_to_atset1[qcode];
ps2_put_keycode(s, 0x12);
}
}
+ } else if ((qcode == Q_KEY_CODE_LANG1 || qcode == Q_KEY_CODE_LANG2) &&
+ !key->down) {
+ /* Ignore release for these keys */
} else {
if (qcode < qemu_input_map_qcode_to_atset2_len) {
keycode = qemu_input_map_qcode_to_atset2[qcode];
s->ioredtbl[index] |= ro_bits;
s->irq_eoi[index] = 0;
ioapic_fix_edge_remote_irr(&s->ioredtbl[index]);
+ ioapic_update_kvm_routes(s);
ioapic_service(s);
}
}
ioapic_eoi_broadcast(val);
break;
}
-
- ioapic_update_kvm_routes(s);
}
static const MemoryRegionOps ioapic_io_ops = {
object_ref(OBJECT(tioc));
g_source_add_child_source(source, child);
+ g_source_unref(child);
}
static GSource *qio_channel_tls_create_watch(QIOChannel *ioc,
# @lang1: since 6.1
# @lang2: since 6.1
#
+# @f13: since 8.0
+# @f14: since 8.0
+# @f15: since 8.0
+# @f16: since 8.0
+# @f17: since 8.0
+# @f18: since 8.0
+# @f19: since 8.0
+# @f20: since 8.0
+# @f21: since 8.0
+# @f22: since 8.0
+# @f23: since 8.0
+# @f24: since 8.0
+#
# 'sysrq' was mistakenly added to hack around the fact that
# the ps2 driver was not generating correct scancodes sequences
# when 'alt+print' was pressed. This flaw is now fixed and the
'volumeup', 'volumedown', 'mediaselect',
'mail', 'calculator', 'computer',
'ac_home', 'ac_back', 'ac_forward', 'ac_refresh', 'ac_bookmarks',
- 'lang1', 'lang2' ] }
+ 'lang1', 'lang2','f13','f14','f15','f16','f17','f18','f19','f20','f21','f22','f23','f24' ] }
##
# @KeyValueKind:
pid_file_realpath = g_malloc0(PATH_MAX);
if (!realpath(pid_file, pid_file_realpath)) {
- error_report("cannot resolve PID file path: %s: %s",
- pid_file, strerror(errno));
- unlink(pid_file);
- exit(1);
+ if (errno != ENOENT) {
+ warn_report("not removing PID file on exit: cannot resolve PID "
+ "file path: %s: %s", pid_file, strerror(errno));
+ }
+ return;
}
qemu_unlink_pidfile_notifier = (struct UnlinkPidfileNotifier) {
kvm_rate_limit_on_bus_lock();
}
+#ifdef CONFIG_XEN_EMU
/*
* If the callback is asserted as a GSI (or PCI INTx) then check if
* vcpu_info->evtchn_upcall_pending has been cleared, and deassert
if (x86_cpu->env.xen_callback_asserted) {
kvm_xen_maybe_deassert_callback(cpu);
}
+#endif
/* We need to protect the apic state against concurrent accesses from
* different threads in case the userspace irqchip is used. */
-Subproject commit d21009b1c9f94b740ea66be8e48a1d8ad8124023
+Subproject commit f5772a62ec52591ff6870b7e8ef32482371f22c6