Merge remote-tracking branch 'remotes/philmd-gitlab/tags/avr-port-20200711' into...

8bit AVR port from Michael Rolnik.

Michael started to work on the AVR port few years ago [*] and kept
improving the code over various series.

List of people who help him (in chronological order):
- Richard Henderson
- Sarah Harris and Edward Robbins
- Philippe Mathieu-Daudé and Aleksandar Markovic
- Pavel Dovgalyuk
- Thomas Huth

[*] The oldest contribution I could find on the list is from 2016:
https://lists.nongnu.org/archive/html/qemu-devel/2016-06/msg02985.html

Tests included:

$ avocado --show=app run -t arch:avr tests/acceptance/
Fetching asset from tests/acceptance/machine_avr6.py:AVR6Machine.test_freertos
 (1/1) tests/acceptance/machine_avr6.py:AVR6Machine.test_freertos: PASS (2.13 s)
RESULTS    : PASS 1 | ERROR 0 | FAIL 0 | SKIP 0 | WARN 0 | INTERRUPT 0 | CANCEL 0
JOB TIME   : 2.35 s

$ make check-qtest-avr
  TEST    check-qtest-avr: tests/qtest/boot-serial-test
  TEST    check-qtest-avr: tests/qtest/cdrom-test
  TEST    check-qtest-avr: tests/qtest/device-introspect-test
  TEST    check-qtest-avr: tests/qtest/machine-none-test
  TEST    check-qtest-avr: tests/qtest/qmp-test
  TEST    check-qtest-avr: tests/qtest/qmp-cmd-test
  TEST    check-qtest-avr: tests/qtest/qom-test
  TEST    check-qtest-avr: tests/qtest/test-hmp
  TEST    check-qtest-avr: tests/qtest/qos-test

CI results:
. https://cirrus-ci.com/build/5697049146425344
. https://gitlab.com/philmd/qemu/-/pipelines/165328058
. https://travis-ci.org/github/philmd/qemu/builds/705817933
. https://app.shippable.com/github/philmd/qemu/runs/822/summary/console

# gpg: Signature made Sat 11 Jul 2020 10:03:11 BST
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* remotes/philmd-gitlab/tags/avr-port-20200711: (32 commits)
  target/avr/disas: Fix store instructions display order
  target/avr/cpu: Fix $PC displayed address
  target/avr/cpu: Drop tlb_flush() in avr_cpu_reset()
  target/avr: Add section into QEMU documentation
  tests/acceptance: Test the Arduino MEGA2560 board
  tests/boot-serial: Test some Arduino boards (AVR based)
  hw/avr: Add limited support for some Arduino boards
  hw/avr: Add some ATmega microcontrollers
  hw/avr: Add support for loading ELF/raw binaries
  hw/misc: avr: Add limited support for power reduction device
  hw/timer: avr: Add limited support for 16-bit timer peripheral
  hw/char: avr: Add limited support for USART peripheral
  tests/machine-none: Add AVR support
  target/avr: Register AVR support with the rest of QEMU
  target/avr: Add support for disassembling via option '-d in_asm'
  target/avr: Initialize TCG register variables
  target/avr: Add instruction translation - CPU main translation function
  target/avr: Add instruction translation - MCU Control Instructions
  target/avr: Add instruction translation - Bit and Bit-test Instructions
  target/avr: Add instruction translation - Data Transfer Instructions
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

diff --cc MAINTAINERS
Simple merge

diff --cc softmmu/arch_init.c
index 8afea4748bad50cdf7ff4dac536c25c664e3fc9d,0000000000000000000000000000000000000000..7fd5c09b2b93edd2fe66c9032e590c958111f671
mode 100644,000000..100644
--- 1/softmmu/arch_init.c
--- /dev/null
+++ b/softmmu/arch_init.c
@@@ -1,113 -1,0 +1,115 @@@
 +/*
 + * QEMU System Emulator
 + *
 + * Copyright (c) 2003-2008 Fabrice Bellard
 + *
 + * Permission is hereby granted, free of charge, to any person obtaining a copy
 + * of this software and associated documentation files (the "Software"), to deal
 + * in the Software without restriction, including without limitation the rights
 + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 + * copies of the Software, and to permit persons to whom the Software is
 + * furnished to do so, subject to the following conditions:
 + *
 + * The above copyright notice and this permission notice shall be included in
 + * all copies or substantial portions of the Software.
 + *
 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 + * THE SOFTWARE.
 + */
 +#include "qemu/osdep.h"
 +#include "cpu.h"
 +#include "sysemu/sysemu.h"
 +#include "sysemu/arch_init.h"
 +#include "hw/pci/pci.h"
 +#include "hw/audio/soundhw.h"
 +#include "qapi/error.h"
 +#include "qemu/config-file.h"
 +#include "qemu/error-report.h"
 +#include "hw/acpi/acpi.h"
 +#include "qemu/help_option.h"
 +
 +#ifdef TARGET_SPARC
 +int graphic_width = 1024;
 +int graphic_height = 768;
 +int graphic_depth = 8;
 +#elif defined(TARGET_M68K)
 +int graphic_width = 800;
 +int graphic_height = 600;
 +int graphic_depth = 8;
 +#else
 +int graphic_width = 800;
 +int graphic_height = 600;
 +int graphic_depth = 32;
 +#endif
 +
 +
 +#if defined(TARGET_ALPHA)
 +#define QEMU_ARCH QEMU_ARCH_ALPHA
 +#elif defined(TARGET_ARM)
 +#define QEMU_ARCH QEMU_ARCH_ARM
 +#elif defined(TARGET_CRIS)
 +#define QEMU_ARCH QEMU_ARCH_CRIS
 +#elif defined(TARGET_HPPA)
 +#define QEMU_ARCH QEMU_ARCH_HPPA
 +#elif defined(TARGET_I386)
 +#define QEMU_ARCH QEMU_ARCH_I386
 +#elif defined(TARGET_LM32)
 +#define QEMU_ARCH QEMU_ARCH_LM32
 +#elif defined(TARGET_M68K)
 +#define QEMU_ARCH QEMU_ARCH_M68K
 +#elif defined(TARGET_MICROBLAZE)
 +#define QEMU_ARCH QEMU_ARCH_MICROBLAZE
 +#elif defined(TARGET_MIPS)
 +#define QEMU_ARCH QEMU_ARCH_MIPS
 +#elif defined(TARGET_MOXIE)
 +#define QEMU_ARCH QEMU_ARCH_MOXIE
 +#elif defined(TARGET_NIOS2)
 +#define QEMU_ARCH QEMU_ARCH_NIOS2
 +#elif defined(TARGET_OPENRISC)
 +#define QEMU_ARCH QEMU_ARCH_OPENRISC
 +#elif defined(TARGET_PPC)
 +#define QEMU_ARCH QEMU_ARCH_PPC
 +#elif defined(TARGET_RISCV)
 +#define QEMU_ARCH QEMU_ARCH_RISCV
 +#elif defined(TARGET_RX)
 +#define QEMU_ARCH QEMU_ARCH_RX
 +#elif defined(TARGET_S390X)
 +#define QEMU_ARCH QEMU_ARCH_S390X
 +#elif defined(TARGET_SH4)
 +#define QEMU_ARCH QEMU_ARCH_SH4
 +#elif defined(TARGET_SPARC)
 +#define QEMU_ARCH QEMU_ARCH_SPARC
 +#elif defined(TARGET_TRICORE)
 +#define QEMU_ARCH QEMU_ARCH_TRICORE
 +#elif defined(TARGET_UNICORE32)
 +#define QEMU_ARCH QEMU_ARCH_UNICORE32
 +#elif defined(TARGET_XTENSA)
 +#define QEMU_ARCH QEMU_ARCH_XTENSA
++#elif defined(TARGET_AVR)
++#define QEMU_ARCH QEMU_ARCH_AVR
 +#endif
 +
 +const uint32_t arch_type = QEMU_ARCH;
 +
 +int kvm_available(void)
 +{
 +#ifdef CONFIG_KVM
 +    return 1;
 +#else
 +    return 0;
 +#endif
 +}
 +
 +int xen_available(void)
 +{
 +#ifdef CONFIG_XEN
 +    return 1;
 +#else
 +    return 0;
 +#endif
 +}