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19 months agocontrib/gitdm: add Paul to individual contributors
Alex Bennée [Thu, 29 Sep 2022 11:42:28 +0000 (12:42 +0100)]
contrib/gitdm: add Paul to individual contributors

Also map his old codesourcery address to his canonical address.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Cc: Paul Brook <paul@nowt.org>
Message-Id: <20220929114231.583801-49-alex.bennee@linaro.org>

19 months agocontrib/gitdm: add mapping for Loongson Technology
Alex Bennée [Thu, 29 Sep 2022 11:42:27 +0000 (12:42 +0100)]
contrib/gitdm: add mapping for Loongson Technology

Please confirm you are happy with this mapping.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220929114231.583801-48-alex.bennee@linaro.org>

19 months agoaccel/kvm: move kvm_update_guest_debug to inline stub
Alex Bennée [Thu, 29 Sep 2022 11:42:26 +0000 (12:42 +0100)]
accel/kvm: move kvm_update_guest_debug to inline stub

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-47-alex.bennee@linaro.org>

19 months agogdbstub: move guest debug support check to ops
Alex Bennée [Thu, 29 Sep 2022 11:42:25 +0000 (12:42 +0100)]
gdbstub: move guest debug support check to ops

This removes the final hard coding of kvm_enabled() in gdbstub and
moves the check to an AccelOps.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Mads Ynddal <mads@ynddal.dk>
Message-Id: <20220929114231.583801-46-alex.bennee@linaro.org>

19 months agogdbstub: move breakpoint logic to accel ops
Alex Bennée [Thu, 29 Sep 2022 11:42:24 +0000 (12:42 +0100)]
gdbstub: move breakpoint logic to accel ops

As HW virtualization requires specific support to handle breakpoints
lets push out special casing out of the core gdbstub code and into
AccelOpsClass. This will make it easier to add other accelerator
support and reduces some of the stub shenanigans.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Mads Ynddal <mads@ynddal.dk>
Message-Id: <20220929114231.583801-45-alex.bennee@linaro.org>

19 months agogdbstub: move sstep flags probing into AccelClass
Alex Bennée [Thu, 29 Sep 2022 11:42:23 +0000 (12:42 +0100)]
gdbstub: move sstep flags probing into AccelClass

The support of single-stepping is very much dependent on support from
the accelerator we are using. To avoid special casing in gdbstub move
the probing out to an AccelClass function so future accelerators can
put their code there.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Mads Ynddal <mads@ynddal.dk>
Message-Id: <20220929114231.583801-44-alex.bennee@linaro.org>

19 months agogdbstub: move into its own sub directory
Alex Bennée [Thu, 29 Sep 2022 11:42:22 +0000 (12:42 +0100)]
gdbstub: move into its own sub directory

This is in preparation of future refactoring as well as cleaning up
the source tree. Aside from the minor tweaks to meson and trace.h this
is pure code motion.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-43-alex.bennee@linaro.org>

19 months agosemihosting: update link to spec
Alex Bennée [Thu, 29 Sep 2022 11:42:21 +0000 (12:42 +0100)]
semihosting: update link to spec

The old link has moved but it seems the document is now hosted on
Arm's github along with a license update to CC-BY-SA-4.0.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220929114231.583801-42-alex.bennee@linaro.org>

19 months agodocs/devel: document the test plugins
Alex Bennée [Thu, 29 Sep 2022 11:42:20 +0000 (12:42 +0100)]
docs/devel: document the test plugins

Although the test plugins are fairly basic they are still useful for
some things so we should document their existence.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-41-alex.bennee@linaro.org>

19 months agocontrib/plugins: reset skip when matching in execlog
Alex Bennée [Thu, 29 Sep 2022 11:42:19 +0000 (12:42 +0100)]
contrib/plugins: reset skip when matching in execlog

The purpose of the matches was to only track the execution of
instructions we care about. Without resetting skip to the value at the
start of the block we end up dumping all instructions after the match
with the consequent load on the instrumentation.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Cc: Alexandre Iooss <erdnaxe@crans.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220929114231.583801-40-alex.bennee@linaro.org>

19 months agodocs/devel: move API to end of tcg-plugins.rst
Alex Bennée [Thu, 29 Sep 2022 11:42:18 +0000 (12:42 +0100)]
docs/devel: move API to end of tcg-plugins.rst

The API documentation is quite dry and doesn't flow nicely with the
rest of the document. Move it to its own section at the bottom along
with a little leader text to remind people to update it.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220929114231.583801-39-alex.bennee@linaro.org>

19 months agodocs/devel: clean-up qemu invocations in tcg-plugins
Alex Bennée [Thu, 29 Sep 2022 11:42:17 +0000 (12:42 +0100)]
docs/devel: clean-up qemu invocations in tcg-plugins

We currently have the final binaries in the root of the build dir so
the build prefix is superfluous. Additionally add a shell prompt to be
more in line with the rest of the code.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220929114231.583801-38-alex.bennee@linaro.org>

19 months agoplugins: Assert mmu_idx in range before use in qemu_plugin_get_hwaddr
Richard Henderson [Thu, 29 Sep 2022 11:42:16 +0000 (12:42 +0100)]
plugins: Assert mmu_idx in range before use in qemu_plugin_get_hwaddr

Coverity reports out-of-bound accesses here.  This should be a
false positive due to how the index is decoded from MemOpIdx.

Fixes: Coverity CID 1487201
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Damien Hedde <damien.hedde@greensocs.com>
Message-Id: <20220401190233.329360-1-richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220929114231.583801-37-alex.bennee@linaro.org>

19 months agoplugins: extend execlog to filter matches
Alex Bennée [Thu, 29 Sep 2022 11:42:15 +0000 (12:42 +0100)]
plugins: extend execlog to filter matches

Sometimes the whole execlog is just two much so add the ability to
filter by instruction opcode or address.

[AJB: this shows for example

 qemu-system-aarch64 -display none -serial mon:stdio \
   -M virt -cpu max \
   -semihosting-config enable=on \
   -kernel ./tests/tcg/aarch64-softmmu/memory-sve \
   -plugin ./contrib/plugins/libexeclog.so,ifilter=st1w,afilter=0x40001808 -d plugin -D plugin.out

the st1w SVE instruction is not instrumenting its stores.]

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alexandre Iooss <erdnaxe@crans.org>
Cc: Robert Henry <robhenry@microsoft.com>
Cc: Aaron Lindsay <aaron@os.amperecomputing.com>
Message-Id: <20220929114231.583801-36-alex.bennee@linaro.org>

19 months agodisas: use result of ->read_memory_func
Alex Bennée [Thu, 29 Sep 2022 11:42:14 +0000 (12:42 +0100)]
disas: use result of ->read_memory_func

This gets especially confusing if you start plugging in host addresses
from a trace and you wonder why the output keeps changing. Report when
read_memory_func fails instead of blindly disassembling the buffer
contents.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220929114231.583801-35-alex.bennee@linaro.org>

19 months agodisas: generalise plugin_printf and use for monitor_disas
Alex Bennée [Thu, 29 Sep 2022 11:42:13 +0000 (12:42 +0100)]
disas: generalise plugin_printf and use for monitor_disas

Rather than assembling our output piecemeal lets use the same approach
as the plugin disas interface to build the disassembly string before
printing it.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220929114231.583801-34-alex.bennee@linaro.org>

19 months agomonitor: expose monitor_puts to rest of code
Alex Bennée [Thu, 29 Sep 2022 11:42:12 +0000 (12:42 +0100)]
monitor: expose monitor_puts to rest of code

This helps us construct strings elsewhere before echoing to the
monitor. It avoids having to jump through hoops like:

  monitor_printf(mon, "%s", s->str);

It will be useful in following patches but for now convert all
existing plain "%s" printfs to use the _puts api.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220929114231.583801-33-alex.bennee@linaro.org>

19 months agopc-bios/vof: Adopt meson style Make output
Paolo Bonzini [Thu, 29 Sep 2022 11:42:11 +0000 (12:42 +0100)]
pc-bios/vof: Adopt meson style Make output

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-32-alex.bennee@linaro.org>

19 months agopc-bios/s390-ccw: Adopt meson style Make output
Paolo Bonzini [Thu, 29 Sep 2022 11:42:10 +0000 (12:42 +0100)]
pc-bios/s390-ccw: Adopt meson style Make output

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-31-alex.bennee@linaro.org>

19 months agopc-bios/optionrom: Adopt meson style Make output
Paolo Bonzini [Thu, 29 Sep 2022 11:42:09 +0000 (12:42 +0100)]
pc-bios/optionrom: Adopt meson style Make output

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-30-alex.bennee@linaro.org>

19 months agoconfigure: build ROMs with container-based cross compilers
Paolo Bonzini [Thu, 29 Sep 2022 11:42:08 +0000 (12:42 +0100)]
configure: build ROMs with container-based cross compilers

s390-ccw remains a bit more complex, because the -march=z900 test is done
only for the native cross compiler.  Otherwise, all that is needed is
to pass the (now mandatory) target argument to write_target_makefile.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-29-alex.bennee@linaro.org>

19 months agoconfigure: cleanup creation of tests/tcg target config
Paolo Bonzini [Thu, 29 Sep 2022 11:42:07 +0000 (12:42 +0100)]
configure: cleanup creation of tests/tcg target config

Remove the symlink to tests/tcg/config-*.mak, which is possible now
that unused target config files are not created either.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-28-alex.bennee@linaro.org>

19 months agoconfigure: unify creation of cross-compilation Makefiles
Paolo Bonzini [Thu, 29 Sep 2022 11:42:06 +0000 (12:42 +0100)]
configure: unify creation of cross-compilation Makefiles

Let write_target_makefile handle both host and container cross compilers.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-27-alex.bennee@linaro.org>

19 months agoconfigure: move tests/tcg/Makefile.prereqs to root build directory
Paolo Bonzini [Thu, 29 Sep 2022 11:42:05 +0000 (12:42 +0100)]
configure: move tests/tcg/Makefile.prereqs to root build directory

It will not be specific to tests/tcg anymore, since it will be possible to
build firmware using container-based cross compilers too.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-26-alex.bennee@linaro.org>

19 months agotests/tcg: move compiler tests to Makefiles
Paolo Bonzini [Thu, 29 Sep 2022 11:42:04 +0000 (12:42 +0100)]
tests/tcg: move compiler tests to Makefiles

Further decoupling of tests/tcg from the main QEMU Makefile, and making
the build more similar between the cross compiler case and the vetted
container images.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-25-alex.bennee@linaro.org>

19 months agotests/tcg: clean up calls to run-test
Paolo Bonzini [Thu, 29 Sep 2022 11:42:03 +0000 (12:42 +0100)]
tests/tcg: clean up calls to run-test

Almost all invocations of run-test have either "$* on $(TARGET_NAME)"
or "$< on $(TARGET_NAME)" as the last argument.  So provide a default
test name, while allowing an escape hatch for custom names.

As an additional simplification, remove the need to do shell quoting.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-24-alex.bennee@linaro.org>

19 months agotests/tcg: unify ppc64 and ppc64le Makefiles
Paolo Bonzini [Thu, 29 Sep 2022 11:42:02 +0000 (12:42 +0100)]
tests/tcg: unify ppc64 and ppc64le Makefiles

Make tests/tcg/ppc64le include tests/tcg/ppc64 instead of duplicating
the rules.  Because the ppc64le vpath includes tests/tcg/ppc64 but
not vice versa, the tests have to be moved from tests/tcg/ppc64le/
to tests/tcg/ppc64.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-23-alex.bennee@linaro.org>

19 months agotests/tcg: add distclean rule
Paolo Bonzini [Thu, 29 Sep 2022 11:42:01 +0000 (12:42 +0100)]
tests/tcg: add distclean rule

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-22-alex.bennee@linaro.org>

19 months agotests/tcg: remove -f from Makefile invocation
Paolo Bonzini [Thu, 29 Sep 2022 11:42:00 +0000 (12:42 +0100)]
tests/tcg: remove -f from Makefile invocation

Instead of linking tests/tcg/Makefile.target into the build tree, name
the symbolic link "Makefile" and create it in every target subdirectory.
This makes it possible to just invoke "make" in tests/tcg subdirectories.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-21-alex.bennee@linaro.org>

19 months agotests: simplify Makefile invocation for tests/tcg
Paolo Bonzini [Thu, 29 Sep 2022 11:41:59 +0000 (12:41 +0100)]
tests: simplify Makefile invocation for tests/tcg

Remove the DOCKER_SCRIPT and TARGET variable from the Makefile invocation
for tests/tcg.  For DOCKER_SCRIPT, resolve the path to docker.py in configure;
for TARGET, move it to config-$(TARGET).mak and use a symbolic link to break
the cycle.

The symbolic link is still needed because tests/tcg includes dummy config files
for targets that are not buildable.  Once that is cleaned up, the symbolic link
will go away too.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-20-alex.bennee@linaro.org>

19 months agoconfigure: store container engine in config-host.mak
Paolo Bonzini [Thu, 29 Sep 2022 11:41:58 +0000 (12:41 +0100)]
configure: store container engine in config-host.mak

In preparation for removing $(DOCKER_SCRIPT) from the tests/tcg configuration
files, have Make use the same container engine that had been probed at
configure time.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-19-alex.bennee@linaro.org>

19 months agoconfigure: return status code from probe_target_compiler
Paolo Bonzini [Thu, 29 Sep 2022 11:41:57 +0000 (12:41 +0100)]
configure: return status code from probe_target_compiler

For now, return 1 for container-based compilers.  This will change as
soon as ROMs will be buildable with them.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-18-alex.bennee@linaro.org>

19 months agobuild: add recursive distclean rules
Paolo Bonzini [Thu, 29 Sep 2022 11:41:56 +0000 (12:41 +0100)]
build: add recursive distclean rules

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-17-alex.bennee@linaro.org>

19 months agovof: add distclean target
Paolo Bonzini [Thu, 29 Sep 2022 11:41:55 +0000 (12:41 +0100)]
vof: add distclean target

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
[AJB: add clean dep to distclean]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-16-alex.bennee@linaro.org>

19 months agopc-bios/s390-ccw: detect CC options just once
Paolo Bonzini [Thu, 29 Sep 2022 11:41:54 +0000 (12:41 +0100)]
pc-bios/s390-ccw: detect CC options just once

In preparation for adding Docker container support, detect compiler options
just once rather than once per Make run; container startup overhead is
substantial and doing the detection just once makes things faster.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-15-alex.bennee@linaro.org>

19 months agopc-bios/optionrom: detect CC options just once
Paolo Bonzini [Thu, 29 Sep 2022 11:41:53 +0000 (12:41 +0100)]
pc-bios/optionrom: detect CC options just once

In preparation for adding Docker container support, detect compiler options
just once rather than once per Make run; container startup overhead is
substantial and doing the detection just once makes things faster.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-14-alex.bennee@linaro.org>

19 months agotests/qtest: bump up QOS_PATH_MAX_ELEMENT_SIZE
Alex Bennée [Thu, 29 Sep 2022 11:41:51 +0000 (12:41 +0100)]
tests/qtest: bump up QOS_PATH_MAX_ELEMENT_SIZE

It seems the depth of stack we need to support can vary depending on
the order of the init constructors getting called. It seems
--enable-lto shuffles things around just enough to push you over the
limit.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Fixes: https://gitlab.com/qemu-project/qemu/-/issues/1186
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20220929114231.583801-12-alex.bennee@linaro.org>

19 months agotests/docker: move alpine from edge to tagged release
Alex Bennée [Thu, 29 Sep 2022 11:41:50 +0000 (12:41 +0100)]
tests/docker: move alpine from edge to tagged release

Tracking alpine-edge like debian-sid is a moving target. Usually such
rolling releases are marked as "allow_failure: true" in our CI.
However as alpine presents a musl based distro and provides useful
extra coverage lets track a release branch instead to avoid random
breakages.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20220929114231.583801-11-alex.bennee@linaro.org>

19 months agotarget/hexagon: manually add flex/bison/glib2 to remaining containers
Anton Johansson [Thu, 29 Sep 2022 11:41:48 +0000 (12:41 +0100)]
target/hexagon: manually add flex/bison/glib2 to remaining containers

Adds our build-time dependencies to containers which build qemu-hexagon,
but aren't covered by libvirt-ci.

Signed-off-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220804115548.13024-11-anjo@rev.ng>
Message-Id: <20220929114231.583801-9-alex.bennee@linaro.org>

19 months agotarget/hexagon: regenerate docker/cirrus files
Anton Johansson [Thu, 29 Sep 2022 11:41:47 +0000 (12:41 +0100)]
target/hexagon: regenerate docker/cirrus files

This patch updates the docker and cirrus files with the new packages by
running tests/lcitool/refresh

Signed-off-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220804115548.13024-10-anjo@rev.ng>
Message-Id: <20220929114231.583801-8-alex.bennee@linaro.org>

19 months agotarget/hexagon: add flex/bison/glib2 to qemu.yml
Anton Johansson [Thu, 29 Sep 2022 11:41:46 +0000 (12:41 +0100)]
target/hexagon: add flex/bison/glib2 to qemu.yml

Note, the glib2-native mapping exists separately from the normal glib2
mapping. The latter uses a `foreign` cross-policy-default, and
libvirt-ci is not able to support package mappings for multiple
cross-compilation policies.

This will probably change in the future.

Signed-off-by: Alessandro Di Federico <ale@rev.ng>
Signed-off-by: Paolo Montesel <babush@rev.ng>
Signed-off-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220804115548.13024-9-anjo@rev.ng>
Message-Id: <20220929114231.583801-7-alex.bennee@linaro.org>

19 months agoconfigure: move detected gdb to TCG's config-host.mak
Alex Bennée [Thu, 29 Sep 2022 11:41:45 +0000 (12:41 +0100)]
configure: move detected gdb to TCG's config-host.mak

When tests/tcg gained it's own config-host.mak we forgot to move the
GDB detection.

Fixes: 544f4a2578 (tests/tcg: isolate from QEMU's config-host.mak)
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-6-alex.bennee@linaro.org>

19 months agotests/docker: run script use realpath instead of readlink
Lucas Mateus Castro (alqotel) [Thu, 29 Sep 2022 11:41:44 +0000 (12:41 +0100)]
tests/docker: run script use realpath instead of readlink

The alpine docker image only comes with busybox, which doesn't have the
'-e' option on its readlink, so change it to 'realpath' to avoid that
problem.

Suggested-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Message-Id: <20220922135516.33627-5-lucas.araujo@eldorado.org.br>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-5-alex.bennee@linaro.org>

19 months agoscripts/ci/setup: spice-server only on x86 aarch64
Lucas Mateus Castro (alqotel) [Thu, 29 Sep 2022 11:41:43 +0000 (12:41 +0100)]
scripts/ci/setup: spice-server only on x86 aarch64

Changed build-environment.yml to only install spice-server on x86_64 and
aarch64 as this package is only available on those architectures.

Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220922135516.33627-4-lucas.araujo@eldorado.org.br>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-4-alex.bennee@linaro.org>

19 months agoscripts/ci/setup: Fix libxen requirements
Lucas Mateus Castro (alqotel) [Thu, 29 Sep 2022 11:41:42 +0000 (12:41 +0100)]
scripts/ci/setup: Fix libxen requirements

XEN hypervisor is only available in ARM and x86, but the yaml only
checked if the architecture is different from s390x, changed it to
a more accurate test.
Tested this change on a Ubuntu 20.04 ppc64le.

Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220922135516.33627-3-lucas.araujo@eldorado.org.br>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-3-alex.bennee@linaro.org>

19 months agoscripts/ci/setup: ninja missing from build-environment
Lucas Mateus Castro (alqotel) [Thu, 29 Sep 2022 11:41:41 +0000 (12:41 +0100)]
scripts/ci/setup: ninja missing from build-environment

ninja-build is missing from the RHEL environment, so a system prepared
with that script would still fail to compile QEMU.
Tested on a Fedora 36

Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Message-Id: <20220922135516.33627-2-lucas.araujo@eldorado.org.br>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-2-alex.bennee@linaro.org>

19 months agoMerge tag 'pull-hex-20221003' of https://github.com/quic/qemu into staging
Stefan Hajnoczi [Wed, 5 Oct 2022 14:17:32 +0000 (10:17 -0400)]
Merge tag 'pull-hex-20221003' of https://github.com/quic/qemu into staging

Make store handling faster and more robust
Bug fix in gen_tcg_funcs.py

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# gpg:                using RSA key 3635C788CE62B91FD4C59AB47B0244FB12DE4422
# gpg: Good signature from "Taylor Simpson (Rock on) <tsimpson@quicinc.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 3635 C788 CE62 B91F D4C5  9AB4 7B02 44FB 12DE 4422

* tag 'pull-hex-20221003' of https://github.com/quic/qemu:
  Hexagon (gen_tcg_funcs.py): avoid duplicated tcg code on A_CVI_NEW
  Hexagon (target/hexagon) move store size tracking to translation
  Hexagon (target/hexagon) Change decision to set pkt_has_store_s[01]
  Hexagon (target/hexagon) add instruction attributes from archlib

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
19 months agoMerge tag 'pull-tcg-20221004' of https://gitlab.com/rth7680/qemu into staging
Stefan Hajnoczi [Wed, 5 Oct 2022 14:17:02 +0000 (10:17 -0400)]
Merge tag 'pull-tcg-20221004' of https://gitlab.com/rth7680/qemu into staging

Cache CPUClass for use in hot code paths.
Add CPUTLBEntryFull, probe_access_full, tlb_set_page_full.
Add generic support for TARGET_TB_PCREL.
tcg/ppc: Optimize 26-bit jumps using STQ for POWER 2.07
target/sh4: Fix TB_FLAG_UNALIGN

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# gpg: Signature made Tue 04 Oct 2022 15:45:53 EDT
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* tag 'pull-tcg-20221004' of https://gitlab.com/rth7680/qemu:
  target/sh4: Fix TB_FLAG_UNALIGN
  tcg/ppc: Optimize 26-bit jumps
  accel/tcg: Introduce TARGET_TB_PCREL
  accel/tcg: Introduce tb_pc and log_pc
  hw/core: Add CPUClass.get_pc
  include/hw/core: Create struct CPUJumpCache
  accel/tcg: Inline tb_flush_jmp_cache
  accel/tcg: Do not align tb->page_addr[0]
  accel/tcg: Use DisasContextBase in plugin_gen_tb_start
  accel/tcg: Use bool for page_find_alloc
  accel/tcg: Remove PageDesc code_bitmap
  include/exec: Introduce TARGET_PAGE_ENTRY_EXTRA
  accel/tcg: Introduce tlb_set_page_full
  accel/tcg: Introduce probe_access_full
  accel/tcg: Suppress auto-invalidate in probe_access_internal
  accel/tcg: Drop addr member from SavedIOTLB
  accel/tcg: Rename CPUIOTLBEntry to CPUTLBEntryFull
  cputlb: used cached CPUClass in our hot-paths
  hw/core/cpu-sysemu: used cached class in cpu_asidx_from_attrs
  cpu: cache CPUClass in CPUState for hot code paths

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
19 months agotarget/sh4: Fix TB_FLAG_UNALIGN
Richard Henderson [Mon, 29 Aug 2022 01:58:20 +0000 (18:58 -0700)]
target/sh4: Fix TB_FLAG_UNALIGN

The value previously chosen overlaps GUSA_MASK.

Rename all DELAY_SLOT_* and GUSA_* defines to emphasize
that they are included in TB_FLAGs.  Add aliases for the
FPSCR and SR bits that are included in TB_FLAGS, so that
we don't accidentally reassign those bits.

Fixes: 4da06fb3062 ("target/sh4: Implement prctl_unalign_sigbus")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/856
Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
19 months agotcg/ppc: Optimize 26-bit jumps
Leandro Lupori [Mon, 19 Sep 2022 17:56:14 +0000 (14:56 -0300)]
tcg/ppc: Optimize 26-bit jumps

PowerPC64 processors handle direct branches better than indirect
ones, resulting in less stalled cycles and branch misses.

However, PPC's tb_target_set_jmp_target() was only using direct
branches for 16-bit jumps, while PowerPC64's unconditional branch
instructions are able to handle displacements of up to 26 bits.
To take advantage of this, now jumps whose displacements fit in
between 17 and 26 bits are also converted to direct branches.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Leandro Lupori <leandro.lupori@eldorado.org.br>
[rth: Expanded some commentary.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
19 months agoaccel/tcg: Introduce TARGET_TB_PCREL
Richard Henderson [Fri, 12 Aug 2022 16:53:53 +0000 (09:53 -0700)]
accel/tcg: Introduce TARGET_TB_PCREL

Prepare for targets to be able to produce TBs that can
run in more than one virtual context.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
19 months agoaccel/tcg: Introduce tb_pc and log_pc
Richard Henderson [Mon, 15 Aug 2022 20:16:06 +0000 (15:16 -0500)]
accel/tcg: Introduce tb_pc and log_pc

The availability of tb->pc will shortly be conditional.
Introduce accessor functions to minimize ifdefs.

Pass around a known pc to places like tcg_gen_code,
where the caller must already have the value.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
19 months agohw/core: Add CPUClass.get_pc
Richard Henderson [Fri, 30 Sep 2022 17:31:21 +0000 (10:31 -0700)]
hw/core: Add CPUClass.get_pc

Populate this new method for all targets.  Always match
the result that would be given by cpu_get_tb_cpu_state,
as we will want these values to correspond in the logs.

Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> (target/sparc)
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
Cc: Eduardo Habkost <eduardo@habkost.net> (supporter:Machine core)
Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> (supporter:Machine core)
Cc: "Philippe Mathieu-Daudé" <f4bug@amsat.org> (reviewer:Machine core)
Cc: Yanan Wang <wangyanan55@huawei.com> (reviewer:Machine core)
Cc: Michael Rolnik <mrolnik@gmail.com> (maintainer:AVR TCG CPUs)
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> (maintainer:CRIS TCG CPUs)
Cc: Taylor Simpson <tsimpson@quicinc.com> (supporter:Hexagon TCG CPUs)
Cc: Song Gao <gaosong@loongson.cn> (maintainer:LoongArch TCG CPUs)
Cc: Xiaojuan Yang <yangxiaojuan@loongson.cn> (maintainer:LoongArch TCG CPUs)
Cc: Laurent Vivier <laurent@vivier.eu> (maintainer:M68K TCG CPUs)
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> (reviewer:MIPS TCG CPUs)
Cc: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> (reviewer:MIPS TCG CPUs)
Cc: Chris Wulff <crwulff@gmail.com> (maintainer:NiosII TCG CPUs)
Cc: Marek Vasut <marex@denx.de> (maintainer:NiosII TCG CPUs)
Cc: Stafford Horne <shorne@gmail.com> (odd fixer:OpenRISC TCG CPUs)
Cc: Yoshinori Sato <ysato@users.sourceforge.jp> (reviewer:RENESAS RX CPUs)
Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> (maintainer:SPARC TCG CPUs)
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> (maintainer:TriCore TCG CPUs)
Cc: Max Filippov <jcmvbkbc@gmail.com> (maintainer:Xtensa TCG CPUs)
Cc: qemu-arm@nongnu.org (open list:ARM TCG CPUs)
Cc: qemu-ppc@nongnu.org (open list:PowerPC TCG CPUs)
Cc: qemu-riscv@nongnu.org (open list:RISC-V TCG CPUs)
Cc: qemu-s390x@nongnu.org (open list:S390 TCG CPUs)
19 months agoinclude/hw/core: Create struct CPUJumpCache
Richard Henderson [Mon, 15 Aug 2022 20:13:05 +0000 (15:13 -0500)]
include/hw/core: Create struct CPUJumpCache

Wrap the bare TranslationBlock pointer into a structure.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
19 months agoaccel/tcg: Inline tb_flush_jmp_cache
Richard Henderson [Thu, 29 Sep 2022 17:51:21 +0000 (10:51 -0700)]
accel/tcg: Inline tb_flush_jmp_cache

This function has two users, who use it incompatibly.
In tlb_flush_page_by_mmuidx_async_0, when flushing a
single page, we need to flush exactly two pages.
In tlb_flush_range_by_mmuidx_async_0, when flushing a
range of pages, we need to flush N+1 pages.

This avoids double-flushing of jmp cache pages in a range.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
19 months agoaccel/tcg: Do not align tb->page_addr[0]
Richard Henderson [Mon, 15 Aug 2022 20:00:57 +0000 (15:00 -0500)]
accel/tcg: Do not align tb->page_addr[0]

Let tb->page_addr[0] contain the address of the first byte of the
translated block, rather than the address of the page containing the
start of the translated block.  We need to recover this value anyway
at various points, and it is easier to discard a page offset when it
is not needed, which happens naturally via the existing find_page shift.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
19 months agoMerge tag 'trivial-branch-for-7.2-pull-request' of https://gitlab.com/laurent_vivier...
Stefan Hajnoczi [Tue, 4 Oct 2022 18:04:18 +0000 (14:04 -0400)]
Merge tag 'trivial-branch-for-7.2-pull-request' of https://gitlab.com/laurent_vivier/qemu into staging

Pull request trivial patches branch 20220930-v2

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# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* tag 'trivial-branch-for-7.2-pull-request' of https://gitlab.com/laurent_vivier/qemu:
  docs: Update TPM documentation for usage of a TPM 2
  Use g_new() & friends where that makes obvious sense
  Drop superfluous conditionals around g_free()
  block/qcow2-bitmap: Add missing cast to silent GCC error
  checkpatch: ignore target/hexagon/imported/* files
  mem/cxl_type3: fix GPF DVSEC
  .gitignore: add .cache/ to .gitignore
  hw/virtio/vhost-shadow-virtqueue: Silence GCC error "maybe-uninitialized"

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
19 months agoMerge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
Stefan Hajnoczi [Tue, 4 Oct 2022 18:03:21 +0000 (14:03 -0400)]
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* x86: re-enable rng seeding via SetupData
* x86: reinitialize RNG seed on system reboot and after kernel load
* qboot: rebuild based on latest commit
* watchdog: remove -watchdog option
* update Meson to 0.61.5, move more configure tests

# -----BEGIN PGP SIGNATURE-----
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# =HEmX
# -----END PGP SIGNATURE-----
# gpg: Signature made Sat 01 Oct 2022 15:16:48 EDT
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu:
  x86: re-initialize RNG seed when selecting kernel
  target/i386/kvm: fix kvmclock_current_nsec: Assertion `time.tsc_timestamp <= migration_tsc' failed
  configure, meson: move linker flag detection to meson
  configure, meson: move C++ compiler detection to meson.build
  meson: multiple names can be passed to dependency()
  meson: require 0.61.3
  meson: -display dbus and CFI are incompatible
  ui: fix path to dbus-display1.h
  watchdog: remove -watchdog option
  configure: do not invoke as/ld directly for pc-bios/optionrom
  qboot: rebuild based on latest commit
  x86: re-enable rng seeding via SetupData
  x86: reinitialize RNG seed on system reboot
  x86: use typedef for SetupData struct
  x86: return modified setup_data only if read as memory, not as file

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
19 months agoaccel/tcg: Use DisasContextBase in plugin_gen_tb_start
Richard Henderson [Fri, 12 Aug 2022 16:15:15 +0000 (09:15 -0700)]
accel/tcg: Use DisasContextBase in plugin_gen_tb_start

Use the pc coming from db->pc_first rather than the TB.

Use the cached host_addr rather than re-computing for the
first page.  We still need a separate lookup for the second
page because it won't be computed for DisasContextBase until
the translator actually performs a read from the page.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
19 months agoaccel/tcg: Use bool for page_find_alloc
Richard Henderson [Wed, 10 Aug 2022 22:27:46 +0000 (15:27 -0700)]
accel/tcg: Use bool for page_find_alloc

Bool is more appropriate type for the alloc parameter.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
19 months agoaccel/tcg: Remove PageDesc code_bitmap
Richard Henderson [Mon, 22 Aug 2022 23:23:22 +0000 (16:23 -0700)]
accel/tcg: Remove PageDesc code_bitmap

This bitmap is created and discarded immediately.
We gain nothing by its existence.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220822232338.1727934-2-richard.henderson@linaro.org>

19 months agoinclude/exec: Introduce TARGET_PAGE_ENTRY_EXTRA
Richard Henderson [Sat, 20 Aug 2022 00:02:36 +0000 (17:02 -0700)]
include/exec: Introduce TARGET_PAGE_ENTRY_EXTRA

Allow the target to cache items from the guest page tables.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
19 months agoaccel/tcg: Introduce tlb_set_page_full
Richard Henderson [Fri, 19 Aug 2022 23:33:23 +0000 (16:33 -0700)]
accel/tcg: Introduce tlb_set_page_full

Now that we have collected all of the page data into
CPUTLBEntryFull, provide an interface to record that
all in one go, instead of using 4 arguments.  This interface
allows CPUTLBEntryFull to be extended without having to
change the number of arguments.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
19 months agoaccel/tcg: Introduce probe_access_full
Richard Henderson [Fri, 19 Aug 2022 22:49:41 +0000 (15:49 -0700)]
accel/tcg: Introduce probe_access_full

Add an interface to return the CPUTLBEntryFull struct
that goes with the lookup.  The result is not intended
to be valid across multiple lookups, so the user must
use the results immediately.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
19 months agoaccel/tcg: Suppress auto-invalidate in probe_access_internal
Richard Henderson [Fri, 19 Aug 2022 22:28:05 +0000 (15:28 -0700)]
accel/tcg: Suppress auto-invalidate in probe_access_internal

When PAGE_WRITE_INV is set when calling tlb_set_page,
we immediately set TLB_INVALID_MASK in order to force
tlb_fill to be called on the next lookup.  Here in
probe_access_internal, we have just called tlb_fill
and eliminated true misses, thus the lookup must be valid.

This allows us to remove a warning comment from s390x.
There doesn't seem to be a reason to change the code though.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
19 months agoaccel/tcg: Drop addr member from SavedIOTLB
Richard Henderson [Fri, 19 Aug 2022 21:24:34 +0000 (14:24 -0700)]
accel/tcg: Drop addr member from SavedIOTLB

This field is only written, not read; remove it.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
19 months agoaccel/tcg: Rename CPUIOTLBEntry to CPUTLBEntryFull
Richard Henderson [Fri, 19 Aug 2022 21:20:37 +0000 (14:20 -0700)]
accel/tcg: Rename CPUIOTLBEntry to CPUTLBEntryFull

This structure will shortly contain more than just
data for accessing MMIO.  Rename the 'addr' member
to 'xlat_section' to more clearly indicate its purpose.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
19 months agocputlb: used cached CPUClass in our hot-paths
Alex Bennée [Fri, 23 Sep 2022 08:48:01 +0000 (10:48 +0200)]
cputlb: used cached CPUClass in our hot-paths

Before: 35.912 s ±  0.168 s
  After: 35.565 s ±  0.087 s

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220811151413.3350684-5-alex.bennee@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20220923084803.498337-5-clg@kaod.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
19 months agohw/core/cpu-sysemu: used cached class in cpu_asidx_from_attrs
Alex Bennée [Fri, 23 Sep 2022 08:48:00 +0000 (10:48 +0200)]
hw/core/cpu-sysemu: used cached class in cpu_asidx_from_attrs

This is a heavily used function so lets avoid the cost of
CPU_GET_CLASS. On the romulus-bmc run it has a modest effect:

  Before: 36.812 s ±  0.506 s
  After:  35.912 s ±  0.168 s

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220811151413.3350684-4-alex.bennee@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20220923084803.498337-4-clg@kaod.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
19 months agocpu: cache CPUClass in CPUState for hot code paths
Alex Bennée [Fri, 23 Sep 2022 08:47:59 +0000 (10:47 +0200)]
cpu: cache CPUClass in CPUState for hot code paths

The class cast checkers are quite expensive and always on (unlike the
dynamic case who's checks are gated by CONFIG_QOM_CAST_DEBUG). To
avoid the overhead of repeatedly checking something which should never
change we cache the CPUClass reference for use in the hot code paths.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220811151413.3350684-3-alex.bennee@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20220923084803.498337-3-clg@kaod.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
19 months agodocs: Update TPM documentation for usage of a TPM 2
Stefan Berger [Tue, 27 Sep 2022 12:21:46 +0000 (08:21 -0400)]
docs: Update TPM documentation for usage of a TPM 2

Update the TPM documentation for usage of a TPM 2 rather than a TPM 1.2.
Adjust the command lines and expected outputs inside the VM accordingly.
Update the command line to start a TPM 2 with swtpm.

Signed-off-by: Stefan Berger <stefanb@linux.ibm.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20220927122146.2787854-1-stefanb@linux.ibm.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
19 months agoUse g_new() & friends where that makes obvious sense
Markus Armbruster [Fri, 23 Sep 2022 08:42:54 +0000 (10:42 +0200)]
Use g_new() & friends where that makes obvious sense

g_new(T, n) is neater than g_malloc(sizeof(T) * n).  It's also safer,
for two reasons.  One, it catches multiplication overflowing size_t.
Two, it returns T * rather than void *, which lets the compiler catch
more type errors.

This commit only touches allocations with size arguments of the form
sizeof(T).

Patch created mechanically with:

    $ spatch --in-place --sp-file scripts/coccinelle/use-g_new-etc.cocci \
     --macro-file scripts/cocci-macro-file.h FILES...

The previous iteration was commit a95942b50c.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20220923084254.4173111-1-armbru@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
19 months agoDrop superfluous conditionals around g_free()
Markus Armbruster [Fri, 23 Sep 2022 09:04:28 +0000 (11:04 +0200)]
Drop superfluous conditionals around g_free()

There is no need to guard g_free(P) with if (P): g_free(NULL) is safe.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220923090428.93529-1-armbru@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
19 months agoblock/qcow2-bitmap: Add missing cast to silent GCC error
Philippe Mathieu-Daudé [Mon, 19 Sep 2022 18:27:55 +0000 (20:27 +0200)]
block/qcow2-bitmap: Add missing cast to silent GCC error

Commit d1258dd0c8 ("qcow2: autoloading dirty bitmaps") added the
set_readonly_helper() GFunc handler, correctly casting the gpointer
user_data in both the g_slist_foreach() caller and the handler.
Few commits later (commit 1b6b0562db), the handler is reused in
qcow2_reopen_bitmaps_rw() but missing the gpointer cast, resulting
in the following error when using Homebrew GCC 12.2.0:

  [2/658] Compiling C object libblock.fa.p/block_qcow2-bitmap.c.o
  ../../block/qcow2-bitmap.c: In function 'qcow2_reopen_bitmaps_rw':
  ../../block/qcow2-bitmap.c:1211:60: error: incompatible type for argument 3 of 'g_slist_foreach'
   1211 |     g_slist_foreach(ro_dirty_bitmaps, set_readonly_helper, false);
        |                                                            ^~~~~
        |                                                            |
        |                                                            _Bool
  In file included from /opt/homebrew/Cellar/glib/2.72.3_1/include/glib-2.0/glib/gmain.h:26,
                   from /opt/homebrew/Cellar/glib/2.72.3_1/include/glib-2.0/glib/giochannel.h:33,
                   from /opt/homebrew/Cellar/glib/2.72.3_1/include/glib-2.0/glib.h:54,
                   from /Users/philmd/source/qemu/include/glib-compat.h:32,
                   from /Users/philmd/source/qemu/include/qemu/osdep.h:144,
                   from ../../block/qcow2-bitmap.c:28:
  /opt/homebrew/Cellar/glib/2.72.3_1/include/glib-2.0/glib/gslist.h:127:61: note: expected 'gpointer' {aka 'void *'} but argument is of type '_Bool'
    127 |                                           gpointer          user_data);
        |                                           ~~~~~~~~~~~~~~~~~~^~~~~~~~~
  At top level:
  FAILED: libblock.fa.p/block_qcow2-bitmap.c.o

Fix by adding the missing gpointer cast.

Fixes: 1b6b0562db ("qcow2: support .bdrv_reopen_bitmaps_rw")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Message-Id: <20220919182755.51967-1-f4bug@amsat.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
19 months agoMerge tag 'for-upstream' of git://repo.or.cz/qemu/kevin into staging
Stefan Hajnoczi [Mon, 3 Oct 2022 19:06:07 +0000 (15:06 -0400)]
Merge tag 'for-upstream' of git://repo.or.cz/qemu/kevin into staging

Block layer patches

- Fix missing block_acct_setup() with -blockdev
- Keep auto_backing_file post-migration
- file-posix: Fixed O_DIRECT memory alignment
- ide: Fix state after EXECUTE DEVICE DIAGNOSTIC and implement
  INITIALIZE DEVICE PARAMETERS
- qemu-img: Wean documentation and help output off '?' for help
- qcow2: fix memory leak and compiler warning
- Code cleanups

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# gpg: Signature made Fri 30 Sep 2022 12:50:54 EDT
# gpg:                using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2FD6
# gpg:                issuer "kwolf@redhat.com"
# gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full]
# Primary key fingerprint: DC3D EB15 9A9A F95D 3D74  56FE 7F09 B272 C88F 2FD6

* tag 'for-upstream' of git://repo.or.cz/qemu/kevin:
  hw/ide/core.c: Implement ATA INITIALIZE_DEVICE_PARAMETERS command
  tests/qtest/ide-test: Verify that DIAGNOSTIC clears DEV to zero
  hw/ide/core: Clear LBA and drive bits for EXECUTE DEVICE DIAGNOSTIC
  tests/qtest/ide-test.c: Create disk image for use as a secondary
  piix_ide_reset: Use pci_set_* functions instead of direct access
  block: use the request length for iov alignment
  block: move bdrv_qiov_is_aligned to file-posix
  iotests/backing-file-invalidation: Add new test
  block/qed: Keep auto_backing_file if possible
  block/qcow2: Keep auto_backing_file if possible
  gluster: stop using .bdrv_needs_filename
  block: make serializing requests functions 'void'
  block: use bdrv_is_sg() helper instead of raw bs->sg reading
  block: add missed block_acct_setup with new block device init procedure
  block: pass OnOffAuto instead of bool to block_acct_setup()
  qemu-img: Wean documentation and help output off '?' for help
  block/qcow2-bitmap: Add missing cast to silent GCC error
  qcow2: fix memory leak in qcow2_read_extensions

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
19 months agoMerge tag 'pull-target-arm-20220930' of https://git.linaro.org/people/pmaydell/qemu...
Stefan Hajnoczi [Mon, 3 Oct 2022 19:00:36 +0000 (15:00 -0400)]
Merge tag 'pull-target-arm-20220930' of https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm queue:
 * Fix breakage of icount mode when guest touches MDCR_EL3, MDCR_EL2,
   PMCNTENSET_EL0 or PMCNTENCLR_EL0
 * Make writes to MDCR_EL3 use PMU start/finish calls
 * Let AArch32 write to SDCR.SCCD
 * Rearrange cpu64.c so all the CPU initfns are together
 * hw/arm/xlnx-zynqmp: Connect ZynqMP's USB controllers
 * hw/arm/virt: fix some minor issues with generated device tree
 * Fix regression where EL3 could not write to SP_EL1 if there is no EL2

# -----BEGIN PGP SIGNATURE-----
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# yUzUjr3O2N1qJRKi+Dd7eA==
# =edYy
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 30 Sep 2022 09:33:58 EDT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
# gpg:                 aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* tag 'pull-target-arm-20220930' of https://git.linaro.org/people/pmaydell/qemu-arm:
  target/arm: mark SP_EL1 with ARM_CP_EL3_NO_EL2_KEEP
  hw/arm/virt: Fix devicetree warning about the SMMU node
  hw/arm/virt: Use "msi-map" devicetree property for PCI
  hw/arm/virt: Fix devicetree warning about the GIC node
  hw/arm/virt: Fix devicetree warning about the root node
  hw/arm/xlnx-zynqmp: Connect ZynqMP's USB controllers
  target/arm: Rearrange cpu64.c so all the CPU initfns are together
  target/arm: Update SDCR_VALID_MASK to include SCCD
  target/arm: Make writes to MDCR_EL3 use PMU start/finish calls
  target/arm: Mark registers which call pmu_op_start() as ARM_CP_IO

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
19 months agoHexagon (gen_tcg_funcs.py): avoid duplicated tcg code on A_CVI_NEW
Matheus Tavares Bernardino [Fri, 30 Sep 2022 20:08:23 +0000 (17:08 -0300)]
Hexagon (gen_tcg_funcs.py): avoid duplicated tcg code on A_CVI_NEW

Hexagon instructions with the A_CVI_NEW attribute produce a vector value
that can be used in the same packet. The python function responsible for
generating code for such instructions has a typo ("if" instead of
"elif"), which makes genptr_dst_write_ext() be executed twice, thus also
generating the same tcg code twice. Fortunately, this doesn't cause any
problems for correctness, but it is less efficient than it could be. Fix
it by using an "elif" and avoiding the unnecessary extra code gen.

Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <fa706b192b2a3a0ffbd399fa8dbf0d5b2c5b82d9.1664568492.git.quic_mathbern@quicinc.com>

19 months agox86: re-initialize RNG seed when selecting kernel
Jason A. Donenfeld [Thu, 22 Sep 2022 15:28:47 +0000 (17:28 +0200)]
x86: re-initialize RNG seed when selecting kernel

We don't want it to be possible to re-read the RNG seed after ingesting
it, because this ruins forward secrecy. Currently, however, the setup
data section can just be re-read. Since the kernel is always read after
the setup data, use the selection of the kernel as a trigger to
re-initialize the RNG seed, just like we do on reboot, to preserve
forward secrecy.

Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
Message-Id: <20220922152847.3670513-1-Jason@zx2c4.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
19 months agotarget/i386/kvm: fix kvmclock_current_nsec: Assertion `time.tsc_timestamp <= migratio...
Ray Zhang [Thu, 22 Sep 2022 10:05:23 +0000 (18:05 +0800)]
target/i386/kvm: fix kvmclock_current_nsec: Assertion `time.tsc_timestamp <= migration_tsc' failed

New KVM_CLOCK flags were added in the kernel.(c68dc1b577eabd5605c6c7c08f3e07ae18d30d5d)
```
+ #define KVM_CLOCK_VALID_FLAGS \
+ (KVM_CLOCK_TSC_STABLE | KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC)

case KVM_CAP_ADJUST_CLOCK:
- r = KVM_CLOCK_TSC_STABLE;
+ r = KVM_CLOCK_VALID_FLAGS;
```

kvm_has_adjust_clock_stable needs to handle additional flags,
so that s->clock_is_reliable can be true and kvmclock_current_nsec doesn't need to be called.

Signed-off-by: Ray Zhang <zhanglei002@gmail.com>
Message-Id: <20220922100523.2362205-1-zhanglei002@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
19 months agoconfigure, meson: move linker flag detection to meson
Paolo Bonzini [Tue, 15 Mar 2022 14:57:15 +0000 (15:57 +0100)]
configure, meson: move linker flag detection to meson

Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
19 months agoconfigure, meson: move C++ compiler detection to meson.build
Paolo Bonzini [Mon, 8 Nov 2021 11:31:52 +0000 (12:31 +0100)]
configure, meson: move C++ compiler detection to meson.build

The test is slightly weaker than before, because it does not
call an extern "C" function from a C source file.  However,
in practice what we seek to detect is ABI compatibility of the
various sanitizer flags, and for that it is enough to compile
anything with CC and link it with CXX.

Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
19 months agomeson: multiple names can be passed to dependency()
Paolo Bonzini [Sun, 27 Mar 2022 14:05:58 +0000 (16:05 +0200)]
meson: multiple names can be passed to dependency()

This is new in Meson 0.60.0.

Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
19 months agomeson: require 0.61.3
Paolo Bonzini [Thu, 23 Dec 2021 14:29:56 +0000 (15:29 +0100)]
meson: require 0.61.3

This removes the dependency of dbus-display on --enable-modules.  It also allows
cleanups in modinfo collection and allows moving C++ compiler detection to
meson.build.

Because it is now deprecated to use install_subdir to create an empty directory,
replace it with install_emptydir.

Updating the Meson submodule to 0.61.5 also removes the message

    WARNING: Broken python installation detected. Python files installed
    by Meson might not be found by python interpreter.

unless using system meson is forced with --meson.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/873
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/848
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
19 months agomeson: -display dbus and CFI are incompatible
Paolo Bonzini [Fri, 30 Sep 2022 07:53:02 +0000 (09:53 +0200)]
meson: -display dbus and CFI are incompatible

The generated skeletons for DBus call the finalize method of the parent
type using code like

    G_OBJECT_CLASS (qemu_dbus_display1_chardev_skeleton_parent_class)->finalize (object);

However, the finalize method is defined in a shared library that is not
compiled with CFI.  Do not enable anything that uses gdbus-codegen if
--enable-cfi was specified.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
19 months agoHexagon (target/hexagon) move store size tracking to translation
Taylor Simpson [Tue, 20 Sep 2022 08:07:45 +0000 (01:07 -0700)]
Hexagon (target/hexagon) move store size tracking to translation

The store width is needed for packet commit, so it is stored in
ctx->store_width.  Currently, it is set when a store has a TCG
override instead of a QEMU helper.  In the QEMU helper case, the
ctx->store_width is not set, we invoke a helper during packet commit
that uses the runtime store width.

This patch ensures ctx->store_width is set for all store instructions,
so performance is improved because packet commit can generate the proper
TCG store rather than the generic helper.

We do this by
- Use the attributes from the instructions during translation to
  set ctx->store_width
- Remove setting of ctx->store_width from genptr.c

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220920080746.26791-3-tsimpson@quicinc.com>

19 months agoHexagon (target/hexagon) Change decision to set pkt_has_store_s[01]
Taylor Simpson [Tue, 20 Sep 2022 08:07:46 +0000 (01:07 -0700)]
Hexagon (target/hexagon) Change decision to set pkt_has_store_s[01]

We have found cases where pkt_has_store_s[01] is set incorrectly.
This leads to generating an unnecessary store that is left over
from a previous packet.

Add an attribute to determine if an instruction is a scalar store
The attribute is attached to the fSTORE macro (hex_common.py)
Update the logic in decode.c that sets pkt_has_store_s[01]

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220920080746.26791-4-tsimpson@quicinc.com>

19 months agoHexagon (target/hexagon) add instruction attributes from archlib
Taylor Simpson [Tue, 20 Sep 2022 08:07:44 +0000 (01:07 -0700)]
Hexagon (target/hexagon) add instruction attributes from archlib

The imported files from the architecture library have added some
instruction attributes.  Some of these will be used in a subsequent
patch for determing the size of a store.

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220920080746.26791-2-tsimpson@quicinc.com>

19 months agohw/ide/core.c: Implement ATA INITIALIZE_DEVICE_PARAMETERS command
Lev Kujawski [Thu, 7 Jul 2022 03:11:40 +0000 (03:11 +0000)]
hw/ide/core.c: Implement ATA INITIALIZE_DEVICE_PARAMETERS command

CHS-based disk utilities and operating systems may adjust the logical
geometry of a hard drive to cope with the expectations or limitations
of software using the ATA INITIALIZE_DEVICE_PARAMETERS command.

Prior to this patch, INITIALIZE_DEVICE_PARAMETERS was a nop that
always returned success, raising the possibility of data loss or
corruption if the CHS<->LBA translation redirected a write to the
wrong sector.

* hw/ide/core.c
ide_reset():
  Reset the logical CHS geometry of the hard disk when the power-on
  defaults feature is enabled.
cmd_specify():
  a) New function implementing INITIALIZE_DEVICE_PARAMETERS.
  b) Ignore calls for empty or ATAPI devices.
cmd_set_features():
  Implement the power-on defaults enable and disable features.
struct ide_cmd_table:
  Switch WIN_SPECIFY from cmd_nop() to cmd_specify().
ide_init_drive():
  Set new fields 'drive_heads' and 'drive_sectors' based upon the
  actual disk geometry.

* include/hw/ide/internal.h
struct IDEState:
a) Store the actual drive CHS values within the new fields
   'drive_heads' and 'drive_sectors.'
b) Track whether a soft IDE reset should also reset the logical CHS
   geometry of the hard disk within the new field 'reset_reverts'.

Signed-off-by: Lev Kujawski <lkujaw@member.fsf.org>
Message-Id: <20220707031140.158958-7-lkujaw@member.fsf.org>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
19 months agotests/qtest/ide-test: Verify that DIAGNOSTIC clears DEV to zero
Lev Kujawski [Thu, 7 Jul 2022 03:11:37 +0000 (03:11 +0000)]
tests/qtest/ide-test: Verify that DIAGNOSTIC clears DEV to zero

Verify correction of EXECUTE DEVICE DIAGNOSTIC introduced in commit
72423831c3 (hw/ide/core: Clear LBA and drive bits for EXECUTE DEVICE
DIAGNOSTIC, 2022-05-28).

Signed-off-by: Lev Kujawski <lkujaw@member.fsf.org>
Message-Id: <20220707031140.158958-4-lkujaw@member.fsf.org>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
19 months agohw/ide/core: Clear LBA and drive bits for EXECUTE DEVICE DIAGNOSTIC
Lev Kujawski [Thu, 7 Jul 2022 03:11:36 +0000 (03:11 +0000)]
hw/ide/core: Clear LBA and drive bits for EXECUTE DEVICE DIAGNOSTIC

Prior to this patch, cmd_exec_dev_diagnostic relied upon
ide_set_signature to clear the device register.  While the
preservation of the drive bit by ide_set_signature is necessary for
the DEVICE RESET, IDENTIFY DEVICE, and READ SECTOR commands,
ATA/ATAPI-6 specifies that "DEV shall be cleared to zero" for EXECUTE
DEVICE DIAGNOSTIC.

This deviation was uncovered by the ATACT Device Testing Program
written by Hale Landis.

Signed-off-by: Lev Kujawski <lkujaw@member.fsf.org>
Message-Id: <20220707031140.158958-3-lkujaw@member.fsf.org>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
19 months agotests/qtest/ide-test.c: Create disk image for use as a secondary
Lev Kujawski [Thu, 7 Jul 2022 03:11:35 +0000 (03:11 +0000)]
tests/qtest/ide-test.c: Create disk image for use as a secondary

Change 'tmp_path' into an array of two members to accommodate another
disk image of size TEST_IMAGE_SIZE.  This facilitates testing ATA
protocol aspects peculiar to secondary devices on the same controller.

Signed-off-by: Lev Kujawski <lkujaw@member.fsf.org>
Message-Id: <20220707031140.158958-2-lkujaw@member.fsf.org>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
19 months agopiix_ide_reset: Use pci_set_* functions instead of direct access
Lev Kujawski [Thu, 7 Jul 2022 03:11:34 +0000 (03:11 +0000)]
piix_ide_reset: Use pci_set_* functions instead of direct access

Eliminate the remaining TODOs in hw/ide/piix.c by:
* Using pci_set_{size} functions to write the PIIX PCI configuration
  space instead of manipulating it directly as an array; and
* Documenting the default register values by reference to the
  controlling specification.

Signed-off-by: Lev Kujawski <lkujaw@member.fsf.org>
Message-Id: <20220707031140.158958-1-lkujaw@member.fsf.org>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
19 months agoblock: use the request length for iov alignment
Keith Busch [Thu, 29 Sep 2022 20:05:23 +0000 (13:05 -0700)]
block: use the request length for iov alignment

An iov length needs to be aligned to the logical block size, which may
be larger than the memory alignment.

Tested-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Keith Busch <kbusch@kernel.org>
Message-Id: <20220929200523.3218710-3-kbusch@meta.com>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
19 months agoblock: move bdrv_qiov_is_aligned to file-posix
Keith Busch [Thu, 29 Sep 2022 20:05:22 +0000 (13:05 -0700)]
block: move bdrv_qiov_is_aligned to file-posix

There is only user of bdrv_qiov_is_aligned(), so move the alignment
function to there and make it static.

Signed-off-by: Keith Busch <kbusch@kernel.org>
Message-Id: <20220929200523.3218710-2-kbusch@meta.com>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
19 months agoiotests/backing-file-invalidation: Add new test
Hanna Reitz [Wed, 3 Aug 2022 14:44:46 +0000 (16:44 +0200)]
iotests/backing-file-invalidation: Add new test

Add a new test to see what happens when you migrate a VM with a backing
chain that has json:{} backing file strings, which, when opened, will be
resolved to plain filenames.

Signed-off-by: Hanna Reitz <hreitz@redhat.com>
Message-Id: <20220803144446.20723-4-hreitz@redhat.com>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
19 months agoblock/qed: Keep auto_backing_file if possible
Hanna Reitz [Wed, 3 Aug 2022 14:44:45 +0000 (16:44 +0200)]
block/qed: Keep auto_backing_file if possible

Just like qcow2, qed invokes its open function in its
.bdrv_co_invalidate_cache() implementation.  Therefore, just like done
for qcow2 in HEAD^, update auto_backing_file only if the backing file
string in the image header differs from the one we have read before.

Signed-off-by: Hanna Reitz <hreitz@redhat.com>
Message-Id: <20220803144446.20723-3-hreitz@redhat.com>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
19 months agoblock/qcow2: Keep auto_backing_file if possible
Hanna Reitz [Wed, 3 Aug 2022 14:44:44 +0000 (16:44 +0200)]
block/qcow2: Keep auto_backing_file if possible

qcow2_do_open() is used by qcow2_co_invalidate_cache(), i.e. may be run
on an image that has been opened before.  When reading the backing file
string from the image header, compare it against the existing
bs->backing_file, and update bs->auto_backing_file only if they differ.

auto_backing_file should ideally contain the filename the backing BDS
will actually have after opening, i.e. a post-bdrv_refresh_filename()
version of what is in the image header.  So for example, if the image
header reports the following backing file string:

    json:{"driver": "qcow2", "file": {
        "driver": "file", "filename": "/tmp/backing.qcow2"
    }}

Then auto_backing_file should contain simply "/tmp/backing.qcow2".

Because bdrv_refresh_filename() only works on existing BDSs, though, the
way how we get this auto_backing_file value is to have the format driver
set it to whatever is in the image header, and when the backing BDS is
opened based on that, we update it with the filename the backing BDS
actually got.

However, qcow2's qcow2_co_invalidate_cache() implementation breaks this
because it just resets auto_backing_file to whatever is in the image
file without opening a BDS based on it, so we never get
auto_backing_file back to the "refreshed" version, and in the example
above, it would stay "json:{...}".

Then, bs->backing->bs->filename will differ from bs->auto_backing_file,
making bdrv_backing_overridden(bs) return true, which will lead
bdrv_refresh_filename(bs) to generate a json:{} filename for bs, even
though that may not have been necessary.  This is reported in the issue
linked below.

Therefore, skip updating auto_backing_file if nothing has changed in the
image header since we last read it.

Fixes: https://gitlab.com/qemu-project/qemu/-/issues/1117
Signed-off-by: Hanna Reitz <hreitz@redhat.com>
Message-Id: <20220803144446.20723-2-hreitz@redhat.com>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
19 months agogluster: stop using .bdrv_needs_filename
Stefan Hajnoczi [Thu, 11 Aug 2022 16:49:05 +0000 (12:49 -0400)]
gluster: stop using .bdrv_needs_filename

The gluster protocol driver used to parse URIs (filenames) but was
extended with a richer JSON syntax in commit 6c7189bb29de
("block/gluster: add support for multiple gluster servers"). The gluster
drivers that have JSON parsing set .bdrv_needs_filename to false.

The gluster+unix and gluster+rdma drivers still to require a filename
even though the JSON parser is equipped to parse the same
volume/path/sockaddr details as the URI parser. Let's allow JSON parsing
for these drivers too.

Note that the gluster+rdma driver actually uses TCP because RDMA support
is not available, so the JSON server.type field must be "inet".

Drop .bdrv_needs_filename since both the filename and the JSON parsers
can handle gluster+unix and gluster+rdma. This change is in preparation
for eventually removing .bdrv_needs_filename across the entire codebase.

Cc: Prasanna Kumar Kalever <prasanna.kalever@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-Id: <20220811164905.430834-1-stefanha@redhat.com>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
19 months agoblock: make serializing requests functions 'void'
Denis V. Lunev [Wed, 17 Aug 2022 08:37:36 +0000 (10:37 +0200)]
block: make serializing requests functions 'void'

Return codes of the following functions are never used in the code:
* bdrv_wait_serialising_requests_locked
* bdrv_wait_serialising_requests
* bdrv_make_request_serialising

Signed-off-by: Denis V. Lunev <den@openvz.org>
CC: Kevin Wolf <kwolf@redhat.com>
CC: Hanna Reitz <hreitz@redhat.com>
CC: Stefan Hajnoczi <stefanha@redhat.com>
CC: Fam Zheng <fam@euphon.net>
CC: Ronnie Sahlberg <ronniesahlberg@gmail.com>
CC: Paolo Bonzini <pbonzini@redhat.com>
CC: Peter Lieven <pl@kamp.de>
CC: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Message-Id: <20220817083736.40981-3-den@openvz.org>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
19 months agoblock: use bdrv_is_sg() helper instead of raw bs->sg reading
Denis V. Lunev [Wed, 17 Aug 2022 08:37:35 +0000 (10:37 +0200)]
block: use bdrv_is_sg() helper instead of raw bs->sg reading

I believe that if the helper exists, it must be used always for reading
of the value. It breaks expectations in the other case.

Signed-off-by: Denis V. Lunev <den@openvz.org>
CC: Kevin Wolf <kwolf@redhat.com>
CC: Hanna Reitz <hreitz@redhat.com>
CC: Stefan Hajnoczi <stefanha@redhat.com>
CC: Fam Zheng <fam@euphon.net>
CC: Ronnie Sahlberg <ronniesahlberg@gmail.com>
CC: Paolo Bonzini <pbonzini@redhat.com>
CC: Peter Lieven <pl@kamp.de>
CC: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Message-Id: <20220817083736.40981-2-den@openvz.org>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>