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7 years agoppc/prep: update MAINTAINERS file
Hervé Poussineau [Thu, 12 Jan 2017 08:47:29 +0000 (09:47 +0100)]
ppc/prep: update MAINTAINERS file

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xscvqps[d,w]z instructions
Bharata B Rao [Tue, 10 Jan 2017 08:50:43 +0000 (14:20 +0530)]
target-ppc: Add xscvqps[d,w]z instructions

xscvqpsdz: VSX Scalar truncate & Convert Quad-Precision format to
           Signed Doubleword format
xscvqpswz: VSX Scalar truncate & Convert Quad-Precision format to
           Signed Word format

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xvxsigdp instruction
Nikunj A Dadhania [Tue, 10 Jan 2017 08:50:42 +0000 (14:20 +0530)]
target-ppc: Add xvxsigdp instruction

xvxsigdp: VSX Vector Extract Significand Dual Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xvxsigsp instruction
Nikunj A Dadhania [Tue, 10 Jan 2017 08:50:41 +0000 (14:20 +0530)]
target-ppc: Add xvxsigsp instruction

xvxsigsp: VSX Vector Extract Significand Single Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xvxexpdp instruction
Nikunj A Dadhania [Tue, 10 Jan 2017 08:50:40 +0000 (14:20 +0530)]
target-ppc: Add xvxexpdp instruction

xvxexpdp: VSX Vector Extract Exponent Dual Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xvxexpsp instruction
Nikunj A Dadhania [Tue, 10 Jan 2017 08:50:39 +0000 (14:20 +0530)]
target-ppc: Add xvxexpsp instruction

xvxexpsp: VSX Vector Extract Exponent Single Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xviexpdp instruction
Nikunj A Dadhania [Tue, 10 Jan 2017 08:50:38 +0000 (14:20 +0530)]
target-ppc: Add xviexpdp instruction

xviexpdp: VSX Vector Insert Exponent Dual Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xviexpsp instruction
Nikunj A Dadhania [Tue, 10 Jan 2017 08:50:37 +0000 (14:20 +0530)]
target-ppc: Add xviexpsp instruction

xviexpsp: VSX Vector Insert Exponent Single Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xsiexpqp instruction
Nikunj A Dadhania [Tue, 10 Jan 2017 08:50:36 +0000 (14:20 +0530)]
target-ppc: Add xsiexpqp instruction

xsiexpqp: VSX Scalar Insert Exponent Quad Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xsiexpdp instruction
Nikunj A Dadhania [Tue, 10 Jan 2017 08:50:35 +0000 (14:20 +0530)]
target-ppc: Add xsiexpdp instruction

xsiexpdp: VSX Scalar Insert Exponent Double Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoppc: Implement bcdsr. instruction
Jose Ricardo Ziviani [Tue, 10 Jan 2017 02:10:12 +0000 (00:10 -0200)]
ppc: Implement bcdsr. instruction

bcdsr.: Decimal shift and round. This instruction works like bcds.
however, when performing right shift, 1 will be added to the
result if the last digit was >= 5.

Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoppc: Implement bcdus. instruction
Jose Ricardo Ziviani [Tue, 10 Jan 2017 02:10:11 +0000 (00:10 -0200)]
ppc: Implement bcdus. instruction

bcdus.: Decimal unsigned shift. This instruction works like bcds. but
considers only unsigned BCDs (no sign in least meaning 4 bits).

Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoppc: Implement bcds. instruction
Jose Ricardo Ziviani [Tue, 10 Jan 2017 02:10:10 +0000 (00:10 -0200)]
ppc: Implement bcds. instruction

bcds.: Decimal shift. Given two registers vra and vrb, this instruction
shift the vrb value by vra bits into the result register.

Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agohost-utils: Implement unsigned quadword left/right shift and unit tests
Jose Ricardo Ziviani [Tue, 10 Jan 2017 02:10:09 +0000 (00:10 -0200)]
host-utils: Implement unsigned quadword left/right shift and unit tests

Implements 128-bit left shift and right shift as well as their
testcases. By design, shift silently mods by 128, so the caller is
responsible to assert the shift range if necessary.

Left shift sets the overflow flag if any non-zero digit is shifted out.

Examples:
 ulshift(&low, &high, 250, &overflow);
 equivalent: n << 122

 urshift(&low, &high, -2);
 equivalent: n << 126

Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
[dwg: Added test-shift128 to .gitignore]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agohost-utils: Move 128-bit guard macro to .c file
Jose Ricardo Ziviani [Tue, 10 Jan 2017 02:10:08 +0000 (00:10 -0200)]
host-utils: Move 128-bit guard macro to .c file

It is not possible to implement functions in host-utils.c for
architectures with quadwords because the guard is implemented in the
Makefile. This patch move the guard out of the Makefile to the
implementation file.

Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agosoftfloat: Fix the default qNAN for target-ppc
Bharata B Rao [Tue, 10 Jan 2017 08:50:34 +0000 (14:20 +0530)]
softfloat: Fix the default qNAN for target-ppc

Currently float128_default_nan() returns 0xFFFF800000000000 in the
higher double word, but it should return 0x7FFF800000000000 which
is the correct higher double word for default qNAN on PowerPC.

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: xscvqpdp zero VSR
Nikunj A Dadhania [Tue, 10 Jan 2017 08:50:33 +0000 (14:20 +0530)]
target-ppc: xscvqpdp zero VSR

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoppc: Fix a warning in bcdcfz code and improve BCD_DIG_BYTE macro
Jose Ricardo Ziviani [Wed, 11 Jan 2017 21:11:25 +0000 (19:11 -0200)]
ppc: Fix a warning in bcdcfz code and improve BCD_DIG_BYTE macro

This commit fixes a warning in the code "(i * 2) ? .. : ..", which
should be better as "i ? .. : ..", and improves the BCD_DIG_BYTE
macro by placing parentheses around its argument to avoid possible
expansion issues like: BCD_DIG_BYTE(i + j).

Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoppc: Prevent inifnite loop in decrementer auto-reload.
Roman Kapl [Mon, 9 Jan 2017 11:23:38 +0000 (12:23 +0100)]
ppc: Prevent inifnite loop in decrementer auto-reload.

If the DECAR register is set to 0, QEMU tries to reload the decrementer with
zero in an inifinite loop. According to PPC documentation, the decrementer is
triggered on 1->0 transition, so avoid reloading the decrementer if if is
already zero.

The problem does not manifest under Linux, but it is valid to set DECAR to zero
(and may make sense as part of decrementer initialization when interrupts are
disabled).

Signed-off-by: Roman Kapl <rka@sysgo.com>
[dwg: Fixed style nit]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xscvqpdp instruction
Bharata B Rao [Mon, 9 Jan 2017 14:26:15 +0000 (19:56 +0530)]
target-ppc: Add xscvqpdp instruction

xscvqpdp:  VSX Scalar round & Convert Quad-Precision format to
           Double-Precision format

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xscvdpqp instruction
Bharata B Rao [Mon, 9 Jan 2017 14:26:14 +0000 (19:56 +0530)]
target-ppc: Add xscvdpqp instruction

xscvdpqp: VSX Scalar Convert Double-Precision format to
          Quad-Precision format

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xsaddqp instructions
Bharata B Rao [Mon, 9 Jan 2017 14:26:13 +0000 (19:56 +0530)]
target-ppc: Add xsaddqp instructions

xsaddqp:  VSX Scalar Add Quad-Precision

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoppc: Add ppc_set_compat_all()
David Gibson [Thu, 10 Nov 2016 03:37:38 +0000 (14:37 +1100)]
ppc: Add ppc_set_compat_all()

Once a compatiblity mode is negotiated with the guest,
h_client_architecture_support() uses run_on_cpu() to update each CPU to
the new mode.  We're going to want this logic somewhere else shortly,
so make a helper function to do this global update.

We put it in target-ppc/compat.c - it makes as much sense at the CPU level
as it does at the machine level.  We also move the cpu_synchronize_state()
into ppc_set_compat(), since it doesn't really make any sense to call that
without synchronizing state.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agopseries: Rewrite CAS PVR compatibility logic
David Gibson [Wed, 16 Nov 2016 02:54:48 +0000 (13:54 +1100)]
pseries: Rewrite CAS PVR compatibility logic

During boot, PAPR guests negotiate CPU model support with the
ibm,client-architecture-support mechanism.  The logic to implement this in
qemu is very convoluted.  This cleans it up to be cleaner, using the new
ppc_check_compat() call.

The new logic for choosing a compatibility mode is:
    1. Usually, use the most recent compatibility mode that is
            a) supported by the guest
            b) supported by the CPU
        and c) no later than the maximum allowed (if specified)
    2. If no suitable compatibility mode was found, the guest *does*
       support this CPU explicitly, and no maximum compatibility mode is
       specified, then use "raw" mode for the current CPU
    3. Otherwise, fail the boot.

This differs from the results of the old code: the old code preferred using
"raw" mode to a compatibility mode, whereas the new code prefers a
compatibility mode if available.  Using compatibility mode preferentially
means that we're more likely to be able to migrate the guest to a similar
but not identical host.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agopxb: Restrict to x86
David Gibson [Fri, 6 Jan 2017 05:04:09 +0000 (16:04 +1100)]
pxb: Restrict to x86

The PCI Expander Bridge (PXB) device is essentially a hack to allow
different PCIe devices to be assigned to different NUMA nodes on x86.  Each
PXB is sort-of a separate PCI host bridge, except that its config space
is shared with the config space of the main PCI host bridge, rather than
being independent.

This is only necessary if the platform doesn't (easily) allow truly
independent PCI host bridges.  AFAIK that's just x86.

This patch makes it possible to configure PXB out of the build, and adjusts
the default configs so it's only included on x86 targets.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
7 years agotarget-ppc: Add xsxsigqp instructions
Nikunj A Dadhania [Fri, 6 Jan 2017 06:14:56 +0000 (11:44 +0530)]
target-ppc: Add xsxsigqp instructions

xsxsigqp: VSX Scalar Extract Significand Quad Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xsxsigdp instruction
Nikunj A Dadhania [Fri, 6 Jan 2017 06:14:55 +0000 (11:44 +0530)]
target-ppc: Add xsxsigdp instruction

xsxsigdp: VSX Scalar Extract Significand Dual Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xsxexpqp instruction
Nikunj A Dadhania [Fri, 6 Jan 2017 06:14:54 +0000 (11:44 +0530)]
target-ppc: Add xsxexpqp instruction

xsxexpqp: VSX Scalar Extract Exponent Quad Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xsxexpdp instruction
Nikunj A Dadhania [Fri, 6 Jan 2017 06:14:53 +0000 (11:44 +0530)]
target-ppc: Add xsxexpdp instruction

xsxexpdp: VSX Scalar Extract Exponent Dual Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Use correct precision for FPRF setting
Bharata B Rao [Fri, 6 Jan 2017 06:14:50 +0000 (11:44 +0530)]
target-ppc: Use correct precision for FPRF setting

Use correct FP precision when setting FPRF in FP conversion helpers
instead of always assuming float64 precision.

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xscvdphp, xscvhpdp
Bharata B Rao [Fri, 6 Jan 2017 06:14:49 +0000 (11:44 +0530)]
target-ppc: Add xscvdphp, xscvhpdp

xscvdphp: VSX Scalar round & Convert Double-Precision format to
          Half-Precision format
xscvhpdp: VSX Scalar Convert Half-Precision format to
          Double-Precision format

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Rename helper_compute_fprf to helper_compute_fprf_float64
Bharata B Rao [Fri, 6 Jan 2017 06:14:47 +0000 (11:44 +0530)]
target-ppc: Rename helper_compute_fprf to helper_compute_fprf_float64

Since helper_compute_fprf() works on float64 argument, rename it
to helper_compute_fprf_float64(). Also use a macro to generate
helper_compute_fprf_float64() so that float128 version of the same
helper can be introduced easily later.

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Replace isden by float64_is_zero_or_denormal
Bharata B Rao [Fri, 6 Jan 2017 06:14:46 +0000 (11:44 +0530)]
target-ppc: Replace isden by float64_is_zero_or_denormal

Replace isden() by float64_is_zero_or_denormal() so that code in
helper_compute_fprf() can be reused to work with float128 argument.

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Use float64 arg in helper_compute_fprf()
Bharata B Rao [Fri, 6 Jan 2017 06:14:45 +0000 (11:44 +0530)]
target-ppc: Use float64 arg in helper_compute_fprf()

Use float64 argument instead of unit64_t in helper_compute_fprf()
This allows code in helper_compute_fprf() to be reused later to
work with float128 argument too.

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoprep: add IBM RS/6000 7020 (40p) machine emulation
Hervé Poussineau [Sat, 7 Jan 2017 15:23:43 +0000 (16:23 +0100)]
prep: add IBM RS/6000 7020 (40p) machine emulation

Machine supports both Open Hack'Ware and OpenBIOS.
Open Hack'Ware is the default because OpenBIOS is currently unable to boot
PReP boot partitions or PReP kernels.

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
[dwg: Correct compile failure with KVM located by Thomas Huth]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoprep: add IBM RS/6000 7020 (40p) memory controller
Hervé Poussineau [Sat, 7 Jan 2017 15:23:42 +0000 (16:23 +0100)]
prep: add IBM RS/6000 7020 (40p) memory controller

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
[dwg: Added CONFIG_RS6000_MC to ppc64 or it breaks testcases]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoprep: add PReP System I/O
Hervé Poussineau [Sat, 7 Jan 2017 15:23:41 +0000 (16:23 +0100)]
prep: add PReP System I/O

This device is a partial duplicate of System I/O device available in hw/ppc/prep.c
This new one doesn't have all the Motorola-specific registers.
The old one should be deprecated and removed with the 'prep' machine.

Partial documentation available at
ftp://ftp.software.ibm.com/rs6000/technology/spec/srp1_1.exe
section 6.1.5 (I/O Device Mapping)

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xxinsertw instruction
Nikunj A Dadhania [Fri, 6 Jan 2017 06:14:44 +0000 (11:44 +0530)]
target-ppc: Add xxinsertw instruction

xxinsertw: VSX Vector Insert Word

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xxextractuw instruction
Nikunj A Dadhania [Fri, 6 Jan 2017 06:14:43 +0000 (11:44 +0530)]
target-ppc: Add xxextractuw instruction

xxextractuw: VSX Vector Extract Unsigned Word

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agohw/ppc: QOM'ify spapr_vio.c
xiaoqiang zhao [Fri, 6 Jan 2017 00:26:28 +0000 (08:26 +0800)]
hw/ppc: QOM'ify spapr_vio.c

Drop the old and empty SysBus init

Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agohw/ppc: QOM'ify ppce500_spin.c
xiaoqiang zhao [Fri, 6 Jan 2017 00:26:27 +0000 (08:26 +0800)]
hw/ppc: QOM'ify ppce500_spin.c

Drop the old SysBus init function and use instance_init

Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agohw/ppc: QOM'ify e500.c
xiaoqiang zhao [Fri, 6 Jan 2017 00:26:26 +0000 (08:26 +0800)]
hw/ppc: QOM'ify e500.c

Drop the old SysBus init function and use instance_init

Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agohw/gpio: QOM'ify mpc8xxx.c
xiaoqiang zhao [Fri, 6 Jan 2017 00:26:25 +0000 (08:26 +0800)]
hw/gpio: QOM'ify mpc8xxx.c

* Drop the old SysBus init function and use instance_init
* Change mpc8xxx_gpio_reset to a DeviceClass::reset function

Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoqtest: add ivshmem-test for ppc64
Laurent Vivier [Thu, 5 Jan 2017 15:29:48 +0000 (16:29 +0100)]
qtest: add ivshmem-test for ppc64

The test has been converted to use libqos, we can
now use it on ppc64. We also make the test fail on
all other architectures.
As libqos on ppc64 is not able to manage hotplug
and IRQ/MSI, we disable this part in the test on ppc64.

Signed-off-by: Laurent Vivier <lvivier@redhat.com>
[dwg: Make test conditional on CONFIG_EVENTFD]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoqtest: convert ivshmem-test to use libqos
Laurent Vivier [Thu, 5 Jan 2017 15:29:47 +0000 (16:29 +0100)]
qtest: convert ivshmem-test to use libqos

This will allow to use it with ppc64.

Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agolibqos: fix spapr qpci_map()
Laurent Vivier [Thu, 5 Jan 2017 15:29:46 +0000 (16:29 +0100)]
libqos: fix spapr qpci_map()

Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoqtest: add display-vga-test to ppc64
Laurent Vivier [Thu, 5 Jan 2017 15:29:45 +0000 (16:29 +0100)]
qtest: add display-vga-test to ppc64

Only enable for ppc64 in the Makefile, but added
code in the file to check cirrus card only on architectures
supporting it (alpha, mips, i386, x86_64).

Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Tested-by: Greg Kurz <groug@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoqtest: add netfilter tests for ppc64
Laurent Vivier [Thu, 5 Jan 2017 15:29:44 +0000 (16:29 +0100)]
qtest: add netfilter tests for ppc64

Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Tested-by: Greg Kurz <groug@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoppc: Validate compatibility modes when setting
David Gibson [Fri, 28 Oct 2016 11:51:46 +0000 (22:51 +1100)]
ppc: Validate compatibility modes when setting

Current ppc_set_compat() will attempt to set any compatiblity mode
specified, regardless of whether it's available on the CPU.  The caller is
expected to make sure it is setting a possible mode, which is awkwward
because most of the information to make that decision is at the CPU level.

This begins to clean this up by introducing a ppc_check_compat() function
which will determine if a given compatiblity mode is supported on a CPU
(and also whether it lies within specified minimum and maximum compat
levels, which will be useful later).  It also contains an assertion that
the CPU has a "virtual hypervisor"[1], that is, that the guest isn't
permitted to execute hypervisor privilege code.  Without that, the guest
would own the PCR and so could override any mode set here.  Only machine
types which use a virtual hypervisor (i.e. 'pseries') should use
ppc_check_compat().

ppc_set_compat() is modified to validate the compatibility mode it is given
and fail if it's not available on this CPU.

[1] Or user-only mode, which also obviously doesn't allow access to the
hypervisor privileged PCR.  We don't use that now, but could in future.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
7 years agoppc: Rewrite ppc_get_compat_smt_threads()
David Gibson [Fri, 28 Oct 2016 11:35:48 +0000 (22:35 +1100)]
ppc: Rewrite ppc_get_compat_smt_threads()

To continue consolidation of compatibility mode information, this rewrites
the ppc_get_compat_smt_threads() function using the table of compatiblity
modes in target-ppc/compat.c.

It's not a direct replacement, the new ppc_compat_max_threads() function
has simpler semantics - it just returns the number of threads the cpu
model has, taking into account any compatiblity mode it is in.

This no longer takes into account kvmppc_smt_threads() as the previous
version did.  That check wasn't useful because we check in
ppc_cpu_realizefn() that CPUs aren't instantiated with more threads
than kvm allows (or if we didn't things will already be broken and
this won't make it any worse).

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
7 years agoppc: Rewrite ppc_set_compat()
David Gibson [Wed, 4 Jan 2017 05:19:50 +0000 (16:19 +1100)]
ppc: Rewrite ppc_set_compat()

This rewrites the ppc_set_compat() function so that instead of open coding
the various compatibility modes, it reads the relevant data from a table.
This is a first step in consolidating the information on compatibility
modes scattered across the code into a single place.

It also makes one change to the logic.  The old code masked the bits
to be set in the PCR (Processor Compatibility Register) by which bits
are valid on the host CPU.  This made no sense, since it was done
regardless of whether our guest CPU was the same as the host CPU or
not.  Furthermore, the actual PCR bits are only relevant for TCG[1] -
KVM instead uses the compatibility mode we tell it in
kvmppc_set_compat().  When using TCG host cpu information usually
isn't even present.

While we're at it, we put the new implementation in a new file to make the
enormous translate_init.c a little smaller.

[1] Actually it doesn't even do anything in TCG, but it will if / when we
    get to implementing compatibility mode logic at that level.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
7 years agopseries: Add pseries-2.9 machine type
David Gibson [Thu, 8 Dec 2016 05:39:18 +0000 (16:39 +1100)]
pseries: Add pseries-2.9 machine type

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
7 years agoprep: do not use global variable to access nvram
Hervé Poussineau [Thu, 29 Dec 2016 22:12:13 +0000 (23:12 +0100)]
prep: do not use global variable to access nvram

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agohw/ppc/spapr: Fix boot path of usb-host storage devices
Thomas Huth [Wed, 14 Dec 2016 21:44:17 +0000 (22:44 +0100)]
hw/ppc/spapr: Fix boot path of usb-host storage devices

When passing through an USB storage device to a pseries guest, it
is currently not possible to automatically boot from the device
if the "bootindex" property has been specified, too (e.g. when using
"-device nec-usb-xhci -device usb-host,hostbus=1,hostaddr=2,bootindex=0"
at the command line). The problem is that QEMU builds a device tree path
like "/pci@800000020000000/usb@0/usb-host@1" and passes it to SLOF
in the /chosen/qemu,boot-list property. SLOF, however, probes the
USB device, recognizes that it is a storage device and thus changes
its name to "storage", and additionally adds a child node for the
SCSI LUN, so the correct boot path in SLOF is something like
"/pci@800000020000000/usb@0/storage@1/disk@101000000000000" instead.
So when we detect an USB mass storage device with SCSI interface,
we've got to adjust the firmware boot-device path properly that
SLOF can automatically boot from the device.

Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=1354177
Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: implement stxvll instructions
Nikunj A Dadhania [Fri, 9 Dec 2016 12:17:23 +0000 (17:47 +0530)]
target-ppc: implement stxvll instructions

stxvll: Store VSX Vector Left-justified with Length

Vector (8-bit elements) in BE/LE:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
|“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|00|00|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+

Storing 14 bytes would result in following Little/Big-endian Storage:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
|“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|FF|FF|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: implement stxvl instruction
Nikunj A Dadhania [Fri, 9 Dec 2016 12:17:22 +0000 (17:47 +0530)]
target-ppc: implement stxvl instruction

stxvl: Store VSX Vector with Length

Vector (8-bit elements) in BE:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
|“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|00|00|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+

Vector (8-bit elements) in LE:
+--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
|00|00|“T”|“S”|“E”|“T”|“ ”|“a”|“ ”|“s”|“i”|“ ”|“s”|“i”|"h"|"T"|
+--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+

Storing 14 bytes would result in following Little/Big-endian Storage:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
|“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|FF|FF|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: implement lxvll instruction
Nikunj A Dadhania [Fri, 9 Dec 2016 12:17:21 +0000 (17:47 +0530)]
target-ppc: implement lxvll instruction

lxvll: Load VSX Vector Left-justified with Length

Little/Big-endian Storage:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
|“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|FF|FF|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+

Loading 14 bytes to vector (8-bit elements) in BE/LE:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
|“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|00|00|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: implement lxvl instruction
Nikunj A Dadhania [Fri, 9 Dec 2016 12:17:20 +0000 (17:47 +0530)]
target-ppc: implement lxvl instruction

lxvl: Load VSX Vector with Length

Little/Big-endian Storage:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
|“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|FF|FF|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+

Loading 14 bytes results in:

Vector (8-bit elements) in BE:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
|“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|00|00|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+

Vector (8-bit elements) in LE:
+--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
|00|00|“T”|“S”|“E”|“T”|“ ”|“a”|“ ”|“s”|“i”|“ ”|“s”|“i”|"h"|"T"|
+--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xxperm and xxpermr instructions
Bharata B Rao [Wed, 7 Dec 2016 18:25:02 +0000 (23:55 +0530)]
target-ppc: Add xxperm and xxpermr instructions

xxperm:  VSX Vector Permute
xxpermr: VSX Vector Permute Right-indexed

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: implement xscpsgnqp instruction
Nikunj A Dadhania [Wed, 7 Dec 2016 18:25:01 +0000 (23:55 +0530)]
target-ppc: implement xscpsgnqp instruction

xscpsgnqp: VSX Scalar Copy Sign Quad-Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: implement xsnegqp instruction
Nikunj A Dadhania [Wed, 7 Dec 2016 18:25:00 +0000 (23:55 +0530)]
target-ppc: implement xsnegqp instruction

xsnegqp: VSX Scalar Negate Quad-Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Implement bcd_is_valid function
Jose Ricardo Ziviani [Tue, 6 Dec 2016 19:40:04 +0000 (17:40 -0200)]
target-ppc: Implement bcd_is_valid function

A function to check if all digits of a given BCD number is valid is
here presented because more instructions will need to reuse the
same code.

Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: implement xsabsqp/xsnabsqp instruction
David Gibson [Tue, 6 Dec 2016 03:49:23 +0000 (14:49 +1100)]
target-ppc: implement xsabsqp/xsnabsqp instruction

xsabsqp:  VSX Scalar Absolute Quad-Precision
xsnabsqp: VSX Scalar Negative Absolute Quad-Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: implement stop instruction
Nikunj A Dadhania [Mon, 5 Dec 2016 11:25:26 +0000 (16:55 +0530)]
target-ppc: implement stop instruction

Use the nap code.

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: move ppc_vsr_t to common header
Nikunj A Dadhania [Mon, 5 Dec 2016 11:25:18 +0000 (16:55 +0530)]
target-ppc: move ppc_vsr_t to common header

The structure and corresponding defines and functions need to be used
outside of fpu_helper.c as well.

Add u8, u16, u32 and Int128 to the structure.

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoppc/spapr: implement H_SIGNAL_SYS_RESET
Nicholas Piggin [Mon, 5 Dec 2016 05:50:21 +0000 (16:50 +1100)]
ppc/spapr: implement H_SIGNAL_SYS_RESET

The H_SIGNAL_SYS_RESET hcall allows a guest CPU to raise a system reset
exception on CPUs within the same guest -- all CPUs, all-but-self, or a
specific CPU (including self).

This has not made its way to a PAPR release yet, but we have an hcall
number assigned.

  H_SIGNAL_SYS_RESET = 0x380

  Syntax:
    hcall(uint64 H_SIGNAL_SYS_RESET, int64 target);

  Generate a system reset NMI on the threads indicated by target.

  Values for target:
    -1 = target all online threads including the caller
    -2 = target all online threads except for the caller
    All other negative values: reserved
    Positive values: The thread to be targeted, obtained from the value
    of the "ibm,ppc-interrupt-server#s" property of the CPU in the OF
    device tree.

  Semantics:
    - Invalid target: return H_Parameter.
    - Otherwise: Generate a system reset NMI on target thread(s),
      return H_Success.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoppc: Rename cpu_version to compat_pvr
David Gibson [Fri, 28 Oct 2016 11:09:37 +0000 (22:09 +1100)]
ppc: Rename cpu_version to compat_pvr

The 'cpu_version' field in PowerPCCPU is badly named.  It's named after the
'cpu-version' device tree property where it is advertised, but that meaning
may not be obvious in most places it appears.

Worse, it doesn't even really correspond to that device tree property.  The
property contains either the processor's PVR, or, if the CPU is running in
a compatibility mode, a special "logical PVR" representing which mode.

Rename the cpu_version field, and a number of related variables to
compat_pvr to make this clearer.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Thomas Huth <thuth@redhat.com>
7 years agoppc: Clean up and QOMify hypercall emulation
David Gibson [Fri, 28 Oct 2016 11:06:21 +0000 (22:06 +1100)]
ppc: Clean up and QOMify hypercall emulation

The pseries machine type is a bit unusual in that it runs a paravirtualized
guest.  The guest expects to interact with a hypervisor, and qemu
emulates the functions of that hypervisor directly, rather than executing
hypervisor code within the emulated system.

To implement this in TCG, we need to intercept hypercall instructions and
direct them to the machine's hypercall handlers, rather than attempting to
perform a privilege change within TCG.  This is controlled by a global
hook - cpu_ppc_hypercall.

This cleanup makes the handling a little cleaner and more extensible than
a single global variable.  Instead, each CPU to have hypercalls intercepted
has a pointer set to a QOM object implementing a new virtual hypervisor
interface.  A method in that interface is called by TCG when it sees a
hypercall instruction.  It's possible we may want to add other methods in
future.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
7 years agopseries: Make cpu_update during CAS unconditional
David Gibson [Fri, 28 Oct 2016 13:01:05 +0000 (00:01 +1100)]
pseries: Make cpu_update during CAS unconditional

spapr_h_cas_compose_response() includes a cpu_update parameter which
controls whether it includes updated information on the CPUs in the device
tree fragment returned from the ibm,client-architecture-support (CAS) call.

Providing the updated information is essential when CAS has negotiated
compatibility options which require different cpu information to be
presented to the guest.  However, it should be safe to provide in other
cases (it will just override the existing data in the device tree with
identical data).  This simplifies the code by removing the parameter and
always providing the cpu update information.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
7 years agopseries: Always use core objects for CPU construction
David Gibson [Tue, 8 Nov 2016 05:33:32 +0000 (16:33 +1100)]
pseries: Always use core objects for CPU construction

Currently the pseries machine has two paths for constructing CPUs.  On
newer machine type versions, which support cpu hotplug, it constructs
cpu core objects, which in turn construct CPU threads.  For older machine
versions it individually constructs the CPU threads.

This division is going to make some future changes to the cpu construction
harder, so this patch unifies them.  Now cpu core objects are always
created.  This requires some updates to allow core objects to be created
without a full complement of threads (since older versions allowed a
number of cpus not a multiple of the threads-per-core).  Likewise it needs
some changes to the cpu core hot/cold plug path so as not to choke on the
old machine types without hotplug support.

For good measure, we move the cpu construction to its own subfunction,
spapr_init_cpus().

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Greg Kurz <groug@kaod.org>
7 years agotarget-ppc: add vextu[bhw][lr]x instructions
Avinesh Kumar [Mon, 28 Nov 2016 07:56:42 +0000 (13:26 +0530)]
target-ppc: add vextu[bhw][lr]x instructions

vextublx: Vector Extract Unsigned Byte Left
vextuhlx: Vector Extract Unsigned Halfword Left
vextuwlx: Vector Extract Unsigned Word Left
vextubrx: Vector Extract Unsigned Byte Right-Indexed VX-form
vextuhrx: Vector Extract Unsigned  Halfword Right-Indexed VX-form
vextuwrx: Vector Extract Unsigned Word Right-Indexed VX-form

Signed-off-by: Avinesh Kumar <avinesku@linux.vnet.ibm.com>
Signed-off-by: Hariharan T.S. <hari@linux.vnet.ibm.com>
[ implement using int128_rshift ]
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Implement bcdsetsgn. instruction
Jose Ricardo Ziviani [Fri, 25 Nov 2016 03:53:33 +0000 (01:53 -0200)]
target-ppc: Implement bcdsetsgn. instruction

bcdsetsgn.: Decimal set sign. This instruction copies the register
value to the result register but adjust the signal according to
the preferred sign value.

Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Implement bcdcpsgn. instruction
Jose Ricardo Ziviani [Fri, 25 Nov 2016 03:53:32 +0000 (01:53 -0200)]
target-ppc: Implement bcdcpsgn. instruction

bcdcpsgn.: Decimal copy sign. Given two registers vra and vrb, it
copies the vra value with vrb sign to the result register vrt.

Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Implement bcdctsq. instruction
Jose Ricardo Ziviani [Fri, 25 Nov 2016 03:53:31 +0000 (01:53 -0200)]
target-ppc: Implement bcdctsq. instruction

bcdctsq.: Decimal convert to signed quadword. It is possible to
convert packed decimal values to signed quadwords.

Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Implement bcdcfsq. instruction
Jose Ricardo Ziviani [Fri, 25 Nov 2016 03:53:30 +0000 (01:53 -0200)]
target-ppc: Implement bcdcfsq. instruction

bcdcfsq.: Decimal convert from signed quadword. It is not possible
to convert values less than -10^31-1 or greater than 10^31-1 to be
represented in packed decimal format.

Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
[dwg: Corrected constant which should be 10^16-1 but was 10^17-1]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: implement lxv/lxvx and stxv/stxvx
Nikunj A Dadhania [Wed, 23 Nov 2016 11:37:17 +0000 (17:07 +0530)]
target-ppc: implement lxv/lxvx and stxv/stxvx

lxv:  Load VSX Vector
lxvx: Load VSX Vector Indexed

    Little/Big-endian Storage
    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
    |F0|F1|F2|F3|F4|F5|F6|F7|E0|E1|E2|E3|E4|E5|E6|E7|
    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+

    Vector load results:
    BE:
    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
    |F0|F1|F2|F3|F4|F5|F6|F7|E0|E1|E2|E3|E4|E5|E6|E7|
    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+

    LE:
    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
    |E7|E6|E5|E4|E3|E2|E1|E0|F7|F6|F5|F4|F3|F2|F1|F0|
    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+

stxv: Store VSX Vector
stxvx: Store VSX Vector Indexed

    Vector (8-bit elements) in BE:
    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
    |F0|F1|F2|F3|F4|F5|F6|F7|E0|E1|E2|E3|E4|E5|E6|E7|
    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+

    Vector (8-bit elements) in LE:
    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
    |E7|E6|E5|E4|E3|E2|E1|E0|F7|F6|F5|F4|F3|F2|F1|F0|
    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+

    Store results in following:
    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
    |F0|F1|F2|F3|F4|F5|F6|F7|E0|E1|E2|E3|E4|E5|E6|E7|
    +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: implement stxsd and stxssp
Nikunj A Dadhania [Wed, 23 Nov 2016 11:37:16 +0000 (17:07 +0530)]
target-ppc: implement stxsd and stxssp

stxsd:  Store VSX Scalar Dword
stxssp: Store VSX Scalar SP

Moreover, DQ-Form/DS-FORM instructions shares the same primary
opcode(0x3D). For DQ-FORM bits 29:31 are used, for DS-FORM bits 30:31
are used. Common routine to decode primary opcode(0x3D) -
ds-form/dq-form instructions is required.

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: implement lxsd and lxssp instructions
Nikunj A Dadhania [Wed, 23 Nov 2016 11:37:15 +0000 (17:07 +0530)]
target-ppc: implement lxsd and lxssp instructions

lxsd: Load VSX Scalar Dword
lxssp: Load VSX Scalar Single

Moreover, DS-Form instructions shares the same primary opcode, bits
30:31 are used to decode the instruction. Use a common routine to decode
primary opcode(0x39) - ds-form instructions and branch-out depending on
bits 30:31.

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xscmpoqp and xscmpuqp instructions
Bharata B Rao [Wed, 23 Nov 2016 11:37:14 +0000 (17:07 +0530)]
target-ppc: Add xscmpoqp and xscmpuqp instructions

xscmpoqp - VSX Scalar Compare Ordered Quad-Precision
xscmpuqp - VSX Scalar Compare Unordered Quad-Precision

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Add xscmpexp[dp,qp] instructions
Bharata B Rao [Wed, 23 Nov 2016 11:37:13 +0000 (17:07 +0530)]
target-ppc: Add xscmpexp[dp,qp] instructions

xscmpexpdp: VSX Scalar Compare Exponents Double-Precision
xscmpexpqp: VSX Scalar Compare Exponents Quad-Precision

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Fix xscmpodp and xscmpudp instructions
Bharata B Rao [Wed, 23 Nov 2016 11:37:12 +0000 (17:07 +0530)]
target-ppc: Fix xscmpodp and xscmpudp instructions

- xscmpodp & xscmpudp are missing flags reset.
- In xscmpodp, VXCC should be set only if VE is 0 for signalling NaN case
  and VXCC should be set by explicitly checking for quiet NaN case.
- Comparison is being done only if the operands are not NaNs. However as
  per ISA, it should be done even when operands are NaNs.

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: rename CRF_* defines as CRF_*_BIT
Nikunj A Dadhania [Wed, 23 Nov 2016 11:37:11 +0000 (17:07 +0530)]
target-ppc: rename CRF_* defines as CRF_*_BIT

Add _BIT to CRF_[GT,LT,EQ_SO] and introduce CRF_[GT,LT,EQ,SO] for usage
without shifts in the code. This would simplify the code.

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agotarget-ppc: Consolidate instruction decode helpers
Bharata B Rao [Wed, 23 Nov 2016 11:37:10 +0000 (17:07 +0530)]
target-ppc: Consolidate instruction decode helpers

Move instruction decode helpers to target-ppc/internal.h so that some
of these can be used from outside of translate.c. This movement also
helps to get rid of some duplicate helpers from target-ppc/fpu_helper.c.

Suggested-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agodisas/ppc: Fix indefinite articles in comments
Stefan Weil [Sat, 19 Nov 2016 19:23:03 +0000 (20:23 +0100)]
disas/ppc: Fix indefinite articles in comments

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
7 years agoMerge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
Peter Maydell [Mon, 30 Jan 2017 10:23:20 +0000 (10:23 +0000)]
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* SCSI max_transfer support for scsi-generic (Eric)
* x86 SMI broadcast (Laszlo)
* Character device QOMification (Marc-André)
* Record/replay improvements (Pavel)
* iscsi fixes (Peter L.)
* "info mtree -f" command (Peter Xu)
* TSC clock rate reporting (Phil)
* DEVICE_CATEGORY_CPU (Thomas)
* Memory sign-extension fix (Ladi)

# gpg: Signature made Fri 27 Jan 2017 17:08:51 GMT
# gpg:                using RSA key 0xBFFBD25F78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>"
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>"
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* remotes/bonzini/tags/for-upstream: (41 commits)
  memory: don't sign-extend 32-bit writes
  chardev: qom-ify
  vc: use a common prefix for chr callbacks
  baum: use a common prefix for chr callbacks
  gtk: overwrite the console.c char driver
  char: use error_report()
  spice-char: improve error reporting
  char: rename TCPChardev and NetChardev
  char: rename CharDriverState Chardev
  bt: use qemu_chr_alloc()
  char: allocate CharDriverState as a single object
  char: use a feature bit for replay
  char: introduce generic qemu_chr_get_kind()
  char: fold single-user functions in caller
  char: move callbacks in CharDriver
  char: use a static array for backends
  char: use a const CharDriver
  doc: fix spelling
  char: add qemu_chr_fe_add_watch() Returns description
  qemu-options: stdio is available on win32
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7 years agomemory: don't sign-extend 32-bit writes
Ladi Prosek [Thu, 26 Jan 2017 14:22:37 +0000 (15:22 +0100)]
memory: don't sign-extend 32-bit writes

ldl_p has a signed return type so assigning it to uint64_t implicitly
sign-extends the value. This results in devices with min_access_size = 8
seeing unexpected values passed to their write handlers.

Example: guest performs a 32-bit write of 0x80000000 to an mmio region
and the handler receives 0xFFFFFFFF80000000 in its value argument.

Signed-off-by: Ladi Prosek <lprosek@redhat.com>
Message-Id: <1485440557-10384-1-git-send-email-lprosek@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
7 years agochardev: qom-ify
Marc-André Lureau [Wed, 7 Dec 2016 15:39:10 +0000 (18:39 +0300)]
chardev: qom-ify

Turn Chardev into Object.

qemu_chr_alloc() is replaced by the qemu_chardev_new() constructor. It
will call qemu_char_open() to open/intialize the chardev with the
ChardevCommon *backend settings.

The CharDriver::create() callback is turned into a ChardevClass::open()
which is called from the newly introduced qemu_chardev_open().

"chardev-gdb" and "chardev-hci" are internal chardev and aren't
creatable directly with -chardev. Use a new internal flag to disable
them. We may want to use TYPE_USER_CREATABLE interface instead, or
perhaps allow -chardev usage.

Although in general we keep typename and macros private, unless the type
is being used by some other file, in this patch, all types and common
helper macros for qemu-char.c are in char.h. This is to help transition
now (some types must be declared early, while some aren't shared) and
when splitting in several units. This is to be improved later.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
7 years agovc: use a common prefix for chr callbacks
Marc-André Lureau [Thu, 5 Jan 2017 16:30:29 +0000 (17:30 +0100)]
vc: use a common prefix for chr callbacks

vc_chr_write() is more appropriate than _puts() since no newline is
appended, even though it's not used only as a callback.

Keep "qemu_chr_parse" prefix, most chardev parse functions use this
prefix atm.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
7 years agobaum: use a common prefix for chr callbacks
Marc-André Lureau [Thu, 5 Jan 2017 14:29:48 +0000 (15:29 +0100)]
baum: use a common prefix for chr callbacks

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
7 years agogtk: overwrite the console.c char driver
Marc-André Lureau [Wed, 7 Dec 2016 12:13:50 +0000 (15:13 +0300)]
gtk: overwrite the console.c char driver

Instead of registering a vc handler to allocate the Gtk VC Chardev,
overwrite the console.c char driver.

A later patch, when switching to QOM, will register a default console vc
QOM class if none has been registered before.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
7 years agochar: use error_report()
Marc-André Lureau [Wed, 30 Nov 2016 18:57:24 +0000 (22:57 +0400)]
char: use error_report()

Prefer error_report() over fprintf(stderr..)

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
7 years agospice-char: improve error reporting
Marc-André Lureau [Wed, 30 Nov 2016 13:55:20 +0000 (17:55 +0400)]
spice-char: improve error reporting

Set errp to report errors up to the right monitor.

Use error_append_hint() to give hints about parameters on !qmp monitors,
instead of a direct fprintf() call.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
7 years agochar: rename TCPChardev and NetChardev
Marc-André Lureau [Thu, 8 Dec 2016 11:21:53 +0000 (14:21 +0300)]
char: rename TCPChardev and NetChardev

Rename the types to follow the name of the chardev kind.
- socket: TCPChardev -> SocketChardev
- udp: NetChardev -> UdpChardev

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
7 years agochar: rename CharDriverState Chardev
Marc-André Lureau [Wed, 7 Dec 2016 13:20:22 +0000 (16:20 +0300)]
char: rename CharDriverState Chardev

Pick a uniform chardev type name.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
7 years agobt: use qemu_chr_alloc()
Marc-André Lureau [Sat, 22 Oct 2016 07:55:22 +0000 (10:55 +0300)]
bt: use qemu_chr_alloc()

Use common allocator for CharDriverState.

Rename the now untouched parent field.

The casts added are temporary, they are replaced with QOM type-safe
macros in a later patch in this series.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
7 years agochar: allocate CharDriverState as a single object
Marc-André Lureau [Fri, 21 Oct 2016 20:44:44 +0000 (23:44 +0300)]
char: allocate CharDriverState as a single object

Use a single allocation for CharDriverState, this avoids extra
allocations & pointers, and is a step towards more object-oriented
CharDriver.

Gtk console is a bit peculiar, gd_vc_chr_set_echo() used to have a
temporary VirtualConsole to save the echo bit. Instead now, we consider
whether vcd->console is set or not, and restore the echo bit saved in
VCDriverState when calling gd_vc_vte_init().

The casts added are temporary, they are replaced with QOM type-safe
macros in a later patch in this series.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
7 years agochar: use a feature bit for replay
Marc-André Lureau [Fri, 21 Oct 2016 19:58:45 +0000 (22:58 +0300)]
char: use a feature bit for replay

Use a feature flag rather than a structure field for "replay".

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
7 years agochar: introduce generic qemu_chr_get_kind()
Marc-André Lureau [Fri, 21 Oct 2016 19:38:41 +0000 (22:38 +0300)]
char: introduce generic qemu_chr_get_kind()

This allows to remove the "is_mux" field from CharDriverState.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
7 years agochar: fold single-user functions in caller
Marc-André Lureau [Fri, 21 Oct 2016 19:09:15 +0000 (22:09 +0300)]
char: fold single-user functions in caller

This shortens the code a bit.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
7 years agochar: move callbacks in CharDriver
Marc-André Lureau [Fri, 21 Oct 2016 17:49:37 +0000 (20:49 +0300)]
char: move callbacks in CharDriver

This makes the code more declarative, and avoids duplicating the
information on all instances.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>