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Commit | Line | Data |
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1da177e4 | 1 | /* |
033ef338 | 2 | * 64-bit pSeries and RS/6000 setup code. |
1da177e4 LT |
3 | * |
4 | * Copyright (C) 1995 Linus Torvalds | |
5 | * Adapted from 'alpha' version by Gary Thomas | |
6 | * Modified by Cort Dougan (cort@cs.nmt.edu) | |
7 | * Modified by PPC64 Team, IBM Corp | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License | |
11 | * as published by the Free Software Foundation; either version | |
12 | * 2 of the License, or (at your option) any later version. | |
13 | */ | |
14 | ||
15 | /* | |
16 | * bootup setup stuff.. | |
17 | */ | |
18 | ||
62d60e9f | 19 | #include <linux/cpu.h> |
1da177e4 LT |
20 | #include <linux/errno.h> |
21 | #include <linux/sched.h> | |
22 | #include <linux/kernel.h> | |
23 | #include <linux/mm.h> | |
24 | #include <linux/stddef.h> | |
25 | #include <linux/unistd.h> | |
1da177e4 | 26 | #include <linux/user.h> |
1da177e4 LT |
27 | #include <linux/tty.h> |
28 | #include <linux/major.h> | |
29 | #include <linux/interrupt.h> | |
30 | #include <linux/reboot.h> | |
31 | #include <linux/init.h> | |
32 | #include <linux/ioport.h> | |
33 | #include <linux/console.h> | |
34 | #include <linux/pci.h> | |
cebb2b15 | 35 | #include <linux/utsname.h> |
1da177e4 | 36 | #include <linux/adb.h> |
4b16f8e2 | 37 | #include <linux/export.h> |
1da177e4 LT |
38 | #include <linux/delay.h> |
39 | #include <linux/irq.h> | |
40 | #include <linux/seq_file.h> | |
41 | #include <linux/root_dev.h> | |
1cf3d8b3 | 42 | #include <linux/of.h> |
cedddd81 | 43 | #include <linux/kexec.h> |
1da177e4 LT |
44 | |
45 | #include <asm/mmu.h> | |
46 | #include <asm/processor.h> | |
47 | #include <asm/io.h> | |
48 | #include <asm/pgtable.h> | |
49 | #include <asm/prom.h> | |
50 | #include <asm/rtas.h> | |
51 | #include <asm/pci-bridge.h> | |
52 | #include <asm/iommu.h> | |
53 | #include <asm/dma.h> | |
54 | #include <asm/machdep.h> | |
55 | #include <asm/irq.h> | |
56 | #include <asm/time.h> | |
57 | #include <asm/nvram.h> | |
180a3362 | 58 | #include <asm/pmc.h> |
bbeb3f4c | 59 | #include <asm/mpic.h> |
0b05ac6e | 60 | #include <asm/xics.h> |
d387899f | 61 | #include <asm/ppc-pci.h> |
69a80d3f PM |
62 | #include <asm/i8259.h> |
63 | #include <asm/udbg.h> | |
2249ca9d | 64 | #include <asm/smp.h> |
577830b0 | 65 | #include <asm/firmware.h> |
bed59275 | 66 | #include <asm/eeh.h> |
bf99de36 | 67 | #include <asm/reg.h> |
212bebb4 | 68 | #include <asm/plpar_wrappers.h> |
1da177e4 | 69 | |
577830b0 | 70 | #include "pseries.h" |
a1218720 | 71 | |
81f14997 RJ |
72 | int CMO_PrPSP = -1; |
73 | int CMO_SecPSP = -1; | |
e589a440 | 74 | unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K); |
d617a402 | 75 | EXPORT_SYMBOL(CMO_PageSize); |
1da177e4 | 76 | |
1da177e4 LT |
77 | int fwnmi_active; /* TRUE if an FWNMI handler is present */ |
78 | ||
0ebfff14 | 79 | static struct device_node *pSeries_mpic_node; |
1da177e4 | 80 | |
8446196a | 81 | static void pSeries_show_cpuinfo(struct seq_file *m) |
1da177e4 LT |
82 | { |
83 | struct device_node *root; | |
84 | const char *model = ""; | |
85 | ||
86 | root = of_find_node_by_path("/"); | |
87 | if (root) | |
e2eb6392 | 88 | model = of_get_property(root, "model", NULL); |
1da177e4 LT |
89 | seq_printf(m, "machine\t\t: CHRP %s\n", model); |
90 | of_node_put(root); | |
91 | } | |
92 | ||
93 | /* Initialize firmware assisted non-maskable interrupts if | |
94 | * the firmware supports this feature. | |
1da177e4 LT |
95 | */ |
96 | static void __init fwnmi_init(void) | |
97 | { | |
8c4f1f29 ME |
98 | unsigned long system_reset_addr, machine_check_addr; |
99 | ||
1da177e4 LT |
100 | int ibm_nmi_register = rtas_token("ibm,nmi-register"); |
101 | if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE) | |
102 | return; | |
8c4f1f29 ME |
103 | |
104 | /* If the kernel's not linked at zero we point the firmware at low | |
105 | * addresses anyway, and use a trampoline to get to the real code. */ | |
106 | system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START; | |
107 | machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START; | |
108 | ||
109 | if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr, | |
110 | machine_check_addr)) | |
1da177e4 LT |
111 | fwnmi_active = 1; |
112 | } | |
113 | ||
541b2755 | 114 | static void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc) |
b9e5b4e6 | 115 | { |
ec775d0e | 116 | struct irq_chip *chip = irq_desc_get_chip(desc); |
35a84c2f | 117 | unsigned int cascade_irq = i8259_irq(); |
79f26c26 | 118 | |
0ebfff14 | 119 | if (cascade_irq != NO_IRQ) |
7d12e780 | 120 | generic_handle_irq(cascade_irq); |
79f26c26 LB |
121 | |
122 | chip->irq_eoi(&desc->irq_data); | |
b9e5b4e6 BH |
123 | } |
124 | ||
30d6ad25 | 125 | static void __init pseries_setup_i8259_cascade(void) |
032ace7e ME |
126 | { |
127 | struct device_node *np, *old, *found = NULL; | |
30d6ad25 | 128 | unsigned int cascade; |
032ace7e ME |
129 | const u32 *addrp; |
130 | unsigned long intack = 0; | |
30d6ad25 | 131 | int naddr; |
032ace7e | 132 | |
30d6ad25 | 133 | for_each_node_by_type(np, "interrupt-controller") { |
032ace7e ME |
134 | if (of_device_is_compatible(np, "chrp,iic")) { |
135 | found = np; | |
136 | break; | |
137 | } | |
30d6ad25 ME |
138 | } |
139 | ||
032ace7e | 140 | if (found == NULL) { |
30d6ad25 | 141 | printk(KERN_DEBUG "pic: no ISA interrupt controller\n"); |
032ace7e ME |
142 | return; |
143 | } | |
30d6ad25 | 144 | |
032ace7e ME |
145 | cascade = irq_of_parse_and_map(found, 0); |
146 | if (cascade == NO_IRQ) { | |
30d6ad25 | 147 | printk(KERN_ERR "pic: failed to map cascade interrupt"); |
032ace7e ME |
148 | return; |
149 | } | |
30d6ad25 | 150 | pr_debug("pic: cascade mapped to irq %d\n", cascade); |
032ace7e ME |
151 | |
152 | for (old = of_node_get(found); old != NULL ; old = np) { | |
153 | np = of_get_parent(old); | |
154 | of_node_put(old); | |
155 | if (np == NULL) | |
156 | break; | |
157 | if (strcmp(np->name, "pci") != 0) | |
158 | continue; | |
159 | addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL); | |
160 | if (addrp == NULL) | |
161 | continue; | |
162 | naddr = of_n_addr_cells(np); | |
163 | intack = addrp[naddr-1]; | |
164 | if (naddr > 1) | |
165 | intack |= ((unsigned long)addrp[naddr-2]) << 32; | |
166 | } | |
167 | if (intack) | |
30d6ad25 | 168 | printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack); |
032ace7e ME |
169 | i8259_init(found, intack); |
170 | of_node_put(found); | |
ec775d0e | 171 | irq_set_chained_handler(cascade, pseries_8259_cascade); |
032ace7e ME |
172 | } |
173 | ||
0ebfff14 | 174 | static void __init pseries_mpic_init_IRQ(void) |
1da177e4 | 175 | { |
f01567d6 | 176 | struct device_node *np; |
954a46e2 | 177 | const unsigned int *opprop; |
1da177e4 | 178 | unsigned long openpic_addr = 0; |
0ebfff14 BH |
179 | int naddr, n, i, opplen; |
180 | struct mpic *mpic; | |
1da177e4 | 181 | |
0ebfff14 | 182 | np = of_find_node_by_path("/"); |
a8bda5dd | 183 | naddr = of_n_addr_cells(np); |
e2eb6392 | 184 | opprop = of_get_property(np, "platform-open-pic", &opplen); |
b0d436c7 | 185 | if (opprop != NULL) { |
0ebfff14 | 186 | openpic_addr = of_read_number(opprop, naddr); |
1da177e4 LT |
187 | printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr); |
188 | } | |
0ebfff14 | 189 | of_node_put(np); |
1da177e4 LT |
190 | |
191 | BUG_ON(openpic_addr == 0); | |
192 | ||
1da177e4 | 193 | /* Setup the openpic driver */ |
e55d7f73 KM |
194 | mpic = mpic_alloc(pSeries_mpic_node, openpic_addr, |
195 | MPIC_NO_RESET, 16, 0, " MPIC "); | |
0ebfff14 BH |
196 | BUG_ON(mpic == NULL); |
197 | ||
198 | /* Add ISUs */ | |
199 | opplen /= sizeof(u32); | |
200 | for (n = 0, i = naddr; i < opplen; i += naddr, n++) { | |
201 | unsigned long isuaddr = of_read_number(opprop + i, naddr); | |
202 | mpic_assign_isu(mpic, n, isuaddr); | |
203 | } | |
204 | ||
0b05ac6e BH |
205 | /* Setup top-level get_irq */ |
206 | ppc_md.get_irq = mpic_get_irq; | |
207 | ||
0ebfff14 BH |
208 | /* All ISUs are setup, complete initialization */ |
209 | mpic_init(mpic); | |
210 | ||
211 | /* Look for cascade */ | |
f01567d6 | 212 | pseries_setup_i8259_cascade(); |
1da177e4 LT |
213 | } |
214 | ||
032ace7e ME |
215 | static void __init pseries_xics_init_IRQ(void) |
216 | { | |
0b05ac6e | 217 | xics_init(); |
30d6ad25 | 218 | pseries_setup_i8259_cascade(); |
032ace7e ME |
219 | } |
220 | ||
180a3362 ME |
221 | static void pseries_lpar_enable_pmcs(void) |
222 | { | |
223 | unsigned long set, reset; | |
224 | ||
180a3362 ME |
225 | set = 1UL << 63; |
226 | reset = 0; | |
227 | plpar_hcall_norets(H_PERFMON, set, reset); | |
180a3362 ME |
228 | } |
229 | ||
0ebfff14 BH |
230 | static void __init pseries_discover_pic(void) |
231 | { | |
232 | struct device_node *np; | |
954a46e2 | 233 | const char *typep; |
0ebfff14 | 234 | |
ccdb8ed3 | 235 | for_each_node_by_name(np, "interrupt-controller") { |
e2eb6392 | 236 | typep = of_get_property(np, "compatible", NULL); |
0ebfff14 BH |
237 | if (strstr(typep, "open-pic")) { |
238 | pSeries_mpic_node = of_node_get(np); | |
239 | ppc_md.init_IRQ = pseries_mpic_init_IRQ; | |
dce623e0 | 240 | setup_kexec_cpu_down_mpic(); |
0ebfff14 | 241 | smp_init_pseries_mpic(); |
0ebfff14 BH |
242 | return; |
243 | } else if (strstr(typep, "ppc-xicp")) { | |
032ace7e | 244 | ppc_md.init_IRQ = pseries_xics_init_IRQ; |
dce623e0 | 245 | setup_kexec_cpu_down_xics(); |
0ebfff14 | 246 | smp_init_pseries_xics(); |
0ebfff14 BH |
247 | return; |
248 | } | |
249 | } | |
250 | printk(KERN_ERR "pSeries_discover_pic: failed to recognize" | |
251 | " interrupt-controller\n"); | |
252 | } | |
253 | ||
2eb4afb6 KG |
254 | static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *node) |
255 | { | |
256 | struct device_node *np = node; | |
257 | struct pci_dn *pci = NULL; | |
258 | int err = NOTIFY_OK; | |
259 | ||
260 | switch (action) { | |
1cf3d8b3 | 261 | case OF_RECONFIG_ATTACH_NODE: |
2eb4afb6 | 262 | pci = np->parent->data; |
eb740b5f | 263 | if (pci) { |
2eb4afb6 | 264 | update_dn_pci_info(np, pci->phb); |
eb740b5f GS |
265 | |
266 | /* Create EEH device for the OF node */ | |
267 | eeh_dev_init(np, pci->phb); | |
268 | } | |
2eb4afb6 KG |
269 | break; |
270 | default: | |
271 | err = NOTIFY_DONE; | |
272 | break; | |
273 | } | |
274 | return err; | |
275 | } | |
276 | ||
277 | static struct notifier_block pci_dn_reconfig_nb = { | |
278 | .notifier_call = pci_dn_reconfig_notifier, | |
279 | }; | |
280 | ||
af442a1b NA |
281 | struct kmem_cache *dtl_cache; |
282 | ||
abf917cd | 283 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE |
cf9efce0 PM |
284 | /* |
285 | * Allocate space for the dispatch trace log for all possible cpus | |
286 | * and register the buffers with the hypervisor. This is used for | |
287 | * computing time stolen by the hypervisor. | |
288 | */ | |
289 | static int alloc_dispatch_logs(void) | |
290 | { | |
291 | int cpu, ret; | |
292 | struct paca_struct *pp; | |
293 | struct dtl_entry *dtl; | |
294 | ||
295 | if (!firmware_has_feature(FW_FEATURE_SPLPAR)) | |
296 | return 0; | |
297 | ||
af442a1b | 298 | if (!dtl_cache) |
127493d5 | 299 | return 0; |
127493d5 | 300 | |
cf9efce0 PM |
301 | for_each_possible_cpu(cpu) { |
302 | pp = &paca[cpu]; | |
127493d5 | 303 | dtl = kmem_cache_alloc(dtl_cache, GFP_KERNEL); |
cf9efce0 PM |
304 | if (!dtl) { |
305 | pr_warn("Failed to allocate dispatch trace log for cpu %d\n", | |
306 | cpu); | |
307 | pr_warn("Stolen time statistics will be unreliable\n"); | |
308 | break; | |
309 | } | |
310 | ||
311 | pp->dtl_ridx = 0; | |
312 | pp->dispatch_log = dtl; | |
313 | pp->dispatch_log_end = dtl + N_DISPATCH_LOG; | |
314 | pp->dtl_curr = dtl; | |
315 | } | |
316 | ||
317 | /* Register the DTL for the current (boot) cpu */ | |
318 | dtl = get_paca()->dispatch_log; | |
319 | get_paca()->dtl_ridx = 0; | |
320 | get_paca()->dtl_curr = dtl; | |
321 | get_paca()->lppaca_ptr->dtl_idx = 0; | |
322 | ||
323 | /* hypervisor reads buffer length from this field */ | |
7ffcf8ec | 324 | dtl->enqueue_to_dispatch_time = cpu_to_be32(DISPATCH_LOG_BYTES); |
cf9efce0 PM |
325 | ret = register_dtl(hard_smp_processor_id(), __pa(dtl)); |
326 | if (ret) | |
711ef84e AB |
327 | pr_err("WARNING: DTL registration of cpu %d (hw %d) failed " |
328 | "with %d\n", smp_processor_id(), | |
329 | hard_smp_processor_id(), ret); | |
cf9efce0 PM |
330 | get_paca()->lppaca_ptr->dtl_enable_mask = 2; |
331 | ||
332 | return 0; | |
333 | } | |
abf917cd | 334 | #else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ |
af442a1b NA |
335 | static inline int alloc_dispatch_logs(void) |
336 | { | |
337 | return 0; | |
338 | } | |
abf917cd | 339 | #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ |
cf9efce0 | 340 | |
af442a1b NA |
341 | static int alloc_dispatch_log_kmem_cache(void) |
342 | { | |
343 | dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES, | |
344 | DISPATCH_LOG_BYTES, 0, NULL); | |
345 | if (!dtl_cache) { | |
346 | pr_warn("Failed to create dispatch trace log buffer cache\n"); | |
347 | pr_warn("Stolen time statistics will be unreliable\n"); | |
348 | return 0; | |
349 | } | |
350 | ||
351 | return alloc_dispatch_logs(); | |
352 | } | |
8e83e905 | 353 | machine_early_initcall(pseries, alloc_dispatch_log_kmem_cache); |
af442a1b | 354 | |
363edbe2 | 355 | static void pseries_lpar_idle(void) |
e179816c | 356 | { |
d8c6ad31 NP |
357 | /* |
358 | * Default handler to go into low thread priority and possibly | |
359 | * low power mode by cedeing processor to hypervisor | |
e179816c | 360 | */ |
d8c6ad31 NP |
361 | |
362 | /* Indicate to hypervisor that we are idle. */ | |
363 | get_lppaca()->idle = 1; | |
364 | ||
365 | /* | |
366 | * Yield the processor to the hypervisor. We return if | |
367 | * an external interrupt occurs (which are driven prior | |
368 | * to returning here) or if a prod occurs from another | |
369 | * processor. When returning here, external interrupts | |
370 | * are enabled. | |
371 | */ | |
372 | cede_processor(); | |
373 | ||
374 | get_lppaca()->idle = 0; | |
e179816c DD |
375 | } |
376 | ||
fc8effa4 IM |
377 | /* |
378 | * Enable relocation on during exceptions. This has partition wide scope and | |
379 | * may take a while to complete, if it takes longer than one second we will | |
380 | * just give up rather than wasting any more time on this - if that turns out | |
381 | * to ever be a problem in practice we can move this into a kernel thread to | |
382 | * finish off the process later in boot. | |
383 | */ | |
a413f474 | 384 | long pSeries_enable_reloc_on_exc(void) |
fc8effa4 IM |
385 | { |
386 | long rc; | |
387 | unsigned int delay, total_delay = 0; | |
388 | ||
389 | while (1) { | |
390 | rc = enable_reloc_on_exceptions(); | |
391 | if (!H_IS_LONG_BUSY(rc)) | |
392 | return rc; | |
393 | ||
394 | delay = get_longbusy_msecs(rc); | |
395 | total_delay += delay; | |
396 | if (total_delay > 1000) { | |
397 | pr_warn("Warning: Giving up waiting to enable " | |
398 | "relocation on exceptions (%u msec)!\n", | |
399 | total_delay); | |
400 | return rc; | |
401 | } | |
402 | ||
403 | mdelay(delay); | |
404 | } | |
405 | } | |
a413f474 | 406 | EXPORT_SYMBOL(pSeries_enable_reloc_on_exc); |
fc8effa4 | 407 | |
a413f474 | 408 | long pSeries_disable_reloc_on_exc(void) |
cedddd81 IM |
409 | { |
410 | long rc; | |
411 | ||
412 | while (1) { | |
413 | rc = disable_reloc_on_exceptions(); | |
414 | if (!H_IS_LONG_BUSY(rc)) | |
415 | return rc; | |
416 | mdelay(get_longbusy_msecs(rc)); | |
417 | } | |
418 | } | |
a413f474 | 419 | EXPORT_SYMBOL(pSeries_disable_reloc_on_exc); |
cedddd81 | 420 | |
a413f474 | 421 | #ifdef CONFIG_KEXEC |
cedddd81 IM |
422 | static void pSeries_machine_kexec(struct kimage *image) |
423 | { | |
424 | long rc; | |
425 | ||
3ec8b78f | 426 | if (firmware_has_feature(FW_FEATURE_SET_MODE)) { |
cedddd81 IM |
427 | rc = pSeries_disable_reloc_on_exc(); |
428 | if (rc != H_SUCCESS) | |
429 | pr_warning("Warning: Failed to disable relocation on " | |
430 | "exceptions: %ld\n", rc); | |
431 | } | |
432 | ||
433 | default_machine_kexec(image); | |
434 | } | |
435 | #endif | |
436 | ||
e844b1ee AB |
437 | #ifdef __LITTLE_ENDIAN__ |
438 | long pseries_big_endian_exceptions(void) | |
439 | { | |
440 | long rc; | |
441 | ||
442 | while (1) { | |
443 | rc = enable_big_endian_exceptions(); | |
444 | if (!H_IS_LONG_BUSY(rc)) | |
445 | return rc; | |
446 | mdelay(get_longbusy_msecs(rc)); | |
447 | } | |
448 | } | |
449 | ||
450 | static long pseries_little_endian_exceptions(void) | |
451 | { | |
452 | long rc; | |
453 | ||
454 | while (1) { | |
455 | rc = enable_little_endian_exceptions(); | |
456 | if (!H_IS_LONG_BUSY(rc)) | |
457 | return rc; | |
458 | mdelay(get_longbusy_msecs(rc)); | |
459 | } | |
460 | } | |
461 | #endif | |
462 | ||
0ebfff14 BH |
463 | static void __init pSeries_setup_arch(void) |
464 | { | |
b71d47c1 | 465 | set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT); |
a934904d | 466 | |
0ebfff14 BH |
467 | /* Discover PIC type and setup ppc_md accordingly */ |
468 | pseries_discover_pic(); | |
469 | ||
1da177e4 LT |
470 | /* openpic global configuration register (64-bit format). */ |
471 | /* openpic Interrupt Source Unit pointer (64-bit format). */ | |
472 | /* python0 facility area (mmio) (64-bit format) REAL address. */ | |
473 | ||
474 | /* init to some ~sane value until calibrate_delay() runs */ | |
475 | loops_per_jiffy = 50000000; | |
476 | ||
1da177e4 LT |
477 | fwnmi_init(); |
478 | ||
673c9756 BH |
479 | /* By default, only probe PCI (can be overriden by rtas_pci) */ |
480 | pci_add_flags(PCI_PROBE_ONLY); | |
3c13be01 | 481 | |
1da177e4 LT |
482 | /* Find and initialize PCI host bridges */ |
483 | init_pci_config_tokens(); | |
1da177e4 | 484 | find_and_init_phbs(); |
1cf3d8b3 | 485 | of_reconfig_notifier_register(&pci_dn_reconfig_nb); |
1da177e4 | 486 | |
1da177e4 LT |
487 | pSeries_nvram_init(); |
488 | ||
363edbe2 | 489 | if (firmware_has_feature(FW_FEATURE_LPAR)) { |
8d15a3e5 | 490 | vpa_init(boot_cpuid); |
363edbe2 | 491 | ppc_md.power_save = pseries_lpar_idle; |
180a3362 | 492 | ppc_md.enable_pmcs = pseries_lpar_enable_pmcs; |
363edbe2 VS |
493 | } else { |
494 | /* No special idle routine */ | |
180a3362 | 495 | ppc_md.enable_pmcs = power4_enable_pmcs; |
363edbe2 | 496 | } |
fc8effa4 | 497 | |
d82fb31a KSS |
498 | ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare; |
499 | ||
fc8effa4 IM |
500 | if (firmware_has_feature(FW_FEATURE_SET_MODE)) { |
501 | long rc; | |
502 | if ((rc = pSeries_enable_reloc_on_exc()) != H_SUCCESS) { | |
503 | pr_warn("Unable to enable relocation on exceptions: " | |
504 | "%ld\n", rc); | |
505 | } | |
506 | } | |
1da177e4 LT |
507 | } |
508 | ||
509 | static int __init pSeries_init_panel(void) | |
510 | { | |
511 | /* Manually leave the kernel version on the panel. */ | |
983d8a6d | 512 | #ifdef __BIG_ENDIAN__ |
1da177e4 | 513 | ppc_md.progress("Linux ppc64\n", 0); |
983d8a6d TB |
514 | #else |
515 | ppc_md.progress("Linux ppc64le\n", 0); | |
516 | #endif | |
96b644bd | 517 | ppc_md.progress(init_utsname()->version, 0); |
1da177e4 LT |
518 | |
519 | return 0; | |
520 | } | |
f86d6b9b | 521 | machine_arch_initcall(pseries, pSeries_init_panel); |
1da177e4 | 522 | |
4474ef05 | 523 | static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx) |
cab0af98 | 524 | { |
76032de8 | 525 | return plpar_hcall_norets(H_SET_DABR, dabr); |
cab0af98 ME |
526 | } |
527 | ||
4474ef05 | 528 | static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx) |
76032de8 | 529 | { |
4474ef05 MN |
530 | /* Have to set at least one bit in the DABRX according to PAPR */ |
531 | if (dabrx == 0 && dabr == 0) | |
532 | dabrx = DABRX_USER; | |
533 | /* PAPR says we can only set kernel and user bits */ | |
cd144573 | 534 | dabrx &= DABRX_KERNEL | DABRX_USER; |
4474ef05 MN |
535 | |
536 | return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx); | |
76032de8 | 537 | } |
1da177e4 | 538 | |
bf99de36 MN |
539 | static int pseries_set_dawr(unsigned long dawr, unsigned long dawrx) |
540 | { | |
541 | /* PAPR says we can't set HYP */ | |
542 | dawrx &= ~DAWRX_HYP; | |
543 | ||
544 | return plapr_set_watchpoint0(dawr, dawrx); | |
545 | } | |
546 | ||
e46de429 RJ |
547 | #define CMO_CHARACTERISTICS_TOKEN 44 |
548 | #define CMO_MAXLENGTH 1026 | |
549 | ||
9ee820fa BK |
550 | void pSeries_coalesce_init(void) |
551 | { | |
552 | struct hvcall_mpp_x_data mpp_x_data; | |
553 | ||
554 | if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data)) | |
555 | powerpc_firmware_features |= FW_FEATURE_XCMO; | |
556 | else | |
557 | powerpc_firmware_features &= ~FW_FEATURE_XCMO; | |
558 | } | |
559 | ||
e46de429 RJ |
560 | /** |
561 | * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions, | |
562 | * handle that here. (Stolen from parse_system_parameter_string) | |
563 | */ | |
e51df2c1 | 564 | static void pSeries_cmo_feature_init(void) |
e46de429 RJ |
565 | { |
566 | char *ptr, *key, *value, *end; | |
567 | int call_status; | |
e589a440 | 568 | int page_order = IOMMU_PAGE_SHIFT_4K; |
e46de429 RJ |
569 | |
570 | pr_debug(" -> fw_cmo_feature_init()\n"); | |
571 | spin_lock(&rtas_data_buf_lock); | |
572 | memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE); | |
573 | call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1, | |
574 | NULL, | |
575 | CMO_CHARACTERISTICS_TOKEN, | |
576 | __pa(rtas_data_buf), | |
577 | RTAS_DATA_BUF_SIZE); | |
578 | ||
579 | if (call_status != 0) { | |
580 | spin_unlock(&rtas_data_buf_lock); | |
581 | pr_debug("CMO not available\n"); | |
582 | pr_debug(" <- fw_cmo_feature_init()\n"); | |
583 | return; | |
584 | } | |
585 | ||
586 | end = rtas_data_buf + CMO_MAXLENGTH - 2; | |
587 | ptr = rtas_data_buf + 2; /* step over strlen value */ | |
588 | key = value = ptr; | |
589 | ||
590 | while (*ptr && (ptr <= end)) { | |
591 | /* Separate the key and value by replacing '=' with '\0' and | |
592 | * point the value at the string after the '=' | |
593 | */ | |
594 | if (ptr[0] == '=') { | |
595 | ptr[0] = '\0'; | |
596 | value = ptr + 1; | |
597 | } else if (ptr[0] == '\0' || ptr[0] == ',') { | |
598 | /* Terminate the string containing the key/value pair */ | |
599 | ptr[0] = '\0'; | |
600 | ||
601 | if (key == value) { | |
602 | pr_debug("Malformed key/value pair\n"); | |
603 | /* Never found a '=', end processing */ | |
604 | break; | |
605 | } | |
606 | ||
81f14997 RJ |
607 | if (0 == strcmp(key, "CMOPageSize")) |
608 | page_order = simple_strtol(value, NULL, 10); | |
609 | else if (0 == strcmp(key, "PrPSP")) | |
610 | CMO_PrPSP = simple_strtol(value, NULL, 10); | |
e46de429 | 611 | else if (0 == strcmp(key, "SecPSP")) |
81f14997 | 612 | CMO_SecPSP = simple_strtol(value, NULL, 10); |
e46de429 RJ |
613 | value = key = ptr + 1; |
614 | } | |
615 | ptr++; | |
616 | } | |
617 | ||
81f14997 RJ |
618 | /* Page size is returned as the power of 2 of the page size, |
619 | * convert to the page size in bytes before returning | |
620 | */ | |
621 | CMO_PageSize = 1 << page_order; | |
622 | pr_debug("CMO_PageSize = %lu\n", CMO_PageSize); | |
623 | ||
624 | if (CMO_PrPSP != -1 || CMO_SecPSP != -1) { | |
e46de429 | 625 | pr_info("CMO enabled\n"); |
81f14997 RJ |
626 | pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP, |
627 | CMO_SecPSP); | |
e46de429 | 628 | powerpc_firmware_features |= FW_FEATURE_CMO; |
9ee820fa | 629 | pSeries_coalesce_init(); |
e46de429 | 630 | } else |
81f14997 RJ |
631 | pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP, |
632 | CMO_SecPSP); | |
e46de429 RJ |
633 | spin_unlock(&rtas_data_buf_lock); |
634 | pr_debug(" <- fw_cmo_feature_init()\n"); | |
635 | } | |
636 | ||
1da177e4 LT |
637 | /* |
638 | * Early initialization. Relocation is on but do not reference unbolted pages | |
639 | */ | |
640 | static void __init pSeries_init_early(void) | |
641 | { | |
f7ebf352 | 642 | pr_debug(" -> pSeries_init_early()\n"); |
1da177e4 | 643 | |
4d2bb3f5 | 644 | #ifdef CONFIG_HVC_CONSOLE |
57cfb814 | 645 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
4d2bb3f5 BH |
646 | hvc_vio_init_early(); |
647 | #endif | |
06c88766 | 648 | if (firmware_has_feature(FW_FEATURE_XDABR)) |
76032de8 | 649 | ppc_md.set_dabr = pseries_set_xdabr; |
06c88766 MN |
650 | else if (firmware_has_feature(FW_FEATURE_DABR)) |
651 | ppc_md.set_dabr = pseries_set_dabr; | |
1da177e4 | 652 | |
bf99de36 MN |
653 | if (firmware_has_feature(FW_FEATURE_SET_MODE)) |
654 | ppc_md.set_dawr = pseries_set_dawr; | |
655 | ||
e46de429 | 656 | pSeries_cmo_feature_init(); |
1da177e4 LT |
657 | iommu_init_early_pSeries(); |
658 | ||
f7ebf352 | 659 | pr_debug(" <- pSeries_init_early()\n"); |
1da177e4 LT |
660 | } |
661 | ||
1da177e4 LT |
662 | /* |
663 | * Called very early, MMU is off, device-tree isn't unflattened | |
664 | */ | |
1da177e4 | 665 | |
f0ff7eb4 NF |
666 | static int __init pseries_probe_fw_features(unsigned long node, |
667 | const char *uname, int depth, | |
668 | void *data) | |
1da177e4 | 669 | { |
f0ff7eb4 | 670 | const char *prop; |
9d0c4dfe | 671 | int len; |
f0ff7eb4 NF |
672 | static int hypertas_found; |
673 | static int vec5_found; | |
ca8ffc97 | 674 | |
f0ff7eb4 | 675 | if (depth != 1) |
ca8ffc97 MN |
676 | return 0; |
677 | ||
f0ff7eb4 NF |
678 | if (!strcmp(uname, "rtas") || !strcmp(uname, "rtas@0")) { |
679 | prop = of_get_flat_dt_prop(node, "ibm,hypertas-functions", | |
680 | &len); | |
681 | if (prop) { | |
682 | powerpc_firmware_features |= FW_FEATURE_LPAR; | |
683 | fw_hypertas_feature_init(prop, len); | |
684 | } | |
685 | ||
686 | hypertas_found = 1; | |
687 | } | |
e8222502 | 688 | |
f0ff7eb4 NF |
689 | if (!strcmp(uname, "chosen")) { |
690 | prop = of_get_flat_dt_prop(node, "ibm,architecture-vec-5", | |
691 | &len); | |
692 | if (prop) | |
693 | fw_vec5_feature_init(prop, len); | |
694 | ||
695 | vec5_found = 1; | |
696 | } | |
e8222502 | 697 | |
f0ff7eb4 | 698 | return hypertas_found && vec5_found; |
e8222502 BH |
699 | } |
700 | ||
701 | static int __init pSeries_probe(void) | |
702 | { | |
133dda1e | 703 | unsigned long root = of_get_flat_dt_root(); |
9d0c4dfe | 704 | const char *dtype = of_get_flat_dt_prop(root, "device_type", NULL); |
5773bbcd | 705 | |
e8222502 BH |
706 | if (dtype == NULL) |
707 | return 0; | |
708 | if (strcmp(dtype, "chrp")) | |
1da177e4 LT |
709 | return 0; |
710 | ||
133dda1e AB |
711 | /* Cell blades firmware claims to be chrp while it's not. Until this |
712 | * is fixed, we need to avoid those here. | |
713 | */ | |
714 | if (of_flat_dt_is_compatible(root, "IBM,CPBW-1.0") || | |
715 | of_flat_dt_is_compatible(root, "IBM,CBEA")) | |
716 | return 0; | |
717 | ||
f7ebf352 | 718 | pr_debug("pSeries detected, looking for LPAR capability...\n"); |
1da177e4 | 719 | |
e8222502 | 720 | /* Now try to figure out if we are running on LPAR */ |
f0ff7eb4 | 721 | of_scan_flat_dt(pseries_probe_fw_features, NULL); |
e8222502 | 722 | |
e844b1ee AB |
723 | #ifdef __LITTLE_ENDIAN__ |
724 | if (firmware_has_feature(FW_FEATURE_SET_MODE)) { | |
725 | long rc; | |
726 | /* | |
727 | * Tell the hypervisor that we want our exceptions to | |
728 | * be taken in little endian mode. If this fails we don't | |
729 | * want to use BUG() because it will trigger an exception. | |
730 | */ | |
731 | rc = pseries_little_endian_exceptions(); | |
732 | if (rc) { | |
733 | ppc_md.progress("H_SET_MODE LE exception fail", 0); | |
734 | panic("Could not enable little endian exceptions"); | |
735 | } | |
736 | } | |
737 | #endif | |
738 | ||
a2235354 AB |
739 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
740 | hpte_init_lpar(); | |
741 | else | |
742 | hpte_init_native(); | |
743 | ||
f7ebf352 ME |
744 | pr_debug("Machine is%s LPAR !\n", |
745 | (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not"); | |
57cfb814 | 746 | |
1da177e4 LT |
747 | return 1; |
748 | } | |
749 | ||
4267292b PM |
750 | static int pSeries_pci_probe_mode(struct pci_bus *bus) |
751 | { | |
57cfb814 | 752 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
4267292b PM |
753 | return PCI_PROBE_DEVTREE; |
754 | return PCI_PROBE_NORMAL; | |
755 | } | |
756 | ||
5d30bf30 MA |
757 | /** |
758 | * pSeries_power_off - tell firmware about how to power off the system. | |
759 | * | |
760 | * This function calls either the power-off rtas token in normal cases | |
761 | * or the ibm,power-off-ups token (if present & requested) in case of | |
762 | * a power failure. If power-off token is used, power on will only be | |
763 | * possible with power button press. If ibm,power-off-ups token is used | |
764 | * it will allow auto poweron after power is restored. | |
765 | */ | |
541b2755 | 766 | static void pSeries_power_off(void) |
5d30bf30 MA |
767 | { |
768 | int rc; | |
769 | int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups"); | |
770 | ||
771 | if (rtas_flash_term_hook) | |
772 | rtas_flash_term_hook(SYS_POWER_OFF); | |
773 | ||
774 | if (rtas_poweron_auto == 0 || | |
775 | rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) { | |
776 | rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1); | |
777 | printk(KERN_INFO "RTAS power-off returned %d\n", rc); | |
778 | } else { | |
779 | rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL); | |
780 | printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc); | |
781 | } | |
782 | for (;;); | |
783 | } | |
784 | ||
bed59275 SR |
785 | #ifndef CONFIG_PCI |
786 | void pSeries_final_fixup(void) { } | |
787 | #endif | |
788 | ||
e8222502 BH |
789 | define_machine(pseries) { |
790 | .name = "pSeries", | |
1da177e4 LT |
791 | .probe = pSeries_probe, |
792 | .setup_arch = pSeries_setup_arch, | |
793 | .init_early = pSeries_init_early, | |
0dd194d0 | 794 | .show_cpuinfo = pSeries_show_cpuinfo, |
1da177e4 LT |
795 | .log_error = pSeries_log_error, |
796 | .pcibios_fixup = pSeries_final_fixup, | |
4267292b | 797 | .pci_probe_mode = pSeries_pci_probe_mode, |
f4fcbbe9 | 798 | .restart = rtas_restart, |
5d30bf30 | 799 | .power_off = pSeries_power_off, |
f4fcbbe9 | 800 | .halt = rtas_halt, |
8f515061 | 801 | .panic = rtas_os_term, |
773bf9c4 AB |
802 | .get_boot_time = rtas_get_boot_time, |
803 | .get_rtc_time = rtas_get_rtc_time, | |
804 | .set_rtc_time = rtas_set_rtc_time, | |
10f7e7c1 | 805 | .calibrate_decr = generic_calibrate_decr, |
6566c6f1 | 806 | .progress = rtas_progress, |
1da177e4 LT |
807 | .system_reset_exception = pSeries_system_reset_exception, |
808 | .machine_check_exception = pSeries_machine_check_exception, | |
cedddd81 IM |
809 | #ifdef CONFIG_KEXEC |
810 | .machine_kexec = pSeries_machine_kexec, | |
811 | #endif | |
a5d86257 AB |
812 | #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE |
813 | .memory_block_size = pseries_memory_block_size, | |
814 | #endif | |
1da177e4 | 815 | }; |