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1 /* linux/arch/arm/mach-s3c2410/s3c2440.c
2 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Samsung S3C2440 Mobile CPU support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Modifications:
13 * 24-Aug-2004 BJD Start of s3c2440 support
14 * 12-Oct-2004 BJD Moved clock info out to clock.c
15 * 01-Nov-2004 BJD Fixed clock build code
16 * 09-Nov-2004 BJD Added sysdev for power management
17 * 04-Nov-2004 BJD New serial registration
18 * 15-Nov-2004 BJD Rename the i2c device for the s3c2440
19 * 14-Jan-2005 BJD Moved clock init code into seperate function
20 * 14-Jan-2005 BJD Removed un-used clock bits
21 */
22
23 #include <linux/kernel.h>
24 #include <linux/types.h>
25 #include <linux/interrupt.h>
26 #include <linux/list.h>
27 #include <linux/timer.h>
28 #include <linux/init.h>
29 #include <linux/device.h>
30 #include <linux/sysdev.h>
31
32 #include <asm/mach/arch.h>
33 #include <asm/mach/map.h>
34 #include <asm/mach/irq.h>
35
36 #include <asm/hardware.h>
37 #include <asm/io.h>
38 #include <asm/irq.h>
39 #include <asm/hardware/clock.h>
40
41 #include <asm/arch/regs-clock.h>
42 #include <asm/arch/regs-serial.h>
43 #include <asm/arch/regs-gpio.h>
44 #include <asm/arch/regs-gpioj.h>
45 #include <asm/arch/regs-dsc.h>
46
47 #include "s3c2440.h"
48 #include "clock.h"
49 #include "devs.h"
50 #include "cpu.h"
51 #include "pm.h"
52
53
54 static struct map_desc s3c2440_iodesc[] __initdata = {
55 IODESC_ENT(USBHOST),
56 IODESC_ENT(CLKPWR),
57 IODESC_ENT(LCD),
58 IODESC_ENT(TIMER),
59 IODESC_ENT(ADC),
60 IODESC_ENT(WATCHDOG),
61 };
62
63 static struct resource s3c_uart0_resource[] = {
64 [0] = {
65 .start = S3C2410_PA_UART0,
66 .end = S3C2410_PA_UART0 + 0x3fff,
67 .flags = IORESOURCE_MEM,
68 },
69 [1] = {
70 .start = IRQ_S3CUART_RX0,
71 .end = IRQ_S3CUART_ERR0,
72 .flags = IORESOURCE_IRQ,
73 }
74
75 };
76
77 static struct resource s3c_uart1_resource[] = {
78 [0] = {
79 .start = S3C2410_PA_UART1,
80 .end = S3C2410_PA_UART1 + 0x3fff,
81 .flags = IORESOURCE_MEM,
82 },
83 [1] = {
84 .start = IRQ_S3CUART_RX1,
85 .end = IRQ_S3CUART_ERR1,
86 .flags = IORESOURCE_IRQ,
87 }
88 };
89
90 static struct resource s3c_uart2_resource[] = {
91 [0] = {
92 .start = S3C2410_PA_UART2,
93 .end = S3C2410_PA_UART2 + 0x3fff,
94 .flags = IORESOURCE_MEM,
95 },
96 [1] = {
97 .start = IRQ_S3CUART_RX2,
98 .end = IRQ_S3CUART_ERR2,
99 .flags = IORESOURCE_IRQ,
100 }
101 };
102
103 /* our uart devices */
104
105 static struct platform_device s3c_uart0 = {
106 .name = "s3c2440-uart",
107 .id = 0,
108 .num_resources = ARRAY_SIZE(s3c_uart0_resource),
109 .resource = s3c_uart0_resource,
110 };
111
112 static struct platform_device s3c_uart1 = {
113 .name = "s3c2440-uart",
114 .id = 1,
115 .num_resources = ARRAY_SIZE(s3c_uart1_resource),
116 .resource = s3c_uart1_resource,
117 };
118
119 static struct platform_device s3c_uart2 = {
120 .name = "s3c2440-uart",
121 .id = 2,
122 .num_resources = ARRAY_SIZE(s3c_uart2_resource),
123 .resource = s3c_uart2_resource,
124 };
125
126 static struct platform_device *uart_devices[] __initdata = {
127 &s3c_uart0,
128 &s3c_uart1,
129 &s3c_uart2
130 };
131
132 /* uart initialisation */
133
134 static int __initdata s3c2440_uart_count;
135
136 void __init s3c2440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
137 {
138 struct platform_device *platdev;
139 int uart;
140
141 for (uart = 0; uart < no; uart++, cfg++) {
142 platdev = uart_devices[cfg->hwport];
143
144 s3c24xx_uart_devs[uart] = platdev;
145 platdev->dev.platform_data = cfg;
146 }
147
148 s3c2440_uart_count = uart;
149 }
150
151
152 #ifdef CONFIG_PM
153
154 struct sleep_save s3c2440_sleep[] = {
155 SAVE_ITEM(S3C2440_DSC0),
156 SAVE_ITEM(S3C2440_DSC1),
157 SAVE_ITEM(S3C2440_GPJDAT),
158 SAVE_ITEM(S3C2440_GPJCON),
159 SAVE_ITEM(S3C2440_GPJUP)
160 };
161
162 static int s3c2440_suspend(struct sys_device *dev, pm_message_t state)
163 {
164 s3c2410_pm_do_save(s3c2440_sleep, ARRAY_SIZE(s3c2440_sleep));
165 return 0;
166 }
167
168 static int s3c2440_resume(struct sys_device *dev)
169 {
170 s3c2410_pm_do_restore(s3c2440_sleep, ARRAY_SIZE(s3c2440_sleep));
171 return 0;
172 }
173
174 #else
175 #define s3c2440_suspend NULL
176 #define s3c2440_resume NULL
177 #endif
178
179 struct sysdev_class s3c2440_sysclass = {
180 set_kset_name("s3c2440-core"),
181 .suspend = s3c2440_suspend,
182 .resume = s3c2440_resume
183 };
184
185 static struct sys_device s3c2440_sysdev = {
186 .cls = &s3c2440_sysclass,
187 };
188
189 void __init s3c2440_map_io(struct map_desc *mach_desc, int size)
190 {
191 /* register our io-tables */
192
193 iotable_init(s3c2440_iodesc, ARRAY_SIZE(s3c2440_iodesc));
194 iotable_init(mach_desc, size);
195 /* rename any peripherals used differing from the s3c2410 */
196
197 s3c_device_i2c.name = "s3c2440-i2c";
198
199 /* change irq for watchdog */
200
201 s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT;
202 s3c_device_wdt.resource[1].end = IRQ_S3C2440_WDT;
203 }
204
205 void __init s3c2440_init_clocks(int xtal)
206 {
207 unsigned long clkdiv;
208 unsigned long camdiv;
209 unsigned long hclk, fclk, pclk;
210 int hdiv = 1;
211
212 /* now we've got our machine bits initialised, work out what
213 * clocks we've got */
214
215 fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2;
216
217 clkdiv = __raw_readl(S3C2410_CLKDIVN);
218 camdiv = __raw_readl(S3C2440_CAMDIVN);
219
220 /* work out clock scalings */
221
222 switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
223 case S3C2440_CLKDIVN_HDIVN_1:
224 hdiv = 1;
225 break;
226
227 case S3C2440_CLKDIVN_HDIVN_2:
228 hdiv = 1;
229 break;
230
231 case S3C2440_CLKDIVN_HDIVN_4_8:
232 hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
233 break;
234
235 case S3C2440_CLKDIVN_HDIVN_3_6:
236 hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
237 break;
238 }
239
240 hclk = fclk / hdiv;
241 pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1);
242
243 /* print brief summary of clocks, etc */
244
245 printk("S3C2440: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
246 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
247
248 /* initialise the clocks here, to allow other things like the
249 * console to use them, and to add new ones after the initialisation
250 */
251
252 s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
253 }
254
255 /* need to register class before we actually register the device, and
256 * we also need to ensure that it has been initialised before any of the
257 * drivers even try to use it (even if not on an s3c2440 based system)
258 * as a driver which may support both 2410 and 2440 may try and use it.
259 */
260
261 int __init s3c2440_core_init(void)
262 {
263 return sysdev_class_register(&s3c2440_sysclass);
264 }
265
266 core_initcall(s3c2440_core_init);
267
268 int __init s3c2440_init(void)
269 {
270 int ret;
271
272 printk("S3C2440: Initialising architecture\n");
273
274 ret = sysdev_register(&s3c2440_sysdev);
275 if (ret != 0)
276 printk(KERN_ERR "failed to register sysdev for s3c2440\n");
277 else
278 ret = platform_add_devices(s3c24xx_uart_devs, s3c2440_uart_count);
279
280 return ret;
281 }