arch/ia64/sn/kernel/iomv.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 2000-2003 Silicon Graphics, Inc. All rights reserved.
   7  */
   8
   9 #include <linux/module.h>
  10 #include <asm/io.h>
  11 #include <asm/delay.h>
  12 #include <asm/sn/nodepda.h>
  13 #include <asm/sn/simulator.h>
  14 #include <asm/sn/pda.h>
  15 #include <asm/sn/sn_cpuid.h>
  16 #include <asm/sn/shub_mmr.h>
  17
  18 /**
  19  * sn_io_addr - convert an in/out port to an i/o address
  20  * @port: port to convert
  21  *
  22  * Legacy in/out instructions are converted to ld/st instructions
  23  * on IA64.  This routine will convert a port number into a valid
  24  * SN i/o address.  Used by sn_in*() and sn_out*().
  25  */
  26 void *sn_io_addr(unsigned long port)
  27 {
  28         if (!IS_RUNNING_ON_SIMULATOR()) {
  29                 /* On sn2, legacy I/O ports don't point at anything */
  30                 if (port < (64 * 1024))
  31                         return NULL;
  32                 return ((void *)(port | __IA64_UNCACHED_OFFSET));
  33         } else {
  34                 /* but the simulator uses them... */
  35                 unsigned long addr;
  36
  37                 /*
  38                  * word align port, but need more than 10 bits
  39                  * for accessing registers in bedrock local block
  40                  * (so we don't do port&0xfff)
  41                  */
  42                 addr = (is_shub2() ? 0xc00000028c000000UL : 0xc0000087cc000000UL) | ((port >> 2) << 12);
  43                 if ((port >= 0x1f0 && port <= 0x1f7) || port == 0x3f6 || port == 0x3f7)
  44                         addr |= port;
  45                 return (void *)addr;
  46         }
  47 }
  48
  49 EXPORT_SYMBOL(sn_io_addr);
  50
  51 /**
  52  * __sn_mmiowb - I/O space memory barrier
  53  *
  54  * See include/asm-ia64/io.h and Documentation/DocBook/deviceiobook.tmpl
  55  * for details.
  56  *
  57  * On SN2, we wait for the PIO_WRITE_STATUS SHub register to clear.
  58  * See PV 871084 for details about the WAR about zero value.
  59  *
  60  */
  61 void __sn_mmiowb(void)
  62 {
  63         volatile unsigned long *adr = pda->pio_write_status_addr;
  64         unsigned long val = pda->pio_write_status_val;
  65
  66         while ((*adr & SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK) != val)
  67                 cpu_relax();
  68 }
  69
  70 EXPORT_SYMBOL(__sn_mmiowb);