arch/powerpc/platforms/powernv/setup.c

   1 /*
   2  * PowerNV setup code.
   3  *
   4  * Copyright 2011 IBM Corp.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the License, or (at your option) any later version.
  10  */
  11
  12 #undef DEBUG
  13
  14 #include <linux/cpu.h>
  15 #include <linux/errno.h>
  16 #include <linux/sched.h>
  17 #include <linux/kernel.h>
  18 #include <linux/tty.h>
  19 #include <linux/reboot.h>
  20 #include <linux/init.h>
  21 #include <linux/console.h>
  22 #include <linux/delay.h>
  23 #include <linux/irq.h>
  24 #include <linux/seq_file.h>
  25 #include <linux/of.h>
  26 #include <linux/of_fdt.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/bug.h>
  29 #include <linux/pci.h>
  30 #include <linux/cpufreq.h>
  31
  32 #include <asm/machdep.h>
  33 #include <asm/firmware.h>
  34 #include <asm/xics.h>
  35 #include <asm/xive.h>
  36 #include <asm/opal.h>
  37 #include <asm/kexec.h>
  38 #include <asm/smp.h>
  39 #include <asm/setup.h>
  40
  41 #include "powernv.h"
  42
  43 static void pnv_setup_rfi_flush(void)
  44 {
  45         struct device_node *np, *fw_features;
  46         enum l1d_flush_type type;
  47         int enable;
  48
  49         /* Default to fallback in case fw-features are not available */
  50         type = L1D_FLUSH_FALLBACK;
  51         enable = 1;
  52
  53         np = of_find_node_by_name(NULL, "ibm,opal");
  54         fw_features = of_get_child_by_name(np, "fw-features");
  55         of_node_put(np);
  56
  57         if (fw_features) {
  58                 np = of_get_child_by_name(fw_features, "inst-l1d-flush-trig2");
  59                 if (np && of_property_read_bool(np, "enabled"))
  60                         type = L1D_FLUSH_MTTRIG;
  61
  62                 of_node_put(np);
  63
  64                 np = of_get_child_by_name(fw_features, "inst-l1d-flush-ori30,30,0");
  65                 if (np && of_property_read_bool(np, "enabled"))
  66                         type = L1D_FLUSH_ORI;
  67
  68                 of_node_put(np);
  69
  70                 /* Enable unless firmware says NOT to */
  71                 enable = 2;
  72                 np = of_get_child_by_name(fw_features, "needs-l1d-flush-msr-hv-1-to-0");
  73                 if (np && of_property_read_bool(np, "disabled"))
  74                         enable--;
  75
  76                 of_node_put(np);
  77
  78                 np = of_get_child_by_name(fw_features, "needs-l1d-flush-msr-pr-0-to-1");
  79                 if (np && of_property_read_bool(np, "disabled"))
  80                         enable--;
  81
  82                 np = of_get_child_by_name(fw_features, "speculation-policy-favor-security");
  83                 if (np && of_property_read_bool(np, "disabled"))
  84                         enable = 0;
  85
  86                 of_node_put(np);
  87                 of_node_put(fw_features);
  88         }
  89
  90         setup_rfi_flush(type, enable > 0);
  91 }
  92
  93 static void __init pnv_setup_arch(void)
  94 {
  95         set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
  96
  97         pnv_setup_rfi_flush();
  98
  99         /* Initialize SMP */
 100         pnv_smp_init();
 101
 102         /* Setup PCI */
 103         pnv_pci_init();
 104
 105         /* Setup RTC and NVRAM callbacks */
 106         if (firmware_has_feature(FW_FEATURE_OPAL))
 107                 opal_nvram_init();
 108
 109         /* Enable NAP mode */
 110         powersave_nap = 1;
 111
 112         /* XXX PMCS */
 113 }
 114
 115 static void __init pnv_init(void)
 116 {
 117         /*
 118          * Initialize the LPC bus now so that legacy serial
 119          * ports can be found on it
 120          */
 121         opal_lpc_init();
 122
 123 #ifdef CONFIG_HVC_OPAL
 124         if (firmware_has_feature(FW_FEATURE_OPAL))
 125                 hvc_opal_init_early();
 126         else
 127 #endif
 128                 add_preferred_console("hvc", 0, NULL);
 129 }
 130
 131 static void __init pnv_init_IRQ(void)
 132 {
 133         /* Try using a XIVE if available, otherwise use a XICS */
 134         if (!xive_native_init())
 135                 xics_init();
 136
 137         WARN_ON(!ppc_md.get_irq);
 138 }
 139
 140 static void pnv_show_cpuinfo(struct seq_file *m)
 141 {
 142         struct device_node *root;
 143         const char *model = "";
 144
 145         root = of_find_node_by_path("/");
 146         if (root)
 147                 model = of_get_property(root, "model", NULL);
 148         seq_printf(m, "machine\t\t: PowerNV %s\n", model);
 149         if (firmware_has_feature(FW_FEATURE_OPAL))
 150                 seq_printf(m, "firmware\t: OPAL\n");
 151         else
 152                 seq_printf(m, "firmware\t: BML\n");
 153         of_node_put(root);
 154         if (radix_enabled())
 155                 seq_printf(m, "MMU\t\t: Radix\n");
 156         else
 157                 seq_printf(m, "MMU\t\t: Hash\n");
 158 }
 159
 160 static void pnv_prepare_going_down(void)
 161 {
 162         /*
 163          * Disable all notifiers from OPAL, we can't
 164          * service interrupts anymore anyway
 165          */
 166         opal_event_shutdown();
 167
 168         /* Soft disable interrupts */
 169         local_irq_disable();
 170
 171         /*
 172          * Return secondary CPUs to firwmare if a flash update
 173          * is pending otherwise we will get all sort of error
 174          * messages about CPU being stuck etc.. This will also
 175          * have the side effect of hard disabling interrupts so
 176          * past this point, the kernel is effectively dead.
 177          */
 178         opal_flash_term_callback();
 179 }
 180
 181 static void  __noreturn pnv_restart(char *cmd)
 182 {
 183         long rc = OPAL_BUSY;
 184
 185         pnv_prepare_going_down();
 186
 187         while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 188                 rc = opal_cec_reboot();
 189                 if (rc == OPAL_BUSY_EVENT)
 190                         opal_poll_events(NULL);
 191                 else
 192                         mdelay(10);
 193         }
 194         for (;;)
 195                 opal_poll_events(NULL);
 196 }
 197
 198 static void __noreturn pnv_power_off(void)
 199 {
 200         long rc = OPAL_BUSY;
 201
 202         pnv_prepare_going_down();
 203
 204         while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 205                 rc = opal_cec_power_down(0);
 206                 if (rc == OPAL_BUSY_EVENT)
 207                         opal_poll_events(NULL);
 208                 else
 209                         mdelay(10);
 210         }
 211         for (;;)
 212                 opal_poll_events(NULL);
 213 }
 214
 215 static void __noreturn pnv_halt(void)
 216 {
 217         pnv_power_off();
 218 }
 219
 220 static void pnv_progress(char *s, unsigned short hex)
 221 {
 222 }
 223
 224 static void pnv_shutdown(void)
 225 {
 226         /* Let the PCI code clear up IODA tables */
 227         pnv_pci_shutdown();
 228
 229         /*
 230          * Stop OPAL activity: Unregister all OPAL interrupts so they
 231          * don't fire up while we kexec and make sure all potentially
 232          * DMA'ing ops are complete (such as dump retrieval).
 233          */
 234         opal_shutdown();
 235 }
 236
 237 #ifdef CONFIG_KEXEC_CORE
 238 static void pnv_kexec_wait_secondaries_down(void)
 239 {
 240         int my_cpu, i, notified = -1;
 241
 242         my_cpu = get_cpu();
 243
 244         for_each_online_cpu(i) {
 245                 uint8_t status;
 246                 int64_t rc, timeout = 1000;
 247
 248                 if (i == my_cpu)
 249                         continue;
 250
 251                 for (;;) {
 252                         rc = opal_query_cpu_status(get_hard_smp_processor_id(i),
 253                                                    &status);
 254                         if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED)
 255                                 break;
 256                         barrier();
 257                         if (i != notified) {
 258                                 printk(KERN_INFO "kexec: waiting for cpu %d "
 259                                        "(physical %d) to enter OPAL\n",
 260                                        i, paca[i].hw_cpu_id);
 261                                 notified = i;
 262                         }
 263
 264                         /*
 265                          * On crash secondaries might be unreachable or hung,
 266                          * so timeout if we've waited too long
 267                          * */
 268                         mdelay(1);
 269                         if (timeout-- == 0) {
 270                                 printk(KERN_ERR "kexec: timed out waiting for "
 271                                        "cpu %d (physical %d) to enter OPAL\n",
 272                                        i, paca[i].hw_cpu_id);
 273                                 break;
 274                         }
 275                 }
 276         }
 277 }
 278
 279 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
 280 {
 281         u64 reinit_flags;
 282
 283         if (xive_enabled())
 284                 xive_kexec_teardown_cpu(secondary);
 285         else
 286                 xics_kexec_teardown_cpu(secondary);
 287
 288         /* On OPAL, we return all CPUs to firmware */
 289         if (!firmware_has_feature(FW_FEATURE_OPAL))
 290                 return;
 291
 292         if (secondary) {
 293                 /* Return secondary CPUs to firmware on OPAL v3 */
 294                 mb();
 295                 get_paca()->kexec_state = KEXEC_STATE_REAL_MODE;
 296                 mb();
 297
 298                 /* Return the CPU to OPAL */
 299                 opal_return_cpu();
 300         } else {
 301                 /* Primary waits for the secondaries to have reached OPAL */
 302                 pnv_kexec_wait_secondaries_down();
 303
 304                 /* Switch XIVE back to emulation mode */
 305                 if (xive_enabled())
 306                         xive_shutdown();
 307
 308                 /*
 309                  * We might be running as little-endian - now that interrupts
 310                  * are disabled, reset the HILE bit to big-endian so we don't
 311                  * take interrupts in the wrong endian later
 312                  *
 313                  * We reinit to enable both radix and hash on P9 to ensure
 314                  * the mode used by the next kernel is always supported.
 315                  */
 316                 reinit_flags = OPAL_REINIT_CPUS_HILE_BE;
 317                 if (cpu_has_feature(CPU_FTR_ARCH_300))
 318                         reinit_flags |= OPAL_REINIT_CPUS_MMU_RADIX |
 319                                 OPAL_REINIT_CPUS_MMU_HASH;
 320                 opal_reinit_cpus(reinit_flags);
 321         }
 322 }
 323 #endif /* CONFIG_KEXEC_CORE */
 324
 325 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 326 static unsigned long pnv_memory_block_size(void)
 327 {
 328         /*
 329          * We map the kernel linear region with 1GB large pages on radix. For
 330          * memory hot unplug to work our memory block size must be at least
 331          * this size.
 332          */
 333         if (radix_enabled())
 334                 return 1UL * 1024 * 1024 * 1024;
 335         else
 336                 return 256UL * 1024 * 1024;
 337 }
 338 #endif
 339
 340 static void __init pnv_setup_machdep_opal(void)
 341 {
 342         ppc_md.get_boot_time = opal_get_boot_time;
 343         ppc_md.restart = pnv_restart;
 344         pm_power_off = pnv_power_off;
 345         ppc_md.halt = pnv_halt;
 346         ppc_md.machine_check_exception = opal_machine_check;
 347         ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery;
 348         ppc_md.hmi_exception_early = opal_hmi_exception_early;
 349         ppc_md.handle_hmi_exception = opal_handle_hmi_exception;
 350 }
 351
 352 static int __init pnv_probe(void)
 353 {
 354         if (!of_machine_is_compatible("ibm,powernv"))
 355                 return 0;
 356
 357         if (firmware_has_feature(FW_FEATURE_OPAL))
 358                 pnv_setup_machdep_opal();
 359
 360         pr_debug("PowerNV detected !\n");
 361
 362         pnv_init();
 363
 364         return 1;
 365 }
 366
 367 /*
 368  * Returns the cpu frequency for 'cpu' in Hz. This is used by
 369  * /proc/cpuinfo
 370  */
 371 static unsigned long pnv_get_proc_freq(unsigned int cpu)
 372 {
 373         unsigned long ret_freq;
 374
 375         ret_freq = cpufreq_quick_get(cpu) * 1000ul;
 376
 377         /*
 378          * If the backend cpufreq driver does not exist,
 379          * then fallback to old way of reporting the clockrate.
 380          */
 381         if (!ret_freq)
 382                 ret_freq = ppc_proc_freq;
 383         return ret_freq;
 384 }
 385
 386 define_machine(powernv) {
 387         .name                   = "PowerNV",
 388         .probe                  = pnv_probe,
 389         .setup_arch             = pnv_setup_arch,
 390         .init_IRQ               = pnv_init_IRQ,
 391         .show_cpuinfo           = pnv_show_cpuinfo,
 392         .get_proc_freq          = pnv_get_proc_freq,
 393         .progress               = pnv_progress,
 394         .machine_shutdown       = pnv_shutdown,
 395         .power_save             = NULL,
 396         .calibrate_decr         = generic_calibrate_decr,
 397 #ifdef CONFIG_KEXEC_CORE
 398         .kexec_cpu_down         = pnv_kexec_cpu_down,
 399 #endif
 400 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 401         .memory_block_size      = pnv_memory_block_size,
 402 #endif
 403 };