2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
33 #include <linux/clocksource.h>
34 #include <linux/interrupt.h>
35 #include <linux/kvm.h>
37 #include <linux/vmalloc.h>
38 #include <linux/export.h>
39 #include <linux/moduleparam.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <linux/sched/stat.h>
58 #include <trace/events/kvm.h>
60 #include <asm/debugreg.h>
64 #include <linux/kernel_stat.h>
65 #include <asm/fpu/internal.h> /* Ugh! */
66 #include <asm/pvclock.h>
67 #include <asm/div64.h>
68 #include <asm/irq_remapping.h>
70 #define CREATE_TRACE_POINTS
73 #define MAX_IO_MSRS 256
74 #define KVM_MAX_MCE_BANKS 32
75 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
76 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
78 #define emul_to_vcpu(ctxt) \
79 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
82 * - enable syscall per default because its emulated by KVM
83 * - enable LME and LMA per default on 64 bit KVM
87 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
89 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
92 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
93 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
95 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
96 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
98 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
99 static void process_nmi(struct kvm_vcpu
*vcpu
);
100 static void enter_smm(struct kvm_vcpu
*vcpu
);
101 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
103 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
104 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
106 static bool __read_mostly ignore_msrs
= 0;
107 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
109 unsigned int min_timer_period_us
= 500;
110 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
112 static bool __read_mostly kvmclock_periodic_sync
= true;
113 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
115 bool __read_mostly kvm_has_tsc_control
;
116 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
117 u32 __read_mostly kvm_max_guest_tsc_khz
;
118 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
119 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
120 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
121 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
122 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
123 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
124 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
126 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
127 static u32 __read_mostly tsc_tolerance_ppm
= 250;
128 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
130 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
131 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
132 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
134 static bool __read_mostly vector_hashing
= true;
135 module_param(vector_hashing
, bool, S_IRUGO
);
137 #define KVM_NR_SHARED_MSRS 16
139 struct kvm_shared_msrs_global
{
141 u32 msrs
[KVM_NR_SHARED_MSRS
];
144 struct kvm_shared_msrs
{
145 struct user_return_notifier urn
;
147 struct kvm_shared_msr_values
{
150 } values
[KVM_NR_SHARED_MSRS
];
153 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
154 static struct kvm_shared_msrs __percpu
*shared_msrs
;
156 struct kvm_stats_debugfs_item debugfs_entries
[] = {
157 { "pf_fixed", VCPU_STAT(pf_fixed
) },
158 { "pf_guest", VCPU_STAT(pf_guest
) },
159 { "tlb_flush", VCPU_STAT(tlb_flush
) },
160 { "invlpg", VCPU_STAT(invlpg
) },
161 { "exits", VCPU_STAT(exits
) },
162 { "io_exits", VCPU_STAT(io_exits
) },
163 { "mmio_exits", VCPU_STAT(mmio_exits
) },
164 { "signal_exits", VCPU_STAT(signal_exits
) },
165 { "irq_window", VCPU_STAT(irq_window_exits
) },
166 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
167 { "halt_exits", VCPU_STAT(halt_exits
) },
168 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
169 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
170 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid
) },
171 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
172 { "hypercalls", VCPU_STAT(hypercalls
) },
173 { "request_irq", VCPU_STAT(request_irq_exits
) },
174 { "irq_exits", VCPU_STAT(irq_exits
) },
175 { "host_state_reload", VCPU_STAT(host_state_reload
) },
176 { "efer_reload", VCPU_STAT(efer_reload
) },
177 { "fpu_reload", VCPU_STAT(fpu_reload
) },
178 { "insn_emulation", VCPU_STAT(insn_emulation
) },
179 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
180 { "irq_injections", VCPU_STAT(irq_injections
) },
181 { "nmi_injections", VCPU_STAT(nmi_injections
) },
182 { "req_event", VCPU_STAT(req_event
) },
183 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
184 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
185 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
186 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
187 { "mmu_flooded", VM_STAT(mmu_flooded
) },
188 { "mmu_recycled", VM_STAT(mmu_recycled
) },
189 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
190 { "mmu_unsync", VM_STAT(mmu_unsync
) },
191 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
192 { "largepages", VM_STAT(lpages
) },
193 { "max_mmu_page_hash_collisions",
194 VM_STAT(max_mmu_page_hash_collisions
) },
198 u64 __read_mostly host_xcr0
;
200 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
202 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
205 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
206 vcpu
->arch
.apf
.gfns
[i
] = ~0;
209 static void kvm_on_user_return(struct user_return_notifier
*urn
)
212 struct kvm_shared_msrs
*locals
213 = container_of(urn
, struct kvm_shared_msrs
, urn
);
214 struct kvm_shared_msr_values
*values
;
218 * Disabling irqs at this point since the following code could be
219 * interrupted and executed through kvm_arch_hardware_disable()
221 local_irq_save(flags
);
222 if (locals
->registered
) {
223 locals
->registered
= false;
224 user_return_notifier_unregister(urn
);
226 local_irq_restore(flags
);
227 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
228 values
= &locals
->values
[slot
];
229 if (values
->host
!= values
->curr
) {
230 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
231 values
->curr
= values
->host
;
236 static void shared_msr_update(unsigned slot
, u32 msr
)
239 unsigned int cpu
= smp_processor_id();
240 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
242 /* only read, and nobody should modify it at this time,
243 * so don't need lock */
244 if (slot
>= shared_msrs_global
.nr
) {
245 printk(KERN_ERR
"kvm: invalid MSR slot!");
248 rdmsrl_safe(msr
, &value
);
249 smsr
->values
[slot
].host
= value
;
250 smsr
->values
[slot
].curr
= value
;
253 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
255 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
256 shared_msrs_global
.msrs
[slot
] = msr
;
257 if (slot
>= shared_msrs_global
.nr
)
258 shared_msrs_global
.nr
= slot
+ 1;
260 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
262 static void kvm_shared_msr_cpu_online(void)
266 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
267 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
270 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
272 unsigned int cpu
= smp_processor_id();
273 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
276 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
278 smsr
->values
[slot
].curr
= value
;
279 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
283 if (!smsr
->registered
) {
284 smsr
->urn
.on_user_return
= kvm_on_user_return
;
285 user_return_notifier_register(&smsr
->urn
);
286 smsr
->registered
= true;
290 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
292 static void drop_user_return_notifiers(void)
294 unsigned int cpu
= smp_processor_id();
295 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
297 if (smsr
->registered
)
298 kvm_on_user_return(&smsr
->urn
);
301 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
303 return vcpu
->arch
.apic_base
;
305 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
307 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
309 u64 old_state
= vcpu
->arch
.apic_base
&
310 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
311 u64 new_state
= msr_info
->data
&
312 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
313 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
314 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
316 if (!msr_info
->host_initiated
&&
317 ((msr_info
->data
& reserved_bits
) != 0 ||
318 new_state
== X2APIC_ENABLE
||
319 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
320 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
321 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
325 kvm_lapic_set_base(vcpu
, msr_info
->data
);
328 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
330 asmlinkage __visible
void kvm_spurious_fault(void)
332 /* Fault while not rebooting. We want the trace. */
335 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
337 #define EXCPT_BENIGN 0
338 #define EXCPT_CONTRIBUTORY 1
341 static int exception_class(int vector
)
351 return EXCPT_CONTRIBUTORY
;
358 #define EXCPT_FAULT 0
360 #define EXCPT_ABORT 2
361 #define EXCPT_INTERRUPT 3
363 static int exception_type(int vector
)
367 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
368 return EXCPT_INTERRUPT
;
372 /* #DB is trap, as instruction watchpoints are handled elsewhere */
373 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
376 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
379 /* Reserved exceptions will result in fault */
383 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
384 unsigned nr
, bool has_error
, u32 error_code
,
390 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
392 if (!vcpu
->arch
.exception
.pending
) {
394 if (has_error
&& !is_protmode(vcpu
))
396 vcpu
->arch
.exception
.pending
= true;
397 vcpu
->arch
.exception
.has_error_code
= has_error
;
398 vcpu
->arch
.exception
.nr
= nr
;
399 vcpu
->arch
.exception
.error_code
= error_code
;
400 vcpu
->arch
.exception
.reinject
= reinject
;
404 /* to check exception */
405 prev_nr
= vcpu
->arch
.exception
.nr
;
406 if (prev_nr
== DF_VECTOR
) {
407 /* triple fault -> shutdown */
408 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
411 class1
= exception_class(prev_nr
);
412 class2
= exception_class(nr
);
413 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
414 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
415 /* generate double fault per SDM Table 5-5 */
416 vcpu
->arch
.exception
.pending
= true;
417 vcpu
->arch
.exception
.has_error_code
= true;
418 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
419 vcpu
->arch
.exception
.error_code
= 0;
421 /* replace previous exception with a new one in a hope
422 that instruction re-execution will regenerate lost
427 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
429 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
431 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
433 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
435 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
437 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
439 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
442 kvm_inject_gp(vcpu
, 0);
444 return kvm_skip_emulated_instruction(vcpu
);
448 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
450 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
452 ++vcpu
->stat
.pf_guest
;
453 vcpu
->arch
.exception
.nested_apf
=
454 is_guest_mode(vcpu
) && fault
->async_page_fault
;
455 if (vcpu
->arch
.exception
.nested_apf
)
456 vcpu
->arch
.apf
.nested_apf_token
= fault
->address
;
458 vcpu
->arch
.cr2
= fault
->address
;
459 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
461 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
463 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
465 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
466 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
468 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
470 return fault
->nested_page_fault
;
473 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
475 atomic_inc(&vcpu
->arch
.nmi_queued
);
476 kvm_make_request(KVM_REQ_NMI
, vcpu
);
478 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
480 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
482 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
484 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
486 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
488 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
490 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
493 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
494 * a #GP and return false.
496 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
498 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
500 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
503 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
505 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
507 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
510 kvm_queue_exception(vcpu
, UD_VECTOR
);
513 EXPORT_SYMBOL_GPL(kvm_require_dr
);
516 * This function will be used to read from the physical memory of the currently
517 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
518 * can read from guest physical or from the guest's guest physical memory.
520 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
521 gfn_t ngfn
, void *data
, int offset
, int len
,
524 struct x86_exception exception
;
528 ngpa
= gfn_to_gpa(ngfn
);
529 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
530 if (real_gfn
== UNMAPPED_GVA
)
533 real_gfn
= gpa_to_gfn(real_gfn
);
535 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
537 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
539 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
540 void *data
, int offset
, int len
, u32 access
)
542 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
543 data
, offset
, len
, access
);
547 * Load the pae pdptrs. Return true is they are all valid.
549 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
551 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
552 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
555 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
557 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
558 offset
* sizeof(u64
), sizeof(pdpte
),
559 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
564 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
565 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
567 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
574 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
575 __set_bit(VCPU_EXREG_PDPTR
,
576 (unsigned long *)&vcpu
->arch
.regs_avail
);
577 __set_bit(VCPU_EXREG_PDPTR
,
578 (unsigned long *)&vcpu
->arch
.regs_dirty
);
583 EXPORT_SYMBOL_GPL(load_pdptrs
);
585 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
587 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
593 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
596 if (!test_bit(VCPU_EXREG_PDPTR
,
597 (unsigned long *)&vcpu
->arch
.regs_avail
))
600 gfn
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) >> PAGE_SHIFT
;
601 offset
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) & (PAGE_SIZE
- 1);
602 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
603 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
606 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
611 EXPORT_SYMBOL_GPL(pdptrs_changed
);
613 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
615 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
616 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
621 if (cr0
& 0xffffffff00000000UL
)
625 cr0
&= ~CR0_RESERVED_BITS
;
627 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
630 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
633 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
635 if ((vcpu
->arch
.efer
& EFER_LME
)) {
640 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
645 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
650 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
653 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
655 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
656 kvm_clear_async_pf_completion_queue(vcpu
);
657 kvm_async_pf_hash_reset(vcpu
);
660 if ((cr0
^ old_cr0
) & update_bits
)
661 kvm_mmu_reset_context(vcpu
);
663 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
664 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
665 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
666 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
670 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
672 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
674 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
676 EXPORT_SYMBOL_GPL(kvm_lmsw
);
678 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
680 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
681 !vcpu
->guest_xcr0_loaded
) {
682 /* kvm_set_xcr() also depends on this */
683 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
684 vcpu
->guest_xcr0_loaded
= 1;
688 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
690 if (vcpu
->guest_xcr0_loaded
) {
691 if (vcpu
->arch
.xcr0
!= host_xcr0
)
692 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
693 vcpu
->guest_xcr0_loaded
= 0;
697 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
700 u64 old_xcr0
= vcpu
->arch
.xcr0
;
703 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
704 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
706 if (!(xcr0
& XFEATURE_MASK_FP
))
708 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
712 * Do not allow the guest to set bits that we do not support
713 * saving. However, xcr0 bit 0 is always set, even if the
714 * emulated CPU does not support XSAVE (see fx_init).
716 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
717 if (xcr0
& ~valid_bits
)
720 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
721 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
724 if (xcr0
& XFEATURE_MASK_AVX512
) {
725 if (!(xcr0
& XFEATURE_MASK_YMM
))
727 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
730 vcpu
->arch
.xcr0
= xcr0
;
732 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
733 kvm_update_cpuid(vcpu
);
737 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
739 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
740 __kvm_set_xcr(vcpu
, index
, xcr
)) {
741 kvm_inject_gp(vcpu
, 0);
746 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
748 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
750 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
751 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
752 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
754 if (cr4
& CR4_RESERVED_BITS
)
757 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
760 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
763 if (!guest_cpuid_has_smap(vcpu
) && (cr4
& X86_CR4_SMAP
))
766 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
769 if (!guest_cpuid_has_pku(vcpu
) && (cr4
& X86_CR4_PKE
))
772 if (is_long_mode(vcpu
)) {
773 if (!(cr4
& X86_CR4_PAE
))
775 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
776 && ((cr4
^ old_cr4
) & pdptr_bits
)
777 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
781 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
782 if (!guest_cpuid_has_pcid(vcpu
))
785 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
786 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
790 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
793 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
794 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
795 kvm_mmu_reset_context(vcpu
);
797 if ((cr4
^ old_cr4
) & (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
798 kvm_update_cpuid(vcpu
);
802 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
804 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
807 cr3
&= ~CR3_PCID_INVD
;
810 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
811 kvm_mmu_sync_roots(vcpu
);
812 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
816 if (is_long_mode(vcpu
)) {
817 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
819 } else if (is_pae(vcpu
) && is_paging(vcpu
) &&
820 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
823 vcpu
->arch
.cr3
= cr3
;
824 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
825 kvm_mmu_new_cr3(vcpu
);
828 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
830 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
832 if (cr8
& CR8_RESERVED_BITS
)
834 if (lapic_in_kernel(vcpu
))
835 kvm_lapic_set_tpr(vcpu
, cr8
);
837 vcpu
->arch
.cr8
= cr8
;
840 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
842 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
844 if (lapic_in_kernel(vcpu
))
845 return kvm_lapic_get_cr8(vcpu
);
847 return vcpu
->arch
.cr8
;
849 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
851 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
855 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
856 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
857 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
858 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
862 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
864 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
865 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
868 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
872 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
873 dr7
= vcpu
->arch
.guest_debug_dr7
;
875 dr7
= vcpu
->arch
.dr7
;
876 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
877 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
878 if (dr7
& DR7_BP_EN_MASK
)
879 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
882 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
884 u64 fixed
= DR6_FIXED_1
;
886 if (!guest_cpuid_has_rtm(vcpu
))
891 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
895 vcpu
->arch
.db
[dr
] = val
;
896 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
897 vcpu
->arch
.eff_db
[dr
] = val
;
902 if (val
& 0xffffffff00000000ULL
)
904 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
905 kvm_update_dr6(vcpu
);
910 if (val
& 0xffffffff00000000ULL
)
912 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
913 kvm_update_dr7(vcpu
);
920 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
922 if (__kvm_set_dr(vcpu
, dr
, val
)) {
923 kvm_inject_gp(vcpu
, 0);
928 EXPORT_SYMBOL_GPL(kvm_set_dr
);
930 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
934 *val
= vcpu
->arch
.db
[dr
];
939 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
940 *val
= vcpu
->arch
.dr6
;
942 *val
= kvm_x86_ops
->get_dr6(vcpu
);
947 *val
= vcpu
->arch
.dr7
;
952 EXPORT_SYMBOL_GPL(kvm_get_dr
);
954 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
956 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
960 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
963 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
964 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
967 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
970 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
971 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
973 * This list is modified at module load time to reflect the
974 * capabilities of the host cpu. This capabilities test skips MSRs that are
975 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
976 * may depend on host virtualization features rather than host cpu features.
979 static u32 msrs_to_save
[] = {
980 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
983 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
985 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
986 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
, MSR_IA32_SPEC_CTRL
,
989 static unsigned num_msrs_to_save
;
991 static u32 emulated_msrs
[] = {
992 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
993 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
994 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
995 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
996 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
997 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1000 HV_X64_MSR_VP_RUNTIME
,
1001 HV_X64_MSR_SCONTROL
,
1002 HV_X64_MSR_STIMER0_CONFIG
,
1003 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1006 MSR_IA32_TSC_ADJUST
,
1007 MSR_IA32_TSCDEADLINE
,
1008 MSR_IA32_MISC_ENABLE
,
1009 MSR_IA32_MCG_STATUS
,
1011 MSR_IA32_MCG_EXT_CTL
,
1014 MSR_MISC_FEATURES_ENABLES
,
1015 MSR_AMD64_VIRT_SPEC_CTRL
,
1018 static unsigned num_emulated_msrs
;
1020 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1022 if (efer
& efer_reserved_bits
)
1025 if (efer
& EFER_FFXSR
) {
1026 struct kvm_cpuid_entry2
*feat
;
1028 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
1029 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
1033 if (efer
& EFER_SVME
) {
1034 struct kvm_cpuid_entry2
*feat
;
1036 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
1037 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
1043 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1045 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1047 u64 old_efer
= vcpu
->arch
.efer
;
1049 if (!kvm_valid_efer(vcpu
, efer
))
1053 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1057 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1059 kvm_x86_ops
->set_efer(vcpu
, efer
);
1061 /* Update reserved bits */
1062 if ((efer
^ old_efer
) & EFER_NX
)
1063 kvm_mmu_reset_context(vcpu
);
1068 void kvm_enable_efer_bits(u64 mask
)
1070 efer_reserved_bits
&= ~mask
;
1072 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1075 * Writes msr value into into the appropriate "register".
1076 * Returns 0 on success, non-0 otherwise.
1077 * Assumes vcpu_load() was already called.
1079 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1081 switch (msr
->index
) {
1084 case MSR_KERNEL_GS_BASE
:
1087 if (is_noncanonical_address(msr
->data
))
1090 case MSR_IA32_SYSENTER_EIP
:
1091 case MSR_IA32_SYSENTER_ESP
:
1093 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1094 * non-canonical address is written on Intel but not on
1095 * AMD (which ignores the top 32-bits, because it does
1096 * not implement 64-bit SYSENTER).
1098 * 64-bit code should hence be able to write a non-canonical
1099 * value on AMD. Making the address canonical ensures that
1100 * vmentry does not fail on Intel after writing a non-canonical
1101 * value, and that something deterministic happens if the guest
1102 * invokes 64-bit SYSENTER.
1104 msr
->data
= get_canonical(msr
->data
);
1106 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1108 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1111 * Adapt set_msr() to msr_io()'s calling convention
1113 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1115 struct msr_data msr
;
1119 msr
.host_initiated
= true;
1120 r
= kvm_get_msr(vcpu
, &msr
);
1128 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1130 struct msr_data msr
;
1134 msr
.host_initiated
= true;
1135 return kvm_set_msr(vcpu
, &msr
);
1138 #ifdef CONFIG_X86_64
1139 struct pvclock_gtod_data
{
1142 struct { /* extract of a clocksource struct */
1155 static struct pvclock_gtod_data pvclock_gtod_data
;
1157 static void update_pvclock_gtod(struct timekeeper
*tk
)
1159 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1162 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1164 write_seqcount_begin(&vdata
->seq
);
1166 /* copy pvclock gtod data */
1167 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1168 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1169 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1170 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1171 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1173 vdata
->boot_ns
= boot_ns
;
1174 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1176 vdata
->wall_time_sec
= tk
->xtime_sec
;
1178 write_seqcount_end(&vdata
->seq
);
1182 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1185 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1186 * vcpu_enter_guest. This function is only called from
1187 * the physical CPU that is running vcpu.
1189 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1192 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1196 struct pvclock_wall_clock wc
;
1197 struct timespec64 boot
;
1202 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1207 ++version
; /* first time write, random junk */
1211 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1215 * The guest calculates current wall clock time by adding
1216 * system time (updated by kvm_guest_time_update below) to the
1217 * wall clock specified here. guest system time equals host
1218 * system time for us, thus we must fill in host boot time here.
1220 getboottime64(&boot
);
1222 if (kvm
->arch
.kvmclock_offset
) {
1223 struct timespec64 ts
= ns_to_timespec64(kvm
->arch
.kvmclock_offset
);
1224 boot
= timespec64_sub(boot
, ts
);
1226 wc
.sec
= (u32
)boot
.tv_sec
; /* overflow in 2106 guest time */
1227 wc
.nsec
= boot
.tv_nsec
;
1228 wc
.version
= version
;
1230 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1233 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1236 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1238 do_shl32_div32(dividend
, divisor
);
1242 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
1243 s8
*pshift
, u32
*pmultiplier
)
1251 scaled64
= scaled_hz
;
1252 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1257 tps32
= (uint32_t)tps64
;
1258 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1259 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1267 *pmultiplier
= div_frac(scaled64
, tps32
);
1269 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1270 __func__
, base_hz
, scaled_hz
, shift
, *pmultiplier
);
1273 #ifdef CONFIG_X86_64
1274 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1277 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1278 static unsigned long max_tsc_khz
;
1280 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1282 u64 v
= (u64
)khz
* (1000000 + ppm
);
1287 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1291 /* Guest TSC same frequency as host TSC? */
1293 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1297 /* TSC scaling supported? */
1298 if (!kvm_has_tsc_control
) {
1299 if (user_tsc_khz
> tsc_khz
) {
1300 vcpu
->arch
.tsc_catchup
= 1;
1301 vcpu
->arch
.tsc_always_catchup
= 1;
1304 WARN(1, "user requested TSC rate below hardware speed\n");
1309 /* TSC scaling required - calculate ratio */
1310 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1311 user_tsc_khz
, tsc_khz
);
1313 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1314 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1319 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1323 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
1325 u32 thresh_lo
, thresh_hi
;
1326 int use_scaling
= 0;
1328 /* tsc_khz can be zero if TSC calibration fails */
1329 if (user_tsc_khz
== 0) {
1330 /* set tsc_scaling_ratio to a safe value */
1331 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1335 /* Compute a scale to convert nanoseconds in TSC cycles */
1336 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
1337 &vcpu
->arch
.virtual_tsc_shift
,
1338 &vcpu
->arch
.virtual_tsc_mult
);
1339 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
1342 * Compute the variation in TSC rate which is acceptable
1343 * within the range of tolerance and decide if the
1344 * rate being applied is within that bounds of the hardware
1345 * rate. If so, no scaling or compensation need be done.
1347 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1348 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1349 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
1350 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
1353 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
1356 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1358 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1359 vcpu
->arch
.virtual_tsc_mult
,
1360 vcpu
->arch
.virtual_tsc_shift
);
1361 tsc
+= vcpu
->arch
.this_tsc_write
;
1365 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1367 #ifdef CONFIG_X86_64
1369 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1370 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1372 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1373 atomic_read(&vcpu
->kvm
->online_vcpus
));
1376 * Once the masterclock is enabled, always perform request in
1377 * order to update it.
1379 * In order to enable masterclock, the host clocksource must be TSC
1380 * and the vcpus need to have matched TSCs. When that happens,
1381 * perform request to enable masterclock.
1383 if (ka
->use_master_clock
||
1384 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1385 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1387 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1388 atomic_read(&vcpu
->kvm
->online_vcpus
),
1389 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1393 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1395 u64 curr_offset
= vcpu
->arch
.tsc_offset
;
1396 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1400 * Multiply tsc by a fixed point number represented by ratio.
1402 * The most significant 64-N bits (mult) of ratio represent the
1403 * integral part of the fixed point number; the remaining N bits
1404 * (frac) represent the fractional part, ie. ratio represents a fixed
1405 * point number (mult + frac * 2^(-N)).
1407 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1409 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1411 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1414 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1417 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1419 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1420 _tsc
= __scale_tsc(ratio
, tsc
);
1424 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1426 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1430 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1432 return target_tsc
- tsc
;
1435 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1437 return vcpu
->arch
.tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
1439 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1441 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
1443 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1444 vcpu
->arch
.tsc_offset
= offset
;
1447 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1449 struct kvm
*kvm
= vcpu
->kvm
;
1450 u64 offset
, ns
, elapsed
;
1451 unsigned long flags
;
1453 bool already_matched
;
1454 u64 data
= msr
->data
;
1455 bool synchronizing
= false;
1457 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1458 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1459 ns
= ktime_get_boot_ns();
1460 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1462 if (vcpu
->arch
.virtual_tsc_khz
) {
1463 if (data
== 0 && msr
->host_initiated
) {
1465 * detection of vcpu initialization -- need to sync
1466 * with other vCPUs. This particularly helps to keep
1467 * kvm_clock stable after CPU hotplug
1469 synchronizing
= true;
1471 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
1472 nsec_to_cycles(vcpu
, elapsed
);
1473 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
1475 * Special case: TSC write with a small delta (1 second)
1476 * of virtual cycle time against real time is
1477 * interpreted as an attempt to synchronize the CPU.
1479 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
1480 data
+ tsc_hz
> tsc_exp
;
1485 * For a reliable TSC, we can match TSC offsets, and for an unstable
1486 * TSC, we add elapsed time in this computation. We could let the
1487 * compensation code attempt to catch up if we fall behind, but
1488 * it's better to try to match offsets from the beginning.
1490 if (synchronizing
&&
1491 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1492 if (!check_tsc_unstable()) {
1493 offset
= kvm
->arch
.cur_tsc_offset
;
1494 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1496 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1498 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1499 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1502 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1505 * We split periods of matched TSC writes into generations.
1506 * For each generation, we track the original measured
1507 * nanosecond time, offset, and write, so if TSCs are in
1508 * sync, we can match exact offset, and if not, we can match
1509 * exact software computation in compute_guest_tsc()
1511 * These values are tracked in kvm->arch.cur_xxx variables.
1513 kvm
->arch
.cur_tsc_generation
++;
1514 kvm
->arch
.cur_tsc_nsec
= ns
;
1515 kvm
->arch
.cur_tsc_write
= data
;
1516 kvm
->arch
.cur_tsc_offset
= offset
;
1518 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1519 kvm
->arch
.cur_tsc_generation
, data
);
1523 * We also track th most recent recorded KHZ, write and time to
1524 * allow the matching interval to be extended at each write.
1526 kvm
->arch
.last_tsc_nsec
= ns
;
1527 kvm
->arch
.last_tsc_write
= data
;
1528 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1530 vcpu
->arch
.last_guest_tsc
= data
;
1532 /* Keep track of which generation this VCPU has synchronized to */
1533 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1534 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1535 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1537 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1538 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1539 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
1540 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1542 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1544 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1545 } else if (!already_matched
) {
1546 kvm
->arch
.nr_vcpus_matched_tsc
++;
1549 kvm_track_tsc_matching(vcpu
);
1550 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1553 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1555 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
1558 kvm_vcpu_write_tsc_offset(vcpu
, vcpu
->arch
.tsc_offset
+ adjustment
);
1561 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
1563 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
1564 WARN_ON(adjustment
< 0);
1565 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
1566 adjust_tsc_offset_guest(vcpu
, adjustment
);
1569 #ifdef CONFIG_X86_64
1571 static u64
read_tsc(void)
1573 u64 ret
= (u64
)rdtsc_ordered();
1574 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1576 if (likely(ret
>= last
))
1580 * GCC likes to generate cmov here, but this branch is extremely
1581 * predictable (it's just a function of time and the likely is
1582 * very likely) and there's a data dependence, so force GCC
1583 * to generate a branch instead. I don't barrier() because
1584 * we don't actually need a barrier, and if this function
1585 * ever gets inlined it will generate worse code.
1591 static inline u64
vgettsc(u64
*cycle_now
)
1594 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1596 *cycle_now
= read_tsc();
1598 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1599 return v
* gtod
->clock
.mult
;
1602 static int do_monotonic_boot(s64
*t
, u64
*cycle_now
)
1604 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1610 seq
= read_seqcount_begin(>od
->seq
);
1611 mode
= gtod
->clock
.vclock_mode
;
1612 ns
= gtod
->nsec_base
;
1613 ns
+= vgettsc(cycle_now
);
1614 ns
>>= gtod
->clock
.shift
;
1615 ns
+= gtod
->boot_ns
;
1616 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1622 static int do_realtime(struct timespec
*ts
, u64
*cycle_now
)
1624 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1630 seq
= read_seqcount_begin(>od
->seq
);
1631 mode
= gtod
->clock
.vclock_mode
;
1632 ts
->tv_sec
= gtod
->wall_time_sec
;
1633 ns
= gtod
->nsec_base
;
1634 ns
+= vgettsc(cycle_now
);
1635 ns
>>= gtod
->clock
.shift
;
1636 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1638 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
1644 /* returns true if host is using tsc clocksource */
1645 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*cycle_now
)
1647 /* checked again under seqlock below */
1648 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1651 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1654 /* returns true if host is using tsc clocksource */
1655 static bool kvm_get_walltime_and_clockread(struct timespec
*ts
,
1658 /* checked again under seqlock below */
1659 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1662 return do_realtime(ts
, cycle_now
) == VCLOCK_TSC
;
1668 * Assuming a stable TSC across physical CPUS, and a stable TSC
1669 * across virtual CPUs, the following condition is possible.
1670 * Each numbered line represents an event visible to both
1671 * CPUs at the next numbered event.
1673 * "timespecX" represents host monotonic time. "tscX" represents
1676 * VCPU0 on CPU0 | VCPU1 on CPU1
1678 * 1. read timespec0,tsc0
1679 * 2. | timespec1 = timespec0 + N
1681 * 3. transition to guest | transition to guest
1682 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1683 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1684 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1686 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1689 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1691 * - 0 < N - M => M < N
1693 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1694 * always the case (the difference between two distinct xtime instances
1695 * might be smaller then the difference between corresponding TSC reads,
1696 * when updating guest vcpus pvclock areas).
1698 * To avoid that problem, do not allow visibility of distinct
1699 * system_timestamp/tsc_timestamp values simultaneously: use a master
1700 * copy of host monotonic time values. Update that master copy
1703 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1707 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1709 #ifdef CONFIG_X86_64
1710 struct kvm_arch
*ka
= &kvm
->arch
;
1712 bool host_tsc_clocksource
, vcpus_matched
;
1714 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1715 atomic_read(&kvm
->online_vcpus
));
1718 * If the host uses TSC clock, then passthrough TSC as stable
1721 host_tsc_clocksource
= kvm_get_time_and_clockread(
1722 &ka
->master_kernel_ns
,
1723 &ka
->master_cycle_now
);
1725 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1726 && !ka
->backwards_tsc_observed
1727 && !ka
->boot_vcpu_runs_old_kvmclock
;
1729 if (ka
->use_master_clock
)
1730 atomic_set(&kvm_guest_has_master_clock
, 1);
1732 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1733 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1738 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
1740 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
1743 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1745 #ifdef CONFIG_X86_64
1747 struct kvm_vcpu
*vcpu
;
1748 struct kvm_arch
*ka
= &kvm
->arch
;
1750 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1751 kvm_make_mclock_inprogress_request(kvm
);
1752 /* no guest entries from this point */
1753 pvclock_update_vm_gtod_copy(kvm
);
1755 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1756 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1758 /* guest entries allowed */
1759 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1760 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
1762 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1766 u64
get_kvmclock_ns(struct kvm
*kvm
)
1768 struct kvm_arch
*ka
= &kvm
->arch
;
1769 struct pvclock_vcpu_time_info hv_clock
;
1772 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1773 if (!ka
->use_master_clock
) {
1774 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1775 return ktime_get_boot_ns() + ka
->kvmclock_offset
;
1778 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
1779 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
1780 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1782 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1785 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
1786 &hv_clock
.tsc_shift
,
1787 &hv_clock
.tsc_to_system_mul
);
1788 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
1795 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
1797 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1798 struct pvclock_vcpu_time_info guest_hv_clock
;
1800 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1801 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1804 /* This VCPU is paused, but it's legal for a guest to read another
1805 * VCPU's kvmclock, so we really have to follow the specification where
1806 * it says that version is odd if data is being modified, and even after
1809 * Version field updates must be kept separate. This is because
1810 * kvm_write_guest_cached might use a "rep movs" instruction, and
1811 * writes within a string instruction are weakly ordered. So there
1812 * are three writes overall.
1814 * As a small optimization, only write the version field in the first
1815 * and third write. The vcpu->pv_time cache is still valid, because the
1816 * version field is the first in the struct.
1818 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1820 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1821 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1823 sizeof(vcpu
->hv_clock
.version
));
1827 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1828 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1830 if (vcpu
->pvclock_set_guest_stopped_request
) {
1831 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
1832 vcpu
->pvclock_set_guest_stopped_request
= false;
1835 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1837 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1839 sizeof(vcpu
->hv_clock
));
1843 vcpu
->hv_clock
.version
++;
1844 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1846 sizeof(vcpu
->hv_clock
.version
));
1849 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1851 unsigned long flags
, tgt_tsc_khz
;
1852 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1853 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1855 u64 tsc_timestamp
, host_tsc
;
1857 bool use_master_clock
;
1863 * If the host uses TSC clock, then passthrough TSC as stable
1866 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1867 use_master_clock
= ka
->use_master_clock
;
1868 if (use_master_clock
) {
1869 host_tsc
= ka
->master_cycle_now
;
1870 kernel_ns
= ka
->master_kernel_ns
;
1872 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1874 /* Keep irq disabled to prevent changes to the clock */
1875 local_irq_save(flags
);
1876 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1877 if (unlikely(tgt_tsc_khz
== 0)) {
1878 local_irq_restore(flags
);
1879 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1882 if (!use_master_clock
) {
1884 kernel_ns
= ktime_get_boot_ns();
1887 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
1890 * We may have to catch up the TSC to match elapsed wall clock
1891 * time for two reasons, even if kvmclock is used.
1892 * 1) CPU could have been running below the maximum TSC rate
1893 * 2) Broken TSC compensation resets the base at each VCPU
1894 * entry to avoid unknown leaps of TSC even when running
1895 * again on the same CPU. This may cause apparent elapsed
1896 * time to disappear, and the guest to stand still or run
1899 if (vcpu
->tsc_catchup
) {
1900 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1901 if (tsc
> tsc_timestamp
) {
1902 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1903 tsc_timestamp
= tsc
;
1907 local_irq_restore(flags
);
1909 /* With all the info we got, fill in the values */
1911 if (kvm_has_tsc_control
)
1912 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
1914 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
1915 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
1916 &vcpu
->hv_clock
.tsc_shift
,
1917 &vcpu
->hv_clock
.tsc_to_system_mul
);
1918 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
1921 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1922 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1923 vcpu
->last_guest_tsc
= tsc_timestamp
;
1925 /* If the host uses TSC clocksource, then it is stable */
1927 if (use_master_clock
)
1928 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1930 vcpu
->hv_clock
.flags
= pvclock_flags
;
1932 if (vcpu
->pv_time_enabled
)
1933 kvm_setup_pvclock_page(v
);
1934 if (v
== kvm_get_vcpu(v
->kvm
, 0))
1935 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
1940 * kvmclock updates which are isolated to a given vcpu, such as
1941 * vcpu->cpu migration, should not allow system_timestamp from
1942 * the rest of the vcpus to remain static. Otherwise ntp frequency
1943 * correction applies to one vcpu's system_timestamp but not
1946 * So in those cases, request a kvmclock update for all vcpus.
1947 * We need to rate-limit these requests though, as they can
1948 * considerably slow guests that have a large number of vcpus.
1949 * The time for a remote vcpu to update its kvmclock is bound
1950 * by the delay we use to rate-limit the updates.
1953 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1955 static void kvmclock_update_fn(struct work_struct
*work
)
1958 struct delayed_work
*dwork
= to_delayed_work(work
);
1959 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1960 kvmclock_update_work
);
1961 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1962 struct kvm_vcpu
*vcpu
;
1964 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1965 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1966 kvm_vcpu_kick(vcpu
);
1970 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1972 struct kvm
*kvm
= v
->kvm
;
1974 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1975 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1976 KVMCLOCK_UPDATE_DELAY
);
1979 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1981 static void kvmclock_sync_fn(struct work_struct
*work
)
1983 struct delayed_work
*dwork
= to_delayed_work(work
);
1984 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1985 kvmclock_sync_work
);
1986 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1988 if (!kvmclock_periodic_sync
)
1991 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
1992 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
1993 KVMCLOCK_SYNC_PERIOD
);
1996 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1998 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1999 unsigned bank_num
= mcg_cap
& 0xff;
2002 case MSR_IA32_MCG_STATUS
:
2003 vcpu
->arch
.mcg_status
= data
;
2005 case MSR_IA32_MCG_CTL
:
2006 if (!(mcg_cap
& MCG_CTL_P
))
2008 if (data
!= 0 && data
!= ~(u64
)0)
2010 vcpu
->arch
.mcg_ctl
= data
;
2013 if (msr
>= MSR_IA32_MC0_CTL
&&
2014 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2015 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2016 /* only 0 or all 1s can be written to IA32_MCi_CTL
2017 * some Linux kernels though clear bit 10 in bank 4 to
2018 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2019 * this to avoid an uncatched #GP in the guest
2021 if ((offset
& 0x3) == 0 &&
2022 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
2024 vcpu
->arch
.mce_banks
[offset
] = data
;
2032 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
2034 struct kvm
*kvm
= vcpu
->kvm
;
2035 int lm
= is_long_mode(vcpu
);
2036 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
2037 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
2038 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
2039 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
2040 u32 page_num
= data
& ~PAGE_MASK
;
2041 u64 page_addr
= data
& PAGE_MASK
;
2046 if (page_num
>= blob_size
)
2049 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2054 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
2063 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2065 gpa_t gpa
= data
& ~0x3f;
2067 /* Bits 3:5 are reserved, Should be zero */
2071 vcpu
->arch
.apf
.msr_val
= data
;
2073 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2074 kvm_clear_async_pf_completion_queue(vcpu
);
2075 kvm_async_pf_hash_reset(vcpu
);
2079 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2083 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2084 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
2085 kvm_async_pf_wakeup_all(vcpu
);
2089 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2091 vcpu
->arch
.pv_time_enabled
= false;
2094 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2096 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2099 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2100 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2103 vcpu
->arch
.st
.steal
.preempted
= 0;
2105 if (vcpu
->arch
.st
.steal
.version
& 1)
2106 vcpu
->arch
.st
.steal
.version
+= 1; /* first time write, random junk */
2108 vcpu
->arch
.st
.steal
.version
+= 1;
2110 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2111 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2115 vcpu
->arch
.st
.steal
.steal
+= current
->sched_info
.run_delay
-
2116 vcpu
->arch
.st
.last_steal
;
2117 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2119 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2120 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2124 vcpu
->arch
.st
.steal
.version
+= 1;
2126 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2127 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2130 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2133 u32 msr
= msr_info
->index
;
2134 u64 data
= msr_info
->data
;
2137 case MSR_AMD64_NB_CFG
:
2138 case MSR_IA32_UCODE_REV
:
2139 case MSR_IA32_UCODE_WRITE
:
2140 case MSR_VM_HSAVE_PA
:
2141 case MSR_AMD64_PATCH_LOADER
:
2142 case MSR_AMD64_BU_CFG2
:
2143 case MSR_AMD64_DC_CFG
:
2147 return set_efer(vcpu
, data
);
2149 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2150 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2151 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2152 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2154 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2159 case MSR_FAM10H_MMIO_CONF_BASE
:
2161 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2166 case MSR_IA32_DEBUGCTLMSR
:
2168 /* We support the non-activated case already */
2170 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2171 /* Values other than LBR and BTF are vendor-specific,
2172 thus reserved and should throw a #GP */
2175 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2178 case 0x200 ... 0x2ff:
2179 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2180 case MSR_IA32_APICBASE
:
2181 return kvm_set_apic_base(vcpu
, msr_info
);
2182 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2183 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2184 case MSR_IA32_TSCDEADLINE
:
2185 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2187 case MSR_IA32_TSC_ADJUST
:
2188 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
2189 if (!msr_info
->host_initiated
) {
2190 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2191 adjust_tsc_offset_guest(vcpu
, adj
);
2193 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2196 case MSR_IA32_MISC_ENABLE
:
2197 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2199 case MSR_IA32_SMBASE
:
2200 if (!msr_info
->host_initiated
)
2202 vcpu
->arch
.smbase
= data
;
2204 case MSR_KVM_WALL_CLOCK_NEW
:
2205 case MSR_KVM_WALL_CLOCK
:
2206 vcpu
->kvm
->arch
.wall_clock
= data
;
2207 kvm_write_wall_clock(vcpu
->kvm
, data
);
2209 case MSR_KVM_SYSTEM_TIME_NEW
:
2210 case MSR_KVM_SYSTEM_TIME
: {
2211 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2213 kvmclock_reset(vcpu
);
2215 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2216 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2218 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2219 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2221 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2224 vcpu
->arch
.time
= data
;
2225 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2227 /* we verify if the enable bit is set... */
2231 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2232 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2233 sizeof(struct pvclock_vcpu_time_info
)))
2234 vcpu
->arch
.pv_time_enabled
= false;
2236 vcpu
->arch
.pv_time_enabled
= true;
2240 case MSR_KVM_ASYNC_PF_EN
:
2241 if (kvm_pv_enable_async_pf(vcpu
, data
))
2244 case MSR_KVM_STEAL_TIME
:
2246 if (unlikely(!sched_info_on()))
2249 if (data
& KVM_STEAL_RESERVED_MASK
)
2252 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2253 data
& KVM_STEAL_VALID_BITS
,
2254 sizeof(struct kvm_steal_time
)))
2257 vcpu
->arch
.st
.msr_val
= data
;
2259 if (!(data
& KVM_MSR_ENABLED
))
2262 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2265 case MSR_KVM_PV_EOI_EN
:
2266 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2270 case MSR_IA32_MCG_CTL
:
2271 case MSR_IA32_MCG_STATUS
:
2272 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2273 return set_msr_mce(vcpu
, msr
, data
);
2275 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2276 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2277 pr
= true; /* fall through */
2278 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2279 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2280 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2281 return kvm_pmu_set_msr(vcpu
, msr_info
);
2283 if (pr
|| data
!= 0)
2284 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2285 "0x%x data 0x%llx\n", msr
, data
);
2287 case MSR_K7_CLK_CTL
:
2289 * Ignore all writes to this no longer documented MSR.
2290 * Writes are only relevant for old K7 processors,
2291 * all pre-dating SVM, but a recommended workaround from
2292 * AMD for these chips. It is possible to specify the
2293 * affected processor models on the command line, hence
2294 * the need to ignore the workaround.
2297 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2298 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2299 case HV_X64_MSR_CRASH_CTL
:
2300 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2301 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2302 msr_info
->host_initiated
);
2303 case MSR_IA32_BBL_CR_CTL3
:
2304 /* Drop writes to this legacy MSR -- see rdmsr
2305 * counterpart for further detail.
2307 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n", msr
, data
);
2309 case MSR_AMD64_OSVW_ID_LENGTH
:
2310 if (!guest_cpuid_has_osvw(vcpu
))
2312 vcpu
->arch
.osvw
.length
= data
;
2314 case MSR_AMD64_OSVW_STATUS
:
2315 if (!guest_cpuid_has_osvw(vcpu
))
2317 vcpu
->arch
.osvw
.status
= data
;
2319 case MSR_PLATFORM_INFO
:
2320 if (!msr_info
->host_initiated
||
2321 data
& ~MSR_PLATFORM_INFO_CPUID_FAULT
||
2322 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
2323 cpuid_fault_enabled(vcpu
)))
2325 vcpu
->arch
.msr_platform_info
= data
;
2327 case MSR_MISC_FEATURES_ENABLES
:
2328 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
2329 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
2330 !supports_cpuid_fault(vcpu
)))
2332 vcpu
->arch
.msr_misc_features_enables
= data
;
2335 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2336 return xen_hvm_config(vcpu
, data
);
2337 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2338 return kvm_pmu_set_msr(vcpu
, msr_info
);
2340 vcpu_debug_ratelimited(vcpu
, "unhandled wrmsr: 0x%x data 0x%llx\n",
2344 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
2351 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2355 * Reads an msr value (of 'msr_index') into 'pdata'.
2356 * Returns 0 on success, non-0 otherwise.
2357 * Assumes vcpu_load() was already called.
2359 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2361 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2363 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2365 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2368 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2369 unsigned bank_num
= mcg_cap
& 0xff;
2372 case MSR_IA32_P5_MC_ADDR
:
2373 case MSR_IA32_P5_MC_TYPE
:
2376 case MSR_IA32_MCG_CAP
:
2377 data
= vcpu
->arch
.mcg_cap
;
2379 case MSR_IA32_MCG_CTL
:
2380 if (!(mcg_cap
& MCG_CTL_P
))
2382 data
= vcpu
->arch
.mcg_ctl
;
2384 case MSR_IA32_MCG_STATUS
:
2385 data
= vcpu
->arch
.mcg_status
;
2388 if (msr
>= MSR_IA32_MC0_CTL
&&
2389 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2390 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2391 data
= vcpu
->arch
.mce_banks
[offset
];
2400 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2402 switch (msr_info
->index
) {
2403 case MSR_IA32_PLATFORM_ID
:
2404 case MSR_IA32_EBL_CR_POWERON
:
2405 case MSR_IA32_DEBUGCTLMSR
:
2406 case MSR_IA32_LASTBRANCHFROMIP
:
2407 case MSR_IA32_LASTBRANCHTOIP
:
2408 case MSR_IA32_LASTINTFROMIP
:
2409 case MSR_IA32_LASTINTTOIP
:
2411 case MSR_K8_TSEG_ADDR
:
2412 case MSR_K8_TSEG_MASK
:
2414 case MSR_VM_HSAVE_PA
:
2415 case MSR_K8_INT_PENDING_MSG
:
2416 case MSR_AMD64_NB_CFG
:
2417 case MSR_FAM10H_MMIO_CONF_BASE
:
2418 case MSR_AMD64_BU_CFG2
:
2419 case MSR_IA32_PERF_CTL
:
2420 case MSR_AMD64_DC_CFG
:
2423 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2424 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2425 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2426 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2427 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2428 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2431 case MSR_IA32_UCODE_REV
:
2432 msr_info
->data
= 0x100000000ULL
;
2435 case 0x200 ... 0x2ff:
2436 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2437 case 0xcd: /* fsb frequency */
2441 * MSR_EBC_FREQUENCY_ID
2442 * Conservative value valid for even the basic CPU models.
2443 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2444 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2445 * and 266MHz for model 3, or 4. Set Core Clock
2446 * Frequency to System Bus Frequency Ratio to 1 (bits
2447 * 31:24) even though these are only valid for CPU
2448 * models > 2, however guests may end up dividing or
2449 * multiplying by zero otherwise.
2451 case MSR_EBC_FREQUENCY_ID
:
2452 msr_info
->data
= 1 << 24;
2454 case MSR_IA32_APICBASE
:
2455 msr_info
->data
= kvm_get_apic_base(vcpu
);
2457 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2458 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2460 case MSR_IA32_TSCDEADLINE
:
2461 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2463 case MSR_IA32_TSC_ADJUST
:
2464 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2466 case MSR_IA32_MISC_ENABLE
:
2467 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2469 case MSR_IA32_SMBASE
:
2470 if (!msr_info
->host_initiated
)
2472 msr_info
->data
= vcpu
->arch
.smbase
;
2474 case MSR_IA32_PERF_STATUS
:
2475 /* TSC increment by tick */
2476 msr_info
->data
= 1000ULL;
2477 /* CPU multiplier */
2478 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2481 msr_info
->data
= vcpu
->arch
.efer
;
2483 case MSR_KVM_WALL_CLOCK
:
2484 case MSR_KVM_WALL_CLOCK_NEW
:
2485 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2487 case MSR_KVM_SYSTEM_TIME
:
2488 case MSR_KVM_SYSTEM_TIME_NEW
:
2489 msr_info
->data
= vcpu
->arch
.time
;
2491 case MSR_KVM_ASYNC_PF_EN
:
2492 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2494 case MSR_KVM_STEAL_TIME
:
2495 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2497 case MSR_KVM_PV_EOI_EN
:
2498 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2500 case MSR_IA32_P5_MC_ADDR
:
2501 case MSR_IA32_P5_MC_TYPE
:
2502 case MSR_IA32_MCG_CAP
:
2503 case MSR_IA32_MCG_CTL
:
2504 case MSR_IA32_MCG_STATUS
:
2505 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2506 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2507 case MSR_K7_CLK_CTL
:
2509 * Provide expected ramp-up count for K7. All other
2510 * are set to zero, indicating minimum divisors for
2513 * This prevents guest kernels on AMD host with CPU
2514 * type 6, model 8 and higher from exploding due to
2515 * the rdmsr failing.
2517 msr_info
->data
= 0x20000000;
2519 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2520 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2521 case HV_X64_MSR_CRASH_CTL
:
2522 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2523 return kvm_hv_get_msr_common(vcpu
,
2524 msr_info
->index
, &msr_info
->data
);
2526 case MSR_IA32_BBL_CR_CTL3
:
2527 /* This legacy MSR exists but isn't fully documented in current
2528 * silicon. It is however accessed by winxp in very narrow
2529 * scenarios where it sets bit #19, itself documented as
2530 * a "reserved" bit. Best effort attempt to source coherent
2531 * read data here should the balance of the register be
2532 * interpreted by the guest:
2534 * L2 cache control register 3: 64GB range, 256KB size,
2535 * enabled, latency 0x1, configured
2537 msr_info
->data
= 0xbe702111;
2539 case MSR_AMD64_OSVW_ID_LENGTH
:
2540 if (!guest_cpuid_has_osvw(vcpu
))
2542 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2544 case MSR_AMD64_OSVW_STATUS
:
2545 if (!guest_cpuid_has_osvw(vcpu
))
2547 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2549 case MSR_PLATFORM_INFO
:
2550 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
2552 case MSR_MISC_FEATURES_ENABLES
:
2553 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
2556 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2557 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2559 vcpu_debug_ratelimited(vcpu
, "unhandled rdmsr: 0x%x\n",
2563 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr_info
->index
);
2570 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2573 * Read or write a bunch of msrs. All parameters are kernel addresses.
2575 * @return number of msrs set successfully.
2577 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2578 struct kvm_msr_entry
*entries
,
2579 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2580 unsigned index
, u64
*data
))
2584 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2585 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2586 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2588 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2594 * Read or write a bunch of msrs. Parameters are user addresses.
2596 * @return number of msrs set successfully.
2598 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2599 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2600 unsigned index
, u64
*data
),
2603 struct kvm_msrs msrs
;
2604 struct kvm_msr_entry
*entries
;
2609 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2613 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2616 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2617 entries
= memdup_user(user_msrs
->entries
, size
);
2618 if (IS_ERR(entries
)) {
2619 r
= PTR_ERR(entries
);
2623 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2628 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2639 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2644 case KVM_CAP_IRQCHIP
:
2646 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2647 case KVM_CAP_SET_TSS_ADDR
:
2648 case KVM_CAP_EXT_CPUID
:
2649 case KVM_CAP_EXT_EMUL_CPUID
:
2650 case KVM_CAP_CLOCKSOURCE
:
2652 case KVM_CAP_NOP_IO_DELAY
:
2653 case KVM_CAP_MP_STATE
:
2654 case KVM_CAP_SYNC_MMU
:
2655 case KVM_CAP_USER_NMI
:
2656 case KVM_CAP_REINJECT_CONTROL
:
2657 case KVM_CAP_IRQ_INJECT_STATUS
:
2658 case KVM_CAP_IOEVENTFD
:
2659 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2661 case KVM_CAP_PIT_STATE2
:
2662 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2663 case KVM_CAP_XEN_HVM
:
2664 case KVM_CAP_VCPU_EVENTS
:
2665 case KVM_CAP_HYPERV
:
2666 case KVM_CAP_HYPERV_VAPIC
:
2667 case KVM_CAP_HYPERV_SPIN
:
2668 case KVM_CAP_HYPERV_SYNIC
:
2669 case KVM_CAP_HYPERV_SYNIC2
:
2670 case KVM_CAP_HYPERV_VP_INDEX
:
2671 case KVM_CAP_PCI_SEGMENT
:
2672 case KVM_CAP_DEBUGREGS
:
2673 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2675 case KVM_CAP_ASYNC_PF
:
2676 case KVM_CAP_GET_TSC_KHZ
:
2677 case KVM_CAP_KVMCLOCK_CTRL
:
2678 case KVM_CAP_READONLY_MEM
:
2679 case KVM_CAP_HYPERV_TIME
:
2680 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2681 case KVM_CAP_TSC_DEADLINE_TIMER
:
2682 case KVM_CAP_ENABLE_CAP_VM
:
2683 case KVM_CAP_DISABLE_QUIRKS
:
2684 case KVM_CAP_SET_BOOT_CPU_ID
:
2685 case KVM_CAP_SPLIT_IRQCHIP
:
2686 case KVM_CAP_IMMEDIATE_EXIT
:
2689 case KVM_CAP_ADJUST_CLOCK
:
2690 r
= KVM_CLOCK_TSC_STABLE
;
2692 case KVM_CAP_X86_GUEST_MWAIT
:
2693 r
= kvm_mwait_in_guest();
2695 case KVM_CAP_X86_SMM
:
2696 /* SMBASE is usually relocated above 1M on modern chipsets,
2697 * and SMM handlers might indeed rely on 4G segment limits,
2698 * so do not report SMM to be available if real mode is
2699 * emulated via vm86 mode. Still, do not go to great lengths
2700 * to avoid userspace's usage of the feature, because it is a
2701 * fringe case that is not enabled except via specific settings
2702 * of the module parameters.
2704 r
= kvm_x86_ops
->has_emulated_msr(MSR_IA32_SMBASE
);
2707 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2709 case KVM_CAP_NR_VCPUS
:
2710 r
= KVM_SOFT_MAX_VCPUS
;
2712 case KVM_CAP_MAX_VCPUS
:
2715 case KVM_CAP_NR_MEMSLOTS
:
2716 r
= KVM_USER_MEM_SLOTS
;
2718 case KVM_CAP_PV_MMU
: /* obsolete */
2722 r
= KVM_MAX_MCE_BANKS
;
2725 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
2727 case KVM_CAP_TSC_CONTROL
:
2728 r
= kvm_has_tsc_control
;
2730 case KVM_CAP_X2APIC_API
:
2731 r
= KVM_X2APIC_API_VALID_FLAGS
;
2741 long kvm_arch_dev_ioctl(struct file
*filp
,
2742 unsigned int ioctl
, unsigned long arg
)
2744 void __user
*argp
= (void __user
*)arg
;
2748 case KVM_GET_MSR_INDEX_LIST
: {
2749 struct kvm_msr_list __user
*user_msr_list
= argp
;
2750 struct kvm_msr_list msr_list
;
2754 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2757 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2758 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2761 if (n
< msr_list
.nmsrs
)
2764 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2765 num_msrs_to_save
* sizeof(u32
)))
2767 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2769 num_emulated_msrs
* sizeof(u32
)))
2774 case KVM_GET_SUPPORTED_CPUID
:
2775 case KVM_GET_EMULATED_CPUID
: {
2776 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2777 struct kvm_cpuid2 cpuid
;
2780 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2783 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2789 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2794 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2796 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
2797 sizeof(kvm_mce_cap_supported
)))
2809 static void wbinvd_ipi(void *garbage
)
2814 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2816 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2819 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2821 /* Address WBINVD may be executed by guest */
2822 if (need_emulate_wbinvd(vcpu
)) {
2823 if (kvm_x86_ops
->has_wbinvd_exit())
2824 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2825 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2826 smp_call_function_single(vcpu
->cpu
,
2827 wbinvd_ipi
, NULL
, 1);
2830 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2832 /* Apply any externally detected TSC adjustments (due to suspend) */
2833 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2834 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2835 vcpu
->arch
.tsc_offset_adjustment
= 0;
2836 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2839 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2840 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2841 rdtsc() - vcpu
->arch
.last_host_tsc
;
2843 mark_tsc_unstable("KVM discovered backwards TSC");
2845 if (check_tsc_unstable()) {
2846 u64 offset
= kvm_compute_tsc_offset(vcpu
,
2847 vcpu
->arch
.last_guest_tsc
);
2848 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2849 vcpu
->arch
.tsc_catchup
= 1;
2852 if (kvm_lapic_hv_timer_in_use(vcpu
))
2853 kvm_lapic_restart_hv_timer(vcpu
);
2856 * On a host with synchronized TSC, there is no need to update
2857 * kvmclock on vcpu->cpu migration
2859 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2860 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2861 if (vcpu
->cpu
!= cpu
)
2862 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
2866 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2869 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
2871 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2874 vcpu
->arch
.st
.steal
.preempted
= 1;
2876 kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2877 &vcpu
->arch
.st
.steal
.preempted
,
2878 offsetof(struct kvm_steal_time
, preempted
),
2879 sizeof(vcpu
->arch
.st
.steal
.preempted
));
2882 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2886 * Disable page faults because we're in atomic context here.
2887 * kvm_write_guest_offset_cached() would call might_fault()
2888 * that relies on pagefault_disable() to tell if there's a
2889 * bug. NOTE: the write to guest memory may not go through if
2890 * during postcopy live migration or if there's heavy guest
2893 pagefault_disable();
2895 * kvm_memslots() will be called by
2896 * kvm_write_guest_offset_cached() so take the srcu lock.
2898 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2899 kvm_steal_time_set_preempted(vcpu
);
2900 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2902 kvm_x86_ops
->vcpu_put(vcpu
);
2903 kvm_put_guest_fpu(vcpu
);
2904 vcpu
->arch
.last_host_tsc
= rdtsc();
2907 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2908 struct kvm_lapic_state
*s
)
2910 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
2911 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2913 return kvm_apic_get_state(vcpu
, s
);
2916 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2917 struct kvm_lapic_state
*s
)
2921 r
= kvm_apic_set_state(vcpu
, s
);
2924 update_cr8_intercept(vcpu
);
2929 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
2931 return (!lapic_in_kernel(vcpu
) ||
2932 kvm_apic_accept_pic_intr(vcpu
));
2936 * if userspace requested an interrupt window, check that the
2937 * interrupt window is open.
2939 * No need to exit to userspace if we already have an interrupt queued.
2941 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
2943 return kvm_arch_interrupt_allowed(vcpu
) &&
2944 !kvm_cpu_has_interrupt(vcpu
) &&
2945 !kvm_event_needs_reinjection(vcpu
) &&
2946 kvm_cpu_accept_dm_intr(vcpu
);
2949 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2950 struct kvm_interrupt
*irq
)
2952 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2955 if (!irqchip_in_kernel(vcpu
->kvm
)) {
2956 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2957 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2962 * With in-kernel LAPIC, we only use this to inject EXTINT, so
2963 * fail for in-kernel 8259.
2965 if (pic_in_kernel(vcpu
->kvm
))
2968 if (vcpu
->arch
.pending_external_vector
!= -1)
2971 vcpu
->arch
.pending_external_vector
= irq
->irq
;
2972 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2976 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2978 kvm_inject_nmi(vcpu
);
2983 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
2985 kvm_make_request(KVM_REQ_SMI
, vcpu
);
2990 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2991 struct kvm_tpr_access_ctl
*tac
)
2995 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2999 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
3003 unsigned bank_num
= mcg_cap
& 0xff, bank
;
3006 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
3008 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
3011 vcpu
->arch
.mcg_cap
= mcg_cap
;
3012 /* Init IA32_MCG_CTL to all 1s */
3013 if (mcg_cap
& MCG_CTL_P
)
3014 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
3015 /* Init IA32_MCi_CTL to all 1s */
3016 for (bank
= 0; bank
< bank_num
; bank
++)
3017 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
3019 if (kvm_x86_ops
->setup_mce
)
3020 kvm_x86_ops
->setup_mce(vcpu
);
3025 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
3026 struct kvm_x86_mce
*mce
)
3028 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3029 unsigned bank_num
= mcg_cap
& 0xff;
3030 u64
*banks
= vcpu
->arch
.mce_banks
;
3032 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
3035 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3036 * reporting is disabled
3038 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3039 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3041 banks
+= 4 * mce
->bank
;
3043 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3044 * reporting is disabled for the bank
3046 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3048 if (mce
->status
& MCI_STATUS_UC
) {
3049 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3050 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3051 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3054 if (banks
[1] & MCI_STATUS_VAL
)
3055 mce
->status
|= MCI_STATUS_OVER
;
3056 banks
[2] = mce
->addr
;
3057 banks
[3] = mce
->misc
;
3058 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3059 banks
[1] = mce
->status
;
3060 kvm_queue_exception(vcpu
, MC_VECTOR
);
3061 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3062 || !(banks
[1] & MCI_STATUS_UC
)) {
3063 if (banks
[1] & MCI_STATUS_VAL
)
3064 mce
->status
|= MCI_STATUS_OVER
;
3065 banks
[2] = mce
->addr
;
3066 banks
[3] = mce
->misc
;
3067 banks
[1] = mce
->status
;
3069 banks
[1] |= MCI_STATUS_OVER
;
3073 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3074 struct kvm_vcpu_events
*events
)
3077 events
->exception
.injected
=
3078 vcpu
->arch
.exception
.pending
&&
3079 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3080 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3081 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3082 events
->exception
.pad
= 0;
3083 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3085 events
->interrupt
.injected
=
3086 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
3087 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3088 events
->interrupt
.soft
= 0;
3089 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3091 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3092 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3093 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3094 events
->nmi
.pad
= 0;
3096 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3098 events
->smi
.smm
= is_smm(vcpu
);
3099 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
3100 events
->smi
.smm_inside_nmi
=
3101 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
3102 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
3104 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3105 | KVM_VCPUEVENT_VALID_SHADOW
3106 | KVM_VCPUEVENT_VALID_SMM
);
3107 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3110 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
);
3112 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3113 struct kvm_vcpu_events
*events
)
3115 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3116 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3117 | KVM_VCPUEVENT_VALID_SHADOW
3118 | KVM_VCPUEVENT_VALID_SMM
))
3121 if (events
->exception
.injected
&&
3122 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
||
3123 is_guest_mode(vcpu
)))
3126 /* INITs are latched while in SMM */
3127 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
3128 (events
->smi
.smm
|| events
->smi
.pending
) &&
3129 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
3133 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3134 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3135 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3136 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3138 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3139 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3140 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3141 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3142 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3143 events
->interrupt
.shadow
);
3145 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3146 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3147 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3148 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3150 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3151 lapic_in_kernel(vcpu
))
3152 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3154 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3155 u32 hflags
= vcpu
->arch
.hflags
;
3156 if (events
->smi
.smm
)
3157 hflags
|= HF_SMM_MASK
;
3159 hflags
&= ~HF_SMM_MASK
;
3160 kvm_set_hflags(vcpu
, hflags
);
3162 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3164 if (events
->smi
.smm
) {
3165 if (events
->smi
.smm_inside_nmi
)
3166 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3168 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3169 if (lapic_in_kernel(vcpu
)) {
3170 if (events
->smi
.latched_init
)
3171 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3173 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3178 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3183 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3184 struct kvm_debugregs
*dbgregs
)
3188 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3189 kvm_get_dr(vcpu
, 6, &val
);
3191 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3193 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3196 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3197 struct kvm_debugregs
*dbgregs
)
3202 if (dbgregs
->dr6
& ~0xffffffffull
)
3204 if (dbgregs
->dr7
& ~0xffffffffull
)
3207 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3208 kvm_update_dr0123(vcpu
);
3209 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3210 kvm_update_dr6(vcpu
);
3211 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3212 kvm_update_dr7(vcpu
);
3217 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3219 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3221 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3222 u64 xstate_bv
= xsave
->header
.xfeatures
;
3226 * Copy legacy XSAVE area, to avoid complications with CPUID
3227 * leaves 0 and 1 in the loop below.
3229 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3232 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
3233 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3236 * Copy each region from the possibly compacted offset to the
3237 * non-compacted offset.
3239 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3241 u64 feature
= valid
& -valid
;
3242 int index
= fls64(feature
) - 1;
3243 void *src
= get_xsave_addr(xsave
, feature
);
3246 u32 size
, offset
, ecx
, edx
;
3247 cpuid_count(XSTATE_CPUID
, index
,
3248 &size
, &offset
, &ecx
, &edx
);
3249 if (feature
== XFEATURE_MASK_PKRU
)
3250 memcpy(dest
+ offset
, &vcpu
->arch
.pkru
,
3251 sizeof(vcpu
->arch
.pkru
));
3253 memcpy(dest
+ offset
, src
, size
);
3261 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3263 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3264 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3268 * Copy legacy XSAVE area, to avoid complications with CPUID
3269 * leaves 0 and 1 in the loop below.
3271 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3273 /* Set XSTATE_BV and possibly XCOMP_BV. */
3274 xsave
->header
.xfeatures
= xstate_bv
;
3275 if (boot_cpu_has(X86_FEATURE_XSAVES
))
3276 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3279 * Copy each region from the non-compacted offset to the
3280 * possibly compacted offset.
3282 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3284 u64 feature
= valid
& -valid
;
3285 int index
= fls64(feature
) - 1;
3286 void *dest
= get_xsave_addr(xsave
, feature
);
3289 u32 size
, offset
, ecx
, edx
;
3290 cpuid_count(XSTATE_CPUID
, index
,
3291 &size
, &offset
, &ecx
, &edx
);
3292 if (feature
== XFEATURE_MASK_PKRU
)
3293 memcpy(&vcpu
->arch
.pkru
, src
+ offset
,
3294 sizeof(vcpu
->arch
.pkru
));
3296 memcpy(dest
, src
+ offset
, size
);
3303 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3304 struct kvm_xsave
*guest_xsave
)
3306 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3307 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3308 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3310 memcpy(guest_xsave
->region
,
3311 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
3312 sizeof(struct fxregs_state
));
3313 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3314 XFEATURE_MASK_FPSSE
;
3318 #define XSAVE_MXCSR_OFFSET 24
3320 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3321 struct kvm_xsave
*guest_xsave
)
3324 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3325 u32 mxcsr
= *(u32
*)&guest_xsave
->region
[XSAVE_MXCSR_OFFSET
/ sizeof(u32
)];
3327 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3329 * Here we allow setting states that are not present in
3330 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3331 * with old userspace.
3333 if (xstate_bv
& ~kvm_supported_xcr0() ||
3334 mxcsr
& ~mxcsr_feature_mask
)
3336 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3338 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
||
3339 mxcsr
& ~mxcsr_feature_mask
)
3341 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3342 guest_xsave
->region
, sizeof(struct fxregs_state
));
3347 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3348 struct kvm_xcrs
*guest_xcrs
)
3350 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
3351 guest_xcrs
->nr_xcrs
= 0;
3355 guest_xcrs
->nr_xcrs
= 1;
3356 guest_xcrs
->flags
= 0;
3357 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3358 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3361 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3362 struct kvm_xcrs
*guest_xcrs
)
3366 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
3369 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3372 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3373 /* Only support XCR0 currently */
3374 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3375 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3376 guest_xcrs
->xcrs
[i
].value
);
3385 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3386 * stopped by the hypervisor. This function will be called from the host only.
3387 * EINVAL is returned when the host attempts to set the flag for a guest that
3388 * does not support pv clocks.
3390 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3392 if (!vcpu
->arch
.pv_time_enabled
)
3394 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3395 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3399 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
3400 struct kvm_enable_cap
*cap
)
3406 case KVM_CAP_HYPERV_SYNIC2
:
3409 case KVM_CAP_HYPERV_SYNIC
:
3410 if (!irqchip_in_kernel(vcpu
->kvm
))
3412 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
3413 KVM_CAP_HYPERV_SYNIC2
);
3419 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3420 unsigned int ioctl
, unsigned long arg
)
3422 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3423 void __user
*argp
= (void __user
*)arg
;
3426 struct kvm_lapic_state
*lapic
;
3427 struct kvm_xsave
*xsave
;
3428 struct kvm_xcrs
*xcrs
;
3434 case KVM_GET_LAPIC
: {
3436 if (!lapic_in_kernel(vcpu
))
3438 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3443 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3447 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3452 case KVM_SET_LAPIC
: {
3454 if (!lapic_in_kernel(vcpu
))
3456 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3457 if (IS_ERR(u
.lapic
))
3458 return PTR_ERR(u
.lapic
);
3460 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3463 case KVM_INTERRUPT
: {
3464 struct kvm_interrupt irq
;
3467 if (copy_from_user(&irq
, argp
, sizeof irq
))
3469 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3473 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3477 r
= kvm_vcpu_ioctl_smi(vcpu
);
3480 case KVM_SET_CPUID
: {
3481 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3482 struct kvm_cpuid cpuid
;
3485 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3487 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3490 case KVM_SET_CPUID2
: {
3491 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3492 struct kvm_cpuid2 cpuid
;
3495 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3497 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3498 cpuid_arg
->entries
);
3501 case KVM_GET_CPUID2
: {
3502 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3503 struct kvm_cpuid2 cpuid
;
3506 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3508 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3509 cpuid_arg
->entries
);
3513 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3519 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3522 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3524 case KVM_TPR_ACCESS_REPORTING
: {
3525 struct kvm_tpr_access_ctl tac
;
3528 if (copy_from_user(&tac
, argp
, sizeof tac
))
3530 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3534 if (copy_to_user(argp
, &tac
, sizeof tac
))
3539 case KVM_SET_VAPIC_ADDR
: {
3540 struct kvm_vapic_addr va
;
3544 if (!lapic_in_kernel(vcpu
))
3547 if (copy_from_user(&va
, argp
, sizeof va
))
3549 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3550 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3551 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3554 case KVM_X86_SETUP_MCE
: {
3558 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3560 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3563 case KVM_X86_SET_MCE
: {
3564 struct kvm_x86_mce mce
;
3567 if (copy_from_user(&mce
, argp
, sizeof mce
))
3569 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3572 case KVM_GET_VCPU_EVENTS
: {
3573 struct kvm_vcpu_events events
;
3575 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3578 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3583 case KVM_SET_VCPU_EVENTS
: {
3584 struct kvm_vcpu_events events
;
3587 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3590 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3593 case KVM_GET_DEBUGREGS
: {
3594 struct kvm_debugregs dbgregs
;
3596 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3599 if (copy_to_user(argp
, &dbgregs
,
3600 sizeof(struct kvm_debugregs
)))
3605 case KVM_SET_DEBUGREGS
: {
3606 struct kvm_debugregs dbgregs
;
3609 if (copy_from_user(&dbgregs
, argp
,
3610 sizeof(struct kvm_debugregs
)))
3613 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3616 case KVM_GET_XSAVE
: {
3617 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3622 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3625 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3630 case KVM_SET_XSAVE
: {
3631 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3632 if (IS_ERR(u
.xsave
))
3633 return PTR_ERR(u
.xsave
);
3635 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3638 case KVM_GET_XCRS
: {
3639 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3644 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3647 if (copy_to_user(argp
, u
.xcrs
,
3648 sizeof(struct kvm_xcrs
)))
3653 case KVM_SET_XCRS
: {
3654 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3656 return PTR_ERR(u
.xcrs
);
3658 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3661 case KVM_SET_TSC_KHZ
: {
3665 user_tsc_khz
= (u32
)arg
;
3667 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3670 if (user_tsc_khz
== 0)
3671 user_tsc_khz
= tsc_khz
;
3673 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
3678 case KVM_GET_TSC_KHZ
: {
3679 r
= vcpu
->arch
.virtual_tsc_khz
;
3682 case KVM_KVMCLOCK_CTRL
: {
3683 r
= kvm_set_guest_paused(vcpu
);
3686 case KVM_ENABLE_CAP
: {
3687 struct kvm_enable_cap cap
;
3690 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3692 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
3703 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3705 return VM_FAULT_SIGBUS
;
3708 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3712 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3714 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3718 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3721 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3725 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3726 u32 kvm_nr_mmu_pages
)
3728 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3731 mutex_lock(&kvm
->slots_lock
);
3733 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3734 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3736 mutex_unlock(&kvm
->slots_lock
);
3740 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3742 return kvm
->arch
.n_max_mmu_pages
;
3745 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3747 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3751 switch (chip
->chip_id
) {
3752 case KVM_IRQCHIP_PIC_MASTER
:
3753 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
3754 sizeof(struct kvm_pic_state
));
3756 case KVM_IRQCHIP_PIC_SLAVE
:
3757 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
3758 sizeof(struct kvm_pic_state
));
3760 case KVM_IRQCHIP_IOAPIC
:
3761 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3770 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3772 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3776 switch (chip
->chip_id
) {
3777 case KVM_IRQCHIP_PIC_MASTER
:
3778 spin_lock(&pic
->lock
);
3779 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
3780 sizeof(struct kvm_pic_state
));
3781 spin_unlock(&pic
->lock
);
3783 case KVM_IRQCHIP_PIC_SLAVE
:
3784 spin_lock(&pic
->lock
);
3785 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
3786 sizeof(struct kvm_pic_state
));
3787 spin_unlock(&pic
->lock
);
3789 case KVM_IRQCHIP_IOAPIC
:
3790 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3796 kvm_pic_update_irq(pic
);
3800 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3802 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
3804 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
3806 mutex_lock(&kps
->lock
);
3807 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
3808 mutex_unlock(&kps
->lock
);
3812 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3815 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3817 mutex_lock(&pit
->pit_state
.lock
);
3818 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
3819 for (i
= 0; i
< 3; i
++)
3820 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
3821 mutex_unlock(&pit
->pit_state
.lock
);
3825 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3827 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3828 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3829 sizeof(ps
->channels
));
3830 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3831 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3832 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3836 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3840 u32 prev_legacy
, cur_legacy
;
3841 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3843 mutex_lock(&pit
->pit_state
.lock
);
3844 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3845 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3846 if (!prev_legacy
&& cur_legacy
)
3848 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
3849 sizeof(pit
->pit_state
.channels
));
3850 pit
->pit_state
.flags
= ps
->flags
;
3851 for (i
= 0; i
< 3; i
++)
3852 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
3854 mutex_unlock(&pit
->pit_state
.lock
);
3858 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3859 struct kvm_reinject_control
*control
)
3861 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3866 /* pit->pit_state.lock was overloaded to prevent userspace from getting
3867 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3868 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
3870 mutex_lock(&pit
->pit_state
.lock
);
3871 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
3872 mutex_unlock(&pit
->pit_state
.lock
);
3878 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3879 * @kvm: kvm instance
3880 * @log: slot id and address to which we copy the log
3882 * Steps 1-4 below provide general overview of dirty page logging. See
3883 * kvm_get_dirty_log_protect() function description for additional details.
3885 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3886 * always flush the TLB (step 4) even if previous step failed and the dirty
3887 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3888 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3889 * writes will be marked dirty for next log read.
3891 * 1. Take a snapshot of the bit and clear it if needed.
3892 * 2. Write protect the corresponding page.
3893 * 3. Copy the snapshot to the userspace.
3894 * 4. Flush TLB's if needed.
3896 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3898 bool is_dirty
= false;
3901 mutex_lock(&kvm
->slots_lock
);
3904 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3906 if (kvm_x86_ops
->flush_log_dirty
)
3907 kvm_x86_ops
->flush_log_dirty(kvm
);
3909 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
3912 * All the TLBs can be flushed out of mmu lock, see the comments in
3913 * kvm_mmu_slot_remove_write_access().
3915 lockdep_assert_held(&kvm
->slots_lock
);
3917 kvm_flush_remote_tlbs(kvm
);
3919 mutex_unlock(&kvm
->slots_lock
);
3923 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3926 if (!irqchip_in_kernel(kvm
))
3929 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3930 irq_event
->irq
, irq_event
->level
,
3935 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
3936 struct kvm_enable_cap
*cap
)
3944 case KVM_CAP_DISABLE_QUIRKS
:
3945 kvm
->arch
.disabled_quirks
= cap
->args
[0];
3948 case KVM_CAP_SPLIT_IRQCHIP
: {
3949 mutex_lock(&kvm
->lock
);
3951 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
3952 goto split_irqchip_unlock
;
3954 if (irqchip_in_kernel(kvm
))
3955 goto split_irqchip_unlock
;
3956 if (kvm
->created_vcpus
)
3957 goto split_irqchip_unlock
;
3958 r
= kvm_setup_empty_irq_routing(kvm
);
3960 goto split_irqchip_unlock
;
3961 /* Pairs with irqchip_in_kernel. */
3963 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
3964 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
3966 split_irqchip_unlock
:
3967 mutex_unlock(&kvm
->lock
);
3970 case KVM_CAP_X2APIC_API
:
3972 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
3975 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
3976 kvm
->arch
.x2apic_format
= true;
3977 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
3978 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
3989 long kvm_arch_vm_ioctl(struct file
*filp
,
3990 unsigned int ioctl
, unsigned long arg
)
3992 struct kvm
*kvm
= filp
->private_data
;
3993 void __user
*argp
= (void __user
*)arg
;
3996 * This union makes it completely explicit to gcc-3.x
3997 * that these two variables' stack usage should be
3998 * combined, not added together.
4001 struct kvm_pit_state ps
;
4002 struct kvm_pit_state2 ps2
;
4003 struct kvm_pit_config pit_config
;
4007 case KVM_SET_TSS_ADDR
:
4008 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
4010 case KVM_SET_IDENTITY_MAP_ADDR
: {
4014 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
4016 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
4019 case KVM_SET_NR_MMU_PAGES
:
4020 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
4022 case KVM_GET_NR_MMU_PAGES
:
4023 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
4025 case KVM_CREATE_IRQCHIP
: {
4026 mutex_lock(&kvm
->lock
);
4029 if (irqchip_in_kernel(kvm
))
4030 goto create_irqchip_unlock
;
4033 if (kvm
->created_vcpus
)
4034 goto create_irqchip_unlock
;
4036 r
= kvm_pic_init(kvm
);
4038 goto create_irqchip_unlock
;
4040 r
= kvm_ioapic_init(kvm
);
4042 kvm_pic_destroy(kvm
);
4043 goto create_irqchip_unlock
;
4046 r
= kvm_setup_default_irq_routing(kvm
);
4048 kvm_ioapic_destroy(kvm
);
4049 kvm_pic_destroy(kvm
);
4050 goto create_irqchip_unlock
;
4052 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4054 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
4055 create_irqchip_unlock
:
4056 mutex_unlock(&kvm
->lock
);
4059 case KVM_CREATE_PIT
:
4060 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
4062 case KVM_CREATE_PIT2
:
4064 if (copy_from_user(&u
.pit_config
, argp
,
4065 sizeof(struct kvm_pit_config
)))
4068 mutex_lock(&kvm
->lock
);
4071 goto create_pit_unlock
;
4073 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
4077 mutex_unlock(&kvm
->lock
);
4079 case KVM_GET_IRQCHIP
: {
4080 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4081 struct kvm_irqchip
*chip
;
4083 chip
= memdup_user(argp
, sizeof(*chip
));
4090 if (!irqchip_kernel(kvm
))
4091 goto get_irqchip_out
;
4092 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
4094 goto get_irqchip_out
;
4096 if (copy_to_user(argp
, chip
, sizeof *chip
))
4097 goto get_irqchip_out
;
4103 case KVM_SET_IRQCHIP
: {
4104 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4105 struct kvm_irqchip
*chip
;
4107 chip
= memdup_user(argp
, sizeof(*chip
));
4114 if (!irqchip_kernel(kvm
))
4115 goto set_irqchip_out
;
4116 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
4118 goto set_irqchip_out
;
4126 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
4129 if (!kvm
->arch
.vpit
)
4131 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
4135 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
4142 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
4145 if (!kvm
->arch
.vpit
)
4147 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
4150 case KVM_GET_PIT2
: {
4152 if (!kvm
->arch
.vpit
)
4154 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
4158 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4163 case KVM_SET_PIT2
: {
4165 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4168 if (!kvm
->arch
.vpit
)
4170 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4173 case KVM_REINJECT_CONTROL
: {
4174 struct kvm_reinject_control control
;
4176 if (copy_from_user(&control
, argp
, sizeof(control
)))
4178 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4181 case KVM_SET_BOOT_CPU_ID
:
4183 mutex_lock(&kvm
->lock
);
4184 if (kvm
->created_vcpus
)
4187 kvm
->arch
.bsp_vcpu_id
= arg
;
4188 mutex_unlock(&kvm
->lock
);
4190 case KVM_XEN_HVM_CONFIG
: {
4192 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
4193 sizeof(struct kvm_xen_hvm_config
)))
4196 if (kvm
->arch
.xen_hvm_config
.flags
)
4201 case KVM_SET_CLOCK
: {
4202 struct kvm_clock_data user_ns
;
4206 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4215 * TODO: userspace has to take care of races with VCPU_RUN, so
4216 * kvm_gen_update_masterclock() can be cut down to locked
4217 * pvclock_update_vm_gtod_copy().
4219 kvm_gen_update_masterclock(kvm
);
4220 now_ns
= get_kvmclock_ns(kvm
);
4221 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
4222 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
4225 case KVM_GET_CLOCK
: {
4226 struct kvm_clock_data user_ns
;
4229 now_ns
= get_kvmclock_ns(kvm
);
4230 user_ns
.clock
= now_ns
;
4231 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
4232 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4235 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4240 case KVM_ENABLE_CAP
: {
4241 struct kvm_enable_cap cap
;
4244 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4246 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4256 static void kvm_init_msr_list(void)
4261 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4262 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4266 * Even MSRs that are valid in the host may not be exposed
4267 * to the guests in some cases.
4269 switch (msrs_to_save
[i
]) {
4270 case MSR_IA32_BNDCFGS
:
4271 if (!kvm_x86_ops
->mpx_supported())
4275 if (!kvm_x86_ops
->rdtscp_supported())
4283 msrs_to_save
[j
] = msrs_to_save
[i
];
4286 num_msrs_to_save
= j
;
4288 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4289 if (!kvm_x86_ops
->has_emulated_msr(emulated_msrs
[i
]))
4293 emulated_msrs
[j
] = emulated_msrs
[i
];
4296 num_emulated_msrs
= j
;
4299 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4307 if (!(lapic_in_kernel(vcpu
) &&
4308 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4309 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4320 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4327 if (!(lapic_in_kernel(vcpu
) &&
4328 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4330 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4332 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, v
);
4342 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4343 struct kvm_segment
*var
, int seg
)
4345 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4348 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4349 struct kvm_segment
*var
, int seg
)
4351 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4354 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4355 struct x86_exception
*exception
)
4359 BUG_ON(!mmu_is_nested(vcpu
));
4361 /* NPT walks are always user-walks */
4362 access
|= PFERR_USER_MASK
;
4363 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4368 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4369 struct x86_exception
*exception
)
4371 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4372 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4375 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4376 struct x86_exception
*exception
)
4378 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4379 access
|= PFERR_FETCH_MASK
;
4380 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4383 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4384 struct x86_exception
*exception
)
4386 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4387 access
|= PFERR_WRITE_MASK
;
4388 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4391 /* uses this to access any guest's mapped memory without checking CPL */
4392 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4393 struct x86_exception
*exception
)
4395 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4398 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4399 struct kvm_vcpu
*vcpu
, u32 access
,
4400 struct x86_exception
*exception
)
4403 int r
= X86EMUL_CONTINUE
;
4406 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4408 unsigned offset
= addr
& (PAGE_SIZE
-1);
4409 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4412 if (gpa
== UNMAPPED_GVA
)
4413 return X86EMUL_PROPAGATE_FAULT
;
4414 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4417 r
= X86EMUL_IO_NEEDED
;
4429 /* used for instruction fetching */
4430 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4431 gva_t addr
, void *val
, unsigned int bytes
,
4432 struct x86_exception
*exception
)
4434 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4435 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4439 /* Inline kvm_read_guest_virt_helper for speed. */
4440 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4442 if (unlikely(gpa
== UNMAPPED_GVA
))
4443 return X86EMUL_PROPAGATE_FAULT
;
4445 offset
= addr
& (PAGE_SIZE
-1);
4446 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4447 bytes
= (unsigned)PAGE_SIZE
- offset
;
4448 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4450 if (unlikely(ret
< 0))
4451 return X86EMUL_IO_NEEDED
;
4453 return X86EMUL_CONTINUE
;
4456 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4457 gva_t addr
, void *val
, unsigned int bytes
,
4458 struct x86_exception
*exception
)
4460 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4461 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4463 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4466 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4468 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4469 gva_t addr
, void *val
, unsigned int bytes
,
4470 struct x86_exception
*exception
)
4472 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4473 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4476 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4477 unsigned long addr
, void *val
, unsigned int bytes
)
4479 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4480 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4482 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4485 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4486 gva_t addr
, void *val
,
4488 struct x86_exception
*exception
)
4490 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4492 int r
= X86EMUL_CONTINUE
;
4495 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4498 unsigned offset
= addr
& (PAGE_SIZE
-1);
4499 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4502 if (gpa
== UNMAPPED_GVA
)
4503 return X86EMUL_PROPAGATE_FAULT
;
4504 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4506 r
= X86EMUL_IO_NEEDED
;
4517 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4519 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4520 gpa_t gpa
, bool write
)
4522 /* For APIC access vmexit */
4523 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4526 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
4527 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
4534 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4535 gpa_t
*gpa
, struct x86_exception
*exception
,
4538 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4539 | (write
? PFERR_WRITE_MASK
: 0);
4542 * currently PKRU is only applied to ept enabled guest so
4543 * there is no pkey in EPT page table for L1 guest or EPT
4544 * shadow page table for L2 guest.
4546 if (vcpu_match_mmio_gva(vcpu
, gva
)
4547 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4548 vcpu
->arch
.access
, 0, access
)) {
4549 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4550 (gva
& (PAGE_SIZE
- 1));
4551 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4555 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4557 if (*gpa
== UNMAPPED_GVA
)
4560 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
4563 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4564 const void *val
, int bytes
)
4568 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4571 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
4575 struct read_write_emulator_ops
{
4576 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4578 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4579 void *val
, int bytes
);
4580 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4581 int bytes
, void *val
);
4582 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4583 void *val
, int bytes
);
4587 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4589 if (vcpu
->mmio_read_completed
) {
4590 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4591 vcpu
->mmio_fragments
[0].gpa
, val
);
4592 vcpu
->mmio_read_completed
= 0;
4599 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4600 void *val
, int bytes
)
4602 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4605 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4606 void *val
, int bytes
)
4608 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4611 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4613 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, val
);
4614 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4617 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4618 void *val
, int bytes
)
4620 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, NULL
);
4621 return X86EMUL_IO_NEEDED
;
4624 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4625 void *val
, int bytes
)
4627 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4629 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4630 return X86EMUL_CONTINUE
;
4633 static const struct read_write_emulator_ops read_emultor
= {
4634 .read_write_prepare
= read_prepare
,
4635 .read_write_emulate
= read_emulate
,
4636 .read_write_mmio
= vcpu_mmio_read
,
4637 .read_write_exit_mmio
= read_exit_mmio
,
4640 static const struct read_write_emulator_ops write_emultor
= {
4641 .read_write_emulate
= write_emulate
,
4642 .read_write_mmio
= write_mmio
,
4643 .read_write_exit_mmio
= write_exit_mmio
,
4647 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4649 struct x86_exception
*exception
,
4650 struct kvm_vcpu
*vcpu
,
4651 const struct read_write_emulator_ops
*ops
)
4655 bool write
= ops
->write
;
4656 struct kvm_mmio_fragment
*frag
;
4657 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4660 * If the exit was due to a NPF we may already have a GPA.
4661 * If the GPA is present, use it to avoid the GVA to GPA table walk.
4662 * Note, this cannot be used on string operations since string
4663 * operation using rep will only have the initial GPA from the NPF
4666 if (vcpu
->arch
.gpa_available
&&
4667 emulator_can_use_gpa(ctxt
) &&
4668 vcpu_is_mmio_gpa(vcpu
, addr
, exception
->address
, write
) &&
4669 (addr
& ~PAGE_MASK
) == (exception
->address
& ~PAGE_MASK
)) {
4670 gpa
= exception
->address
;
4674 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4677 return X86EMUL_PROPAGATE_FAULT
;
4679 /* For APIC access vmexit */
4683 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4684 return X86EMUL_CONTINUE
;
4688 * Is this MMIO handled locally?
4690 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4691 if (handled
== bytes
)
4692 return X86EMUL_CONTINUE
;
4698 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4699 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4703 return X86EMUL_CONTINUE
;
4706 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4708 void *val
, unsigned int bytes
,
4709 struct x86_exception
*exception
,
4710 const struct read_write_emulator_ops
*ops
)
4712 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4716 if (ops
->read_write_prepare
&&
4717 ops
->read_write_prepare(vcpu
, val
, bytes
))
4718 return X86EMUL_CONTINUE
;
4720 vcpu
->mmio_nr_fragments
= 0;
4722 /* Crossing a page boundary? */
4723 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4726 now
= -addr
& ~PAGE_MASK
;
4727 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4730 if (rc
!= X86EMUL_CONTINUE
)
4733 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4739 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4741 if (rc
!= X86EMUL_CONTINUE
)
4744 if (!vcpu
->mmio_nr_fragments
)
4747 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4749 vcpu
->mmio_needed
= 1;
4750 vcpu
->mmio_cur_fragment
= 0;
4752 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4753 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4754 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4755 vcpu
->run
->mmio
.phys_addr
= gpa
;
4757 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4760 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4764 struct x86_exception
*exception
)
4766 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4767 exception
, &read_emultor
);
4770 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4774 struct x86_exception
*exception
)
4776 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4777 exception
, &write_emultor
);
4780 #define CMPXCHG_TYPE(t, ptr, old, new) \
4781 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4783 #ifdef CONFIG_X86_64
4784 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4786 # define CMPXCHG64(ptr, old, new) \
4787 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4790 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4795 struct x86_exception
*exception
)
4797 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4803 /* guests cmpxchg8b have to be emulated atomically */
4804 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4807 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4809 if (gpa
== UNMAPPED_GVA
||
4810 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4813 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4816 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
4817 if (is_error_page(page
))
4820 kaddr
= kmap_atomic(page
);
4821 kaddr
+= offset_in_page(gpa
);
4824 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4827 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4830 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4833 exchanged
= CMPXCHG64(kaddr
, old
, new);
4838 kunmap_atomic(kaddr
);
4839 kvm_release_page_dirty(page
);
4842 return X86EMUL_CMPXCHG_FAILED
;
4844 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
4845 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
4847 return X86EMUL_CONTINUE
;
4850 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4852 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4855 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4859 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
4860 if (vcpu
->arch
.pio
.in
)
4861 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4862 vcpu
->arch
.pio
.size
, pd
);
4864 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
4865 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4869 pd
+= vcpu
->arch
.pio
.size
;
4874 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4875 unsigned short port
, void *val
,
4876 unsigned int count
, bool in
)
4878 vcpu
->arch
.pio
.port
= port
;
4879 vcpu
->arch
.pio
.in
= in
;
4880 vcpu
->arch
.pio
.count
= count
;
4881 vcpu
->arch
.pio
.size
= size
;
4883 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4884 vcpu
->arch
.pio
.count
= 0;
4888 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4889 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4890 vcpu
->run
->io
.size
= size
;
4891 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4892 vcpu
->run
->io
.count
= count
;
4893 vcpu
->run
->io
.port
= port
;
4898 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4899 int size
, unsigned short port
, void *val
,
4902 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4905 if (vcpu
->arch
.pio
.count
)
4908 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
4910 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4913 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4914 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4915 vcpu
->arch
.pio
.count
= 0;
4922 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4923 int size
, unsigned short port
,
4924 const void *val
, unsigned int count
)
4926 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4928 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4929 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4930 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4933 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4935 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4938 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4940 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4943 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
4945 if (!need_emulate_wbinvd(vcpu
))
4946 return X86EMUL_CONTINUE
;
4948 if (kvm_x86_ops
->has_wbinvd_exit()) {
4949 int cpu
= get_cpu();
4951 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4952 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4953 wbinvd_ipi
, NULL
, 1);
4955 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4958 return X86EMUL_CONTINUE
;
4961 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4963 kvm_emulate_wbinvd_noskip(vcpu
);
4964 return kvm_skip_emulated_instruction(vcpu
);
4966 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4970 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4972 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
4975 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4976 unsigned long *dest
)
4978 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4981 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4982 unsigned long value
)
4985 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4988 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4990 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4993 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4995 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4996 unsigned long value
;
5000 value
= kvm_read_cr0(vcpu
);
5003 value
= vcpu
->arch
.cr2
;
5006 value
= kvm_read_cr3(vcpu
);
5009 value
= kvm_read_cr4(vcpu
);
5012 value
= kvm_get_cr8(vcpu
);
5015 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5022 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
5024 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5029 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
5032 vcpu
->arch
.cr2
= val
;
5035 res
= kvm_set_cr3(vcpu
, val
);
5038 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
5041 res
= kvm_set_cr8(vcpu
, val
);
5044 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5051 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
5053 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
5056 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5058 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
5061 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5063 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
5066 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5068 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
5071 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5073 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
5076 static unsigned long emulator_get_cached_segment_base(
5077 struct x86_emulate_ctxt
*ctxt
, int seg
)
5079 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
5082 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
5083 struct desc_struct
*desc
, u32
*base3
,
5086 struct kvm_segment var
;
5088 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
5089 *selector
= var
.selector
;
5092 memset(desc
, 0, sizeof(*desc
));
5100 set_desc_limit(desc
, var
.limit
);
5101 set_desc_base(desc
, (unsigned long)var
.base
);
5102 #ifdef CONFIG_X86_64
5104 *base3
= var
.base
>> 32;
5106 desc
->type
= var
.type
;
5108 desc
->dpl
= var
.dpl
;
5109 desc
->p
= var
.present
;
5110 desc
->avl
= var
.avl
;
5118 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
5119 struct desc_struct
*desc
, u32 base3
,
5122 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5123 struct kvm_segment var
;
5125 var
.selector
= selector
;
5126 var
.base
= get_desc_base(desc
);
5127 #ifdef CONFIG_X86_64
5128 var
.base
|= ((u64
)base3
) << 32;
5130 var
.limit
= get_desc_limit(desc
);
5132 var
.limit
= (var
.limit
<< 12) | 0xfff;
5133 var
.type
= desc
->type
;
5134 var
.dpl
= desc
->dpl
;
5139 var
.avl
= desc
->avl
;
5140 var
.present
= desc
->p
;
5141 var
.unusable
= !var
.present
;
5144 kvm_set_segment(vcpu
, &var
, seg
);
5148 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
5149 u32 msr_index
, u64
*pdata
)
5151 struct msr_data msr
;
5154 msr
.index
= msr_index
;
5155 msr
.host_initiated
= false;
5156 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
5164 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
5165 u32 msr_index
, u64 data
)
5167 struct msr_data msr
;
5170 msr
.index
= msr_index
;
5171 msr
.host_initiated
= false;
5172 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
5175 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
5177 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5179 return vcpu
->arch
.smbase
;
5182 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5184 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5186 vcpu
->arch
.smbase
= smbase
;
5189 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
5192 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
5195 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
5196 u32 pmc
, u64
*pdata
)
5198 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
5201 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
5203 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
5206 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
5209 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
5212 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
5217 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
5218 struct x86_instruction_info
*info
,
5219 enum x86_intercept_stage stage
)
5221 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5224 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5225 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
5227 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
5230 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5232 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5235 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5237 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5240 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5242 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5245 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
5247 return emul_to_vcpu(ctxt
)->arch
.hflags
;
5250 static void emulator_set_hflags(struct x86_emulate_ctxt
*ctxt
, unsigned emul_flags
)
5252 kvm_set_hflags(emul_to_vcpu(ctxt
), emul_flags
);
5255 static const struct x86_emulate_ops emulate_ops
= {
5256 .read_gpr
= emulator_read_gpr
,
5257 .write_gpr
= emulator_write_gpr
,
5258 .read_std
= kvm_read_guest_virt_system
,
5259 .write_std
= kvm_write_guest_virt_system
,
5260 .read_phys
= kvm_read_guest_phys_system
,
5261 .fetch
= kvm_fetch_guest_virt
,
5262 .read_emulated
= emulator_read_emulated
,
5263 .write_emulated
= emulator_write_emulated
,
5264 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5265 .invlpg
= emulator_invlpg
,
5266 .pio_in_emulated
= emulator_pio_in_emulated
,
5267 .pio_out_emulated
= emulator_pio_out_emulated
,
5268 .get_segment
= emulator_get_segment
,
5269 .set_segment
= emulator_set_segment
,
5270 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5271 .get_gdt
= emulator_get_gdt
,
5272 .get_idt
= emulator_get_idt
,
5273 .set_gdt
= emulator_set_gdt
,
5274 .set_idt
= emulator_set_idt
,
5275 .get_cr
= emulator_get_cr
,
5276 .set_cr
= emulator_set_cr
,
5277 .cpl
= emulator_get_cpl
,
5278 .get_dr
= emulator_get_dr
,
5279 .set_dr
= emulator_set_dr
,
5280 .get_smbase
= emulator_get_smbase
,
5281 .set_smbase
= emulator_set_smbase
,
5282 .set_msr
= emulator_set_msr
,
5283 .get_msr
= emulator_get_msr
,
5284 .check_pmc
= emulator_check_pmc
,
5285 .read_pmc
= emulator_read_pmc
,
5286 .halt
= emulator_halt
,
5287 .wbinvd
= emulator_wbinvd
,
5288 .fix_hypercall
= emulator_fix_hypercall
,
5289 .get_fpu
= emulator_get_fpu
,
5290 .put_fpu
= emulator_put_fpu
,
5291 .intercept
= emulator_intercept
,
5292 .get_cpuid
= emulator_get_cpuid
,
5293 .set_nmi_mask
= emulator_set_nmi_mask
,
5294 .get_hflags
= emulator_get_hflags
,
5295 .set_hflags
= emulator_set_hflags
,
5298 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5300 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5302 * an sti; sti; sequence only disable interrupts for the first
5303 * instruction. So, if the last instruction, be it emulated or
5304 * not, left the system with the INT_STI flag enabled, it
5305 * means that the last instruction is an sti. We should not
5306 * leave the flag on in this case. The same goes for mov ss
5308 if (int_shadow
& mask
)
5310 if (unlikely(int_shadow
|| mask
)) {
5311 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5313 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5317 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5319 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5320 if (ctxt
->exception
.vector
== PF_VECTOR
)
5321 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5323 if (ctxt
->exception
.error_code_valid
)
5324 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5325 ctxt
->exception
.error_code
);
5327 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5331 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5333 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5336 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5338 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5339 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
5341 ctxt
->eip
= kvm_rip_read(vcpu
);
5342 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5343 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5344 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5345 cs_db
? X86EMUL_MODE_PROT32
:
5346 X86EMUL_MODE_PROT16
;
5347 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5348 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5349 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5351 init_decode_cache(ctxt
);
5352 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5355 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5357 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5360 init_emulate_ctxt(vcpu
);
5364 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5365 ret
= emulate_int_real(ctxt
, irq
);
5367 if (ret
!= X86EMUL_CONTINUE
)
5368 return EMULATE_FAIL
;
5370 ctxt
->eip
= ctxt
->_eip
;
5371 kvm_rip_write(vcpu
, ctxt
->eip
);
5372 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5374 if (irq
== NMI_VECTOR
)
5375 vcpu
->arch
.nmi_pending
= 0;
5377 vcpu
->arch
.interrupt
.pending
= false;
5379 return EMULATE_DONE
;
5381 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5383 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5385 int r
= EMULATE_DONE
;
5387 ++vcpu
->stat
.insn_emulation_fail
;
5388 trace_kvm_emulate_insn_failed(vcpu
);
5389 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5390 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5391 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5392 vcpu
->run
->internal
.ndata
= 0;
5395 kvm_queue_exception(vcpu
, UD_VECTOR
);
5400 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5401 bool write_fault_to_shadow_pgtable
,
5407 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5410 if (!vcpu
->arch
.mmu
.direct_map
) {
5412 * Write permission should be allowed since only
5413 * write access need to be emulated.
5415 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5418 * If the mapping is invalid in guest, let cpu retry
5419 * it to generate fault.
5421 if (gpa
== UNMAPPED_GVA
)
5426 * Do not retry the unhandleable instruction if it faults on the
5427 * readonly host memory, otherwise it will goto a infinite loop:
5428 * retry instruction -> write #PF -> emulation fail -> retry
5429 * instruction -> ...
5431 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5434 * If the instruction failed on the error pfn, it can not be fixed,
5435 * report the error to userspace.
5437 if (is_error_noslot_pfn(pfn
))
5440 kvm_release_pfn_clean(pfn
);
5442 /* The instructions are well-emulated on direct mmu. */
5443 if (vcpu
->arch
.mmu
.direct_map
) {
5444 unsigned int indirect_shadow_pages
;
5446 spin_lock(&vcpu
->kvm
->mmu_lock
);
5447 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5448 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5450 if (indirect_shadow_pages
)
5451 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5457 * if emulation was due to access to shadowed page table
5458 * and it failed try to unshadow page and re-enter the
5459 * guest to let CPU execute the instruction.
5461 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5464 * If the access faults on its page table, it can not
5465 * be fixed by unprotecting shadow page and it should
5466 * be reported to userspace.
5468 return !write_fault_to_shadow_pgtable
;
5471 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5472 unsigned long cr2
, int emulation_type
)
5474 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5475 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5477 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5478 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5481 * If the emulation is caused by #PF and it is non-page_table
5482 * writing instruction, it means the VM-EXIT is caused by shadow
5483 * page protected, we can zap the shadow page and retry this
5484 * instruction directly.
5486 * Note: if the guest uses a non-page-table modifying instruction
5487 * on the PDE that points to the instruction, then we will unmap
5488 * the instruction and go to an infinite loop. So, we cache the
5489 * last retried eip and the last fault address, if we meet the eip
5490 * and the address again, we can break out of the potential infinite
5493 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5495 if (!(emulation_type
& EMULTYPE_RETRY
))
5498 if (x86_page_table_writing_insn(ctxt
))
5501 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5504 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5505 vcpu
->arch
.last_retry_addr
= cr2
;
5507 if (!vcpu
->arch
.mmu
.direct_map
)
5508 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5510 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5515 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5516 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5518 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5520 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5521 /* This is a good place to trace that we are exiting SMM. */
5522 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5524 /* Process a latched INIT or SMI, if any. */
5525 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5528 kvm_mmu_reset_context(vcpu
);
5531 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5533 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5535 vcpu
->arch
.hflags
= emul_flags
;
5537 if (changed
& HF_SMM_MASK
)
5538 kvm_smm_changed(vcpu
);
5541 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5550 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5551 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5556 static void kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
, int *r
)
5558 struct kvm_run
*kvm_run
= vcpu
->run
;
5560 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5561 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
| DR6_RTM
;
5562 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5563 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5564 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5565 *r
= EMULATE_USER_EXIT
;
5568 * "Certain debug exceptions may clear bit 0-3. The
5569 * remaining contents of the DR6 register are never
5570 * cleared by the processor".
5572 vcpu
->arch
.dr6
&= ~15;
5573 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5574 kvm_queue_exception(vcpu
, DB_VECTOR
);
5578 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
5580 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5581 int r
= EMULATE_DONE
;
5583 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5586 * rflags is the old, "raw" value of the flags. The new value has
5587 * not been saved yet.
5589 * This is correct even for TF set by the guest, because "the
5590 * processor will not generate this exception after the instruction
5591 * that sets the TF flag".
5593 if (unlikely(rflags
& X86_EFLAGS_TF
))
5594 kvm_vcpu_do_singlestep(vcpu
, &r
);
5595 return r
== EMULATE_DONE
;
5597 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
5599 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5601 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5602 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5603 struct kvm_run
*kvm_run
= vcpu
->run
;
5604 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5605 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5606 vcpu
->arch
.guest_debug_dr7
,
5610 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5611 kvm_run
->debug
.arch
.pc
= eip
;
5612 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5613 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5614 *r
= EMULATE_USER_EXIT
;
5619 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5620 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5621 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5622 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5627 vcpu
->arch
.dr6
&= ~15;
5628 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5629 kvm_queue_exception(vcpu
, DB_VECTOR
);
5638 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5645 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5646 bool writeback
= true;
5647 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5650 * Clear write_fault_to_shadow_pgtable here to ensure it is
5653 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5654 kvm_clear_exception_queue(vcpu
);
5656 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5657 init_emulate_ctxt(vcpu
);
5660 * We will reenter on the same instruction since
5661 * we do not set complete_userspace_io. This does not
5662 * handle watchpoints yet, those would be handled in
5665 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5668 ctxt
->interruptibility
= 0;
5669 ctxt
->have_exception
= false;
5670 ctxt
->exception
.vector
= -1;
5671 ctxt
->perm_ok
= false;
5673 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5675 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5677 trace_kvm_emulate_insn_start(vcpu
);
5678 ++vcpu
->stat
.insn_emulation
;
5679 if (r
!= EMULATION_OK
) {
5680 if (emulation_type
& EMULTYPE_TRAP_UD
)
5681 return EMULATE_FAIL
;
5682 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5684 return EMULATE_DONE
;
5685 if (emulation_type
& EMULTYPE_SKIP
)
5686 return EMULATE_FAIL
;
5687 return handle_emulation_failure(vcpu
);
5691 if (emulation_type
& EMULTYPE_SKIP
) {
5692 kvm_rip_write(vcpu
, ctxt
->_eip
);
5693 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5694 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5695 return EMULATE_DONE
;
5698 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5699 return EMULATE_DONE
;
5701 /* this is needed for vmware backdoor interface to work since it
5702 changes registers values during IO operation */
5703 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5704 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5705 emulator_invalidate_register_cache(ctxt
);
5709 /* Save the faulting GPA (cr2) in the address field */
5710 ctxt
->exception
.address
= cr2
;
5712 r
= x86_emulate_insn(ctxt
);
5714 if (r
== EMULATION_INTERCEPTED
)
5715 return EMULATE_DONE
;
5717 if (r
== EMULATION_FAILED
) {
5718 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5720 return EMULATE_DONE
;
5722 return handle_emulation_failure(vcpu
);
5725 if (ctxt
->have_exception
) {
5727 if (inject_emulated_exception(vcpu
))
5729 } else if (vcpu
->arch
.pio
.count
) {
5730 if (!vcpu
->arch
.pio
.in
) {
5731 /* FIXME: return into emulator if single-stepping. */
5732 vcpu
->arch
.pio
.count
= 0;
5735 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5737 r
= EMULATE_USER_EXIT
;
5738 } else if (vcpu
->mmio_needed
) {
5739 if (!vcpu
->mmio_is_write
)
5741 r
= EMULATE_USER_EXIT
;
5742 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5743 } else if (r
== EMULATION_RESTART
)
5749 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5750 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5751 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5752 kvm_rip_write(vcpu
, ctxt
->eip
);
5753 if (r
== EMULATE_DONE
&&
5754 (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
5755 kvm_vcpu_do_singlestep(vcpu
, &r
);
5756 if (!ctxt
->have_exception
||
5757 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5758 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5761 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5762 * do nothing, and it will be requested again as soon as
5763 * the shadow expires. But we still need to check here,
5764 * because POPF has no interrupt shadow.
5766 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5767 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5769 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5773 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5775 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5777 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5778 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5779 size
, port
, &val
, 1);
5780 /* do not return to emulator after return from userspace */
5781 vcpu
->arch
.pio
.count
= 0;
5784 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5786 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
5790 /* We should only ever be called with arch.pio.count equal to 1 */
5791 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
5793 /* For size less than 4 we merge, else we zero extend */
5794 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
)
5798 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5799 * the copy and tracing
5801 emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, vcpu
->arch
.pio
.size
,
5802 vcpu
->arch
.pio
.port
, &val
, 1);
5803 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5808 int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5813 /* For size less than 4 we merge, else we zero extend */
5814 val
= (size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
) : 0;
5816 ret
= emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, size
, port
,
5819 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5823 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
5827 EXPORT_SYMBOL_GPL(kvm_fast_pio_in
);
5829 static int kvmclock_cpu_down_prep(unsigned int cpu
)
5831 __this_cpu_write(cpu_tsc_khz
, 0);
5835 static void tsc_khz_changed(void *data
)
5837 struct cpufreq_freqs
*freq
= data
;
5838 unsigned long khz
= 0;
5842 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5843 khz
= cpufreq_quick_get(raw_smp_processor_id());
5846 __this_cpu_write(cpu_tsc_khz
, khz
);
5849 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5852 struct cpufreq_freqs
*freq
= data
;
5854 struct kvm_vcpu
*vcpu
;
5855 int i
, send_ipi
= 0;
5858 * We allow guests to temporarily run on slowing clocks,
5859 * provided we notify them after, or to run on accelerating
5860 * clocks, provided we notify them before. Thus time never
5863 * However, we have a problem. We can't atomically update
5864 * the frequency of a given CPU from this function; it is
5865 * merely a notifier, which can be called from any CPU.
5866 * Changing the TSC frequency at arbitrary points in time
5867 * requires a recomputation of local variables related to
5868 * the TSC for each VCPU. We must flag these local variables
5869 * to be updated and be sure the update takes place with the
5870 * new frequency before any guests proceed.
5872 * Unfortunately, the combination of hotplug CPU and frequency
5873 * change creates an intractable locking scenario; the order
5874 * of when these callouts happen is undefined with respect to
5875 * CPU hotplug, and they can race with each other. As such,
5876 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5877 * undefined; you can actually have a CPU frequency change take
5878 * place in between the computation of X and the setting of the
5879 * variable. To protect against this problem, all updates of
5880 * the per_cpu tsc_khz variable are done in an interrupt
5881 * protected IPI, and all callers wishing to update the value
5882 * must wait for a synchronous IPI to complete (which is trivial
5883 * if the caller is on the CPU already). This establishes the
5884 * necessary total order on variable updates.
5886 * Note that because a guest time update may take place
5887 * anytime after the setting of the VCPU's request bit, the
5888 * correct TSC value must be set before the request. However,
5889 * to ensure the update actually makes it to any guest which
5890 * starts running in hardware virtualization between the set
5891 * and the acquisition of the spinlock, we must also ping the
5892 * CPU after setting the request bit.
5896 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5898 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5901 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5903 spin_lock(&kvm_lock
);
5904 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5905 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5906 if (vcpu
->cpu
!= freq
->cpu
)
5908 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5909 if (vcpu
->cpu
!= smp_processor_id())
5913 spin_unlock(&kvm_lock
);
5915 if (freq
->old
< freq
->new && send_ipi
) {
5917 * We upscale the frequency. Must make the guest
5918 * doesn't see old kvmclock values while running with
5919 * the new frequency, otherwise we risk the guest sees
5920 * time go backwards.
5922 * In case we update the frequency for another cpu
5923 * (which might be in guest context) send an interrupt
5924 * to kick the cpu out of guest context. Next time
5925 * guest context is entered kvmclock will be updated,
5926 * so the guest will not see stale values.
5928 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5933 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5934 .notifier_call
= kvmclock_cpufreq_notifier
5937 static int kvmclock_cpu_online(unsigned int cpu
)
5939 tsc_khz_changed(NULL
);
5943 static void kvm_timer_init(void)
5945 max_tsc_khz
= tsc_khz
;
5947 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5948 #ifdef CONFIG_CPU_FREQ
5949 struct cpufreq_policy policy
;
5952 memset(&policy
, 0, sizeof(policy
));
5954 cpufreq_get_policy(&policy
, cpu
);
5955 if (policy
.cpuinfo
.max_freq
)
5956 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5959 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5960 CPUFREQ_TRANSITION_NOTIFIER
);
5962 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5964 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
5965 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
5968 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5970 int kvm_is_in_guest(void)
5972 return __this_cpu_read(current_vcpu
) != NULL
;
5975 static int kvm_is_user_mode(void)
5979 if (__this_cpu_read(current_vcpu
))
5980 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5982 return user_mode
!= 0;
5985 static unsigned long kvm_get_guest_ip(void)
5987 unsigned long ip
= 0;
5989 if (__this_cpu_read(current_vcpu
))
5990 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5995 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5996 .is_in_guest
= kvm_is_in_guest
,
5997 .is_user_mode
= kvm_is_user_mode
,
5998 .get_guest_ip
= kvm_get_guest_ip
,
6001 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
6003 __this_cpu_write(current_vcpu
, vcpu
);
6005 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
6007 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
6009 __this_cpu_write(current_vcpu
, NULL
);
6011 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
6013 static void kvm_set_mmio_spte_mask(void)
6016 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
6019 * Set the reserved bits and the present bit of an paging-structure
6020 * entry to generate page fault with PFER.RSV = 1.
6022 /* Mask the reserved physical address bits. */
6023 mask
= rsvd_bits(maxphyaddr
, 51);
6025 /* Set the present bit. */
6028 #ifdef CONFIG_X86_64
6030 * If reserved bit is not supported, clear the present bit to disable
6033 if (maxphyaddr
== 52)
6037 kvm_mmu_set_mmio_spte_mask(mask
, mask
);
6040 #ifdef CONFIG_X86_64
6041 static void pvclock_gtod_update_fn(struct work_struct
*work
)
6045 struct kvm_vcpu
*vcpu
;
6048 spin_lock(&kvm_lock
);
6049 list_for_each_entry(kvm
, &vm_list
, vm_list
)
6050 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6051 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
6052 atomic_set(&kvm_guest_has_master_clock
, 0);
6053 spin_unlock(&kvm_lock
);
6056 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
6059 * Notification about pvclock gtod data update.
6061 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
6064 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
6065 struct timekeeper
*tk
= priv
;
6067 update_pvclock_gtod(tk
);
6069 /* disable master clock if host does not trust, or does not
6070 * use, TSC clocksource
6072 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
6073 atomic_read(&kvm_guest_has_master_clock
) != 0)
6074 queue_work(system_long_wq
, &pvclock_gtod_work
);
6079 static struct notifier_block pvclock_gtod_notifier
= {
6080 .notifier_call
= pvclock_gtod_notify
,
6084 int kvm_arch_init(void *opaque
)
6087 struct kvm_x86_ops
*ops
= opaque
;
6090 printk(KERN_ERR
"kvm: already loaded the other module\n");
6095 if (!ops
->cpu_has_kvm_support()) {
6096 printk(KERN_ERR
"kvm: no hardware support\n");
6100 if (ops
->disabled_by_bios()) {
6101 printk(KERN_WARNING
"kvm: disabled by bios\n");
6107 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
6109 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
6113 r
= kvm_mmu_module_init();
6115 goto out_free_percpu
;
6117 kvm_set_mmio_spte_mask();
6121 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
6122 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
6123 PT_PRESENT_MASK
, 0);
6126 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
6128 if (boot_cpu_has(X86_FEATURE_XSAVE
))
6129 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
6132 #ifdef CONFIG_X86_64
6133 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
6139 free_percpu(shared_msrs
);
6144 void kvm_arch_exit(void)
6147 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
6149 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6150 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
6151 CPUFREQ_TRANSITION_NOTIFIER
);
6152 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
6153 #ifdef CONFIG_X86_64
6154 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
6157 kvm_mmu_module_exit();
6158 free_percpu(shared_msrs
);
6161 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
6163 ++vcpu
->stat
.halt_exits
;
6164 if (lapic_in_kernel(vcpu
)) {
6165 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
6168 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
6172 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
6174 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
6176 int ret
= kvm_skip_emulated_instruction(vcpu
);
6178 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6179 * KVM_EXIT_DEBUG here.
6181 return kvm_vcpu_halt(vcpu
) && ret
;
6183 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
6185 #ifdef CONFIG_X86_64
6186 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
6187 unsigned long clock_type
)
6189 struct kvm_clock_pairing clock_pairing
;
6194 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
6195 return -KVM_EOPNOTSUPP
;
6197 if (kvm_get_walltime_and_clockread(&ts
, &cycle
) == false)
6198 return -KVM_EOPNOTSUPP
;
6200 clock_pairing
.sec
= ts
.tv_sec
;
6201 clock_pairing
.nsec
= ts
.tv_nsec
;
6202 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
6203 clock_pairing
.flags
= 0;
6206 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
6207 sizeof(struct kvm_clock_pairing
)))
6215 * kvm_pv_kick_cpu_op: Kick a vcpu.
6217 * @apicid - apicid of vcpu to be kicked.
6219 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
6221 struct kvm_lapic_irq lapic_irq
;
6223 lapic_irq
.shorthand
= 0;
6224 lapic_irq
.dest_mode
= 0;
6225 lapic_irq
.level
= 0;
6226 lapic_irq
.dest_id
= apicid
;
6227 lapic_irq
.msi_redir_hint
= false;
6229 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
6230 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
6233 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu
*vcpu
)
6235 vcpu
->arch
.apicv_active
= false;
6236 kvm_x86_ops
->refresh_apicv_exec_ctrl(vcpu
);
6239 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
6241 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
6244 r
= kvm_skip_emulated_instruction(vcpu
);
6246 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
6247 return kvm_hv_hypercall(vcpu
);
6249 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6250 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6251 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6252 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6253 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6255 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
6257 op_64_bit
= is_64_bit_mode(vcpu
);
6266 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
6272 case KVM_HC_VAPIC_POLL_IRQ
:
6275 case KVM_HC_KICK_CPU
:
6276 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6279 #ifdef CONFIG_X86_64
6280 case KVM_HC_CLOCK_PAIRING
:
6281 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
6291 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6292 ++vcpu
->stat
.hypercalls
;
6295 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6297 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6299 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6300 char instruction
[3];
6301 unsigned long rip
= kvm_rip_read(vcpu
);
6303 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6305 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
6309 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6311 return vcpu
->run
->request_interrupt_window
&&
6312 likely(!pic_in_kernel(vcpu
->kvm
));
6315 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6317 struct kvm_run
*kvm_run
= vcpu
->run
;
6319 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6320 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
6321 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6322 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6323 kvm_run
->ready_for_interrupt_injection
=
6324 pic_in_kernel(vcpu
->kvm
) ||
6325 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
6328 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6332 if (!kvm_x86_ops
->update_cr8_intercept
)
6335 if (!lapic_in_kernel(vcpu
))
6338 if (vcpu
->arch
.apicv_active
)
6341 if (!vcpu
->arch
.apic
->vapic_addr
)
6342 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6349 tpr
= kvm_lapic_get_cr8(vcpu
);
6351 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6354 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6358 /* try to reinject previous events if any */
6359 if (vcpu
->arch
.exception
.pending
) {
6360 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6361 vcpu
->arch
.exception
.has_error_code
,
6362 vcpu
->arch
.exception
.error_code
);
6364 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6365 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6368 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6369 (vcpu
->arch
.dr7
& DR7_GD
)) {
6370 vcpu
->arch
.dr7
&= ~DR7_GD
;
6371 kvm_update_dr7(vcpu
);
6374 kvm_x86_ops
->queue_exception(vcpu
);
6378 if (vcpu
->arch
.nmi_injected
) {
6379 kvm_x86_ops
->set_nmi(vcpu
);
6383 if (vcpu
->arch
.interrupt
.pending
) {
6384 kvm_x86_ops
->set_irq(vcpu
);
6388 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6389 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6394 /* try to inject new event if pending */
6395 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)) {
6396 vcpu
->arch
.smi_pending
= false;
6398 } else if (vcpu
->arch
.nmi_pending
&& kvm_x86_ops
->nmi_allowed(vcpu
)) {
6399 --vcpu
->arch
.nmi_pending
;
6400 vcpu
->arch
.nmi_injected
= true;
6401 kvm_x86_ops
->set_nmi(vcpu
);
6402 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6404 * Because interrupts can be injected asynchronously, we are
6405 * calling check_nested_events again here to avoid a race condition.
6406 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6407 * proposal and current concerns. Perhaps we should be setting
6408 * KVM_REQ_EVENT only on certain events and not unconditionally?
6410 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6411 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6415 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6416 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6418 kvm_x86_ops
->set_irq(vcpu
);
6425 static void process_nmi(struct kvm_vcpu
*vcpu
)
6430 * x86 is limited to one NMI running, and one NMI pending after it.
6431 * If an NMI is already in progress, limit further NMIs to just one.
6432 * Otherwise, allow two (and we'll inject the first one immediately).
6434 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6437 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6438 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6439 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6442 #define put_smstate(type, buf, offset, val) \
6443 *(type *)((buf) + (offset) - 0x7e00) = val
6445 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
6448 flags
|= seg
->g
<< 23;
6449 flags
|= seg
->db
<< 22;
6450 flags
|= seg
->l
<< 21;
6451 flags
|= seg
->avl
<< 20;
6452 flags
|= seg
->present
<< 15;
6453 flags
|= seg
->dpl
<< 13;
6454 flags
|= seg
->s
<< 12;
6455 flags
|= seg
->type
<< 8;
6459 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6461 struct kvm_segment seg
;
6464 kvm_get_segment(vcpu
, &seg
, n
);
6465 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6468 offset
= 0x7f84 + n
* 12;
6470 offset
= 0x7f2c + (n
- 3) * 12;
6472 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6473 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6474 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
6477 #ifdef CONFIG_X86_64
6478 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6480 struct kvm_segment seg
;
6484 kvm_get_segment(vcpu
, &seg
, n
);
6485 offset
= 0x7e00 + n
* 16;
6487 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
6488 put_smstate(u16
, buf
, offset
, seg
.selector
);
6489 put_smstate(u16
, buf
, offset
+ 2, flags
);
6490 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6491 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6495 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6498 struct kvm_segment seg
;
6502 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6503 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6504 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6505 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6507 for (i
= 0; i
< 8; i
++)
6508 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6510 kvm_get_dr(vcpu
, 6, &val
);
6511 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6512 kvm_get_dr(vcpu
, 7, &val
);
6513 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6515 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6516 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6517 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6518 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6519 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
6521 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6522 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6523 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6524 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6525 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
6527 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6528 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6529 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6531 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6532 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6533 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6535 for (i
= 0; i
< 6; i
++)
6536 enter_smm_save_seg_32(vcpu
, buf
, i
);
6538 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6541 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6542 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6545 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6547 #ifdef CONFIG_X86_64
6549 struct kvm_segment seg
;
6553 for (i
= 0; i
< 16; i
++)
6554 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6556 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6557 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6559 kvm_get_dr(vcpu
, 6, &val
);
6560 put_smstate(u64
, buf
, 0x7f68, val
);
6561 kvm_get_dr(vcpu
, 7, &val
);
6562 put_smstate(u64
, buf
, 0x7f60, val
);
6564 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6565 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6566 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6568 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6571 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6573 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6575 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6576 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6577 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
6578 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6579 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6581 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6582 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6583 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6585 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6586 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6587 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
6588 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6589 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6591 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6592 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6593 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6595 for (i
= 0; i
< 6; i
++)
6596 enter_smm_save_seg_64(vcpu
, buf
, i
);
6602 static void enter_smm(struct kvm_vcpu
*vcpu
)
6604 struct kvm_segment cs
, ds
;
6609 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6610 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6611 memset(buf
, 0, 512);
6612 if (guest_cpuid_has_longmode(vcpu
))
6613 enter_smm_save_state_64(vcpu
, buf
);
6615 enter_smm_save_state_32(vcpu
, buf
);
6617 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6619 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6620 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6622 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6624 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6625 kvm_rip_write(vcpu
, 0x8000);
6627 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6628 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6629 vcpu
->arch
.cr0
= cr0
;
6631 kvm_x86_ops
->set_cr4(vcpu
, 0);
6633 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6634 dt
.address
= dt
.size
= 0;
6635 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6637 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6639 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6640 cs
.base
= vcpu
->arch
.smbase
;
6645 cs
.limit
= ds
.limit
= 0xffffffff;
6646 cs
.type
= ds
.type
= 0x3;
6647 cs
.dpl
= ds
.dpl
= 0;
6652 cs
.avl
= ds
.avl
= 0;
6653 cs
.present
= ds
.present
= 1;
6654 cs
.unusable
= ds
.unusable
= 0;
6655 cs
.padding
= ds
.padding
= 0;
6657 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6658 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6659 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6660 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6661 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6662 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6664 if (guest_cpuid_has_longmode(vcpu
))
6665 kvm_x86_ops
->set_efer(vcpu
, 0);
6667 kvm_update_cpuid(vcpu
);
6668 kvm_mmu_reset_context(vcpu
);
6671 static void process_smi(struct kvm_vcpu
*vcpu
)
6673 vcpu
->arch
.smi_pending
= true;
6674 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6677 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
6679 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
6682 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6684 u64 eoi_exit_bitmap
[4];
6686 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6689 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
6691 if (irqchip_split(vcpu
->kvm
))
6692 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6694 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6695 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6696 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6698 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
6699 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
6700 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6703 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6705 ++vcpu
->stat
.tlb_flush
;
6706 kvm_x86_ops
->tlb_flush(vcpu
);
6709 void kvm_arch_mmu_notifier_invalidate_range(struct kvm
*kvm
,
6710 unsigned long start
, unsigned long end
)
6712 unsigned long apic_address
;
6715 * The physical address of apic access page is stored in the VMCS.
6716 * Update it when it becomes invalid.
6718 apic_address
= gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6719 if (start
<= apic_address
&& apic_address
< end
)
6720 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6723 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6725 struct page
*page
= NULL
;
6727 if (!lapic_in_kernel(vcpu
))
6730 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6733 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6734 if (is_error_page(page
))
6736 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6739 * Do not pin apic access page in memory, the MMU notifier
6740 * will call us again if it is migrated or swapped out.
6744 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6747 * Returns 1 to let vcpu_run() continue the guest execution loop without
6748 * exiting to the userspace. Otherwise, the value will be returned to the
6751 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6755 dm_request_for_irq_injection(vcpu
) &&
6756 kvm_cpu_accept_dm_intr(vcpu
);
6758 bool req_immediate_exit
= false;
6760 if (kvm_request_pending(vcpu
)) {
6761 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6762 kvm_mmu_unload(vcpu
);
6763 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6764 __kvm_migrate_timers(vcpu
);
6765 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6766 kvm_gen_update_masterclock(vcpu
->kvm
);
6767 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6768 kvm_gen_kvmclock_update(vcpu
);
6769 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6770 r
= kvm_guest_time_update(vcpu
);
6774 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6775 kvm_mmu_sync_roots(vcpu
);
6776 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6777 kvm_vcpu_flush_tlb(vcpu
);
6778 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6779 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6783 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6784 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6788 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6789 /* Page is swapped out. Do synthetic halt */
6790 vcpu
->arch
.apf
.halted
= true;
6794 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6795 record_steal_time(vcpu
);
6796 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
6798 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6800 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6801 kvm_pmu_handle_event(vcpu
);
6802 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6803 kvm_pmu_deliver_pmi(vcpu
);
6804 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
6805 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
6806 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
6807 vcpu
->arch
.ioapic_handled_vectors
)) {
6808 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
6809 vcpu
->run
->eoi
.vector
=
6810 vcpu
->arch
.pending_ioapic_eoi
;
6815 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6816 vcpu_scan_ioapic(vcpu
);
6817 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6818 kvm_vcpu_reload_apic_access_page(vcpu
);
6819 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
6820 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6821 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
6825 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
6826 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6827 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
6831 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
6832 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
6833 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
6839 * KVM_REQ_HV_STIMER has to be processed after
6840 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6841 * depend on the guest clock being up-to-date
6843 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
6844 kvm_hv_process_stimers(vcpu
);
6847 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6848 ++vcpu
->stat
.req_event
;
6849 kvm_apic_accept_events(vcpu
);
6850 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6855 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6856 req_immediate_exit
= true;
6858 /* Enable NMI/IRQ window open exits if needed.
6860 * SMIs have two cases: 1) they can be nested, and
6861 * then there is nothing to do here because RSM will
6862 * cause a vmexit anyway; 2) or the SMI can be pending
6863 * because inject_pending_event has completed the
6864 * injection of an IRQ or NMI from the previous vmexit,
6865 * and then we request an immediate exit to inject the SMI.
6867 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
))
6868 req_immediate_exit
= true;
6869 if (vcpu
->arch
.nmi_pending
)
6870 kvm_x86_ops
->enable_nmi_window(vcpu
);
6871 if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6872 kvm_x86_ops
->enable_irq_window(vcpu
);
6875 if (kvm_lapic_enabled(vcpu
)) {
6876 update_cr8_intercept(vcpu
);
6877 kvm_lapic_sync_to_vapic(vcpu
);
6881 r
= kvm_mmu_reload(vcpu
);
6883 goto cancel_injection
;
6888 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6889 kvm_load_guest_fpu(vcpu
);
6892 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
6893 * IPI are then delayed after guest entry, which ensures that they
6894 * result in virtual interrupt delivery.
6896 local_irq_disable();
6897 vcpu
->mode
= IN_GUEST_MODE
;
6899 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6902 * 1) We should set ->mode before checking ->requests. Please see
6903 * the comment in kvm_vcpu_exiting_guest_mode().
6905 * 2) For APICv, we should set ->mode before checking PIR.ON. This
6906 * pairs with the memory barrier implicit in pi_test_and_set_on
6907 * (see vmx_deliver_posted_interrupt).
6909 * 3) This also orders the write to mode from any reads to the page
6910 * tables done while the VCPU is running. Please see the comment
6911 * in kvm_flush_remote_tlbs.
6913 smp_mb__after_srcu_read_unlock();
6916 * This handles the case where a posted interrupt was
6917 * notified with kvm_vcpu_kick.
6919 if (kvm_lapic_enabled(vcpu
)) {
6920 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6921 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6924 if (vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
)
6925 || need_resched() || signal_pending(current
)) {
6926 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6930 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6932 goto cancel_injection
;
6935 kvm_load_guest_xcr0(vcpu
);
6937 if (req_immediate_exit
) {
6938 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6939 smp_send_reschedule(vcpu
->cpu
);
6942 trace_kvm_entry(vcpu
->vcpu_id
);
6943 wait_lapic_expire(vcpu
);
6944 guest_enter_irqoff();
6946 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
6948 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
6949 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
6950 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
6951 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
6952 set_debugreg(vcpu
->arch
.dr6
, 6);
6953 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6956 kvm_x86_ops
->run(vcpu
);
6959 * Do this here before restoring debug registers on the host. And
6960 * since we do this before handling the vmexit, a DR access vmexit
6961 * can (a) read the correct value of the debug registers, (b) set
6962 * KVM_DEBUGREG_WONT_EXIT again.
6964 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
6965 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
6966 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
6967 kvm_update_dr0123(vcpu
);
6968 kvm_update_dr6(vcpu
);
6969 kvm_update_dr7(vcpu
);
6970 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6974 * If the guest has used debug registers, at least dr7
6975 * will be disabled while returning to the host.
6976 * If we don't have active breakpoints in the host, we don't
6977 * care about the messed up debug address registers. But if
6978 * we have some of them active, restore the old state.
6980 if (hw_breakpoint_active())
6981 hw_breakpoint_restore();
6983 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
6985 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6988 kvm_put_guest_xcr0(vcpu
);
6990 kvm_x86_ops
->handle_external_intr(vcpu
);
6994 guest_exit_irqoff();
6999 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7002 * Profile KVM exit RIPs:
7004 if (unlikely(prof_on
== KVM_PROFILING
)) {
7005 unsigned long rip
= kvm_rip_read(vcpu
);
7006 profile_hit(KVM_PROFILING
, (void *)rip
);
7009 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
7010 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7012 if (vcpu
->arch
.apic_attention
)
7013 kvm_lapic_sync_from_vapic(vcpu
);
7015 r
= kvm_x86_ops
->handle_exit(vcpu
);
7019 kvm_x86_ops
->cancel_injection(vcpu
);
7020 if (unlikely(vcpu
->arch
.apic_attention
))
7021 kvm_lapic_sync_from_vapic(vcpu
);
7026 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
7028 if (!kvm_arch_vcpu_runnable(vcpu
) &&
7029 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
7030 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7031 kvm_vcpu_block(vcpu
);
7032 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7034 if (kvm_x86_ops
->post_block
)
7035 kvm_x86_ops
->post_block(vcpu
);
7037 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
7041 kvm_apic_accept_events(vcpu
);
7042 switch(vcpu
->arch
.mp_state
) {
7043 case KVM_MP_STATE_HALTED
:
7044 vcpu
->arch
.pv
.pv_unhalted
= false;
7045 vcpu
->arch
.mp_state
=
7046 KVM_MP_STATE_RUNNABLE
;
7047 case KVM_MP_STATE_RUNNABLE
:
7048 vcpu
->arch
.apf
.halted
= false;
7050 case KVM_MP_STATE_INIT_RECEIVED
:
7059 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
7061 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7062 kvm_x86_ops
->check_nested_events(vcpu
, false);
7064 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7065 !vcpu
->arch
.apf
.halted
);
7068 static int vcpu_run(struct kvm_vcpu
*vcpu
)
7071 struct kvm
*kvm
= vcpu
->kvm
;
7073 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7076 if (kvm_vcpu_running(vcpu
)) {
7077 r
= vcpu_enter_guest(vcpu
);
7079 r
= vcpu_block(kvm
, vcpu
);
7085 kvm_clear_request(KVM_REQ_PENDING_TIMER
, vcpu
);
7086 if (kvm_cpu_has_pending_timer(vcpu
))
7087 kvm_inject_pending_timer_irqs(vcpu
);
7089 if (dm_request_for_irq_injection(vcpu
) &&
7090 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
7092 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
7093 ++vcpu
->stat
.request_irq_exits
;
7097 kvm_check_async_pf_completion(vcpu
);
7099 if (signal_pending(current
)) {
7101 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7102 ++vcpu
->stat
.signal_exits
;
7105 if (need_resched()) {
7106 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7108 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7112 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7117 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
7120 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7121 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
7122 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7123 if (r
!= EMULATE_DONE
)
7128 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
7130 BUG_ON(!vcpu
->arch
.pio
.count
);
7132 return complete_emulated_io(vcpu
);
7136 * Implements the following, as a state machine:
7140 * for each mmio piece in the fragment
7148 * for each mmio piece in the fragment
7153 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
7155 struct kvm_run
*run
= vcpu
->run
;
7156 struct kvm_mmio_fragment
*frag
;
7159 BUG_ON(!vcpu
->mmio_needed
);
7161 /* Complete previous fragment */
7162 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
7163 len
= min(8u, frag
->len
);
7164 if (!vcpu
->mmio_is_write
)
7165 memcpy(frag
->data
, run
->mmio
.data
, len
);
7167 if (frag
->len
<= 8) {
7168 /* Switch to the next fragment. */
7170 vcpu
->mmio_cur_fragment
++;
7172 /* Go forward to the next mmio piece. */
7178 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
7179 vcpu
->mmio_needed
= 0;
7181 /* FIXME: return into emulator if single-stepping. */
7182 if (vcpu
->mmio_is_write
)
7184 vcpu
->mmio_read_completed
= 1;
7185 return complete_emulated_io(vcpu
);
7188 run
->exit_reason
= KVM_EXIT_MMIO
;
7189 run
->mmio
.phys_addr
= frag
->gpa
;
7190 if (vcpu
->mmio_is_write
)
7191 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
7192 run
->mmio
.len
= min(8u, frag
->len
);
7193 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
7194 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
7199 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
7201 struct fpu
*fpu
= ¤t
->thread
.fpu
;
7205 fpu__activate_curr(fpu
);
7207 if (vcpu
->sigset_active
)
7208 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
7210 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
7211 kvm_vcpu_block(vcpu
);
7212 kvm_apic_accept_events(vcpu
);
7213 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
7218 /* re-sync apic's tpr */
7219 if (!lapic_in_kernel(vcpu
)) {
7220 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
7226 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
7227 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
7228 vcpu
->arch
.complete_userspace_io
= NULL
;
7233 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
7235 if (kvm_run
->immediate_exit
)
7241 post_kvm_run_save(vcpu
);
7242 if (vcpu
->sigset_active
)
7243 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
7248 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7250 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
7252 * We are here if userspace calls get_regs() in the middle of
7253 * instruction emulation. Registers state needs to be copied
7254 * back from emulation context to vcpu. Userspace shouldn't do
7255 * that usually, but some bad designed PV devices (vmware
7256 * backdoor interface) need this to work
7258 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
7259 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7261 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
7262 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
7263 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
7264 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
7265 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
7266 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
7267 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
7268 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
7269 #ifdef CONFIG_X86_64
7270 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
7271 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
7272 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
7273 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
7274 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
7275 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
7276 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
7277 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
7280 regs
->rip
= kvm_rip_read(vcpu
);
7281 regs
->rflags
= kvm_get_rflags(vcpu
);
7286 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7288 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
7289 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7291 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
7292 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
7293 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
7294 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
7295 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
7296 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
7297 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
7298 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
7299 #ifdef CONFIG_X86_64
7300 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
7301 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
7302 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
7303 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
7304 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
7305 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
7306 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
7307 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
7310 kvm_rip_write(vcpu
, regs
->rip
);
7311 kvm_set_rflags(vcpu
, regs
->rflags
);
7313 vcpu
->arch
.exception
.pending
= false;
7315 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7320 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
7322 struct kvm_segment cs
;
7324 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7328 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
7330 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
7331 struct kvm_sregs
*sregs
)
7335 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7336 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7337 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7338 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7339 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7340 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7342 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7343 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7345 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7346 sregs
->idt
.limit
= dt
.size
;
7347 sregs
->idt
.base
= dt
.address
;
7348 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7349 sregs
->gdt
.limit
= dt
.size
;
7350 sregs
->gdt
.base
= dt
.address
;
7352 sregs
->cr0
= kvm_read_cr0(vcpu
);
7353 sregs
->cr2
= vcpu
->arch
.cr2
;
7354 sregs
->cr3
= kvm_read_cr3(vcpu
);
7355 sregs
->cr4
= kvm_read_cr4(vcpu
);
7356 sregs
->cr8
= kvm_get_cr8(vcpu
);
7357 sregs
->efer
= vcpu
->arch
.efer
;
7358 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
7360 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
7362 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
7363 set_bit(vcpu
->arch
.interrupt
.nr
,
7364 (unsigned long *)sregs
->interrupt_bitmap
);
7369 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7370 struct kvm_mp_state
*mp_state
)
7372 kvm_apic_accept_events(vcpu
);
7373 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7374 vcpu
->arch
.pv
.pv_unhalted
)
7375 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7377 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7382 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7383 struct kvm_mp_state
*mp_state
)
7385 if (!lapic_in_kernel(vcpu
) &&
7386 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7389 /* INITs are latched while in SMM */
7390 if ((is_smm(vcpu
) || vcpu
->arch
.smi_pending
) &&
7391 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
7392 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
7395 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7396 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7397 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7399 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7400 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7404 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7405 int reason
, bool has_error_code
, u32 error_code
)
7407 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7410 init_emulate_ctxt(vcpu
);
7412 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7413 has_error_code
, error_code
);
7416 return EMULATE_FAIL
;
7418 kvm_rip_write(vcpu
, ctxt
->eip
);
7419 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7420 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7421 return EMULATE_DONE
;
7423 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7425 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
7426 struct kvm_sregs
*sregs
)
7428 struct msr_data apic_base_msr
;
7429 int mmu_reset_needed
= 0;
7430 int pending_vec
, max_bits
, idx
;
7433 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
7436 dt
.size
= sregs
->idt
.limit
;
7437 dt
.address
= sregs
->idt
.base
;
7438 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7439 dt
.size
= sregs
->gdt
.limit
;
7440 dt
.address
= sregs
->gdt
.base
;
7441 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
7443 vcpu
->arch
.cr2
= sregs
->cr2
;
7444 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
7445 vcpu
->arch
.cr3
= sregs
->cr3
;
7446 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
7448 kvm_set_cr8(vcpu
, sregs
->cr8
);
7450 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
7451 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
7452 apic_base_msr
.data
= sregs
->apic_base
;
7453 apic_base_msr
.host_initiated
= true;
7454 kvm_set_apic_base(vcpu
, &apic_base_msr
);
7456 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
7457 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
7458 vcpu
->arch
.cr0
= sregs
->cr0
;
7460 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
7461 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
7462 if (sregs
->cr4
& (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
7463 kvm_update_cpuid(vcpu
);
7465 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7466 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
7467 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
7468 mmu_reset_needed
= 1;
7470 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7472 if (mmu_reset_needed
)
7473 kvm_mmu_reset_context(vcpu
);
7475 max_bits
= KVM_NR_INTERRUPTS
;
7476 pending_vec
= find_first_bit(
7477 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
7478 if (pending_vec
< max_bits
) {
7479 kvm_queue_interrupt(vcpu
, pending_vec
, false);
7480 pr_debug("Set back pending irq %d\n", pending_vec
);
7483 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7484 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7485 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7486 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7487 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7488 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7490 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7491 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7493 update_cr8_intercept(vcpu
);
7495 /* Older userspace won't unhalt the vcpu on reset. */
7496 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
7497 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
7499 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7501 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7506 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
7507 struct kvm_guest_debug
*dbg
)
7509 unsigned long rflags
;
7512 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
7514 if (vcpu
->arch
.exception
.pending
)
7516 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
7517 kvm_queue_exception(vcpu
, DB_VECTOR
);
7519 kvm_queue_exception(vcpu
, BP_VECTOR
);
7523 * Read rflags as long as potentially injected trace flags are still
7526 rflags
= kvm_get_rflags(vcpu
);
7528 vcpu
->guest_debug
= dbg
->control
;
7529 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7530 vcpu
->guest_debug
= 0;
7532 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7533 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7534 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7535 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7537 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7538 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7540 kvm_update_dr7(vcpu
);
7542 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7543 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7544 get_segment_base(vcpu
, VCPU_SREG_CS
);
7547 * Trigger an rflags update that will inject or remove the trace
7550 kvm_set_rflags(vcpu
, rflags
);
7552 kvm_x86_ops
->update_bp_intercept(vcpu
);
7562 * Translate a guest virtual address to a guest physical address.
7564 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7565 struct kvm_translation
*tr
)
7567 unsigned long vaddr
= tr
->linear_address
;
7571 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7572 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7573 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7574 tr
->physical_address
= gpa
;
7575 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7582 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7584 struct fxregs_state
*fxsave
=
7585 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7587 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7588 fpu
->fcw
= fxsave
->cwd
;
7589 fpu
->fsw
= fxsave
->swd
;
7590 fpu
->ftwx
= fxsave
->twd
;
7591 fpu
->last_opcode
= fxsave
->fop
;
7592 fpu
->last_ip
= fxsave
->rip
;
7593 fpu
->last_dp
= fxsave
->rdp
;
7594 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7599 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7601 struct fxregs_state
*fxsave
=
7602 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7604 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7605 fxsave
->cwd
= fpu
->fcw
;
7606 fxsave
->swd
= fpu
->fsw
;
7607 fxsave
->twd
= fpu
->ftwx
;
7608 fxsave
->fop
= fpu
->last_opcode
;
7609 fxsave
->rip
= fpu
->last_ip
;
7610 fxsave
->rdp
= fpu
->last_dp
;
7611 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7616 static void fx_init(struct kvm_vcpu
*vcpu
)
7618 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7619 if (boot_cpu_has(X86_FEATURE_XSAVES
))
7620 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7621 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7624 * Ensure guest xcr0 is valid for loading
7626 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
7628 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7631 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7633 if (vcpu
->guest_fpu_loaded
)
7637 * Restore all possible states in the guest,
7638 * and assume host would use all available bits.
7639 * Guest xcr0 would be loaded later.
7641 vcpu
->guest_fpu_loaded
= 1;
7642 __kernel_fpu_begin();
7643 /* PKRU is separately restored in kvm_x86_ops->run. */
7644 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
,
7645 ~XFEATURE_MASK_PKRU
);
7649 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7651 if (!vcpu
->guest_fpu_loaded
)
7654 vcpu
->guest_fpu_loaded
= 0;
7655 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7657 ++vcpu
->stat
.fpu_reload
;
7661 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7663 void *wbinvd_dirty_mask
= vcpu
->arch
.wbinvd_dirty_mask
;
7665 kvmclock_reset(vcpu
);
7667 kvm_x86_ops
->vcpu_free(vcpu
);
7668 free_cpumask_var(wbinvd_dirty_mask
);
7671 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7674 struct kvm_vcpu
*vcpu
;
7676 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7677 printk_once(KERN_WARNING
7678 "kvm: SMP vm created on host with unstable TSC; "
7679 "guest TSC will not be reliable\n");
7681 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7686 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7690 kvm_vcpu_mtrr_init(vcpu
);
7691 r
= vcpu_load(vcpu
);
7694 kvm_vcpu_reset(vcpu
, false);
7695 kvm_mmu_setup(vcpu
);
7700 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7702 struct msr_data msr
;
7703 struct kvm
*kvm
= vcpu
->kvm
;
7705 kvm_hv_vcpu_postcreate(vcpu
);
7707 if (vcpu_load(vcpu
))
7710 msr
.index
= MSR_IA32_TSC
;
7711 msr
.host_initiated
= true;
7712 kvm_write_tsc(vcpu
, &msr
);
7715 if (!kvmclock_periodic_sync
)
7718 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7719 KVMCLOCK_SYNC_PERIOD
);
7722 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7725 vcpu
->arch
.apf
.msr_val
= 0;
7727 r
= vcpu_load(vcpu
);
7729 kvm_mmu_unload(vcpu
);
7732 kvm_x86_ops
->vcpu_free(vcpu
);
7735 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
7737 vcpu
->arch
.hflags
= 0;
7739 vcpu
->arch
.smi_pending
= 0;
7740 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7741 vcpu
->arch
.nmi_pending
= 0;
7742 vcpu
->arch
.nmi_injected
= false;
7743 kvm_clear_interrupt_queue(vcpu
);
7744 kvm_clear_exception_queue(vcpu
);
7746 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7747 kvm_update_dr0123(vcpu
);
7748 vcpu
->arch
.dr6
= DR6_INIT
;
7749 kvm_update_dr6(vcpu
);
7750 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7751 kvm_update_dr7(vcpu
);
7755 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7756 vcpu
->arch
.apf
.msr_val
= 0;
7757 vcpu
->arch
.st
.msr_val
= 0;
7759 kvmclock_reset(vcpu
);
7761 kvm_clear_async_pf_completion_queue(vcpu
);
7762 kvm_async_pf_hash_reset(vcpu
);
7763 vcpu
->arch
.apf
.halted
= false;
7766 kvm_pmu_reset(vcpu
);
7767 vcpu
->arch
.smbase
= 0x30000;
7769 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
7770 vcpu
->arch
.msr_misc_features_enables
= 0;
7773 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7774 vcpu
->arch
.regs_avail
= ~0;
7775 vcpu
->arch
.regs_dirty
= ~0;
7777 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
7780 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7782 struct kvm_segment cs
;
7784 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7785 cs
.selector
= vector
<< 8;
7786 cs
.base
= vector
<< 12;
7787 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7788 kvm_rip_write(vcpu
, 0);
7791 int kvm_arch_hardware_enable(void)
7794 struct kvm_vcpu
*vcpu
;
7799 bool stable
, backwards_tsc
= false;
7801 kvm_shared_msr_cpu_online();
7802 ret
= kvm_x86_ops
->hardware_enable();
7806 local_tsc
= rdtsc();
7807 stable
= !check_tsc_unstable();
7808 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7809 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7810 if (!stable
&& vcpu
->cpu
== smp_processor_id())
7811 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7812 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
7813 backwards_tsc
= true;
7814 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
7815 max_tsc
= vcpu
->arch
.last_host_tsc
;
7821 * Sometimes, even reliable TSCs go backwards. This happens on
7822 * platforms that reset TSC during suspend or hibernate actions, but
7823 * maintain synchronization. We must compensate. Fortunately, we can
7824 * detect that condition here, which happens early in CPU bringup,
7825 * before any KVM threads can be running. Unfortunately, we can't
7826 * bring the TSCs fully up to date with real time, as we aren't yet far
7827 * enough into CPU bringup that we know how much real time has actually
7828 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7829 * variables that haven't been updated yet.
7831 * So we simply find the maximum observed TSC above, then record the
7832 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7833 * the adjustment will be applied. Note that we accumulate
7834 * adjustments, in case multiple suspend cycles happen before some VCPU
7835 * gets a chance to run again. In the event that no KVM threads get a
7836 * chance to run, we will miss the entire elapsed period, as we'll have
7837 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7838 * loose cycle time. This isn't too big a deal, since the loss will be
7839 * uniform across all VCPUs (not to mention the scenario is extremely
7840 * unlikely). It is possible that a second hibernate recovery happens
7841 * much faster than a first, causing the observed TSC here to be
7842 * smaller; this would require additional padding adjustment, which is
7843 * why we set last_host_tsc to the local tsc observed here.
7845 * N.B. - this code below runs only on platforms with reliable TSC,
7846 * as that is the only way backwards_tsc is set above. Also note
7847 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7848 * have the same delta_cyc adjustment applied if backwards_tsc
7849 * is detected. Note further, this adjustment is only done once,
7850 * as we reset last_host_tsc on all VCPUs to stop this from being
7851 * called multiple times (one for each physical CPU bringup).
7853 * Platforms with unreliable TSCs don't have to deal with this, they
7854 * will be compensated by the logic in vcpu_load, which sets the TSC to
7855 * catchup mode. This will catchup all VCPUs to real time, but cannot
7856 * guarantee that they stay in perfect synchronization.
7858 if (backwards_tsc
) {
7859 u64 delta_cyc
= max_tsc
- local_tsc
;
7860 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7861 kvm
->arch
.backwards_tsc_observed
= true;
7862 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7863 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7864 vcpu
->arch
.last_host_tsc
= local_tsc
;
7865 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7869 * We have to disable TSC offset matching.. if you were
7870 * booting a VM while issuing an S4 host suspend....
7871 * you may have some problem. Solving this issue is
7872 * left as an exercise to the reader.
7874 kvm
->arch
.last_tsc_nsec
= 0;
7875 kvm
->arch
.last_tsc_write
= 0;
7882 void kvm_arch_hardware_disable(void)
7884 kvm_x86_ops
->hardware_disable();
7885 drop_user_return_notifiers();
7888 int kvm_arch_hardware_setup(void)
7892 r
= kvm_x86_ops
->hardware_setup();
7896 if (kvm_has_tsc_control
) {
7898 * Make sure the user can only configure tsc_khz values that
7899 * fit into a signed integer.
7900 * A min value is not calculated needed because it will always
7901 * be 1 on all machines.
7903 u64 max
= min(0x7fffffffULL
,
7904 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
7905 kvm_max_guest_tsc_khz
= max
;
7907 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
7910 kvm_init_msr_list();
7914 void kvm_arch_hardware_unsetup(void)
7916 kvm_x86_ops
->hardware_unsetup();
7919 void kvm_arch_check_processor_compat(void *rtn
)
7921 kvm_x86_ops
->check_processor_compatibility(rtn
);
7924 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
7926 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
7928 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
7930 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
7932 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
7935 struct static_key kvm_no_apic_vcpu __read_mostly
;
7936 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
7938 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
7944 BUG_ON(vcpu
->kvm
== NULL
);
7947 vcpu
->arch
.apicv_active
= kvm_x86_ops
->get_enable_apicv();
7948 vcpu
->arch
.pv
.pv_unhalted
= false;
7949 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
7950 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
7951 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7953 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
7955 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
7960 vcpu
->arch
.pio_data
= page_address(page
);
7962 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
7964 r
= kvm_mmu_create(vcpu
);
7966 goto fail_free_pio_data
;
7968 if (irqchip_in_kernel(kvm
)) {
7969 r
= kvm_create_lapic(vcpu
);
7971 goto fail_mmu_destroy
;
7973 static_key_slow_inc(&kvm_no_apic_vcpu
);
7975 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
7977 if (!vcpu
->arch
.mce_banks
) {
7979 goto fail_free_lapic
;
7981 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
7983 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
7985 goto fail_free_mce_banks
;
7990 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
7991 vcpu
->arch
.pv_time_enabled
= false;
7993 vcpu
->arch
.guest_supported_xcr0
= 0;
7994 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
7996 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
7998 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
8000 kvm_async_pf_hash_reset(vcpu
);
8003 vcpu
->arch
.pending_external_vector
= -1;
8005 kvm_hv_vcpu_init(vcpu
);
8009 fail_free_mce_banks
:
8010 kfree(vcpu
->arch
.mce_banks
);
8012 kvm_free_lapic(vcpu
);
8014 kvm_mmu_destroy(vcpu
);
8016 free_page((unsigned long)vcpu
->arch
.pio_data
);
8021 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
8025 kvm_hv_vcpu_uninit(vcpu
);
8026 kvm_pmu_destroy(vcpu
);
8027 kfree(vcpu
->arch
.mce_banks
);
8028 kvm_free_lapic(vcpu
);
8029 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8030 kvm_mmu_destroy(vcpu
);
8031 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
8032 free_page((unsigned long)vcpu
->arch
.pio_data
);
8033 if (!lapic_in_kernel(vcpu
))
8034 static_key_slow_dec(&kvm_no_apic_vcpu
);
8037 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
8039 kvm_x86_ops
->sched_in(vcpu
, cpu
);
8042 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
8047 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
8048 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
8049 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
8050 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
8051 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
8053 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8054 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
8055 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8056 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
8057 &kvm
->arch
.irq_sources_bitmap
);
8059 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
8060 mutex_init(&kvm
->arch
.apic_map_lock
);
8061 mutex_init(&kvm
->arch
.hyperv
.hv_lock
);
8062 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
8064 kvm
->arch
.kvmclock_offset
= -ktime_get_boot_ns();
8065 pvclock_update_vm_gtod_copy(kvm
);
8067 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
8068 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
8070 kvm_page_track_init(kvm
);
8071 kvm_mmu_init_vm(kvm
);
8073 if (kvm_x86_ops
->vm_init
)
8074 return kvm_x86_ops
->vm_init(kvm
);
8079 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
8082 r
= vcpu_load(vcpu
);
8084 kvm_mmu_unload(vcpu
);
8088 static void kvm_free_vcpus(struct kvm
*kvm
)
8091 struct kvm_vcpu
*vcpu
;
8094 * Unpin any mmu pages first.
8096 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8097 kvm_clear_async_pf_completion_queue(vcpu
);
8098 kvm_unload_vcpu_mmu(vcpu
);
8100 kvm_for_each_vcpu(i
, vcpu
, kvm
)
8101 kvm_arch_vcpu_free(vcpu
);
8103 mutex_lock(&kvm
->lock
);
8104 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
8105 kvm
->vcpus
[i
] = NULL
;
8107 atomic_set(&kvm
->online_vcpus
, 0);
8108 mutex_unlock(&kvm
->lock
);
8111 void kvm_arch_sync_events(struct kvm
*kvm
)
8113 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
8114 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
8118 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8122 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
8123 struct kvm_memory_slot
*slot
, old
;
8125 /* Called with kvm->slots_lock held. */
8126 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
8129 slot
= id_to_memslot(slots
, id
);
8135 * MAP_SHARED to prevent internal slot pages from being moved
8138 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
8139 MAP_SHARED
| MAP_ANONYMOUS
, 0);
8140 if (IS_ERR((void *)hva
))
8141 return PTR_ERR((void *)hva
);
8150 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
8151 struct kvm_userspace_memory_region m
;
8153 m
.slot
= id
| (i
<< 16);
8155 m
.guest_phys_addr
= gpa
;
8156 m
.userspace_addr
= hva
;
8157 m
.memory_size
= size
;
8158 r
= __kvm_set_memory_region(kvm
, &m
);
8164 r
= vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
8170 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
8172 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8176 mutex_lock(&kvm
->slots_lock
);
8177 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
8178 mutex_unlock(&kvm
->slots_lock
);
8182 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
8184 void kvm_arch_destroy_vm(struct kvm
*kvm
)
8186 if (current
->mm
== kvm
->mm
) {
8188 * Free memory regions allocated on behalf of userspace,
8189 * unless the the memory map has changed due to process exit
8192 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
8193 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
8194 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
8196 if (kvm_x86_ops
->vm_destroy
)
8197 kvm_x86_ops
->vm_destroy(kvm
);
8198 kvm_pic_destroy(kvm
);
8199 kvm_ioapic_destroy(kvm
);
8200 kvm_free_vcpus(kvm
);
8201 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
8202 kvm_mmu_uninit_vm(kvm
);
8203 kvm_page_track_cleanup(kvm
);
8206 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
8207 struct kvm_memory_slot
*dont
)
8211 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8212 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
8213 kvfree(free
->arch
.rmap
[i
]);
8214 free
->arch
.rmap
[i
] = NULL
;
8219 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
8220 dont
->arch
.lpage_info
[i
- 1]) {
8221 kvfree(free
->arch
.lpage_info
[i
- 1]);
8222 free
->arch
.lpage_info
[i
- 1] = NULL
;
8226 kvm_page_track_free_memslot(free
, dont
);
8229 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
8230 unsigned long npages
)
8234 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8235 struct kvm_lpage_info
*linfo
;
8240 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
8241 slot
->base_gfn
, level
) + 1;
8243 slot
->arch
.rmap
[i
] =
8244 kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]), GFP_KERNEL
);
8245 if (!slot
->arch
.rmap
[i
])
8250 linfo
= kvzalloc(lpages
* sizeof(*linfo
), GFP_KERNEL
);
8254 slot
->arch
.lpage_info
[i
- 1] = linfo
;
8256 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
8257 linfo
[0].disallow_lpage
= 1;
8258 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
8259 linfo
[lpages
- 1].disallow_lpage
= 1;
8260 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
8262 * If the gfn and userspace address are not aligned wrt each
8263 * other, or if explicitly asked to, disable large page
8264 * support for this slot
8266 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
8267 !kvm_largepages_enabled()) {
8270 for (j
= 0; j
< lpages
; ++j
)
8271 linfo
[j
].disallow_lpage
= 1;
8275 if (kvm_page_track_create_memslot(slot
, npages
))
8281 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8282 kvfree(slot
->arch
.rmap
[i
]);
8283 slot
->arch
.rmap
[i
] = NULL
;
8287 kvfree(slot
->arch
.lpage_info
[i
- 1]);
8288 slot
->arch
.lpage_info
[i
- 1] = NULL
;
8293 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
8296 * memslots->generation has been incremented.
8297 * mmio generation may have reached its maximum value.
8299 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
8302 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
8303 struct kvm_memory_slot
*memslot
,
8304 const struct kvm_userspace_memory_region
*mem
,
8305 enum kvm_mr_change change
)
8310 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
8311 struct kvm_memory_slot
*new)
8313 /* Still write protect RO slot */
8314 if (new->flags
& KVM_MEM_READONLY
) {
8315 kvm_mmu_slot_remove_write_access(kvm
, new);
8320 * Call kvm_x86_ops dirty logging hooks when they are valid.
8322 * kvm_x86_ops->slot_disable_log_dirty is called when:
8324 * - KVM_MR_CREATE with dirty logging is disabled
8325 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8327 * The reason is, in case of PML, we need to set D-bit for any slots
8328 * with dirty logging disabled in order to eliminate unnecessary GPA
8329 * logging in PML buffer (and potential PML buffer full VMEXT). This
8330 * guarantees leaving PML enabled during guest's lifetime won't have
8331 * any additonal overhead from PML when guest is running with dirty
8332 * logging disabled for memory slots.
8334 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8335 * to dirty logging mode.
8337 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8339 * In case of write protect:
8341 * Write protect all pages for dirty logging.
8343 * All the sptes including the large sptes which point to this
8344 * slot are set to readonly. We can not create any new large
8345 * spte on this slot until the end of the logging.
8347 * See the comments in fast_page_fault().
8349 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
8350 if (kvm_x86_ops
->slot_enable_log_dirty
)
8351 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
8353 kvm_mmu_slot_remove_write_access(kvm
, new);
8355 if (kvm_x86_ops
->slot_disable_log_dirty
)
8356 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
8360 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
8361 const struct kvm_userspace_memory_region
*mem
,
8362 const struct kvm_memory_slot
*old
,
8363 const struct kvm_memory_slot
*new,
8364 enum kvm_mr_change change
)
8366 int nr_mmu_pages
= 0;
8368 if (!kvm
->arch
.n_requested_mmu_pages
)
8369 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
8372 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
8375 * Dirty logging tracks sptes in 4k granularity, meaning that large
8376 * sptes have to be split. If live migration is successful, the guest
8377 * in the source machine will be destroyed and large sptes will be
8378 * created in the destination. However, if the guest continues to run
8379 * in the source machine (for example if live migration fails), small
8380 * sptes will remain around and cause bad performance.
8382 * Scan sptes if dirty logging has been stopped, dropping those
8383 * which can be collapsed into a single large-page spte. Later
8384 * page faults will create the large-page sptes.
8386 if ((change
!= KVM_MR_DELETE
) &&
8387 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
8388 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
8389 kvm_mmu_zap_collapsible_sptes(kvm
, new);
8392 * Set up write protection and/or dirty logging for the new slot.
8394 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8395 * been zapped so no dirty logging staff is needed for old slot. For
8396 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8397 * new and it's also covered when dealing with the new slot.
8399 * FIXME: const-ify all uses of struct kvm_memory_slot.
8401 if (change
!= KVM_MR_DELETE
)
8402 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
8405 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
8407 kvm_mmu_invalidate_zap_all_pages(kvm
);
8410 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
8411 struct kvm_memory_slot
*slot
)
8413 kvm_page_track_flush_slot(kvm
, slot
);
8416 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
8418 if (!list_empty_careful(&vcpu
->async_pf
.done
))
8421 if (kvm_apic_has_events(vcpu
))
8424 if (vcpu
->arch
.pv
.pv_unhalted
)
8427 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
8428 (vcpu
->arch
.nmi_pending
&&
8429 kvm_x86_ops
->nmi_allowed(vcpu
)))
8432 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
8433 (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)))
8436 if (kvm_arch_interrupt_allowed(vcpu
) &&
8437 kvm_cpu_has_interrupt(vcpu
))
8440 if (kvm_hv_has_stimer_pending(vcpu
))
8446 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
8448 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
8451 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
8453 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
8456 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
8458 return kvm_x86_ops
->interrupt_allowed(vcpu
);
8461 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
8463 if (is_64_bit_mode(vcpu
))
8464 return kvm_rip_read(vcpu
);
8465 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
8466 kvm_rip_read(vcpu
));
8468 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
8470 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
8472 return kvm_get_linear_rip(vcpu
) == linear_rip
;
8474 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
8476 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
8478 unsigned long rflags
;
8480 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
8481 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8482 rflags
&= ~X86_EFLAGS_TF
;
8485 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
8487 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8489 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
8490 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
8491 rflags
|= X86_EFLAGS_TF
;
8492 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
8495 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8497 __kvm_set_rflags(vcpu
, rflags
);
8498 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8500 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
8502 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
8506 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
8510 r
= kvm_mmu_reload(vcpu
);
8514 if (!vcpu
->arch
.mmu
.direct_map
&&
8515 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
8518 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
8521 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
8523 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
8526 static inline u32
kvm_async_pf_next_probe(u32 key
)
8528 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
8531 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8533 u32 key
= kvm_async_pf_hash_fn(gfn
);
8535 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
8536 key
= kvm_async_pf_next_probe(key
);
8538 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
8541 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8544 u32 key
= kvm_async_pf_hash_fn(gfn
);
8546 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
8547 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
8548 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
8549 key
= kvm_async_pf_next_probe(key
);
8554 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8556 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8559 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8563 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8565 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8567 j
= kvm_async_pf_next_probe(j
);
8568 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8570 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8572 * k lies cyclically in ]i,j]
8574 * |....j i.k.| or |.k..j i...|
8576 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8577 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8582 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8585 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8589 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8590 struct kvm_async_pf
*work
)
8592 struct x86_exception fault
;
8594 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8595 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8597 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8598 (vcpu
->arch
.apf
.send_user_only
&&
8599 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8600 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8601 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8602 fault
.vector
= PF_VECTOR
;
8603 fault
.error_code_valid
= true;
8604 fault
.error_code
= 0;
8605 fault
.nested_page_fault
= false;
8606 fault
.address
= work
->arch
.token
;
8607 fault
.async_page_fault
= true;
8608 kvm_inject_page_fault(vcpu
, &fault
);
8612 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8613 struct kvm_async_pf
*work
)
8615 struct x86_exception fault
;
8617 if (work
->wakeup_all
)
8618 work
->arch
.token
= ~0; /* broadcast wakeup */
8620 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8621 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8623 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
8624 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8625 fault
.vector
= PF_VECTOR
;
8626 fault
.error_code_valid
= true;
8627 fault
.error_code
= 0;
8628 fault
.nested_page_fault
= false;
8629 fault
.address
= work
->arch
.token
;
8630 fault
.async_page_fault
= true;
8631 kvm_inject_page_fault(vcpu
, &fault
);
8633 vcpu
->arch
.apf
.halted
= false;
8634 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8637 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8639 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
8642 return kvm_can_do_async_pf(vcpu
);
8645 void kvm_arch_start_assignment(struct kvm
*kvm
)
8647 atomic_inc(&kvm
->arch
.assigned_device_count
);
8649 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
8651 void kvm_arch_end_assignment(struct kvm
*kvm
)
8653 atomic_dec(&kvm
->arch
.assigned_device_count
);
8655 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
8657 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
8659 return atomic_read(&kvm
->arch
.assigned_device_count
);
8661 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
8663 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8665 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8667 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8669 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8671 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8673 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8675 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8677 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8679 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8681 bool kvm_arch_has_irq_bypass(void)
8683 return kvm_x86_ops
->update_pi_irte
!= NULL
;
8686 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
8687 struct irq_bypass_producer
*prod
)
8689 struct kvm_kernel_irqfd
*irqfd
=
8690 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8692 irqfd
->producer
= prod
;
8694 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
8695 prod
->irq
, irqfd
->gsi
, 1);
8698 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
8699 struct irq_bypass_producer
*prod
)
8702 struct kvm_kernel_irqfd
*irqfd
=
8703 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8705 WARN_ON(irqfd
->producer
!= prod
);
8706 irqfd
->producer
= NULL
;
8709 * When producer of consumer is unregistered, we change back to
8710 * remapped mode, so we can re-use the current implementation
8711 * when the irq is masked/disabled or the consumer side (KVM
8712 * int this case doesn't want to receive the interrupts.
8714 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
8716 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
8717 " fails: %d\n", irqfd
->consumer
.token
, ret
);
8720 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
8721 uint32_t guest_irq
, bool set
)
8723 if (!kvm_x86_ops
->update_pi_irte
)
8726 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
8729 bool kvm_vector_hashing_enabled(void)
8731 return vector_hashing
;
8733 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled
);
8735 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
8736 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
8737 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
8738 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
8739 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
8740 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
8741 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
8742 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
8743 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
8744 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
8745 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
8746 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
8747 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
8748 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
8749 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
8750 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
8751 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
8752 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
8753 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);