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1 /*
2 * ccio-rm-dma.c:
3 * DMA management routines for first generation cache-coherent machines.
4 * "Real Mode" operation refers to U2/Uturn chip operation. The chip
5 * can perform coherency checks w/o using the I/O MMU. That's all we
6 * need until support for more than 4GB phys mem is needed.
7 *
8 * This is the trivial case - basically what x86 does.
9 *
10 * Drawbacks of using Real Mode are:
11 * o outbound DMA is slower since one isn't using the prefetching
12 * U2 can do for outbound DMA.
13 * o Ability to do scatter/gather in HW is also lost.
14 * o only known to work with PCX-W processor. (eg C360)
15 * (PCX-U/U+ are not coherent with U2 in real mode.)
16 *
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 *
24 * Original version/author:
25 * CVSROOT=:pserver:anonymous@198.186.203.37:/cvsroot/linux-parisc
26 * cvs -z3 co linux/arch/parisc/kernel/dma-rm.c
27 *
28 * (C) Copyright 2000 Philipp Rumpf <prumpf@tux.org>
29 *
30 *
31 * Adopted for The Puffin Group's parisc-linux port by Grant Grundler.
32 * (C) Copyright 2000 Grant Grundler <grundler@puffin.external.hp.com>
33 *
34 */
35
36 #include <linux/types.h>
37 #include <linux/init.h>
38 #include <linux/mm.h>
39 #include <linux/string.h>
40 #include <linux/pci.h>
41 #include <linux/gfp.h>
42
43 #include <linux/uaccess.h>
44
45 #include <asm/io.h>
46 #include <asm/hardware.h>
47 #include <asm/page.h>
48
49 /* Only chose "ccio" since that's what HP-UX calls it....
50 ** Make it easier for folks to migrate from one to the other :^)
51 */
52 #define MODULE_NAME "ccio"
53
54 #define U2_IOA_RUNWAY 0x580
55 #define U2_BC_GSC 0x501
56 #define UTURN_IOA_RUNWAY 0x581
57 #define UTURN_BC_GSC 0x502
58
59 #define IS_U2(id) ( \
60 (((id)->hw_type == HPHW_IOA) && ((id)->hversion == U2_IOA_RUNWAY)) || \
61 (((id)->hw_type == HPHW_BCPORT) && ((id)->hversion == U2_BC_GSC)) \
62 )
63
64 #define IS_UTURN(id) ( \
65 (((id)->hw_type == HPHW_IOA) && ((id)->hversion == UTURN_IOA_RUNWAY)) || \
66 (((id)->hw_type == HPHW_BCPORT) && ((id)->hversion == UTURN_BC_GSC)) \
67 )
68
69 static int ccio_dma_supported( struct pci_dev *dev, u64 mask)
70 {
71 if (dev == NULL) {
72 printk(KERN_ERR MODULE_NAME ": EISA/ISA/et al not supported\n");
73 BUG();
74 return(0);
75 }
76
77 /* only support 32-bit devices (ie PCI/GSC) */
78 return((int) (mask >= 0xffffffffUL));
79 }
80
81
82 static void *ccio_alloc_consistent(struct pci_dev *dev, size_t size,
83 dma_addr_t *handle)
84 {
85 void *ret;
86
87 ret = (void *)__get_free_pages(GFP_ATOMIC, get_order(size));
88
89 if (ret != NULL) {
90 memset(ret, 0, size);
91 *handle = virt_to_phys(ret);
92 }
93 return ret;
94 }
95
96 static void ccio_free_consistent(struct pci_dev *dev, size_t size,
97 void *vaddr, dma_addr_t handle)
98 {
99 free_pages((unsigned long)vaddr, get_order(size));
100 }
101
102 static dma_addr_t ccio_map_single(struct pci_dev *dev, void *ptr, size_t size,
103 int direction)
104 {
105 return virt_to_phys(ptr);
106 }
107
108 static void ccio_unmap_single(struct pci_dev *dev, dma_addr_t dma_addr,
109 size_t size, int direction)
110 {
111 /* Nothing to do */
112 }
113
114
115 static int ccio_map_sg(struct pci_dev *dev, struct scatterlist *sglist, int nents, int direction)
116 {
117 int tmp = nents;
118
119 /* KISS: map each buffer separately. */
120 while (nents) {
121 sg_dma_address(sglist) = ccio_map_single(dev, sglist->address, sglist->length, direction);
122 sg_dma_len(sglist) = sglist->length;
123 nents--;
124 sglist++;
125 }
126
127 return tmp;
128 }
129
130
131 static void ccio_unmap_sg(struct pci_dev *dev, struct scatterlist *sglist, int nents, int direction)
132 {
133 #if 0
134 while (nents) {
135 ccio_unmap_single(dev, sg_dma_address(sglist), sg_dma_len(sglist), direction);
136 nents--;
137 sglist++;
138 }
139 return;
140 #else
141 /* Do nothing (copied from current ccio_unmap_single() :^) */
142 #endif
143 }
144
145
146 static struct pci_dma_ops ccio_ops = {
147 ccio_dma_supported,
148 ccio_alloc_consistent,
149 ccio_free_consistent,
150 ccio_map_single,
151 ccio_unmap_single,
152 ccio_map_sg,
153 ccio_unmap_sg,
154 NULL, /* dma_sync_single_for_cpu : NOP for U2 */
155 NULL, /* dma_sync_single_for_device : NOP for U2 */
156 NULL, /* dma_sync_sg_for_cpu : ditto */
157 NULL, /* dma_sync_sg_for_device : ditto */
158 };
159
160
161 /*
162 ** Determine if u2 should claim this chip (return 0) or not (return 1).
163 ** If so, initialize the chip and tell other partners in crime they
164 ** have work to do.
165 */
166 static int
167 ccio_probe(struct parisc_device *dev)
168 {
169 printk(KERN_INFO "%s found %s at 0x%lx\n", MODULE_NAME,
170 dev->id.hversion == U2_BC_GSC ? "U2" : "UTurn",
171 dev->hpa.start);
172
173 /*
174 ** FIXME - should check U2 registers to verify it's really running
175 ** in "Real Mode".
176 */
177
178 #if 0
179 /* will need this for "Virtual Mode" operation */
180 ccio_hw_init(ccio_dev);
181 ccio_common_init(ccio_dev);
182 #endif
183 hppa_dma_ops = &ccio_ops;
184 return 0;
185 }
186
187 static struct parisc_device_id ccio_tbl[] = {
188 { HPHW_BCPORT, HVERSION_REV_ANY_ID, U2_BC_GSC, 0xc },
189 { HPHW_BCPORT, HVERSION_REV_ANY_ID, UTURN_BC_GSC, 0xc },
190 { 0, }
191 };
192
193 static struct parisc_driver ccio_driver = {
194 .name = "U2/Uturn",
195 .id_table = ccio_tbl,
196 .probe = ccio_probe,
197 };
198
199 void __init ccio_init(void)
200 {
201 register_parisc_driver(&ccio_driver);
202 }