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1 /*
2 * NCR 5380 generic driver routines. These should make it *trivial*
3 * to implement 5380 SCSI drivers under Linux with a non-trantor
4 * architecture.
5 *
6 * Note that these routines also work with NR53c400 family chips.
7 *
8 * Copyright 1993, Drew Eckhardt
9 * Visionary Computing
10 * (Unix and Linux consulting and custom programming)
11 * drew@colorado.edu
12 * +1 (303) 666-5836
13 *
14 * For more information, please consult
15 *
16 * NCR 5380 Family
17 * SCSI Protocol Controller
18 * Databook
19 *
20 * NCR Microelectronics
21 * 1635 Aeroplaza Drive
22 * Colorado Springs, CO 80916
23 * 1+ (719) 578-3400
24 * 1+ (800) 334-5454
25 */
26
27 /*
28 * With contributions from Ray Van Tassle, Ingmar Baumgart,
29 * Ronald van Cuijlenborg, Alan Cox and others.
30 */
31
32 /* Ported to Atari by Roman Hodek and others. */
33
34 /* Adapted for the Sun 3 by Sam Creasey. */
35
36 /*
37 * Design
38 *
39 * This is a generic 5380 driver. To use it on a different platform,
40 * one simply writes appropriate system specific macros (ie, data
41 * transfer - some PC's will use the I/O bus, 68K's must use
42 * memory mapped) and drops this file in their 'C' wrapper.
43 *
44 * As far as command queueing, two queues are maintained for
45 * each 5380 in the system - commands that haven't been issued yet,
46 * and commands that are currently executing. This means that an
47 * unlimited number of commands may be queued, letting
48 * more commands propagate from the higher driver levels giving higher
49 * throughput. Note that both I_T_L and I_T_L_Q nexuses are supported,
50 * allowing multiple commands to propagate all the way to a SCSI-II device
51 * while a command is already executing.
52 *
53 *
54 * Issues specific to the NCR5380 :
55 *
56 * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead
57 * piece of hardware that requires you to sit in a loop polling for
58 * the REQ signal as long as you are connected. Some devices are
59 * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect
60 * while doing long seek operations. [...] These
61 * broken devices are the exception rather than the rule and I'd rather
62 * spend my time optimizing for the normal case.
63 *
64 * Architecture :
65 *
66 * At the heart of the design is a coroutine, NCR5380_main,
67 * which is started from a workqueue for each NCR5380 host in the
68 * system. It attempts to establish I_T_L or I_T_L_Q nexuses by
69 * removing the commands from the issue queue and calling
70 * NCR5380_select() if a nexus is not established.
71 *
72 * Once a nexus is established, the NCR5380_information_transfer()
73 * phase goes through the various phases as instructed by the target.
74 * if the target goes into MSG IN and sends a DISCONNECT message,
75 * the command structure is placed into the per instance disconnected
76 * queue, and NCR5380_main tries to find more work. If the target is
77 * idle for too long, the system will try to sleep.
78 *
79 * If a command has disconnected, eventually an interrupt will trigger,
80 * calling NCR5380_intr() which will in turn call NCR5380_reselect
81 * to reestablish a nexus. This will run main if necessary.
82 *
83 * On command termination, the done function will be called as
84 * appropriate.
85 *
86 * SCSI pointers are maintained in the SCp field of SCSI command
87 * structures, being initialized after the command is connected
88 * in NCR5380_select, and set as appropriate in NCR5380_information_transfer.
89 * Note that in violation of the standard, an implicit SAVE POINTERS operation
90 * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS.
91 */
92
93 /*
94 * Using this file :
95 * This file a skeleton Linux SCSI driver for the NCR 5380 series
96 * of chips. To use it, you write an architecture specific functions
97 * and macros and include this file in your driver.
98 *
99 * These macros MUST be defined :
100 *
101 * NCR5380_read(register) - read from the specified register
102 *
103 * NCR5380_write(register, value) - write to the specific register
104 *
105 * NCR5380_implementation_fields - additional fields needed for this
106 * specific implementation of the NCR5380
107 *
108 * Either real DMA *or* pseudo DMA may be implemented
109 *
110 * NCR5380_dma_xfer_len - determine size of DMA/PDMA transfer
111 * NCR5380_dma_send_setup - execute DMA/PDMA from memory to 5380
112 * NCR5380_dma_recv_setup - execute DMA/PDMA from 5380 to memory
113 * NCR5380_dma_residual - residual byte count
114 *
115 * The generic driver is initialized by calling NCR5380_init(instance),
116 * after setting the appropriate host specific fields and ID.
117 */
118
119 #ifndef NCR5380_io_delay
120 #define NCR5380_io_delay(x)
121 #endif
122
123 #ifndef NCR5380_acquire_dma_irq
124 #define NCR5380_acquire_dma_irq(x) (1)
125 #endif
126
127 #ifndef NCR5380_release_dma_irq
128 #define NCR5380_release_dma_irq(x)
129 #endif
130
131 static int do_abort(struct Scsi_Host *);
132 static void do_reset(struct Scsi_Host *);
133
134 /**
135 * initialize_SCp - init the scsi pointer field
136 * @cmd: command block to set up
137 *
138 * Set up the internal fields in the SCSI command.
139 */
140
141 static inline void initialize_SCp(struct scsi_cmnd *cmd)
142 {
143 /*
144 * Initialize the Scsi Pointer field so that all of the commands in the
145 * various queues are valid.
146 */
147
148 if (scsi_bufflen(cmd)) {
149 cmd->SCp.buffer = scsi_sglist(cmd);
150 cmd->SCp.buffers_residual = scsi_sg_count(cmd) - 1;
151 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
152 cmd->SCp.this_residual = cmd->SCp.buffer->length;
153 } else {
154 cmd->SCp.buffer = NULL;
155 cmd->SCp.buffers_residual = 0;
156 cmd->SCp.ptr = NULL;
157 cmd->SCp.this_residual = 0;
158 }
159
160 cmd->SCp.Status = 0;
161 cmd->SCp.Message = 0;
162 }
163
164 /**
165 * NCR5380_poll_politely2 - wait for two chip register values
166 * @hostdata: host private data
167 * @reg1: 5380 register to poll
168 * @bit1: Bitmask to check
169 * @val1: Expected value
170 * @reg2: Second 5380 register to poll
171 * @bit2: Second bitmask to check
172 * @val2: Second expected value
173 * @wait: Time-out in jiffies
174 *
175 * Polls the chip in a reasonably efficient manner waiting for an
176 * event to occur. After a short quick poll we begin to yield the CPU
177 * (if possible). In irq contexts the time-out is arbitrarily limited.
178 * Callers may hold locks as long as they are held in irq mode.
179 *
180 * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT.
181 */
182
183 static int NCR5380_poll_politely2(struct NCR5380_hostdata *hostdata,
184 unsigned int reg1, u8 bit1, u8 val1,
185 unsigned int reg2, u8 bit2, u8 val2,
186 unsigned long wait)
187 {
188 unsigned long n = hostdata->poll_loops;
189 unsigned long deadline = jiffies + wait;
190
191 do {
192 if ((NCR5380_read(reg1) & bit1) == val1)
193 return 0;
194 if ((NCR5380_read(reg2) & bit2) == val2)
195 return 0;
196 cpu_relax();
197 } while (n--);
198
199 if (irqs_disabled() || in_interrupt())
200 return -ETIMEDOUT;
201
202 /* Repeatedly sleep for 1 ms until deadline */
203 while (time_is_after_jiffies(deadline)) {
204 schedule_timeout_uninterruptible(1);
205 if ((NCR5380_read(reg1) & bit1) == val1)
206 return 0;
207 if ((NCR5380_read(reg2) & bit2) == val2)
208 return 0;
209 }
210
211 return -ETIMEDOUT;
212 }
213
214 #if NDEBUG
215 static struct {
216 unsigned char mask;
217 const char *name;
218 } signals[] = {
219 {SR_DBP, "PARITY"},
220 {SR_RST, "RST"},
221 {SR_BSY, "BSY"},
222 {SR_REQ, "REQ"},
223 {SR_MSG, "MSG"},
224 {SR_CD, "CD"},
225 {SR_IO, "IO"},
226 {SR_SEL, "SEL"},
227 {0, NULL}
228 },
229 basrs[] = {
230 {BASR_END_DMA_TRANSFER, "END OF DMA"},
231 {BASR_DRQ, "DRQ"},
232 {BASR_PARITY_ERROR, "PARITY ERROR"},
233 {BASR_IRQ, "IRQ"},
234 {BASR_PHASE_MATCH, "PHASE MATCH"},
235 {BASR_BUSY_ERROR, "BUSY ERROR"},
236 {BASR_ATN, "ATN"},
237 {BASR_ACK, "ACK"},
238 {0, NULL}
239 },
240 icrs[] = {
241 {ICR_ASSERT_RST, "ASSERT RST"},
242 {ICR_ARBITRATION_PROGRESS, "ARB. IN PROGRESS"},
243 {ICR_ARBITRATION_LOST, "LOST ARB."},
244 {ICR_ASSERT_ACK, "ASSERT ACK"},
245 {ICR_ASSERT_BSY, "ASSERT BSY"},
246 {ICR_ASSERT_SEL, "ASSERT SEL"},
247 {ICR_ASSERT_ATN, "ASSERT ATN"},
248 {ICR_ASSERT_DATA, "ASSERT DATA"},
249 {0, NULL}
250 },
251 mrs[] = {
252 {MR_BLOCK_DMA_MODE, "BLOCK DMA MODE"},
253 {MR_TARGET, "TARGET"},
254 {MR_ENABLE_PAR_CHECK, "PARITY CHECK"},
255 {MR_ENABLE_PAR_INTR, "PARITY INTR"},
256 {MR_ENABLE_EOP_INTR, "EOP INTR"},
257 {MR_MONITOR_BSY, "MONITOR BSY"},
258 {MR_DMA_MODE, "DMA MODE"},
259 {MR_ARBITRATE, "ARBITRATE"},
260 {0, NULL}
261 };
262
263 /**
264 * NCR5380_print - print scsi bus signals
265 * @instance: adapter state to dump
266 *
267 * Print the SCSI bus signals for debugging purposes
268 */
269
270 static void NCR5380_print(struct Scsi_Host *instance)
271 {
272 struct NCR5380_hostdata *hostdata = shost_priv(instance);
273 unsigned char status, data, basr, mr, icr, i;
274
275 data = NCR5380_read(CURRENT_SCSI_DATA_REG);
276 status = NCR5380_read(STATUS_REG);
277 mr = NCR5380_read(MODE_REG);
278 icr = NCR5380_read(INITIATOR_COMMAND_REG);
279 basr = NCR5380_read(BUS_AND_STATUS_REG);
280
281 printk(KERN_DEBUG "SR = 0x%02x : ", status);
282 for (i = 0; signals[i].mask; ++i)
283 if (status & signals[i].mask)
284 printk(KERN_CONT "%s, ", signals[i].name);
285 printk(KERN_CONT "\nBASR = 0x%02x : ", basr);
286 for (i = 0; basrs[i].mask; ++i)
287 if (basr & basrs[i].mask)
288 printk(KERN_CONT "%s, ", basrs[i].name);
289 printk(KERN_CONT "\nICR = 0x%02x : ", icr);
290 for (i = 0; icrs[i].mask; ++i)
291 if (icr & icrs[i].mask)
292 printk(KERN_CONT "%s, ", icrs[i].name);
293 printk(KERN_CONT "\nMR = 0x%02x : ", mr);
294 for (i = 0; mrs[i].mask; ++i)
295 if (mr & mrs[i].mask)
296 printk(KERN_CONT "%s, ", mrs[i].name);
297 printk(KERN_CONT "\n");
298 }
299
300 static struct {
301 unsigned char value;
302 const char *name;
303 } phases[] = {
304 {PHASE_DATAOUT, "DATAOUT"},
305 {PHASE_DATAIN, "DATAIN"},
306 {PHASE_CMDOUT, "CMDOUT"},
307 {PHASE_STATIN, "STATIN"},
308 {PHASE_MSGOUT, "MSGOUT"},
309 {PHASE_MSGIN, "MSGIN"},
310 {PHASE_UNKNOWN, "UNKNOWN"}
311 };
312
313 /**
314 * NCR5380_print_phase - show SCSI phase
315 * @instance: adapter to dump
316 *
317 * Print the current SCSI phase for debugging purposes
318 */
319
320 static void NCR5380_print_phase(struct Scsi_Host *instance)
321 {
322 struct NCR5380_hostdata *hostdata = shost_priv(instance);
323 unsigned char status;
324 int i;
325
326 status = NCR5380_read(STATUS_REG);
327 if (!(status & SR_REQ))
328 shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n");
329 else {
330 for (i = 0; (phases[i].value != PHASE_UNKNOWN) &&
331 (phases[i].value != (status & PHASE_MASK)); ++i)
332 ;
333 shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name);
334 }
335 }
336 #endif
337
338 /**
339 * NCR5380_info - report driver and host information
340 * @instance: relevant scsi host instance
341 *
342 * For use as the host template info() handler.
343 */
344
345 static const char *NCR5380_info(struct Scsi_Host *instance)
346 {
347 struct NCR5380_hostdata *hostdata = shost_priv(instance);
348
349 return hostdata->info;
350 }
351
352 /**
353 * NCR5380_init - initialise an NCR5380
354 * @instance: adapter to configure
355 * @flags: control flags
356 *
357 * Initializes *instance and corresponding 5380 chip,
358 * with flags OR'd into the initial flags value.
359 *
360 * Notes : I assume that the host, hostno, and id bits have been
361 * set correctly. I don't care about the irq and other fields.
362 *
363 * Returns 0 for success
364 */
365
366 static int NCR5380_init(struct Scsi_Host *instance, int flags)
367 {
368 struct NCR5380_hostdata *hostdata = shost_priv(instance);
369 int i;
370 unsigned long deadline;
371 unsigned long accesses_per_ms;
372
373 instance->max_lun = 7;
374
375 hostdata->host = instance;
376 hostdata->id_mask = 1 << instance->this_id;
377 hostdata->id_higher_mask = 0;
378 for (i = hostdata->id_mask; i <= 0x80; i <<= 1)
379 if (i > hostdata->id_mask)
380 hostdata->id_higher_mask |= i;
381 for (i = 0; i < 8; ++i)
382 hostdata->busy[i] = 0;
383 hostdata->dma_len = 0;
384
385 spin_lock_init(&hostdata->lock);
386 hostdata->connected = NULL;
387 hostdata->sensing = NULL;
388 INIT_LIST_HEAD(&hostdata->autosense);
389 INIT_LIST_HEAD(&hostdata->unissued);
390 INIT_LIST_HEAD(&hostdata->disconnected);
391
392 hostdata->flags = flags;
393
394 INIT_WORK(&hostdata->main_task, NCR5380_main);
395 hostdata->work_q = alloc_workqueue("ncr5380_%d",
396 WQ_UNBOUND | WQ_MEM_RECLAIM,
397 1, instance->host_no);
398 if (!hostdata->work_q)
399 return -ENOMEM;
400
401 snprintf(hostdata->info, sizeof(hostdata->info),
402 "%s, irq %d, io_port 0x%lx, base 0x%lx, can_queue %d, cmd_per_lun %d, sg_tablesize %d, this_id %d, flags { %s%s%s}",
403 instance->hostt->name, instance->irq, hostdata->io_port,
404 hostdata->base, instance->can_queue, instance->cmd_per_lun,
405 instance->sg_tablesize, instance->this_id,
406 hostdata->flags & FLAG_DMA_FIXUP ? "DMA_FIXUP " : "",
407 hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "",
408 hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : "");
409
410 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
411 NCR5380_write(MODE_REG, MR_BASE);
412 NCR5380_write(TARGET_COMMAND_REG, 0);
413 NCR5380_write(SELECT_ENABLE_REG, 0);
414
415 /* Calibrate register polling loop */
416 i = 0;
417 deadline = jiffies + 1;
418 do {
419 cpu_relax();
420 } while (time_is_after_jiffies(deadline));
421 deadline += msecs_to_jiffies(256);
422 do {
423 NCR5380_read(STATUS_REG);
424 ++i;
425 cpu_relax();
426 } while (time_is_after_jiffies(deadline));
427 accesses_per_ms = i / 256;
428 hostdata->poll_loops = NCR5380_REG_POLL_TIME * accesses_per_ms / 2;
429
430 return 0;
431 }
432
433 /**
434 * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems.
435 * @instance: adapter to check
436 *
437 * If the system crashed, it may have crashed with a connected target and
438 * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the
439 * currently established nexus, which we know nothing about. Failing that
440 * do a bus reset.
441 *
442 * Note that a bus reset will cause the chip to assert IRQ.
443 *
444 * Returns 0 if successful, otherwise -ENXIO.
445 */
446
447 static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance)
448 {
449 struct NCR5380_hostdata *hostdata = shost_priv(instance);
450 int pass;
451
452 for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) {
453 switch (pass) {
454 case 1:
455 case 3:
456 case 5:
457 shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n");
458 NCR5380_poll_politely(hostdata,
459 STATUS_REG, SR_BSY, 0, 5 * HZ);
460 break;
461 case 2:
462 shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n");
463 do_abort(instance);
464 break;
465 case 4:
466 shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n");
467 do_reset(instance);
468 /* Wait after a reset; the SCSI standard calls for
469 * 250ms, we wait 500ms to be on the safe side.
470 * But some Toshiba CD-ROMs need ten times that.
471 */
472 if (hostdata->flags & FLAG_TOSHIBA_DELAY)
473 msleep(2500);
474 else
475 msleep(500);
476 break;
477 case 6:
478 shost_printk(KERN_ERR, instance, "bus locked solid\n");
479 return -ENXIO;
480 }
481 }
482 return 0;
483 }
484
485 /**
486 * NCR5380_exit - remove an NCR5380
487 * @instance: adapter to remove
488 *
489 * Assumes that no more work can be queued (e.g. by NCR5380_intr).
490 */
491
492 static void NCR5380_exit(struct Scsi_Host *instance)
493 {
494 struct NCR5380_hostdata *hostdata = shost_priv(instance);
495
496 cancel_work_sync(&hostdata->main_task);
497 destroy_workqueue(hostdata->work_q);
498 }
499
500 /**
501 * complete_cmd - finish processing a command and return it to the SCSI ML
502 * @instance: the host instance
503 * @cmd: command to complete
504 */
505
506 static void complete_cmd(struct Scsi_Host *instance,
507 struct scsi_cmnd *cmd)
508 {
509 struct NCR5380_hostdata *hostdata = shost_priv(instance);
510
511 dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd);
512
513 if (hostdata->sensing == cmd) {
514 /* Autosense processing ends here */
515 if ((cmd->result & 0xff) != SAM_STAT_GOOD) {
516 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
517 set_host_byte(cmd, DID_ERROR);
518 } else
519 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
520 hostdata->sensing = NULL;
521 }
522
523 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
524
525 cmd->scsi_done(cmd);
526 }
527
528 /**
529 * NCR5380_queue_command - queue a command
530 * @instance: the relevant SCSI adapter
531 * @cmd: SCSI command
532 *
533 * cmd is added to the per-instance issue queue, with minor
534 * twiddling done to the host specific fields of cmd. If the
535 * main coroutine is not running, it is restarted.
536 */
537
538 static int NCR5380_queue_command(struct Scsi_Host *instance,
539 struct scsi_cmnd *cmd)
540 {
541 struct NCR5380_hostdata *hostdata = shost_priv(instance);
542 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
543 unsigned long flags;
544
545 #if (NDEBUG & NDEBUG_NO_WRITE)
546 switch (cmd->cmnd[0]) {
547 case WRITE_6:
548 case WRITE_10:
549 shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n");
550 cmd->result = (DID_ERROR << 16);
551 cmd->scsi_done(cmd);
552 return 0;
553 }
554 #endif /* (NDEBUG & NDEBUG_NO_WRITE) */
555
556 cmd->result = 0;
557
558 if (!NCR5380_acquire_dma_irq(instance))
559 return SCSI_MLQUEUE_HOST_BUSY;
560
561 spin_lock_irqsave(&hostdata->lock, flags);
562
563 /*
564 * Insert the cmd into the issue queue. Note that REQUEST SENSE
565 * commands are added to the head of the queue since any command will
566 * clear the contingent allegiance condition that exists and the
567 * sense data is only guaranteed to be valid while the condition exists.
568 */
569
570 if (cmd->cmnd[0] == REQUEST_SENSE)
571 list_add(&ncmd->list, &hostdata->unissued);
572 else
573 list_add_tail(&ncmd->list, &hostdata->unissued);
574
575 spin_unlock_irqrestore(&hostdata->lock, flags);
576
577 dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n",
578 cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail");
579
580 /* Kick off command processing */
581 queue_work(hostdata->work_q, &hostdata->main_task);
582 return 0;
583 }
584
585 static inline void maybe_release_dma_irq(struct Scsi_Host *instance)
586 {
587 struct NCR5380_hostdata *hostdata = shost_priv(instance);
588
589 /* Caller does the locking needed to set & test these data atomically */
590 if (list_empty(&hostdata->disconnected) &&
591 list_empty(&hostdata->unissued) &&
592 list_empty(&hostdata->autosense) &&
593 !hostdata->connected &&
594 !hostdata->selecting) {
595 NCR5380_release_dma_irq(instance);
596 }
597 }
598
599 /**
600 * dequeue_next_cmd - dequeue a command for processing
601 * @instance: the scsi host instance
602 *
603 * Priority is given to commands on the autosense queue. These commands
604 * need autosense because of a CHECK CONDITION result.
605 *
606 * Returns a command pointer if a command is found for a target that is
607 * not already busy. Otherwise returns NULL.
608 */
609
610 static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance)
611 {
612 struct NCR5380_hostdata *hostdata = shost_priv(instance);
613 struct NCR5380_cmd *ncmd;
614 struct scsi_cmnd *cmd;
615
616 if (hostdata->sensing || list_empty(&hostdata->autosense)) {
617 list_for_each_entry(ncmd, &hostdata->unissued, list) {
618 cmd = NCR5380_to_scmd(ncmd);
619 dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n",
620 cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun);
621
622 if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) {
623 list_del(&ncmd->list);
624 dsprintk(NDEBUG_QUEUES, instance,
625 "dequeue: removed %p from issue queue\n", cmd);
626 return cmd;
627 }
628 }
629 } else {
630 /* Autosense processing begins here */
631 ncmd = list_first_entry(&hostdata->autosense,
632 struct NCR5380_cmd, list);
633 list_del(&ncmd->list);
634 cmd = NCR5380_to_scmd(ncmd);
635 dsprintk(NDEBUG_QUEUES, instance,
636 "dequeue: removed %p from autosense queue\n", cmd);
637 scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0);
638 hostdata->sensing = cmd;
639 return cmd;
640 }
641 return NULL;
642 }
643
644 static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
645 {
646 struct NCR5380_hostdata *hostdata = shost_priv(instance);
647 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
648
649 if (hostdata->sensing == cmd) {
650 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
651 list_add(&ncmd->list, &hostdata->autosense);
652 hostdata->sensing = NULL;
653 } else
654 list_add(&ncmd->list, &hostdata->unissued);
655 }
656
657 /**
658 * NCR5380_main - NCR state machines
659 *
660 * NCR5380_main is a coroutine that runs as long as more work can
661 * be done on the NCR5380 host adapters in a system. Both
662 * NCR5380_queue_command() and NCR5380_intr() will try to start it
663 * in case it is not running.
664 */
665
666 static void NCR5380_main(struct work_struct *work)
667 {
668 struct NCR5380_hostdata *hostdata =
669 container_of(work, struct NCR5380_hostdata, main_task);
670 struct Scsi_Host *instance = hostdata->host;
671 int done;
672
673 do {
674 done = 1;
675
676 spin_lock_irq(&hostdata->lock);
677 while (!hostdata->connected && !hostdata->selecting) {
678 struct scsi_cmnd *cmd = dequeue_next_cmd(instance);
679
680 if (!cmd)
681 break;
682
683 dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd);
684
685 /*
686 * Attempt to establish an I_T_L nexus here.
687 * On success, instance->hostdata->connected is set.
688 * On failure, we must add the command back to the
689 * issue queue so we can keep trying.
690 */
691 /*
692 * REQUEST SENSE commands are issued without tagged
693 * queueing, even on SCSI-II devices because the
694 * contingent allegiance condition exists for the
695 * entire unit.
696 */
697
698 if (!NCR5380_select(instance, cmd)) {
699 dsprintk(NDEBUG_MAIN, instance, "main: select complete\n");
700 maybe_release_dma_irq(instance);
701 } else {
702 dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance,
703 "main: select failed, returning %p to queue\n", cmd);
704 requeue_cmd(instance, cmd);
705 }
706 }
707 if (hostdata->connected && !hostdata->dma_len) {
708 dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n");
709 NCR5380_information_transfer(instance);
710 done = 0;
711 }
712 spin_unlock_irq(&hostdata->lock);
713 if (!done)
714 cond_resched();
715 } while (!done);
716 }
717
718 /*
719 * NCR5380_dma_complete - finish DMA transfer
720 * @instance: the scsi host instance
721 *
722 * Called by the interrupt handler when DMA finishes or a phase
723 * mismatch occurs (which would end the DMA transfer).
724 */
725
726 static void NCR5380_dma_complete(struct Scsi_Host *instance)
727 {
728 struct NCR5380_hostdata *hostdata = shost_priv(instance);
729 int transferred;
730 unsigned char **data;
731 int *count;
732 int saved_data = 0, overrun = 0;
733 unsigned char p;
734
735 if (hostdata->read_overruns) {
736 p = hostdata->connected->SCp.phase;
737 if (p & SR_IO) {
738 udelay(10);
739 if ((NCR5380_read(BUS_AND_STATUS_REG) &
740 (BASR_PHASE_MATCH | BASR_ACK)) ==
741 (BASR_PHASE_MATCH | BASR_ACK)) {
742 saved_data = NCR5380_read(INPUT_DATA_REG);
743 overrun = 1;
744 dsprintk(NDEBUG_DMA, instance, "read overrun handled\n");
745 }
746 }
747 }
748
749 #ifdef CONFIG_SUN3
750 if ((sun3scsi_dma_finish(rq_data_dir(hostdata->connected->request)))) {
751 pr_err("scsi%d: overrun in UDC counter -- not prepared to deal with this!\n",
752 instance->host_no);
753 BUG();
754 }
755
756 if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) ==
757 (BASR_PHASE_MATCH | BASR_ACK)) {
758 pr_err("scsi%d: BASR %02x\n", instance->host_no,
759 NCR5380_read(BUS_AND_STATUS_REG));
760 pr_err("scsi%d: bus stuck in data phase -- probably a single byte overrun!\n",
761 instance->host_no);
762 BUG();
763 }
764 #endif
765
766 NCR5380_write(MODE_REG, MR_BASE);
767 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
768 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
769
770 transferred = hostdata->dma_len - NCR5380_dma_residual(hostdata);
771 hostdata->dma_len = 0;
772
773 data = (unsigned char **)&hostdata->connected->SCp.ptr;
774 count = &hostdata->connected->SCp.this_residual;
775 *data += transferred;
776 *count -= transferred;
777
778 if (hostdata->read_overruns) {
779 int cnt, toPIO;
780
781 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) {
782 cnt = toPIO = hostdata->read_overruns;
783 if (overrun) {
784 dsprintk(NDEBUG_DMA, instance,
785 "Got an input overrun, using saved byte\n");
786 *(*data)++ = saved_data;
787 (*count)--;
788 cnt--;
789 toPIO--;
790 }
791 if (toPIO > 0) {
792 dsprintk(NDEBUG_DMA, instance,
793 "Doing %d byte PIO to 0x%p\n", cnt, *data);
794 NCR5380_transfer_pio(instance, &p, &cnt, data);
795 *count -= toPIO - cnt;
796 }
797 }
798 }
799 }
800
801 /**
802 * NCR5380_intr - generic NCR5380 irq handler
803 * @irq: interrupt number
804 * @dev_id: device info
805 *
806 * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses
807 * from the disconnected queue, and restarting NCR5380_main()
808 * as required.
809 *
810 * The chip can assert IRQ in any of six different conditions. The IRQ flag
811 * is then cleared by reading the Reset Parity/Interrupt Register (RPIR).
812 * Three of these six conditions are latched in the Bus and Status Register:
813 * - End of DMA (cleared by ending DMA Mode)
814 * - Parity error (cleared by reading RPIR)
815 * - Loss of BSY (cleared by reading RPIR)
816 * Two conditions have flag bits that are not latched:
817 * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode)
818 * - Bus reset (non-maskable)
819 * The remaining condition has no flag bit at all:
820 * - Selection/reselection
821 *
822 * Hence, establishing the cause(s) of any interrupt is partly guesswork.
823 * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor
824 * claimed that "the design of the [DP8490] interrupt logic ensures
825 * interrupts will not be lost (they can be on the DP5380)."
826 * The L5380/53C80 datasheet from LOGIC Devices has more details.
827 *
828 * Checking for bus reset by reading RST is futile because of interrupt
829 * latency, but a bus reset will reset chip logic. Checking for parity error
830 * is unnecessary because that interrupt is never enabled. A Loss of BSY
831 * condition will clear DMA Mode. We can tell when this occurs because the
832 * the Busy Monitor interrupt is enabled together with DMA Mode.
833 */
834
835 static irqreturn_t __maybe_unused NCR5380_intr(int irq, void *dev_id)
836 {
837 struct Scsi_Host *instance = dev_id;
838 struct NCR5380_hostdata *hostdata = shost_priv(instance);
839 int handled = 0;
840 unsigned char basr;
841 unsigned long flags;
842
843 spin_lock_irqsave(&hostdata->lock, flags);
844
845 basr = NCR5380_read(BUS_AND_STATUS_REG);
846 if (basr & BASR_IRQ) {
847 unsigned char mr = NCR5380_read(MODE_REG);
848 unsigned char sr = NCR5380_read(STATUS_REG);
849
850 dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n",
851 irq, basr, sr, mr);
852
853 if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) {
854 /* Probably End of DMA, Phase Mismatch or Loss of BSY.
855 * We ack IRQ after clearing Mode Register. Workarounds
856 * for End of DMA errata need to happen in DMA Mode.
857 */
858
859 dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n");
860
861 if (hostdata->connected) {
862 NCR5380_dma_complete(instance);
863 queue_work(hostdata->work_q, &hostdata->main_task);
864 } else {
865 NCR5380_write(MODE_REG, MR_BASE);
866 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
867 }
868 } else if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) &&
869 (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) {
870 /* Probably reselected */
871 NCR5380_write(SELECT_ENABLE_REG, 0);
872 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
873
874 dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n");
875
876 if (!hostdata->connected) {
877 NCR5380_reselect(instance);
878 queue_work(hostdata->work_q, &hostdata->main_task);
879 }
880 if (!hostdata->connected)
881 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
882 } else {
883 /* Probably Bus Reset */
884 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
885
886 dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n");
887 #ifdef SUN3_SCSI_VME
888 dregs->csr |= CSR_DMA_ENABLE;
889 #endif
890 }
891 handled = 1;
892 } else {
893 dsprintk(NDEBUG_INTR, instance, "interrupt without IRQ bit\n");
894 #ifdef SUN3_SCSI_VME
895 dregs->csr |= CSR_DMA_ENABLE;
896 #endif
897 }
898
899 spin_unlock_irqrestore(&hostdata->lock, flags);
900
901 return IRQ_RETVAL(handled);
902 }
903
904 /*
905 * Function : int NCR5380_select(struct Scsi_Host *instance,
906 * struct scsi_cmnd *cmd)
907 *
908 * Purpose : establishes I_T_L or I_T_L_Q nexus for new or existing command,
909 * including ARBITRATION, SELECTION, and initial message out for
910 * IDENTIFY and queue messages.
911 *
912 * Inputs : instance - instantiation of the 5380 driver on which this
913 * target lives, cmd - SCSI command to execute.
914 *
915 * Returns cmd if selection failed but should be retried,
916 * NULL if selection failed and should not be retried, or
917 * NULL if selection succeeded (hostdata->connected == cmd).
918 *
919 * Side effects :
920 * If bus busy, arbitration failed, etc, NCR5380_select() will exit
921 * with registers as they should have been on entry - ie
922 * SELECT_ENABLE will be set appropriately, the NCR5380
923 * will cease to drive any SCSI bus signals.
924 *
925 * If successful : I_T_L or I_T_L_Q nexus will be established,
926 * instance->connected will be set to cmd.
927 * SELECT interrupt will be disabled.
928 *
929 * If failed (no target) : cmd->scsi_done() will be called, and the
930 * cmd->result host byte set to DID_BAD_TARGET.
931 */
932
933 static struct scsi_cmnd *NCR5380_select(struct Scsi_Host *instance,
934 struct scsi_cmnd *cmd)
935 __releases(&hostdata->lock) __acquires(&hostdata->lock)
936 {
937 struct NCR5380_hostdata *hostdata = shost_priv(instance);
938 unsigned char tmp[3], phase;
939 unsigned char *data;
940 int len;
941 int err;
942
943 NCR5380_dprint(NDEBUG_ARBITRATION, instance);
944 dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n",
945 instance->this_id);
946
947 /*
948 * Arbitration and selection phases are slow and involve dropping the
949 * lock, so we have to watch out for EH. An exception handler may
950 * change 'selecting' to NULL. This function will then return NULL
951 * so that the caller will forget about 'cmd'. (During information
952 * transfer phases, EH may change 'connected' to NULL.)
953 */
954 hostdata->selecting = cmd;
955
956 /*
957 * Set the phase bits to 0, otherwise the NCR5380 won't drive the
958 * data bus during SELECTION.
959 */
960
961 NCR5380_write(TARGET_COMMAND_REG, 0);
962
963 /*
964 * Start arbitration.
965 */
966
967 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
968 NCR5380_write(MODE_REG, MR_ARBITRATE);
969
970 /* The chip now waits for BUS FREE phase. Then after the 800 ns
971 * Bus Free Delay, arbitration will begin.
972 */
973
974 spin_unlock_irq(&hostdata->lock);
975 err = NCR5380_poll_politely2(hostdata, MODE_REG, MR_ARBITRATE, 0,
976 INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS,
977 ICR_ARBITRATION_PROGRESS, HZ);
978 spin_lock_irq(&hostdata->lock);
979 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) {
980 /* Reselection interrupt */
981 goto out;
982 }
983 if (!hostdata->selecting) {
984 /* Command was aborted */
985 NCR5380_write(MODE_REG, MR_BASE);
986 goto out;
987 }
988 if (err < 0) {
989 NCR5380_write(MODE_REG, MR_BASE);
990 shost_printk(KERN_ERR, instance,
991 "select: arbitration timeout\n");
992 goto out;
993 }
994 spin_unlock_irq(&hostdata->lock);
995
996 /* The SCSI-2 arbitration delay is 2.4 us */
997 udelay(3);
998
999 /* Check for lost arbitration */
1000 if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) ||
1001 (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) ||
1002 (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) {
1003 NCR5380_write(MODE_REG, MR_BASE);
1004 dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n");
1005 spin_lock_irq(&hostdata->lock);
1006 goto out;
1007 }
1008
1009 /* After/during arbitration, BSY should be asserted.
1010 * IBM DPES-31080 Version S31Q works now
1011 * Tnx to Thomas_Roesch@m2.maus.de for finding this! (Roman)
1012 */
1013 NCR5380_write(INITIATOR_COMMAND_REG,
1014 ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY);
1015
1016 /*
1017 * Again, bus clear + bus settle time is 1.2us, however, this is
1018 * a minimum so we'll udelay ceil(1.2)
1019 */
1020
1021 if (hostdata->flags & FLAG_TOSHIBA_DELAY)
1022 udelay(15);
1023 else
1024 udelay(2);
1025
1026 spin_lock_irq(&hostdata->lock);
1027
1028 /* NCR5380_reselect() clears MODE_REG after a reselection interrupt */
1029 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE))
1030 goto out;
1031
1032 if (!hostdata->selecting) {
1033 NCR5380_write(MODE_REG, MR_BASE);
1034 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1035 goto out;
1036 }
1037
1038 dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n");
1039
1040 /*
1041 * Now that we have won arbitration, start Selection process, asserting
1042 * the host and target ID's on the SCSI bus.
1043 */
1044
1045 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd)));
1046
1047 /*
1048 * Raise ATN while SEL is true before BSY goes false from arbitration,
1049 * since this is the only way to guarantee that we'll get a MESSAGE OUT
1050 * phase immediately after selection.
1051 */
1052
1053 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY |
1054 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL);
1055 NCR5380_write(MODE_REG, MR_BASE);
1056
1057 /*
1058 * Reselect interrupts must be turned off prior to the dropping of BSY,
1059 * otherwise we will trigger an interrupt.
1060 */
1061 NCR5380_write(SELECT_ENABLE_REG, 0);
1062
1063 spin_unlock_irq(&hostdata->lock);
1064
1065 /*
1066 * The initiator shall then wait at least two deskew delays and release
1067 * the BSY signal.
1068 */
1069 udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */
1070
1071 /* Reset BSY */
1072 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA |
1073 ICR_ASSERT_ATN | ICR_ASSERT_SEL);
1074
1075 /*
1076 * Something weird happens when we cease to drive BSY - looks
1077 * like the board/chip is letting us do another read before the
1078 * appropriate propagation delay has expired, and we're confusing
1079 * a BSY signal from ourselves as the target's response to SELECTION.
1080 *
1081 * A small delay (the 'C++' frontend breaks the pipeline with an
1082 * unnecessary jump, making it work on my 386-33/Trantor T128, the
1083 * tighter 'C' code breaks and requires this) solves the problem -
1084 * the 1 us delay is arbitrary, and only used because this delay will
1085 * be the same on other platforms and since it works here, it should
1086 * work there.
1087 *
1088 * wingel suggests that this could be due to failing to wait
1089 * one deskew delay.
1090 */
1091
1092 udelay(1);
1093
1094 dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd));
1095
1096 /*
1097 * The SCSI specification calls for a 250 ms timeout for the actual
1098 * selection.
1099 */
1100
1101 err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_BSY, SR_BSY,
1102 msecs_to_jiffies(250));
1103
1104 if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) {
1105 spin_lock_irq(&hostdata->lock);
1106 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1107 NCR5380_reselect(instance);
1108 if (!hostdata->connected)
1109 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1110 shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n");
1111 goto out;
1112 }
1113
1114 if (err < 0) {
1115 spin_lock_irq(&hostdata->lock);
1116 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1117 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1118 /* Can't touch cmd if it has been reclaimed by the scsi ML */
1119 if (hostdata->selecting) {
1120 cmd->result = DID_BAD_TARGET << 16;
1121 complete_cmd(instance, cmd);
1122 dsprintk(NDEBUG_SELECTION, instance, "target did not respond within 250ms\n");
1123 cmd = NULL;
1124 }
1125 goto out;
1126 }
1127
1128 /*
1129 * No less than two deskew delays after the initiator detects the
1130 * BSY signal is true, it shall release the SEL signal and may
1131 * change the DATA BUS. -wingel
1132 */
1133
1134 udelay(1);
1135
1136 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1137
1138 /*
1139 * Since we followed the SCSI spec, and raised ATN while SEL
1140 * was true but before BSY was false during selection, the information
1141 * transfer phase should be a MESSAGE OUT phase so that we can send the
1142 * IDENTIFY message.
1143 */
1144
1145 /* Wait for start of REQ/ACK handshake */
1146
1147 err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ);
1148 spin_lock_irq(&hostdata->lock);
1149 if (err < 0) {
1150 shost_printk(KERN_ERR, instance, "select: REQ timeout\n");
1151 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1152 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1153 goto out;
1154 }
1155 if (!hostdata->selecting) {
1156 do_abort(instance);
1157 goto out;
1158 }
1159
1160 dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n",
1161 scmd_id(cmd));
1162 tmp[0] = IDENTIFY(((instance->irq == NO_IRQ) ? 0 : 1), cmd->device->lun);
1163
1164 len = 1;
1165 data = tmp;
1166 phase = PHASE_MSGOUT;
1167 NCR5380_transfer_pio(instance, &phase, &len, &data);
1168 if (len) {
1169 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1170 cmd->result = DID_ERROR << 16;
1171 complete_cmd(instance, cmd);
1172 dsprintk(NDEBUG_SELECTION, instance, "IDENTIFY message transfer failed\n");
1173 cmd = NULL;
1174 goto out;
1175 }
1176
1177 dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n");
1178
1179 hostdata->connected = cmd;
1180 hostdata->busy[cmd->device->id] |= 1 << cmd->device->lun;
1181
1182 #ifdef SUN3_SCSI_VME
1183 dregs->csr |= CSR_INTR;
1184 #endif
1185
1186 initialize_SCp(cmd);
1187
1188 cmd = NULL;
1189
1190 out:
1191 if (!hostdata->selecting)
1192 return NULL;
1193 hostdata->selecting = NULL;
1194 return cmd;
1195 }
1196
1197 /*
1198 * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance,
1199 * unsigned char *phase, int *count, unsigned char **data)
1200 *
1201 * Purpose : transfers data in given phase using polled I/O
1202 *
1203 * Inputs : instance - instance of driver, *phase - pointer to
1204 * what phase is expected, *count - pointer to number of
1205 * bytes to transfer, **data - pointer to data pointer.
1206 *
1207 * Returns : -1 when different phase is entered without transferring
1208 * maximum number of bytes, 0 if all bytes are transferred or exit
1209 * is in same phase.
1210 *
1211 * Also, *phase, *count, *data are modified in place.
1212 *
1213 * XXX Note : handling for bus free may be useful.
1214 */
1215
1216 /*
1217 * Note : this code is not as quick as it could be, however it
1218 * IS 100% reliable, and for the actual data transfer where speed
1219 * counts, we will always do a pseudo DMA or DMA transfer.
1220 */
1221
1222 static int NCR5380_transfer_pio(struct Scsi_Host *instance,
1223 unsigned char *phase, int *count,
1224 unsigned char **data)
1225 {
1226 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1227 unsigned char p = *phase, tmp;
1228 int c = *count;
1229 unsigned char *d = *data;
1230
1231 /*
1232 * The NCR5380 chip will only drive the SCSI bus when the
1233 * phase specified in the appropriate bits of the TARGET COMMAND
1234 * REGISTER match the STATUS REGISTER
1235 */
1236
1237 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1238
1239 do {
1240 /*
1241 * Wait for assertion of REQ, after which the phase bits will be
1242 * valid
1243 */
1244
1245 if (NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ) < 0)
1246 break;
1247
1248 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n");
1249
1250 /* Check for phase mismatch */
1251 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) {
1252 dsprintk(NDEBUG_PIO, instance, "phase mismatch\n");
1253 NCR5380_dprint_phase(NDEBUG_PIO, instance);
1254 break;
1255 }
1256
1257 /* Do actual transfer from SCSI bus to / from memory */
1258 if (!(p & SR_IO))
1259 NCR5380_write(OUTPUT_DATA_REG, *d);
1260 else
1261 *d = NCR5380_read(CURRENT_SCSI_DATA_REG);
1262
1263 ++d;
1264
1265 /*
1266 * The SCSI standard suggests that in MSGOUT phase, the initiator
1267 * should drop ATN on the last byte of the message phase
1268 * after REQ has been asserted for the handshake but before
1269 * the initiator raises ACK.
1270 */
1271
1272 if (!(p & SR_IO)) {
1273 if (!((p & SR_MSG) && c > 1)) {
1274 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1275 NCR5380_dprint(NDEBUG_PIO, instance);
1276 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1277 ICR_ASSERT_DATA | ICR_ASSERT_ACK);
1278 } else {
1279 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1280 ICR_ASSERT_DATA | ICR_ASSERT_ATN);
1281 NCR5380_dprint(NDEBUG_PIO, instance);
1282 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1283 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
1284 }
1285 } else {
1286 NCR5380_dprint(NDEBUG_PIO, instance);
1287 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
1288 }
1289
1290 if (NCR5380_poll_politely(hostdata,
1291 STATUS_REG, SR_REQ, 0, 5 * HZ) < 0)
1292 break;
1293
1294 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n");
1295
1296 /*
1297 * We have several special cases to consider during REQ/ACK handshaking :
1298 * 1. We were in MSGOUT phase, and we are on the last byte of the
1299 * message. ATN must be dropped as ACK is dropped.
1300 *
1301 * 2. We are in a MSGIN phase, and we are on the last byte of the
1302 * message. We must exit with ACK asserted, so that the calling
1303 * code may raise ATN before dropping ACK to reject the message.
1304 *
1305 * 3. ACK and ATN are clear and the target may proceed as normal.
1306 */
1307 if (!(p == PHASE_MSGIN && c == 1)) {
1308 if (p == PHASE_MSGOUT && c > 1)
1309 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1310 else
1311 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1312 }
1313 } while (--c);
1314
1315 dsprintk(NDEBUG_PIO, instance, "residual %d\n", c);
1316
1317 *count = c;
1318 *data = d;
1319 tmp = NCR5380_read(STATUS_REG);
1320 /* The phase read from the bus is valid if either REQ is (already)
1321 * asserted or if ACK hasn't been released yet. The latter applies if
1322 * we're in MSG IN, DATA IN or STATUS and all bytes have been received.
1323 */
1324 if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0))
1325 *phase = tmp & PHASE_MASK;
1326 else
1327 *phase = PHASE_UNKNOWN;
1328
1329 if (!c || (*phase == p))
1330 return 0;
1331 else
1332 return -1;
1333 }
1334
1335 /**
1336 * do_reset - issue a reset command
1337 * @instance: adapter to reset
1338 *
1339 * Issue a reset sequence to the NCR5380 and try and get the bus
1340 * back into sane shape.
1341 *
1342 * This clears the reset interrupt flag because there may be no handler for
1343 * it. When the driver is initialized, the NCR5380_intr() handler has not yet
1344 * been installed. And when in EH we may have released the ST DMA interrupt.
1345 */
1346
1347 static void do_reset(struct Scsi_Host *instance)
1348 {
1349 struct NCR5380_hostdata __maybe_unused *hostdata = shost_priv(instance);
1350 unsigned long flags;
1351
1352 local_irq_save(flags);
1353 NCR5380_write(TARGET_COMMAND_REG,
1354 PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
1355 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST);
1356 udelay(50);
1357 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1358 (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1359 local_irq_restore(flags);
1360 }
1361
1362 /**
1363 * do_abort - abort the currently established nexus by going to
1364 * MESSAGE OUT phase and sending an ABORT message.
1365 * @instance: relevant scsi host instance
1366 *
1367 * Returns 0 on success, -1 on failure.
1368 */
1369
1370 static int do_abort(struct Scsi_Host *instance)
1371 {
1372 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1373 unsigned char *msgptr, phase, tmp;
1374 int len;
1375 int rc;
1376
1377 /* Request message out phase */
1378 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1379
1380 /*
1381 * Wait for the target to indicate a valid phase by asserting
1382 * REQ. Once this happens, we'll have either a MSGOUT phase
1383 * and can immediately send the ABORT message, or we'll have some
1384 * other phase and will have to source/sink data.
1385 *
1386 * We really don't care what value was on the bus or what value
1387 * the target sees, so we just handshake.
1388 */
1389
1390 rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, 10 * HZ);
1391 if (rc < 0)
1392 goto timeout;
1393
1394 tmp = NCR5380_read(STATUS_REG) & PHASE_MASK;
1395
1396 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1397
1398 if (tmp != PHASE_MSGOUT) {
1399 NCR5380_write(INITIATOR_COMMAND_REG,
1400 ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
1401 rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, 0, 3 * HZ);
1402 if (rc < 0)
1403 goto timeout;
1404 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1405 }
1406
1407 tmp = ABORT;
1408 msgptr = &tmp;
1409 len = 1;
1410 phase = PHASE_MSGOUT;
1411 NCR5380_transfer_pio(instance, &phase, &len, &msgptr);
1412
1413 /*
1414 * If we got here, and the command completed successfully,
1415 * we're about to go into bus free state.
1416 */
1417
1418 return len ? -1 : 0;
1419
1420 timeout:
1421 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1422 return -1;
1423 }
1424
1425 /*
1426 * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance,
1427 * unsigned char *phase, int *count, unsigned char **data)
1428 *
1429 * Purpose : transfers data in given phase using either real
1430 * or pseudo DMA.
1431 *
1432 * Inputs : instance - instance of driver, *phase - pointer to
1433 * what phase is expected, *count - pointer to number of
1434 * bytes to transfer, **data - pointer to data pointer.
1435 *
1436 * Returns : -1 when different phase is entered without transferring
1437 * maximum number of bytes, 0 if all bytes or transferred or exit
1438 * is in same phase.
1439 *
1440 * Also, *phase, *count, *data are modified in place.
1441 */
1442
1443
1444 static int NCR5380_transfer_dma(struct Scsi_Host *instance,
1445 unsigned char *phase, int *count,
1446 unsigned char **data)
1447 {
1448 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1449 int c = *count;
1450 unsigned char p = *phase;
1451 unsigned char *d = *data;
1452 unsigned char tmp;
1453 int result = 0;
1454
1455 if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) {
1456 *phase = tmp;
1457 return -1;
1458 }
1459
1460 hostdata->connected->SCp.phase = p;
1461
1462 if (p & SR_IO) {
1463 if (hostdata->read_overruns)
1464 c -= hostdata->read_overruns;
1465 else if (hostdata->flags & FLAG_DMA_FIXUP)
1466 --c;
1467 }
1468
1469 dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n",
1470 (p & SR_IO) ? "receive" : "send", c, d);
1471
1472 #ifdef CONFIG_SUN3
1473 /* send start chain */
1474 sun3scsi_dma_start(c, *data);
1475 #endif
1476
1477 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1478 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY |
1479 MR_ENABLE_EOP_INTR);
1480
1481 if (!(hostdata->flags & FLAG_LATE_DMA_SETUP)) {
1482 /* On the Medusa, it is a must to initialize the DMA before
1483 * starting the NCR. This is also the cleaner way for the TT.
1484 */
1485 if (p & SR_IO)
1486 result = NCR5380_dma_recv_setup(hostdata, d, c);
1487 else
1488 result = NCR5380_dma_send_setup(hostdata, d, c);
1489 }
1490
1491 /*
1492 * On the PAS16 at least I/O recovery delays are not needed here.
1493 * Everyone else seems to want them.
1494 */
1495
1496 if (p & SR_IO) {
1497 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1498 NCR5380_io_delay(1);
1499 NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0);
1500 } else {
1501 NCR5380_io_delay(1);
1502 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1503 NCR5380_io_delay(1);
1504 NCR5380_write(START_DMA_SEND_REG, 0);
1505 NCR5380_io_delay(1);
1506 }
1507
1508 #ifdef CONFIG_SUN3
1509 #ifdef SUN3_SCSI_VME
1510 dregs->csr |= CSR_DMA_ENABLE;
1511 #endif
1512 sun3_dma_active = 1;
1513 #endif
1514
1515 if (hostdata->flags & FLAG_LATE_DMA_SETUP) {
1516 /* On the Falcon, the DMA setup must be done after the last
1517 * NCR access, else the DMA setup gets trashed!
1518 */
1519 if (p & SR_IO)
1520 result = NCR5380_dma_recv_setup(hostdata, d, c);
1521 else
1522 result = NCR5380_dma_send_setup(hostdata, d, c);
1523 }
1524
1525 /* On failure, NCR5380_dma_xxxx_setup() returns a negative int. */
1526 if (result < 0)
1527 return result;
1528
1529 /* For real DMA, result is the byte count. DMA interrupt is expected. */
1530 if (result > 0) {
1531 hostdata->dma_len = result;
1532 return 0;
1533 }
1534
1535 /* The result is zero iff pseudo DMA send/receive was completed. */
1536 hostdata->dma_len = c;
1537
1538 /*
1539 * A note regarding the DMA errata workarounds for early NMOS silicon.
1540 *
1541 * For DMA sends, we want to wait until the last byte has been
1542 * transferred out over the bus before we turn off DMA mode. Alas, there
1543 * seems to be no terribly good way of doing this on a 5380 under all
1544 * conditions. For non-scatter-gather operations, we can wait until REQ
1545 * and ACK both go false, or until a phase mismatch occurs. Gather-sends
1546 * are nastier, since the device will be expecting more data than we
1547 * are prepared to send it, and REQ will remain asserted. On a 53C8[01] we
1548 * could test Last Byte Sent to assure transfer (I imagine this is precisely
1549 * why this signal was added to the newer chips) but on the older 538[01]
1550 * this signal does not exist. The workaround for this lack is a watchdog;
1551 * we bail out of the wait-loop after a modest amount of wait-time if
1552 * the usual exit conditions are not met. Not a terribly clean or
1553 * correct solution :-%
1554 *
1555 * DMA receive is equally tricky due to a nasty characteristic of the NCR5380.
1556 * If the chip is in DMA receive mode, it will respond to a target's
1557 * REQ by latching the SCSI data into the INPUT DATA register and asserting
1558 * ACK, even if it has _already_ been notified by the DMA controller that
1559 * the current DMA transfer has completed! If the NCR5380 is then taken
1560 * out of DMA mode, this already-acknowledged byte is lost. This is
1561 * not a problem for "one DMA transfer per READ command", because
1562 * the situation will never arise... either all of the data is DMA'ed
1563 * properly, or the target switches to MESSAGE IN phase to signal a
1564 * disconnection (either operation bringing the DMA to a clean halt).
1565 * However, in order to handle scatter-receive, we must work around the
1566 * problem. The chosen fix is to DMA fewer bytes, then check for the
1567 * condition before taking the NCR5380 out of DMA mode. One or two extra
1568 * bytes are transferred via PIO as necessary to fill out the original
1569 * request.
1570 */
1571
1572 if (hostdata->flags & FLAG_DMA_FIXUP) {
1573 if (p & SR_IO) {
1574 /*
1575 * The workaround was to transfer fewer bytes than we
1576 * intended to with the pseudo-DMA read function, wait for
1577 * the chip to latch the last byte, read it, and then disable
1578 * pseudo-DMA mode.
1579 *
1580 * After REQ is asserted, the NCR5380 asserts DRQ and ACK.
1581 * REQ is deasserted when ACK is asserted, and not reasserted
1582 * until ACK goes false. Since the NCR5380 won't lower ACK
1583 * until DACK is asserted, which won't happen unless we twiddle
1584 * the DMA port or we take the NCR5380 out of DMA mode, we
1585 * can guarantee that we won't handshake another extra
1586 * byte.
1587 */
1588
1589 if (NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG,
1590 BASR_DRQ, BASR_DRQ, HZ) < 0) {
1591 result = -1;
1592 shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n");
1593 }
1594 if (NCR5380_poll_politely(hostdata, STATUS_REG,
1595 SR_REQ, 0, HZ) < 0) {
1596 result = -1;
1597 shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n");
1598 }
1599 d[*count - 1] = NCR5380_read(INPUT_DATA_REG);
1600 } else {
1601 /*
1602 * Wait for the last byte to be sent. If REQ is being asserted for
1603 * the byte we're interested, we'll ACK it and it will go false.
1604 */
1605 if (NCR5380_poll_politely2(hostdata,
1606 BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ,
1607 BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, HZ) < 0) {
1608 result = -1;
1609 shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n");
1610 }
1611 }
1612 }
1613
1614 NCR5380_dma_complete(instance);
1615 return result;
1616 }
1617
1618 /*
1619 * Function : NCR5380_information_transfer (struct Scsi_Host *instance)
1620 *
1621 * Purpose : run through the various SCSI phases and do as the target
1622 * directs us to. Operates on the currently connected command,
1623 * instance->connected.
1624 *
1625 * Inputs : instance, instance for which we are doing commands
1626 *
1627 * Side effects : SCSI things happen, the disconnected queue will be
1628 * modified if a command disconnects, *instance->connected will
1629 * change.
1630 *
1631 * XXX Note : we need to watch for bus free or a reset condition here
1632 * to recover from an unexpected bus free condition.
1633 */
1634
1635 static void NCR5380_information_transfer(struct Scsi_Host *instance)
1636 __releases(&hostdata->lock) __acquires(&hostdata->lock)
1637 {
1638 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1639 unsigned char msgout = NOP;
1640 int sink = 0;
1641 int len;
1642 int transfersize;
1643 unsigned char *data;
1644 unsigned char phase, tmp, extended_msg[10], old_phase = 0xff;
1645 struct scsi_cmnd *cmd;
1646
1647 #ifdef SUN3_SCSI_VME
1648 dregs->csr |= CSR_INTR;
1649 #endif
1650
1651 while ((cmd = hostdata->connected)) {
1652 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
1653
1654 tmp = NCR5380_read(STATUS_REG);
1655 /* We only have a valid SCSI phase when REQ is asserted */
1656 if (tmp & SR_REQ) {
1657 phase = (tmp & PHASE_MASK);
1658 if (phase != old_phase) {
1659 old_phase = phase;
1660 NCR5380_dprint_phase(NDEBUG_INFORMATION, instance);
1661 }
1662 #ifdef CONFIG_SUN3
1663 if (phase == PHASE_CMDOUT &&
1664 sun3_dma_setup_done != cmd) {
1665 int count;
1666
1667 if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) {
1668 ++cmd->SCp.buffer;
1669 --cmd->SCp.buffers_residual;
1670 cmd->SCp.this_residual = cmd->SCp.buffer->length;
1671 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
1672 }
1673
1674 count = sun3scsi_dma_xfer_len(hostdata, cmd);
1675
1676 if (count > 0) {
1677 if (rq_data_dir(cmd->request))
1678 sun3scsi_dma_send_setup(hostdata,
1679 cmd->SCp.ptr, count);
1680 else
1681 sun3scsi_dma_recv_setup(hostdata,
1682 cmd->SCp.ptr, count);
1683 sun3_dma_setup_done = cmd;
1684 }
1685 #ifdef SUN3_SCSI_VME
1686 dregs->csr |= CSR_INTR;
1687 #endif
1688 }
1689 #endif /* CONFIG_SUN3 */
1690
1691 if (sink && (phase != PHASE_MSGOUT)) {
1692 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1693
1694 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN |
1695 ICR_ASSERT_ACK);
1696 while (NCR5380_read(STATUS_REG) & SR_REQ)
1697 ;
1698 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1699 ICR_ASSERT_ATN);
1700 sink = 0;
1701 continue;
1702 }
1703
1704 switch (phase) {
1705 case PHASE_DATAOUT:
1706 #if (NDEBUG & NDEBUG_NO_DATAOUT)
1707 shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n");
1708 sink = 1;
1709 do_abort(instance);
1710 cmd->result = DID_ERROR << 16;
1711 complete_cmd(instance, cmd);
1712 hostdata->connected = NULL;
1713 return;
1714 #endif
1715 case PHASE_DATAIN:
1716 /*
1717 * If there is no room left in the current buffer in the
1718 * scatter-gather list, move onto the next one.
1719 */
1720
1721 if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) {
1722 ++cmd->SCp.buffer;
1723 --cmd->SCp.buffers_residual;
1724 cmd->SCp.this_residual = cmd->SCp.buffer->length;
1725 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
1726 dsprintk(NDEBUG_INFORMATION, instance, "%d bytes and %d buffers left\n",
1727 cmd->SCp.this_residual,
1728 cmd->SCp.buffers_residual);
1729 }
1730
1731 /*
1732 * The preferred transfer method is going to be
1733 * PSEUDO-DMA for systems that are strictly PIO,
1734 * since we can let the hardware do the handshaking.
1735 *
1736 * For this to work, we need to know the transfersize
1737 * ahead of time, since the pseudo-DMA code will sit
1738 * in an unconditional loop.
1739 */
1740
1741 transfersize = 0;
1742 if (!cmd->device->borken)
1743 transfersize = NCR5380_dma_xfer_len(hostdata, cmd);
1744
1745 if (transfersize > 0) {
1746 len = transfersize;
1747 if (NCR5380_transfer_dma(instance, &phase,
1748 &len, (unsigned char **)&cmd->SCp.ptr)) {
1749 /*
1750 * If the watchdog timer fires, all future
1751 * accesses to this device will use the
1752 * polled-IO.
1753 */
1754 scmd_printk(KERN_INFO, cmd,
1755 "switching to slow handshake\n");
1756 cmd->device->borken = 1;
1757 sink = 1;
1758 do_abort(instance);
1759 cmd->result = DID_ERROR << 16;
1760 /* XXX - need to source or sink data here, as appropriate */
1761 }
1762 } else {
1763 /* Transfer a small chunk so that the
1764 * irq mode lock is not held too long.
1765 */
1766 transfersize = min(cmd->SCp.this_residual,
1767 NCR5380_PIO_CHUNK_SIZE);
1768 len = transfersize;
1769 NCR5380_transfer_pio(instance, &phase, &len,
1770 (unsigned char **)&cmd->SCp.ptr);
1771 cmd->SCp.this_residual -= transfersize - len;
1772 }
1773 #ifdef CONFIG_SUN3
1774 if (sun3_dma_setup_done == cmd)
1775 sun3_dma_setup_done = NULL;
1776 #endif
1777 return;
1778 case PHASE_MSGIN:
1779 len = 1;
1780 data = &tmp;
1781 NCR5380_transfer_pio(instance, &phase, &len, &data);
1782 cmd->SCp.Message = tmp;
1783
1784 switch (tmp) {
1785 case ABORT:
1786 case COMMAND_COMPLETE:
1787 /* Accept message by clearing ACK */
1788 sink = 1;
1789 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1790 dsprintk(NDEBUG_QUEUES, instance,
1791 "COMMAND COMPLETE %p target %d lun %llu\n",
1792 cmd, scmd_id(cmd), cmd->device->lun);
1793
1794 hostdata->connected = NULL;
1795
1796 cmd->result &= ~0xffff;
1797 cmd->result |= cmd->SCp.Status;
1798 cmd->result |= cmd->SCp.Message << 8;
1799
1800 if (cmd->cmnd[0] == REQUEST_SENSE)
1801 complete_cmd(instance, cmd);
1802 else {
1803 if (cmd->SCp.Status == SAM_STAT_CHECK_CONDITION ||
1804 cmd->SCp.Status == SAM_STAT_COMMAND_TERMINATED) {
1805 dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n",
1806 cmd);
1807 list_add_tail(&ncmd->list,
1808 &hostdata->autosense);
1809 } else
1810 complete_cmd(instance, cmd);
1811 }
1812
1813 /*
1814 * Restore phase bits to 0 so an interrupted selection,
1815 * arbitration can resume.
1816 */
1817 NCR5380_write(TARGET_COMMAND_REG, 0);
1818
1819 /* Enable reselect interrupts */
1820 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1821
1822 maybe_release_dma_irq(instance);
1823 return;
1824 case MESSAGE_REJECT:
1825 /* Accept message by clearing ACK */
1826 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1827 switch (hostdata->last_message) {
1828 case HEAD_OF_QUEUE_TAG:
1829 case ORDERED_QUEUE_TAG:
1830 case SIMPLE_QUEUE_TAG:
1831 cmd->device->simple_tags = 0;
1832 hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF));
1833 break;
1834 default:
1835 break;
1836 }
1837 break;
1838 case DISCONNECT:
1839 /* Accept message by clearing ACK */
1840 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1841 hostdata->connected = NULL;
1842 list_add(&ncmd->list, &hostdata->disconnected);
1843 dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES,
1844 instance, "connected command %p for target %d lun %llu moved to disconnected queue\n",
1845 cmd, scmd_id(cmd), cmd->device->lun);
1846
1847 /*
1848 * Restore phase bits to 0 so an interrupted selection,
1849 * arbitration can resume.
1850 */
1851 NCR5380_write(TARGET_COMMAND_REG, 0);
1852
1853 /* Enable reselect interrupts */
1854 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1855 #ifdef SUN3_SCSI_VME
1856 dregs->csr |= CSR_DMA_ENABLE;
1857 #endif
1858 return;
1859 /*
1860 * The SCSI data pointer is *IMPLICITLY* saved on a disconnect
1861 * operation, in violation of the SCSI spec so we can safely
1862 * ignore SAVE/RESTORE pointers calls.
1863 *
1864 * Unfortunately, some disks violate the SCSI spec and
1865 * don't issue the required SAVE_POINTERS message before
1866 * disconnecting, and we have to break spec to remain
1867 * compatible.
1868 */
1869 case SAVE_POINTERS:
1870 case RESTORE_POINTERS:
1871 /* Accept message by clearing ACK */
1872 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1873 break;
1874 case EXTENDED_MESSAGE:
1875 /*
1876 * Start the message buffer with the EXTENDED_MESSAGE
1877 * byte, since spi_print_msg() wants the whole thing.
1878 */
1879 extended_msg[0] = EXTENDED_MESSAGE;
1880 /* Accept first byte by clearing ACK */
1881 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1882
1883 spin_unlock_irq(&hostdata->lock);
1884
1885 dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n");
1886
1887 len = 2;
1888 data = extended_msg + 1;
1889 phase = PHASE_MSGIN;
1890 NCR5380_transfer_pio(instance, &phase, &len, &data);
1891 dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n",
1892 (int)extended_msg[1],
1893 (int)extended_msg[2]);
1894
1895 if (!len && extended_msg[1] > 0 &&
1896 extended_msg[1] <= sizeof(extended_msg) - 2) {
1897 /* Accept third byte by clearing ACK */
1898 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1899 len = extended_msg[1] - 1;
1900 data = extended_msg + 3;
1901 phase = PHASE_MSGIN;
1902
1903 NCR5380_transfer_pio(instance, &phase, &len, &data);
1904 dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n",
1905 len);
1906
1907 switch (extended_msg[2]) {
1908 case EXTENDED_SDTR:
1909 case EXTENDED_WDTR:
1910 case EXTENDED_MODIFY_DATA_POINTER:
1911 case EXTENDED_EXTENDED_IDENTIFY:
1912 tmp = 0;
1913 }
1914 } else if (len) {
1915 shost_printk(KERN_ERR, instance, "error receiving extended message\n");
1916 tmp = 0;
1917 } else {
1918 shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n",
1919 extended_msg[2], extended_msg[1]);
1920 tmp = 0;
1921 }
1922
1923 spin_lock_irq(&hostdata->lock);
1924 if (!hostdata->connected)
1925 return;
1926
1927 /* Fall through to reject message */
1928
1929 /*
1930 * If we get something weird that we aren't expecting,
1931 * reject it.
1932 */
1933 default:
1934 if (!tmp) {
1935 shost_printk(KERN_ERR, instance, "rejecting message ");
1936 spi_print_msg(extended_msg);
1937 printk("\n");
1938 } else if (tmp != EXTENDED_MESSAGE)
1939 scmd_printk(KERN_INFO, cmd,
1940 "rejecting unknown message %02x\n",
1941 tmp);
1942 else
1943 scmd_printk(KERN_INFO, cmd,
1944 "rejecting unknown extended message code %02x, length %d\n",
1945 extended_msg[1], extended_msg[0]);
1946
1947 msgout = MESSAGE_REJECT;
1948 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1949 break;
1950 } /* switch (tmp) */
1951 break;
1952 case PHASE_MSGOUT:
1953 len = 1;
1954 data = &msgout;
1955 hostdata->last_message = msgout;
1956 NCR5380_transfer_pio(instance, &phase, &len, &data);
1957 if (msgout == ABORT) {
1958 hostdata->connected = NULL;
1959 cmd->result = DID_ERROR << 16;
1960 complete_cmd(instance, cmd);
1961 maybe_release_dma_irq(instance);
1962 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1963 return;
1964 }
1965 msgout = NOP;
1966 break;
1967 case PHASE_CMDOUT:
1968 len = cmd->cmd_len;
1969 data = cmd->cmnd;
1970 /*
1971 * XXX for performance reasons, on machines with a
1972 * PSEUDO-DMA architecture we should probably
1973 * use the dma transfer function.
1974 */
1975 NCR5380_transfer_pio(instance, &phase, &len, &data);
1976 break;
1977 case PHASE_STATIN:
1978 len = 1;
1979 data = &tmp;
1980 NCR5380_transfer_pio(instance, &phase, &len, &data);
1981 cmd->SCp.Status = tmp;
1982 break;
1983 default:
1984 shost_printk(KERN_ERR, instance, "unknown phase\n");
1985 NCR5380_dprint(NDEBUG_ANY, instance);
1986 } /* switch(phase) */
1987 } else {
1988 spin_unlock_irq(&hostdata->lock);
1989 NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ);
1990 spin_lock_irq(&hostdata->lock);
1991 }
1992 }
1993 }
1994
1995 /*
1996 * Function : void NCR5380_reselect (struct Scsi_Host *instance)
1997 *
1998 * Purpose : does reselection, initializing the instance->connected
1999 * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q
2000 * nexus has been reestablished,
2001 *
2002 * Inputs : instance - this instance of the NCR5380.
2003 */
2004
2005 static void NCR5380_reselect(struct Scsi_Host *instance)
2006 {
2007 struct NCR5380_hostdata *hostdata = shost_priv(instance);
2008 unsigned char target_mask;
2009 unsigned char lun;
2010 unsigned char msg[3];
2011 struct NCR5380_cmd *ncmd;
2012 struct scsi_cmnd *tmp;
2013
2014 /*
2015 * Disable arbitration, etc. since the host adapter obviously
2016 * lost, and tell an interrupted NCR5380_select() to restart.
2017 */
2018
2019 NCR5380_write(MODE_REG, MR_BASE);
2020
2021 target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask);
2022
2023 dsprintk(NDEBUG_RESELECTION, instance, "reselect\n");
2024
2025 /*
2026 * At this point, we have detected that our SCSI ID is on the bus,
2027 * SEL is true and BSY was false for at least one bus settle delay
2028 * (400 ns).
2029 *
2030 * We must assert BSY ourselves, until the target drops the SEL
2031 * signal.
2032 */
2033
2034 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY);
2035 if (NCR5380_poll_politely(hostdata,
2036 STATUS_REG, SR_SEL, 0, 2 * HZ) < 0) {
2037 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2038 return;
2039 }
2040 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2041
2042 /*
2043 * Wait for target to go into MSGIN.
2044 */
2045
2046 if (NCR5380_poll_politely(hostdata,
2047 STATUS_REG, SR_REQ, SR_REQ, 2 * HZ) < 0) {
2048 do_abort(instance);
2049 return;
2050 }
2051
2052 #ifdef CONFIG_SUN3
2053 /* acknowledge toggle to MSGIN */
2054 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(PHASE_MSGIN));
2055
2056 /* peek at the byte without really hitting the bus */
2057 msg[0] = NCR5380_read(CURRENT_SCSI_DATA_REG);
2058 #else
2059 {
2060 int len = 1;
2061 unsigned char *data = msg;
2062 unsigned char phase = PHASE_MSGIN;
2063
2064 NCR5380_transfer_pio(instance, &phase, &len, &data);
2065
2066 if (len) {
2067 do_abort(instance);
2068 return;
2069 }
2070 }
2071 #endif /* CONFIG_SUN3 */
2072
2073 if (!(msg[0] & 0x80)) {
2074 shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got ");
2075 spi_print_msg(msg);
2076 printk("\n");
2077 do_abort(instance);
2078 return;
2079 }
2080 lun = msg[0] & 0x07;
2081
2082 /*
2083 * We need to add code for SCSI-II to track which devices have
2084 * I_T_L_Q nexuses established, and which have simple I_T_L
2085 * nexuses so we can chose to do additional data transfer.
2086 */
2087
2088 /*
2089 * Find the command corresponding to the I_T_L or I_T_L_Q nexus we
2090 * just reestablished, and remove it from the disconnected queue.
2091 */
2092
2093 tmp = NULL;
2094 list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2095 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2096
2097 if (target_mask == (1 << scmd_id(cmd)) &&
2098 lun == (u8)cmd->device->lun) {
2099 list_del(&ncmd->list);
2100 tmp = cmd;
2101 break;
2102 }
2103 }
2104
2105 if (tmp) {
2106 dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance,
2107 "reselect: removed %p from disconnected queue\n", tmp);
2108 } else {
2109 shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n",
2110 target_mask, lun);
2111 /*
2112 * Since we have an established nexus that we can't do anything
2113 * with, we must abort it.
2114 */
2115 do_abort(instance);
2116 return;
2117 }
2118
2119 #ifdef CONFIG_SUN3
2120 if (sun3_dma_setup_done != tmp) {
2121 int count;
2122
2123 if (!tmp->SCp.this_residual && tmp->SCp.buffers_residual) {
2124 ++tmp->SCp.buffer;
2125 --tmp->SCp.buffers_residual;
2126 tmp->SCp.this_residual = tmp->SCp.buffer->length;
2127 tmp->SCp.ptr = sg_virt(tmp->SCp.buffer);
2128 }
2129
2130 count = sun3scsi_dma_xfer_len(hostdata, tmp);
2131
2132 if (count > 0) {
2133 if (rq_data_dir(tmp->request))
2134 sun3scsi_dma_send_setup(hostdata,
2135 tmp->SCp.ptr, count);
2136 else
2137 sun3scsi_dma_recv_setup(hostdata,
2138 tmp->SCp.ptr, count);
2139 sun3_dma_setup_done = tmp;
2140 }
2141 }
2142
2143 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
2144 #endif /* CONFIG_SUN3 */
2145
2146 /* Accept message by clearing ACK */
2147 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2148
2149 hostdata->connected = tmp;
2150 dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu\n",
2151 scmd_id(tmp), tmp->device->lun);
2152 }
2153
2154 /**
2155 * list_find_cmd - test for presence of a command in a linked list
2156 * @haystack: list of commands
2157 * @needle: command to search for
2158 */
2159
2160 static bool list_find_cmd(struct list_head *haystack,
2161 struct scsi_cmnd *needle)
2162 {
2163 struct NCR5380_cmd *ncmd;
2164
2165 list_for_each_entry(ncmd, haystack, list)
2166 if (NCR5380_to_scmd(ncmd) == needle)
2167 return true;
2168 return false;
2169 }
2170
2171 /**
2172 * list_remove_cmd - remove a command from linked list
2173 * @haystack: list of commands
2174 * @needle: command to remove
2175 */
2176
2177 static bool list_del_cmd(struct list_head *haystack,
2178 struct scsi_cmnd *needle)
2179 {
2180 if (list_find_cmd(haystack, needle)) {
2181 struct NCR5380_cmd *ncmd = scsi_cmd_priv(needle);
2182
2183 list_del(&ncmd->list);
2184 return true;
2185 }
2186 return false;
2187 }
2188
2189 /**
2190 * NCR5380_abort - scsi host eh_abort_handler() method
2191 * @cmd: the command to be aborted
2192 *
2193 * Try to abort a given command by removing it from queues and/or sending
2194 * the target an abort message. This may not succeed in causing a target
2195 * to abort the command. Nonetheless, the low-level driver must forget about
2196 * the command because the mid-layer reclaims it and it may be re-issued.
2197 *
2198 * The normal path taken by a command is as follows. For EH we trace this
2199 * same path to locate and abort the command.
2200 *
2201 * unissued -> selecting -> [unissued -> selecting ->]... connected ->
2202 * [disconnected -> connected ->]...
2203 * [autosense -> connected ->] done
2204 *
2205 * If cmd was not found at all then presumably it has already been completed,
2206 * in which case return SUCCESS to try to avoid further EH measures.
2207 *
2208 * If the command has not completed yet, we must not fail to find it.
2209 * We have no option but to forget the aborted command (even if it still
2210 * lacks sense data). The mid-layer may re-issue a command that is in error
2211 * recovery (see scsi_send_eh_cmnd), but the logic and data structures in
2212 * this driver are such that a command can appear on one queue only.
2213 *
2214 * The lock protects driver data structures, but EH handlers also use it
2215 * to serialize their own execution and prevent their own re-entry.
2216 */
2217
2218 static int NCR5380_abort(struct scsi_cmnd *cmd)
2219 {
2220 struct Scsi_Host *instance = cmd->device->host;
2221 struct NCR5380_hostdata *hostdata = shost_priv(instance);
2222 unsigned long flags;
2223 int result = SUCCESS;
2224
2225 spin_lock_irqsave(&hostdata->lock, flags);
2226
2227 #if (NDEBUG & NDEBUG_ANY)
2228 scmd_printk(KERN_INFO, cmd, __func__);
2229 #endif
2230 NCR5380_dprint(NDEBUG_ANY, instance);
2231 NCR5380_dprint_phase(NDEBUG_ANY, instance);
2232
2233 if (list_del_cmd(&hostdata->unissued, cmd)) {
2234 dsprintk(NDEBUG_ABORT, instance,
2235 "abort: removed %p from issue queue\n", cmd);
2236 cmd->result = DID_ABORT << 16;
2237 cmd->scsi_done(cmd); /* No tag or busy flag to worry about */
2238 goto out;
2239 }
2240
2241 if (hostdata->selecting == cmd) {
2242 dsprintk(NDEBUG_ABORT, instance,
2243 "abort: cmd %p == selecting\n", cmd);
2244 hostdata->selecting = NULL;
2245 cmd->result = DID_ABORT << 16;
2246 complete_cmd(instance, cmd);
2247 goto out;
2248 }
2249
2250 if (list_del_cmd(&hostdata->disconnected, cmd)) {
2251 dsprintk(NDEBUG_ABORT, instance,
2252 "abort: removed %p from disconnected list\n", cmd);
2253 /* Can't call NCR5380_select() and send ABORT because that
2254 * means releasing the lock. Need a bus reset.
2255 */
2256 set_host_byte(cmd, DID_ERROR);
2257 complete_cmd(instance, cmd);
2258 result = FAILED;
2259 goto out;
2260 }
2261
2262 if (hostdata->connected == cmd) {
2263 dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd);
2264 hostdata->connected = NULL;
2265 hostdata->dma_len = 0;
2266 if (do_abort(instance)) {
2267 set_host_byte(cmd, DID_ERROR);
2268 complete_cmd(instance, cmd);
2269 result = FAILED;
2270 goto out;
2271 }
2272 set_host_byte(cmd, DID_ABORT);
2273 complete_cmd(instance, cmd);
2274 goto out;
2275 }
2276
2277 if (list_del_cmd(&hostdata->autosense, cmd)) {
2278 dsprintk(NDEBUG_ABORT, instance,
2279 "abort: removed %p from sense queue\n", cmd);
2280 set_host_byte(cmd, DID_ERROR);
2281 complete_cmd(instance, cmd);
2282 }
2283
2284 out:
2285 if (result == FAILED)
2286 dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd);
2287 else
2288 dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd);
2289
2290 queue_work(hostdata->work_q, &hostdata->main_task);
2291 maybe_release_dma_irq(instance);
2292 spin_unlock_irqrestore(&hostdata->lock, flags);
2293
2294 return result;
2295 }
2296
2297
2298 /**
2299 * NCR5380_bus_reset - reset the SCSI bus
2300 * @cmd: SCSI command undergoing EH
2301 *
2302 * Returns SUCCESS
2303 */
2304
2305 static int NCR5380_bus_reset(struct scsi_cmnd *cmd)
2306 {
2307 struct Scsi_Host *instance = cmd->device->host;
2308 struct NCR5380_hostdata *hostdata = shost_priv(instance);
2309 int i;
2310 unsigned long flags;
2311 struct NCR5380_cmd *ncmd;
2312
2313 spin_lock_irqsave(&hostdata->lock, flags);
2314
2315 #if (NDEBUG & NDEBUG_ANY)
2316 scmd_printk(KERN_INFO, cmd, __func__);
2317 #endif
2318 NCR5380_dprint(NDEBUG_ANY, instance);
2319 NCR5380_dprint_phase(NDEBUG_ANY, instance);
2320
2321 do_reset(instance);
2322
2323 /* reset NCR registers */
2324 NCR5380_write(MODE_REG, MR_BASE);
2325 NCR5380_write(TARGET_COMMAND_REG, 0);
2326 NCR5380_write(SELECT_ENABLE_REG, 0);
2327
2328 /* After the reset, there are no more connected or disconnected commands
2329 * and no busy units; so clear the low-level status here to avoid
2330 * conflicts when the mid-level code tries to wake up the affected
2331 * commands!
2332 */
2333
2334 if (list_del_cmd(&hostdata->unissued, cmd)) {
2335 cmd->result = DID_RESET << 16;
2336 cmd->scsi_done(cmd);
2337 }
2338
2339 if (hostdata->selecting) {
2340 hostdata->selecting->result = DID_RESET << 16;
2341 complete_cmd(instance, hostdata->selecting);
2342 hostdata->selecting = NULL;
2343 }
2344
2345 list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2346 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2347
2348 set_host_byte(cmd, DID_RESET);
2349 complete_cmd(instance, cmd);
2350 }
2351 INIT_LIST_HEAD(&hostdata->disconnected);
2352
2353 list_for_each_entry(ncmd, &hostdata->autosense, list) {
2354 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2355
2356 set_host_byte(cmd, DID_RESET);
2357 cmd->scsi_done(cmd);
2358 }
2359 INIT_LIST_HEAD(&hostdata->autosense);
2360
2361 if (hostdata->connected) {
2362 set_host_byte(hostdata->connected, DID_RESET);
2363 complete_cmd(instance, hostdata->connected);
2364 hostdata->connected = NULL;
2365 }
2366
2367 for (i = 0; i < 8; ++i)
2368 hostdata->busy[i] = 0;
2369 hostdata->dma_len = 0;
2370
2371 queue_work(hostdata->work_q, &hostdata->main_task);
2372 maybe_release_dma_irq(instance);
2373 spin_unlock_irqrestore(&hostdata->lock, flags);
2374
2375 return SUCCESS;
2376 }